-- reg_rw.vhd -- Eurobot 2004 : APB Team -- Auteur : Pierre-André Galmes -- Registre dont la valeur est accessible en lecture. library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; use work.isa_const.all; use work.nono_const.all; entity reg_rw is port ( rst : in std_logic; -- XXX : savoir si read = 0 ou 1 !! rw : in std_logic; -- read (0) / write (1) enable : in std_logic; data_in : inout T_DATA; data_out : out T_DATA ); end entity; architecture BEHAV of reg_rw is -- signal interne signal REG : T_DATA; begin -- process d'écriture. process (rst, rw, enable, data_in) begin if (rst = '1') then REG <= x"00"; else if (enable = '1') then if (rw = ISA_WRITE) then REG <= data_in; elsif (rw = ISA_READ) then data_in <= REG; end if; else data_in <= "ZZZZZZZZ"; end if; end if; end process; -- data_out <= REG; end BEHAV;