-- bch_gpio.vhd -- Eurobot 2004 : APB Team -- Auteur : Pierre-André Galmes -- Banc de test. -- RQ : Observer 240ns library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all; use work.isa_const.all; use work.nono_const.all; entity bch_gpio is end bch_gpio; architecture sim1 of bch_gpio is component gpio port( rst : in std_logic; clk_i : in std_logic; -- clock du bus isa clk_m : in std_logic; -- master clock rw : in std_logic; -- read (0) / write (1) TODO ?? interrupt : out std_logic; bus_data : inout T_DATA; io_output : inout T_DATA; -- chip select cs_reg_data : in std_logic; cs_reg_direction : in std_logic; cs_reg_it_mask : in std_logic; cs_read_output : in std_logic ); end component; -- définiton des signaux signal rst : std_logic; signal clk_i : std_logic := '0'; signal clk_m : std_logic := '0'; signal rw : std_logic := '0'; signal interrupt : std_logic; signal bus_data : T_DATA := x"00"; signal io_output : T_DATA; -- chip select signal cs_reg_data : std_logic := '0'; signal cs_reg_direction : std_logic := '0'; signal cs_reg_it_mask : std_logic := '0'; signal cs_read_output : std_logic := '0'; constant REG_DATA : std_logic_vector(1 downto 0) := "00"; constant REG_DIRECTION : std_logic_vector(1 downto 0) := "01"; constant REG_IT : std_logic_vector(1 downto 0) := "10"; constant READ_OUTPUT : std_logic_vector(1 downto 0) := "11"; begin -- ----------------------------------------------------- -- mapping du gpio. A reprendre pour le mapping final !! -- ----------------------------------------------------- U1 : gpio port map ( rst => rst, clk_i => clk_i, clk_m => clk_m, rw => rw, interrupt => interrupt, bus_data => bus_data, io_output => io_output, cs_read_output => cs_read_output, cs_reg_it_mask => cs_reg_it_mask, cs_reg_direction => cs_reg_direction, cs_reg_data => cs_reg_data ); -- --------------------------------- -- Process de test. -- --------------------------------- process -- ---------------------------------- -- déclaration de procédures de test. -- ---------------------------------- -- Lire dans un registre ou la sortie ! procedure do_read (action : in std_logic_vector(1 downto 0)) is begin -- sélection du registre cs_reg_data <= '0'; cs_reg_direction <= '0'; cs_reg_it_mask <= '0'; cs_read_output <= '0'; if (action = REG_DATA) then cs_reg_data <= '1'; end if; if (action = REG_DIRECTION) then cs_reg_direction <= '1'; end if; if (action = REG_IT) then cs_reg_it_mask <= '1'; end if; if (action = READ_OUTPUT) then cs_read_output <= '1'; end if; -- on lit. rw <= ISA_READ; bus_data <= "ZZZZZZZZ"; --est en sortie. end do_read; -- Ecrire dans un registre ! procedure do_write (action : in std_logic_vector(1 downto 0); data : in T_DATA) is begin -- sélection du registre cs_reg_data <= '0'; cs_reg_direction <= '0'; cs_reg_it_mask <= '0'; cs_read_output <= '0'; if (action = REG_DATA) then cs_reg_data <= '1'; end if; if (action = REG_DIRECTION) then cs_reg_direction <= '1'; end if; if (action = REG_IT) then cs_reg_it_mask <= '1'; end if; if (action = READ_OUTPUT) then cs_read_output <= '1'; end if; -- On écrit. rw <= ISA_WRITE; bus_data <= data; end do_write; -- Tester que le décodeur fonctionne correctement. --procedure test_decod (bidon1 : in std_logic) is --begin --end test_decod; -- ------------------------- -- Début du process de test. -- ------------------------- begin -- Ecriture dans les trois registres. wait for (ISA_CK_PERIOD); do_write (REG_DIRECTION, "00000111"); -- 3 bits poid faible : in. wait for (ISA_CK_PERIOD); do_write (REG_IT, "11111000"); wait for (ISA_CK_PERIOD); do_write (REG_DATA, x"01"); -- 3 bits poid faible : in. -- cs_reg_data <= '0'; -- interruption sur les 5 bits de poid faible. -- wait for (3*CK_PERIOD); -- Lecture dans les trois registres. wait for (ISA_CK_PERIOD); do_read (REG_IT); wait for (ISA_CK_PERIOD); do_read (REG_DIRECTION); wait for (ISA_CK_PERIOD); do_read (REG_DATA); -- Lecture de la donnée sur io_output. wait for (ISA_CK_PERIOD); do_read (READ_OUTPUT); end process; rst <= '1','0' after (CK_PERIOD/5); clk_m <= not clk_m after (CK_PERIOD/2); clk_i <= not clk_i after (ISA_CK_PERIOD/2); -- Affecter des entrées sur la sortie : test des interruptions io_output <= "00001ZZZ", "00010ZZZ" after 5*ISA_CK_PERIOD, "00001ZZZ" after 10*ISA_CK_PERIOD, "00010ZZZ" after 15*ISA_CK_PERIOD; end sim1; -- Configuration configuration cf1_bch_gpio of bch_gpio is for sim1 for all : gpio use entity work.gpio(RTL); end for; end for; end cf1_bch_gpio;