-- Xilinx Vhdl netlist produced by netgen application (version G.26) -- Command : -intstyle ise -s 6 -pcf decodisa.pcf -ngm decodisa.ngm -rpw 100 -tpw 0 -ar Structure -xon true -w -ofmt vhdl -sim decodisa.ncd decodisa_timesim.vhd -- Input file : decodisa.ncd -- Output file : decodisa_timesim.vhd -- Design name : decodisa -- # of Entities : 1 -- Xilinx : D:/xilinx -- Device : 2s200fg456-6 (PRODUCTION 1.27 2003-11-04) -- This vhdl netlist is a simulation model and uses simulation -- primitives which may not represent the true implementation of the -- device, however the netlist is functionally correct and should not -- be modified. This file cannot be synthesized and should only be used -- with supported simulation tools. library IEEE; use IEEE.STD_LOGIC_1164.ALL; library SIMPRIM; use SIMPRIM.VCOMPONENTS.ALL; use SIMPRIM.VPACKAGE.ALL; entity decodisa is port ( rw : out STD_LOGIC; clk : out STD_LOGIC; IOW : in STD_LOGIC := 'X'; IOR : in STD_LOGIC := 'X'; AEN : in STD_LOGIC := 'X'; cs : out STD_LOGIC_VECTOR ( 255 downto 0 ); adr_bus : in STD_LOGIC_VECTOR ( 23 downto 0 ) ); end decodisa; architecture Structure of decodisa is signal adr_bus_3_IBUF : STD_LOGIC; signal adr_bus_2_IBUF : STD_LOGIC; signal adr_bus_1_IBUF : STD_LOGIC; signal adr_bus_0_IBUF : STD_LOGIC; signal adr_bus_7_IBUF : STD_LOGIC; signal adr_bus_6_IBUF : STD_LOGIC; signal adr_bus_5_IBUF : STD_LOGIC; signal adr_bus_4_IBUF : STD_LOGIC; signal dadrL_N18117 : STD_LOGIC; signal dadrL_N18116 : STD_LOGIC; signal dadrL_N14638 : STD_LOGIC; signal dadrL_N14637 : STD_LOGIC; signal dadrL_N16129 : STD_LOGIC; signal dadrL_N16128 : STD_LOGIC; signal dadrL_N16058 : STD_LOGIC; signal dadrL_N16057 : STD_LOGIC; signal dadrL_N1361 : STD_LOGIC; signal dadrL_N1360 : STD_LOGIC; signal dadrL_N1290 : STD_LOGIC; signal dadrL_N1289 : STD_LOGIC; signal dadrL_N8816 : STD_LOGIC; signal dadrL_N8815 : STD_LOGIC; signal dadrL_N11442 : STD_LOGIC; signal dadrL_N11443 : STD_LOGIC; signal dadrL_N8745 : STD_LOGIC; signal dadrL_N8744 : STD_LOGIC; signal dadrL_N11371 : STD_LOGIC; signal dadrL_N11372 : STD_LOGIC; signal dadrL_N18330 : STD_LOGIC; signal dadrL_N18329 : STD_LOGIC; signal dadrL_N14851 : STD_LOGIC; signal dadrL_N14850 : STD_LOGIC; signal dadrL_N18259 : STD_LOGIC; signal dadrL_N18258 : STD_LOGIC; signal dadrL_N16271 : STD_LOGIC; signal dadrL_N16270 : STD_LOGIC; signal dadrL_N14780 : STD_LOGIC; signal dadrL_N14779 : STD_LOGIC; signal dadrL_N16200 : STD_LOGIC; signal dadrL_N16199 : STD_LOGIC; signal dadrL_N1502 : STD_LOGIC; signal dadrL_N1503 : STD_LOGIC; signal dadrL_N1431 : STD_LOGIC; signal dadrL_N1432 : STD_LOGIC; signal dadrL_N8958 : STD_LOGIC; signal dadrL_N8957 : STD_LOGIC; signal dadrL_N11585 : STD_LOGIC; signal dadrL_N11584 : STD_LOGIC; signal dadrL_N8887 : STD_LOGIC; signal dadrL_N8886 : STD_LOGIC; signal dadrL_N11513 : STD_LOGIC; signal dadrL_N11514 : STD_LOGIC; signal dadrL_N14992 : STD_LOGIC; signal dadrL_N14993 : STD_LOGIC; signal dadrL_N16412 : STD_LOGIC; signal dadrL_N16413 : STD_LOGIC; signal dadrL_N14921 : STD_LOGIC; signal dadrL_N14922 : STD_LOGIC; signal dadrL_N16341 : STD_LOGIC; signal dadrL_N16342 : STD_LOGIC; signal dadrL_N1645 : STD_LOGIC; signal dadrL_N1644 : STD_LOGIC; signal dadrL_N1573 : STD_LOGIC; signal dadrL_N1574 : STD_LOGIC; signal dadrL_N11727 : STD_LOGIC; signal dadrL_N11726 : STD_LOGIC; signal dadrL_N11656 : STD_LOGIC; signal dadrL_N11655 : STD_LOGIC; signal dadrL_N15135 : STD_LOGIC; signal dadrL_N15134 : STD_LOGIC; signal dadrL_N16555 : STD_LOGIC; signal dadrL_N16554 : STD_LOGIC; signal dadrL_N15063 : STD_LOGIC; signal dadrL_N15064 : STD_LOGIC; signal dadrL_N16483 : STD_LOGIC; signal dadrL_N16484 : STD_LOGIC; signal dadrL_N1787 : STD_LOGIC; signal dadrL_N1786 : STD_LOGIC; signal dadrL_N1716 : STD_LOGIC; signal dadrL_N1715 : STD_LOGIC; signal dadrL_N11869 : STD_LOGIC; signal dadrL_N11868 : STD_LOGIC; signal dadrL_N11798 : STD_LOGIC; signal dadrL_N11797 : STD_LOGIC; signal dadrL_N15277 : STD_LOGIC; signal dadrL_N15276 : STD_LOGIC; signal dadrL_N15206 : STD_LOGIC; signal dadrL_N15205 : STD_LOGIC; signal dadrL_N16697 : STD_LOGIC; signal dadrL_N16696 : STD_LOGIC; signal dadrL_N16626 : STD_LOGIC; signal dadrL_N16625 : STD_LOGIC; signal dadrL_N1929 : STD_LOGIC; signal dadrL_N1928 : STD_LOGIC; signal dadrL_N1858 : STD_LOGIC; signal dadrL_N1857 : STD_LOGIC; signal dadrL_N12011 : STD_LOGIC; signal dadrL_N12010 : STD_LOGIC; signal dadrL_N11940 : STD_LOGIC; signal dadrL_N11939 : STD_LOGIC; signal dadrL_N15419 : STD_LOGIC; signal dadrL_N15418 : STD_LOGIC; signal dadrL_N16839 : STD_LOGIC; signal dadrL_N16838 : STD_LOGIC; signal dadrL_N15348 : STD_LOGIC; signal dadrL_N15347 : STD_LOGIC; signal dadrL_N16768 : STD_LOGIC; signal dadrL_N16767 : STD_LOGIC; signal dadrL_N12152 : STD_LOGIC; signal dadrL_N12153 : STD_LOGIC; signal dadrL_N12081 : STD_LOGIC; signal dadrL_N12082 : STD_LOGIC; signal dadrL_N15561 : STD_LOGIC; signal dadrL_N15560 : STD_LOGIC; signal dadrL_N15490 : STD_LOGIC; signal dadrL_N15489 : STD_LOGIC; signal dadrL_N16910 : STD_LOGIC; signal dadrL_N16909 : STD_LOGIC; signal dadrL_N4413 : STD_LOGIC; signal dadrL_N4414 : STD_LOGIC; signal dadrL_N4342 : STD_LOGIC; signal dadrL_N4343 : STD_LOGIC; signal dadrL_N12223 : STD_LOGIC; signal dadrL_N12224 : STD_LOGIC; signal dadrL_N15702 : STD_LOGIC; signal dadrL_N15703 : STD_LOGIC; signal dadrL_N15631 : STD_LOGIC; signal dadrL_N15632 : STD_LOGIC; signal dadrL_N4556 : STD_LOGIC; signal dadrL_N4555 : STD_LOGIC; signal dadrL_N4485 : STD_LOGIC; signal dadrL_N4484 : STD_LOGIC; signal dadrL_N12366 : STD_LOGIC; signal dadrL_N12365 : STD_LOGIC; signal dadrL_N15845 : STD_LOGIC; signal dadrL_N15844 : STD_LOGIC; signal dadrL_N12295 : STD_LOGIC; signal dadrL_N12294 : STD_LOGIC; signal dadrL_N15773 : STD_LOGIC; signal dadrL_N15774 : STD_LOGIC; signal dadrL_N4698 : STD_LOGIC; signal dadrL_N4697 : STD_LOGIC; signal dadrL_N4627 : STD_LOGIC; signal dadrL_N4626 : STD_LOGIC; signal dadrL_N12508 : STD_LOGIC; signal dadrL_N12507 : STD_LOGIC; signal dadrL_N15987 : STD_LOGIC; signal dadrL_N15986 : STD_LOGIC; signal dadrL_N12437 : STD_LOGIC; signal dadrL_N12436 : STD_LOGIC; signal dadrL_N15916 : STD_LOGIC; signal dadrL_N15915 : STD_LOGIC; signal dadrL_N4840 : STD_LOGIC; signal dadrL_N4839 : STD_LOGIC; signal dadrL_N4769 : STD_LOGIC; signal dadrL_N4768 : STD_LOGIC; signal dadrL_N12650 : STD_LOGIC; signal dadrL_N12649 : STD_LOGIC; signal dadrL_N12579 : STD_LOGIC; signal dadrL_N12578 : STD_LOGIC; signal dadrL_N4981 : STD_LOGIC; signal dadrL_N4982 : STD_LOGIC; signal dadrL_N4911 : STD_LOGIC; signal dadrL_N4910 : STD_LOGIC; signal dadrL_N5337 : STD_LOGIC; signal dadrL_N5336 : STD_LOGIC; signal dadrL_N5266 : STD_LOGIC; signal dadrL_N5265 : STD_LOGIC; signal dadrL_N12791 : STD_LOGIC; signal dadrL_N12792 : STD_LOGIC; signal dadrL_N12721 : STD_LOGIC; signal dadrL_N12720 : STD_LOGIC; signal dadrL_N5123 : STD_LOGIC; signal dadrL_N5124 : STD_LOGIC; signal dadrL_N5052 : STD_LOGIC; signal dadrL_N5053 : STD_LOGIC; signal dadrL_N5479 : STD_LOGIC; signal dadrL_N5478 : STD_LOGIC; signal dadrL_N5408 : STD_LOGIC; signal dadrL_N5407 : STD_LOGIC; signal dadrL_N12933 : STD_LOGIC; signal dadrL_N12934 : STD_LOGIC; signal dadrL_N12862 : STD_LOGIC; signal dadrL_N12863 : STD_LOGIC; signal dadrL_N5195 : STD_LOGIC; signal dadrL_N5194 : STD_LOGIC; signal dadrL_N5621 : STD_LOGIC; signal dadrL_N5620 : STD_LOGIC; signal dadrL_N5550 : STD_LOGIC; signal dadrL_N5549 : STD_LOGIC; signal dadrL_N13076 : STD_LOGIC; signal dadrL_N13075 : STD_LOGIC; signal dadrL_N13005 : STD_LOGIC; signal dadrL_N13004 : STD_LOGIC; signal dadrL_N5762 : STD_LOGIC; signal dadrL_N5763 : STD_LOGIC; signal dadrL_N5691 : STD_LOGIC; signal dadrL_N5692 : STD_LOGIC; signal dadrL_N13218 : STD_LOGIC; signal dadrL_N13217 : STD_LOGIC; signal dadrL_N13147 : STD_LOGIC; signal dadrL_N13146 : STD_LOGIC; signal dadrL_N5905 : STD_LOGIC; signal dadrL_N5904 : STD_LOGIC; signal dadrL_N5833 : STD_LOGIC; signal dadrL_N5834 : STD_LOGIC; signal dadrL_N13360 : STD_LOGIC; signal dadrL_N13359 : STD_LOGIC; signal dadrL_N13289 : STD_LOGIC; signal dadrL_N13288 : STD_LOGIC; signal dadrL_N18471 : STD_LOGIC; signal dadrL_N18472 : STD_LOGIC; signal dadrL_N18401 : STD_LOGIC; signal dadrL_N18400 : STD_LOGIC; signal dadrL_N6047 : STD_LOGIC; signal dadrL_N6046 : STD_LOGIC; signal dadrL_N5976 : STD_LOGIC; signal dadrL_N5975 : STD_LOGIC; signal dadrL_N10022 : STD_LOGIC; signal dadrL_N10023 : STD_LOGIC; signal dadrL_N13501 : STD_LOGIC; signal dadrL_N13502 : STD_LOGIC; signal dadrL_N9951 : STD_LOGIC; signal dadrL_N9952 : STD_LOGIC; signal dadrL_N13786 : STD_LOGIC; signal dadrL_N13785 : STD_LOGIC; signal dadrL_N13431 : STD_LOGIC; signal dadrL_N13430 : STD_LOGIC; signal dadrL_N13715 : STD_LOGIC; signal dadrL_N13714 : STD_LOGIC; signal dadrL_N18613 : STD_LOGIC; signal dadrL_N18614 : STD_LOGIC; signal dadrL_N18542 : STD_LOGIC; signal dadrL_N18543 : STD_LOGIC; signal dadrL_N9100 : STD_LOGIC; signal dadrL_N9099 : STD_LOGIC; signal dadrL_N6189 : STD_LOGIC; signal dadrL_N6188 : STD_LOGIC; signal dadrL_N9029 : STD_LOGIC; signal dadrL_N9028 : STD_LOGIC; signal dadrL_N6118 : STD_LOGIC; signal dadrL_N6117 : STD_LOGIC; signal dadrL_N10165 : STD_LOGIC; signal dadrL_N10164 : STD_LOGIC; signal dadrL_N13643 : STD_LOGIC; signal dadrL_N13644 : STD_LOGIC; signal dadrL_N10093 : STD_LOGIC; signal dadrL_N10094 : STD_LOGIC; signal dadrL_N13928 : STD_LOGIC; signal dadrL_N13927 : STD_LOGIC; signal dadrL_N13572 : STD_LOGIC; signal dadrL_N13573 : STD_LOGIC; signal dadrL_N13857 : STD_LOGIC; signal dadrL_N13856 : STD_LOGIC; signal dadrL_N18685 : STD_LOGIC; signal dadrL_N18684 : STD_LOGIC; signal dadrL_N9241 : STD_LOGIC; signal dadrL_N9242 : STD_LOGIC; signal dadrL_N6331 : STD_LOGIC; signal dadrL_N6330 : STD_LOGIC; signal dadrL_N9171 : STD_LOGIC; signal dadrL_N9170 : STD_LOGIC; signal dadrL_N6260 : STD_LOGIC; signal dadrL_N6259 : STD_LOGIC; signal dadrL_N10307 : STD_LOGIC; signal dadrL_N10306 : STD_LOGIC; signal dadrL_N10236 : STD_LOGIC; signal dadrL_N10235 : STD_LOGIC; signal dadrL_N14070 : STD_LOGIC; signal dadrL_N14069 : STD_LOGIC; signal dadrL_N13999 : STD_LOGIC; signal dadrL_N13998 : STD_LOGIC; signal dadrL_N9383 : STD_LOGIC; signal dadrL_N9384 : STD_LOGIC; signal dadrL_N6472 : STD_LOGIC; signal dadrL_N6473 : STD_LOGIC; signal dadrL_N2993 : STD_LOGIC; signal dadrL_N2994 : STD_LOGIC; signal dadrL_N9312 : STD_LOGIC; signal dadrL_N9313 : STD_LOGIC; signal dadrL_N6401 : STD_LOGIC; signal dadrL_N6402 : STD_LOGIC; signal dadrL_N2922 : STD_LOGIC; signal dadrL_N2923 : STD_LOGIC; signal dadrL_N10449 : STD_LOGIC; signal dadrL_N10448 : STD_LOGIC; signal dadrL_N10378 : STD_LOGIC; signal dadrL_N10377 : STD_LOGIC; signal dadrL_N14211 : STD_LOGIC; signal dadrL_N14212 : STD_LOGIC; signal dadrL_N14141 : STD_LOGIC; signal dadrL_N14140 : STD_LOGIC; signal dadrL_N9526 : STD_LOGIC; signal dadrL_N9525 : STD_LOGIC; signal dadrL_N6615 : STD_LOGIC; signal dadrL_N6614 : STD_LOGIC; signal dadrL_N3136 : STD_LOGIC; signal dadrL_N3135 : STD_LOGIC; signal dadrL_N9455 : STD_LOGIC; signal dadrL_N9454 : STD_LOGIC; signal dadrL_N6543 : STD_LOGIC; signal dadrL_N6544 : STD_LOGIC; signal dadrL_N3065 : STD_LOGIC; signal dadrL_N3064 : STD_LOGIC; signal dadrL_N10591 : STD_LOGIC; signal dadrL_N10590 : STD_LOGIC; signal dadrL_N10520 : STD_LOGIC; signal dadrL_N10519 : STD_LOGIC; signal dadrL_N14353 : STD_LOGIC; signal dadrL_N14354 : STD_LOGIC; signal dadrL_N14282 : STD_LOGIC; signal dadrL_N14283 : STD_LOGIC; signal dadrL_N9668 : STD_LOGIC; signal dadrL_N9667 : STD_LOGIC; signal dadrL_N3278 : STD_LOGIC; signal dadrL_N3277 : STD_LOGIC; signal dadrL_N9597 : STD_LOGIC; signal dadrL_N9596 : STD_LOGIC; signal dadrL_N3207 : STD_LOGIC; signal dadrL_N3206 : STD_LOGIC; signal dadrL_N10732 : STD_LOGIC; signal dadrL_N10733 : STD_LOGIC; signal dadrL_N10661 : STD_LOGIC; signal dadrL_N10662 : STD_LOGIC; signal dadrL_N14496 : STD_LOGIC; signal dadrL_N14495 : STD_LOGIC; signal dadrL_N14425 : STD_LOGIC; signal dadrL_N14424 : STD_LOGIC; signal dadrL_N9810 : STD_LOGIC; signal dadrL_N9809 : STD_LOGIC; signal dadrL_N6757 : STD_LOGIC; signal dadrL_N6756 : STD_LOGIC; signal dadrL_N3420 : STD_LOGIC; signal dadrL_N3419 : STD_LOGIC; signal dadrL_N9739 : STD_LOGIC; signal dadrL_N9738 : STD_LOGIC; signal dadrL_N6686 : STD_LOGIC; signal dadrL_N6685 : STD_LOGIC; signal dadrL_N3349 : STD_LOGIC; signal dadrL_N3348 : STD_LOGIC; signal dadrL_N10875 : STD_LOGIC; signal dadrL_N10874 : STD_LOGIC; signal dadrL_N10803 : STD_LOGIC; signal dadrL_N10804 : STD_LOGIC; signal dadrL_N14567 : STD_LOGIC; signal dadrL_N14566 : STD_LOGIC; signal dadrL_N2071 : STD_LOGIC; signal dadrL_N2070 : STD_LOGIC; signal dadrL_N2000 : STD_LOGIC; signal dadrL_N1999 : STD_LOGIC; signal dadrL_N6899 : STD_LOGIC; signal dadrL_N6898 : STD_LOGIC; signal dadrL_N3561 : STD_LOGIC; signal dadrL_N3562 : STD_LOGIC; signal dadrL_N9881 : STD_LOGIC; signal dadrL_N9880 : STD_LOGIC; signal dadrL_N6828 : STD_LOGIC; signal dadrL_N6827 : STD_LOGIC; signal dadrL_N3491 : STD_LOGIC; signal dadrL_N3490 : STD_LOGIC; signal dadrL_N11017 : STD_LOGIC; signal dadrL_N11016 : STD_LOGIC; signal dadrL_N10946 : STD_LOGIC; signal dadrL_N10945 : STD_LOGIC; signal dadrL_N17051 : STD_LOGIC; signal dadrL_N17052 : STD_LOGIC; signal dadrL_N2212 : STD_LOGIC; signal dadrL_N2213 : STD_LOGIC; signal dadrL_N16981 : STD_LOGIC; signal dadrL_N16980 : STD_LOGIC; signal dadrL_N2141 : STD_LOGIC; signal dadrL_N2142 : STD_LOGIC; signal dadrL_N3703 : STD_LOGIC; signal dadrL_N3704 : STD_LOGIC; signal dadrL_N7041 : STD_LOGIC; signal dadrL_N7040 : STD_LOGIC; signal dadrL_N3632 : STD_LOGIC; signal dadrL_N3633 : STD_LOGIC; signal dadrL_N11159 : STD_LOGIC; signal dadrL_N11158 : STD_LOGIC; signal dadrL_N7680 : STD_LOGIC; signal dadrL_N7679 : STD_LOGIC; signal dadrL_N6970 : STD_LOGIC; signal dadrL_N6969 : STD_LOGIC; signal dadrL_N11088 : STD_LOGIC; signal dadrL_N11087 : STD_LOGIC; signal dadrL_N7609 : STD_LOGIC; signal dadrL_N7608 : STD_LOGIC; signal dadrL_N17193 : STD_LOGIC; signal dadrL_N17194 : STD_LOGIC; signal dadrL_N2355 : STD_LOGIC; signal dadrL_N2354 : STD_LOGIC; signal dadrL_N17122 : STD_LOGIC; signal dadrL_N17123 : STD_LOGIC; signal dadrL_N2283 : STD_LOGIC; signal dadrL_N2284 : STD_LOGIC; signal dadrL_N3846 : STD_LOGIC; signal dadrL_N3845 : STD_LOGIC; signal dadrL_N7182 : STD_LOGIC; signal dadrL_N7183 : STD_LOGIC; signal dadrL_N3775 : STD_LOGIC; signal dadrL_N3774 : STD_LOGIC; signal dadrL_N11301 : STD_LOGIC; signal dadrL_N11300 : STD_LOGIC; signal dadrL_N7821 : STD_LOGIC; signal dadrL_N7822 : STD_LOGIC; signal dadrL_N7111 : STD_LOGIC; signal dadrL_N7112 : STD_LOGIC; signal dadrL_N11230 : STD_LOGIC; signal dadrL_N11229 : STD_LOGIC; signal dadrL_N7751 : STD_LOGIC; signal dadrL_N7750 : STD_LOGIC; signal dadrL_N17336 : STD_LOGIC; signal dadrL_N17335 : STD_LOGIC; signal dadrL_N2497 : STD_LOGIC; signal dadrL_N2496 : STD_LOGIC; signal dadrL_N17265 : STD_LOGIC; signal dadrL_N17264 : STD_LOGIC; signal dadrL_N2426 : STD_LOGIC; signal dadrL_N2425 : STD_LOGIC; signal dadrL_N3988 : STD_LOGIC; signal dadrL_N3987 : STD_LOGIC; signal dadrL_N7325 : STD_LOGIC; signal dadrL_N7324 : STD_LOGIC; signal dadrL_N3917 : STD_LOGIC; signal dadrL_N3916 : STD_LOGIC; signal dadrL_N7963 : STD_LOGIC; signal dadrL_N7964 : STD_LOGIC; signal dadrL_N7253 : STD_LOGIC; signal dadrL_N7254 : STD_LOGIC; signal dadrL_N7892 : STD_LOGIC; signal dadrL_N7893 : STD_LOGIC; signal dadrL_N17478 : STD_LOGIC; signal dadrL_N17477 : STD_LOGIC; signal dadrL_N2639 : STD_LOGIC; signal dadrL_N2638 : STD_LOGIC; signal dadrL_N17407 : STD_LOGIC; signal dadrL_N17406 : STD_LOGIC; signal dadrL_N2568 : STD_LOGIC; signal dadrL_N2567 : STD_LOGIC; signal dadrL_N4130 : STD_LOGIC; signal dadrL_N4129 : STD_LOGIC; signal dadrL_N7467 : STD_LOGIC; signal dadrL_N7466 : STD_LOGIC; signal dadrL_N651 : STD_LOGIC; signal dadrL_N650 : STD_LOGIC; signal dadrL_N4059 : STD_LOGIC; signal dadrL_N4058 : STD_LOGIC; signal dadrL_N8106 : STD_LOGIC; signal dadrL_N8105 : STD_LOGIC; signal dadrL_N7396 : STD_LOGIC; signal dadrL_N7395 : STD_LOGIC; signal dadrL_N580 : STD_LOGIC; signal dadrL_N579 : STD_LOGIC; signal dadrL_N8035 : STD_LOGIC; signal dadrL_N8034 : STD_LOGIC; signal dadrL_N17620 : STD_LOGIC; signal dadrL_N17619 : STD_LOGIC; signal dadrL_N2781 : STD_LOGIC; signal dadrL_N2780 : STD_LOGIC; signal dadrL_N17549 : STD_LOGIC; signal dadrL_N17548 : STD_LOGIC; signal dadrL_N2710 : STD_LOGIC; signal dadrL_N2709 : STD_LOGIC; signal dadrL_N4271 : STD_LOGIC; signal dadrL_N4272 : STD_LOGIC; signal dadrL_N792 : STD_LOGIC; signal dadrL_N793 : STD_LOGIC; signal dadrL_N4201 : STD_LOGIC; signal dadrL_N4200 : STD_LOGIC; signal dadrL_N7538 : STD_LOGIC; signal dadrL_N7537 : STD_LOGIC; signal dadrL_N8248 : STD_LOGIC; signal dadrL_N8247 : STD_LOGIC; signal dadrL_N721 : STD_LOGIC; signal dadrL_N722 : STD_LOGIC; signal dadrL_N8177 : STD_LOGIC; signal dadrL_N8176 : STD_LOGIC; signal dadrL_N17761 : STD_LOGIC; signal dadrL_N17762 : STD_LOGIC; signal dadrL_N17691 : STD_LOGIC; signal dadrL_N17690 : STD_LOGIC; signal dadrL_N2851 : STD_LOGIC; signal dadrL_N2852 : STD_LOGIC; signal dadrL_N935 : STD_LOGIC; signal dadrL_N934 : STD_LOGIC; signal dadrL_N8390 : STD_LOGIC; signal dadrL_N8389 : STD_LOGIC; signal dadrL_N863 : STD_LOGIC; signal dadrL_N864 : STD_LOGIC; signal dadrL_N8319 : STD_LOGIC; signal dadrL_N8318 : STD_LOGIC; signal dadrL_N17903 : STD_LOGIC; signal dadrL_N17904 : STD_LOGIC; signal dadrL_N17832 : STD_LOGIC; signal dadrL_N17833 : STD_LOGIC; signal dadrL_N1077 : STD_LOGIC; signal dadrL_N1076 : STD_LOGIC; signal dadrL_N8531 : STD_LOGIC; signal dadrL_N8532 : STD_LOGIC; signal dadrL_N1006 : STD_LOGIC; signal dadrL_N1005 : STD_LOGIC; signal dadrL_N8461 : STD_LOGIC; signal dadrL_N8460 : STD_LOGIC; signal dadrL_N18046 : STD_LOGIC; signal dadrL_N18045 : STD_LOGIC; signal dadrL_N17975 : STD_LOGIC; signal dadrL_N17974 : STD_LOGIC; signal dadrL_N1219 : STD_LOGIC; signal dadrL_N1218 : STD_LOGIC; signal dadrL_N1148 : STD_LOGIC; signal dadrL_N1147 : STD_LOGIC; signal dadrL_N8673 : STD_LOGIC; signal dadrL_N8674 : STD_LOGIC; signal dadrL_N8602 : STD_LOGIC; signal dadrL_N8603 : STD_LOGIC; signal dadrL_N18188 : STD_LOGIC; signal dadrL_N18187 : STD_LOGIC; signal dadrL_N14709 : STD_LOGIC; signal dadrL_N14708 : STD_LOGIC; signal reg_select : STD_LOGIC; signal cs_1_OBUF : STD_LOGIC; signal cs_2_OBUF : STD_LOGIC; signal cs_3_OBUF : STD_LOGIC; signal cs_4_OBUF : STD_LOGIC; signal cs_5_OBUF : STD_LOGIC; signal cs_6_OBUF : STD_LOGIC; signal cs_7_OBUF : STD_LOGIC; signal adr_bus_9_IBUF : STD_LOGIC; signal adr_bus_10_IBUF : STD_LOGIC; signal adr_bus_11_IBUF : STD_LOGIC; signal N5267 : STD_LOGIC; signal cs_0_OBUF : STD_LOGIC; signal cs_89_OBUF : STD_LOGIC; signal cs_90_OBUF : STD_LOGIC; signal cs_99_OBUF : STD_LOGIC; signal cs_91_OBUF : STD_LOGIC; signal cs_180_OBUF : STD_LOGIC; signal cs_100_OBUF : STD_LOGIC; signal cs_92_OBUF : STD_LOGIC; signal cs_189_OBUF : STD_LOGIC; signal cs_181_OBUF : STD_LOGIC; signal cs_109_OBUF : STD_LOGIC; signal cs_101_OBUF : STD_LOGIC; signal cs_93_OBUF : STD_LOGIC; signal cs_190_OBUF : STD_LOGIC; signal cs_182_OBUF : STD_LOGIC; signal cs_110_OBUF : STD_LOGIC; signal cs_102_OBUF : STD_LOGIC; signal cs_94_OBUF : STD_LOGIC; signal cs_108_OBUF : STD_LOGIC; signal cs_199_OBUF : STD_LOGIC; signal cs_191_OBUF : STD_LOGIC; signal cs_183_OBUF : STD_LOGIC; signal cs_119_OBUF : STD_LOGIC; signal cs_111_OBUF : STD_LOGIC; signal cs_103_OBUF : STD_LOGIC; signal cs_95_OBUF : STD_LOGIC; signal cs_117_OBUF : STD_LOGIC; signal cs_200_OBUF : STD_LOGIC; signal cs_192_OBUF : STD_LOGIC; signal cs_184_OBUF : STD_LOGIC; signal cs_120_OBUF : STD_LOGIC; signal cs_112_OBUF : STD_LOGIC; signal cs_104_OBUF : STD_LOGIC; signal cs_96_OBUF : STD_LOGIC; signal cs_126_OBUF : STD_LOGIC; signal cs_118_OBUF : STD_LOGIC; signal cs_209_OBUF : STD_LOGIC; signal cs_201_OBUF : STD_LOGIC; signal cs_193_OBUF : STD_LOGIC; signal cs_185_OBUF : STD_LOGIC; signal cs_129_OBUF : STD_LOGIC; signal cs_121_OBUF : STD_LOGIC; signal cs_113_OBUF : STD_LOGIC; signal cs_105_OBUF : STD_LOGIC; signal cs_97_OBUF : STD_LOGIC; signal cs_135_OBUF : STD_LOGIC; signal cs_127_OBUF : STD_LOGIC; signal cs_210_OBUF : STD_LOGIC; signal cs_202_OBUF : STD_LOGIC; signal cs_194_OBUF : STD_LOGIC; signal cs_186_OBUF : STD_LOGIC; signal cs_130_OBUF : STD_LOGIC; signal cs_122_OBUF : STD_LOGIC; signal cs_114_OBUF : STD_LOGIC; signal cs_106_OBUF : STD_LOGIC; signal cs_98_OBUF : STD_LOGIC; signal cs_208_OBUF : STD_LOGIC; signal cs_144_OBUF : STD_LOGIC; signal cs_136_OBUF : STD_LOGIC; signal cs_128_OBUF : STD_LOGIC; signal cs_219_OBUF : STD_LOGIC; signal cs_211_OBUF : STD_LOGIC; signal cs_203_OBUF : STD_LOGIC; signal cs_195_OBUF : STD_LOGIC; signal cs_187_OBUF : STD_LOGIC; signal cs_139_OBUF : STD_LOGIC; signal cs_131_OBUF : STD_LOGIC; signal cs_123_OBUF : STD_LOGIC; signal cs_115_OBUF : STD_LOGIC; signal cs_107_OBUF : STD_LOGIC; signal cs_217_OBUF : STD_LOGIC; signal cs_153_OBUF : STD_LOGIC; signal cs_145_OBUF : STD_LOGIC; signal cs_137_OBUF : STD_LOGIC; signal cs_220_OBUF : STD_LOGIC; signal cs_212_OBUF : STD_LOGIC; signal cs_204_OBUF : STD_LOGIC; signal cs_196_OBUF : STD_LOGIC; signal cs_188_OBUF : STD_LOGIC; signal cs_140_OBUF : STD_LOGIC; signal cs_132_OBUF : STD_LOGIC; signal cs_124_OBUF : STD_LOGIC; signal cs_116_OBUF : STD_LOGIC; signal cs_226_OBUF : STD_LOGIC; signal cs_218_OBUF : STD_LOGIC; signal cs_162_OBUF : STD_LOGIC; signal cs_154_OBUF : STD_LOGIC; signal cs_146_OBUF : STD_LOGIC; signal cs_138_OBUF : STD_LOGIC; signal cs_229_OBUF : STD_LOGIC; signal cs_221_OBUF : STD_LOGIC; signal cs_213_OBUF : STD_LOGIC; signal cs_205_OBUF : STD_LOGIC; signal cs_197_OBUF : STD_LOGIC; signal cs_149_OBUF : STD_LOGIC; signal cs_141_OBUF : STD_LOGIC; signal cs_133_OBUF : STD_LOGIC; signal cs_125_OBUF : STD_LOGIC; signal cs_235_OBUF : STD_LOGIC; signal cs_227_OBUF : STD_LOGIC; signal cs_171_OBUF : STD_LOGIC; signal cs_163_OBUF : STD_LOGIC; signal cs_155_OBUF : STD_LOGIC; signal cs_147_OBUF : STD_LOGIC; signal cs_230_OBUF : STD_LOGIC; signal cs_222_OBUF : STD_LOGIC; signal cs_214_OBUF : STD_LOGIC; signal cs_206_OBUF : STD_LOGIC; signal cs_198_OBUF : STD_LOGIC; signal cs_150_OBUF : STD_LOGIC; signal cs_142_OBUF : STD_LOGIC; signal cs_134_OBUF : STD_LOGIC; signal cs_244_OBUF : STD_LOGIC; signal cs_236_OBUF : STD_LOGIC; signal cs_228_OBUF : STD_LOGIC; signal cs_172_OBUF : STD_LOGIC; signal cs_164_OBUF : STD_LOGIC; signal cs_156_OBUF : STD_LOGIC; signal cs_148_OBUF : STD_LOGIC; signal cs_239_OBUF : STD_LOGIC; signal cs_231_OBUF : STD_LOGIC; signal cs_223_OBUF : STD_LOGIC; signal cs_215_OBUF : STD_LOGIC; signal cs_207_OBUF : STD_LOGIC; signal cs_159_OBUF : STD_LOGIC; signal cs_151_OBUF : STD_LOGIC; signal cs_143_OBUF : STD_LOGIC; signal cs_253_OBUF : STD_LOGIC; signal cs_245_OBUF : STD_LOGIC; signal cs_237_OBUF : STD_LOGIC; signal cs_173_OBUF : STD_LOGIC; signal cs_165_OBUF : STD_LOGIC; signal cs_157_OBUF : STD_LOGIC; signal cs_240_OBUF : STD_LOGIC; signal cs_232_OBUF : STD_LOGIC; signal cs_224_OBUF : STD_LOGIC; signal cs_216_OBUF : STD_LOGIC; signal cs_160_OBUF : STD_LOGIC; signal cs_152_OBUF : STD_LOGIC; signal cs_254_OBUF : STD_LOGIC; signal cs_246_OBUF : STD_LOGIC; signal cs_238_OBUF : STD_LOGIC; signal cs_174_OBUF : STD_LOGIC; signal cs_166_OBUF : STD_LOGIC; signal cs_158_OBUF : STD_LOGIC; signal cs_9_OBUF : STD_LOGIC; signal cs_249_OBUF : STD_LOGIC; signal cs_241_OBUF : STD_LOGIC; signal cs_233_OBUF : STD_LOGIC; signal cs_225_OBUF : STD_LOGIC; signal cs_169_OBUF : STD_LOGIC; signal cs_161_OBUF : STD_LOGIC; signal cs_255_OBUF : STD_LOGIC; signal cs_247_OBUF : STD_LOGIC; signal cs_175_OBUF : STD_LOGIC; signal cs_167_OBUF : STD_LOGIC; signal cs_10_OBUF : STD_LOGIC; signal cs_250_OBUF : STD_LOGIC; signal cs_242_OBUF : STD_LOGIC; signal cs_234_OBUF : STD_LOGIC; signal cs_170_OBUF : STD_LOGIC; signal cs_8_OBUF : STD_LOGIC; signal cs_248_OBUF : STD_LOGIC; signal cs_176_OBUF : STD_LOGIC; signal cs_168_OBUF : STD_LOGIC; signal cs_19_OBUF : STD_LOGIC; signal cs_11_OBUF : STD_LOGIC; signal cs_251_OBUF : STD_LOGIC; signal cs_243_OBUF : STD_LOGIC; signal cs_179_OBUF : STD_LOGIC; signal cs_17_OBUF : STD_LOGIC; signal cs_177_OBUF : STD_LOGIC; signal cs_20_OBUF : STD_LOGIC; signal cs_12_OBUF : STD_LOGIC; signal cs_252_OBUF : STD_LOGIC; signal cs_26_OBUF : STD_LOGIC; signal cs_18_OBUF : STD_LOGIC; signal cs_178_OBUF : STD_LOGIC; signal cs_29_OBUF : STD_LOGIC; signal cs_21_OBUF : STD_LOGIC; signal cs_13_OBUF : STD_LOGIC; signal cs_35_OBUF : STD_LOGIC; signal cs_27_OBUF : STD_LOGIC; signal cs_30_OBUF : STD_LOGIC; signal cs_22_OBUF : STD_LOGIC; signal cs_14_OBUF : STD_LOGIC; signal cs_44_OBUF : STD_LOGIC; signal cs_36_OBUF : STD_LOGIC; signal cs_28_OBUF : STD_LOGIC; signal cs_39_OBUF : STD_LOGIC; signal cs_31_OBUF : STD_LOGIC; signal cs_23_OBUF : STD_LOGIC; signal cs_15_OBUF : STD_LOGIC; signal cs_53_OBUF : STD_LOGIC; signal cs_45_OBUF : STD_LOGIC; signal cs_37_OBUF : STD_LOGIC; signal cs_40_OBUF : STD_LOGIC; signal cs_32_OBUF : STD_LOGIC; signal cs_24_OBUF : STD_LOGIC; signal cs_16_OBUF : STD_LOGIC; signal cs_62_OBUF : STD_LOGIC; signal cs_54_OBUF : STD_LOGIC; signal cs_46_OBUF : STD_LOGIC; signal cs_38_OBUF : STD_LOGIC; signal cs_49_OBUF : STD_LOGIC; signal cs_41_OBUF : STD_LOGIC; signal cs_33_OBUF : STD_LOGIC; signal cs_25_OBUF : STD_LOGIC; signal cs_71_OBUF : STD_LOGIC; signal cs_63_OBUF : STD_LOGIC; signal cs_55_OBUF : STD_LOGIC; signal cs_47_OBUF : STD_LOGIC; signal cs_50_OBUF : STD_LOGIC; signal cs_42_OBUF : STD_LOGIC; signal cs_34_OBUF : STD_LOGIC; signal cs_80_OBUF : STD_LOGIC; signal cs_72_OBUF : STD_LOGIC; signal cs_64_OBUF : STD_LOGIC; signal cs_56_OBUF : STD_LOGIC; signal cs_48_OBUF : STD_LOGIC; signal cs_59_OBUF : STD_LOGIC; signal cs_51_OBUF : STD_LOGIC; signal cs_43_OBUF : STD_LOGIC; signal cs_81_OBUF : STD_LOGIC; signal cs_73_OBUF : STD_LOGIC; signal cs_65_OBUF : STD_LOGIC; signal cs_57_OBUF : STD_LOGIC; signal cs_60_OBUF : STD_LOGIC; signal cs_52_OBUF : STD_LOGIC; signal cs_82_OBUF : STD_LOGIC; signal cs_74_OBUF : STD_LOGIC; signal cs_66_OBUF : STD_LOGIC; signal cs_58_OBUF : STD_LOGIC; signal cs_69_OBUF : STD_LOGIC; signal cs_61_OBUF : STD_LOGIC; signal cs_83_OBUF : STD_LOGIC; signal cs_75_OBUF : STD_LOGIC; signal cs_67_OBUF : STD_LOGIC; signal cs_70_OBUF : STD_LOGIC; signal cs_84_OBUF : STD_LOGIC; signal cs_76_OBUF : STD_LOGIC; signal cs_68_OBUF : STD_LOGIC; signal cs_79_OBUF : STD_LOGIC; signal cs_85_OBUF : STD_LOGIC; signal cs_77_OBUF : STD_LOGIC; signal cs_86_OBUF : STD_LOGIC; signal cs_78_OBUF : STD_LOGIC; signal cs_87_OBUF : STD_LOGIC; signal cs_88_OBUF : STD_LOGIC; signal rw_OBUF : STD_LOGIC; signal adr_bus_8_IBUF : STD_LOGIC; signal AEN_IBUF : STD_LOGIC; signal IOR_IBUF : STD_LOGIC; signal IOW_IBUF : STD_LOGIC; signal clk_OBUF : STD_LOGIC; signal adr_bus_12_IBUF : STD_LOGIC; signal adr_bus_13_IBUF : STD_LOGIC; signal adr_bus_14_IBUF : STD_LOGIC; signal adr_bus_15_IBUF : STD_LOGIC; signal CHOICE45 : STD_LOGIC; signal GSR : STD_LOGIC; signal GTS : STD_LOGIC; signal dadrL_N18117_FROM : STD_LOGIC; signal dadrL_N18117_GROM : STD_LOGIC; signal dadrL_N14638_FROM : STD_LOGIC; signal dadrL_N14638_GROM : STD_LOGIC; signal dadrL_N16129_FROM : STD_LOGIC; signal dadrL_N16129_GROM : STD_LOGIC; signal dadrL_N16058_FROM : STD_LOGIC; signal dadrL_N16058_GROM : STD_LOGIC; signal dadrL_N1361_FROM : STD_LOGIC; signal dadrL_N1361_GROM : STD_LOGIC; signal dadrL_N1290_FROM : STD_LOGIC; signal dadrL_N1290_GROM : STD_LOGIC; signal dadrL_N8816_FROM : STD_LOGIC; signal dadrL_N8816_GROM : STD_LOGIC; signal dadrL_N11442_FROM : STD_LOGIC; signal dadrL_N11442_GROM : STD_LOGIC; signal dadrL_N8745_FROM : STD_LOGIC; signal dadrL_N8745_GROM : STD_LOGIC; signal dadrL_N11371_FROM : STD_LOGIC; signal dadrL_N11371_GROM : STD_LOGIC; signal dadrL_N18330_FROM : STD_LOGIC; signal dadrL_N18330_GROM : STD_LOGIC; signal dadrL_N14851_FROM : STD_LOGIC; signal dadrL_N14851_GROM : STD_LOGIC; signal dadrL_N18259_FROM : STD_LOGIC; signal dadrL_N18259_GROM : STD_LOGIC; signal dadrL_N16271_FROM : STD_LOGIC; signal dadrL_N16271_GROM : STD_LOGIC; signal dadrL_N14780_FROM : STD_LOGIC; signal dadrL_N14780_GROM : STD_LOGIC; signal dadrL_N16200_FROM : STD_LOGIC; signal dadrL_N16200_GROM : STD_LOGIC; signal dadrL_N1502_FROM : STD_LOGIC; signal dadrL_N1502_GROM : STD_LOGIC; signal dadrL_N1431_FROM : STD_LOGIC; signal dadrL_N1431_GROM : STD_LOGIC; signal dadrL_N8958_FROM : STD_LOGIC; signal dadrL_N8958_GROM : STD_LOGIC; signal dadrL_N11585_FROM : STD_LOGIC; signal dadrL_N11585_GROM : STD_LOGIC; signal dadrL_N8887_FROM : STD_LOGIC; signal dadrL_N8887_GROM : STD_LOGIC; signal dadrL_N11513_FROM : STD_LOGIC; signal dadrL_N11513_GROM : STD_LOGIC; signal dadrL_N14992_FROM : STD_LOGIC; signal dadrL_N14992_GROM : STD_LOGIC; signal dadrL_N16412_FROM : STD_LOGIC; signal dadrL_N16412_GROM : STD_LOGIC; signal dadrL_N14921_FROM : STD_LOGIC; signal dadrL_N14921_GROM : STD_LOGIC; signal dadrL_N16341_FROM : STD_LOGIC; signal dadrL_N16341_GROM : STD_LOGIC; signal dadrL_N1645_FROM : STD_LOGIC; signal dadrL_N1645_GROM : STD_LOGIC; signal dadrL_N1573_FROM : STD_LOGIC; signal dadrL_N1573_GROM : STD_LOGIC; signal dadrL_N11727_FROM : STD_LOGIC; signal dadrL_N11727_GROM : STD_LOGIC; signal dadrL_N11656_FROM : STD_LOGIC; signal dadrL_N11656_GROM : STD_LOGIC; signal dadrL_N15135_FROM : STD_LOGIC; signal dadrL_N15135_GROM : STD_LOGIC; signal dadrL_N16555_FROM : STD_LOGIC; signal dadrL_N16555_GROM : STD_LOGIC; signal dadrL_N15063_FROM : STD_LOGIC; signal dadrL_N15063_GROM : STD_LOGIC; signal dadrL_N16483_FROM : STD_LOGIC; signal dadrL_N16483_GROM : STD_LOGIC; signal dadrL_N1787_FROM : STD_LOGIC; signal dadrL_N1787_GROM : STD_LOGIC; signal dadrL_N1716_FROM : STD_LOGIC; signal dadrL_N1716_GROM : STD_LOGIC; signal dadrL_N11869_FROM : STD_LOGIC; signal dadrL_N11869_GROM : STD_LOGIC; signal dadrL_N11798_FROM : STD_LOGIC; signal dadrL_N11798_GROM : STD_LOGIC; signal dadrL_N15277_FROM : STD_LOGIC; signal dadrL_N15277_GROM : STD_LOGIC; signal dadrL_N15206_FROM : STD_LOGIC; signal dadrL_N15206_GROM : STD_LOGIC; signal dadrL_N16697_FROM : STD_LOGIC; signal dadrL_N16697_GROM : STD_LOGIC; signal dadrL_N16626_FROM : STD_LOGIC; signal dadrL_N16626_GROM : STD_LOGIC; signal dadrL_N1929_FROM : STD_LOGIC; signal dadrL_N1929_GROM : STD_LOGIC; signal dadrL_N1858_FROM : STD_LOGIC; signal dadrL_N1858_GROM : STD_LOGIC; signal dadrL_N12011_FROM : STD_LOGIC; signal dadrL_N12011_GROM : STD_LOGIC; signal dadrL_N11940_FROM : STD_LOGIC; signal dadrL_N11940_GROM : STD_LOGIC; signal dadrL_N15419_FROM : STD_LOGIC; signal dadrL_N15419_GROM : STD_LOGIC; signal dadrL_N16839_FROM : STD_LOGIC; signal dadrL_N16839_GROM : STD_LOGIC; signal dadrL_N15348_FROM : STD_LOGIC; signal dadrL_N15348_GROM : STD_LOGIC; signal dadrL_N16768_FROM : STD_LOGIC; signal dadrL_N16768_GROM : STD_LOGIC; signal dadrL_N12152_FROM : STD_LOGIC; signal dadrL_N12152_GROM : STD_LOGIC; signal dadrL_N12081_FROM : STD_LOGIC; signal dadrL_N12081_GROM : STD_LOGIC; signal dadrL_N15561_FROM : STD_LOGIC; signal dadrL_N15561_GROM : STD_LOGIC; signal dadrL_N15490_FROM : STD_LOGIC; signal dadrL_N15490_GROM : STD_LOGIC; signal dadrL_N16910_FROM : STD_LOGIC; signal dadrL_N16910_GROM : STD_LOGIC; signal dadrL_N4413_FROM : STD_LOGIC; signal dadrL_N4413_GROM : STD_LOGIC; signal dadrL_N4342_FROM : STD_LOGIC; signal dadrL_N4342_GROM : STD_LOGIC; signal dadrL_N12223_FROM : STD_LOGIC; signal dadrL_N12223_GROM : STD_LOGIC; signal dadrL_N15702_FROM : STD_LOGIC; signal dadrL_N15702_GROM : STD_LOGIC; signal dadrL_N15631_FROM : STD_LOGIC; signal dadrL_N15631_GROM : STD_LOGIC; signal dadrL_N4556_FROM : STD_LOGIC; signal dadrL_N4556_GROM : STD_LOGIC; signal dadrL_N4485_FROM : STD_LOGIC; signal dadrL_N4485_GROM : STD_LOGIC; signal dadrL_N12366_FROM : STD_LOGIC; signal dadrL_N12366_GROM : STD_LOGIC; signal dadrL_N15845_FROM : STD_LOGIC; signal dadrL_N15845_GROM : STD_LOGIC; signal dadrL_N12295_FROM : STD_LOGIC; signal dadrL_N12295_GROM : STD_LOGIC; signal dadrL_N15773_FROM : STD_LOGIC; signal dadrL_N15773_GROM : STD_LOGIC; signal dadrL_N4698_FROM : STD_LOGIC; signal dadrL_N4698_GROM : STD_LOGIC; signal dadrL_N4627_FROM : STD_LOGIC; signal dadrL_N4627_GROM : STD_LOGIC; signal dadrL_N12508_FROM : STD_LOGIC; signal dadrL_N12508_GROM : STD_LOGIC; signal dadrL_N15987_FROM : STD_LOGIC; signal dadrL_N15987_GROM : STD_LOGIC; signal dadrL_N12437_FROM : STD_LOGIC; signal dadrL_N12437_GROM : STD_LOGIC; signal dadrL_N15916_FROM : STD_LOGIC; signal dadrL_N15916_GROM : STD_LOGIC; signal dadrL_N4840_FROM : STD_LOGIC; signal dadrL_N4840_GROM : STD_LOGIC; signal dadrL_N4769_FROM : STD_LOGIC; signal dadrL_N4769_GROM : STD_LOGIC; signal dadrL_N12650_FROM : STD_LOGIC; signal dadrL_N12650_GROM : STD_LOGIC; signal dadrL_N12579_FROM : STD_LOGIC; signal dadrL_N12579_GROM : STD_LOGIC; signal dadrL_N4981_FROM : STD_LOGIC; signal dadrL_N4981_GROM : STD_LOGIC; signal dadrL_N4911_FROM : STD_LOGIC; signal dadrL_N4911_GROM : STD_LOGIC; signal dadrL_N5337_FROM : STD_LOGIC; signal dadrL_N5337_GROM : STD_LOGIC; signal dadrL_N5266_FROM : STD_LOGIC; signal dadrL_N5266_GROM : STD_LOGIC; signal dadrL_N12791_FROM : STD_LOGIC; signal dadrL_N12791_GROM : STD_LOGIC; signal dadrL_N12721_FROM : STD_LOGIC; signal dadrL_N12721_GROM : STD_LOGIC; signal dadrL_N5123_FROM : STD_LOGIC; signal dadrL_N5123_GROM : STD_LOGIC; signal dadrL_N5052_FROM : STD_LOGIC; signal dadrL_N5052_GROM : STD_LOGIC; signal dadrL_N5479_FROM : STD_LOGIC; signal dadrL_N5479_GROM : STD_LOGIC; signal dadrL_N5408_FROM : STD_LOGIC; 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signal cs_91_OBUF_GROM : STD_LOGIC; signal cs_180_OBUF_GROM : STD_LOGIC; signal cs_100_OBUF_GROM : STD_LOGIC; signal cs_92_OBUF_GROM : STD_LOGIC; signal cs_189_OBUF_GROM : STD_LOGIC; signal cs_181_OBUF_GROM : STD_LOGIC; signal cs_109_OBUF_GROM : STD_LOGIC; signal cs_101_OBUF_GROM : STD_LOGIC; signal cs_93_OBUF_GROM : STD_LOGIC; signal cs_190_OBUF_GROM : STD_LOGIC; signal cs_182_OBUF_GROM : STD_LOGIC; signal cs_110_OBUF_GROM : STD_LOGIC; signal cs_102_OBUF_GROM : STD_LOGIC; signal cs_94_OBUF_GROM : STD_LOGIC; signal cs_108_OBUF_GROM : STD_LOGIC; signal cs_199_OBUF_GROM : STD_LOGIC; signal cs_191_OBUF_GROM : STD_LOGIC; signal cs_183_OBUF_GROM : STD_LOGIC; signal cs_119_OBUF_GROM : STD_LOGIC; signal cs_111_OBUF_GROM : STD_LOGIC; signal cs_103_OBUF_GROM : STD_LOGIC; signal cs_95_OBUF_GROM : STD_LOGIC; signal cs_117_OBUF_GROM : STD_LOGIC; signal cs_200_OBUF_GROM : STD_LOGIC; signal cs_192_OBUF_GROM : STD_LOGIC; signal cs_184_OBUF_GROM : STD_LOGIC; signal cs_120_OBUF_GROM : STD_LOGIC; signal cs_112_OBUF_GROM : STD_LOGIC; signal cs_104_OBUF_GROM : STD_LOGIC; signal cs_96_OBUF_GROM : STD_LOGIC; signal cs_126_OBUF_GROM : STD_LOGIC; signal cs_118_OBUF_GROM : STD_LOGIC; signal cs_209_OBUF_GROM : STD_LOGIC; signal cs_201_OBUF_GROM : STD_LOGIC; signal cs_193_OBUF_GROM : STD_LOGIC; signal cs_185_OBUF_GROM : STD_LOGIC; signal cs_129_OBUF_GROM : STD_LOGIC; signal cs_121_OBUF_GROM : STD_LOGIC; signal cs_113_OBUF_GROM : STD_LOGIC; signal cs_105_OBUF_GROM : STD_LOGIC; signal cs_97_OBUF_GROM : STD_LOGIC; signal cs_135_OBUF_GROM : STD_LOGIC; signal cs_127_OBUF_GROM : STD_LOGIC; signal cs_210_OBUF_GROM : STD_LOGIC; signal cs_202_OBUF_GROM : STD_LOGIC; signal cs_194_OBUF_GROM : STD_LOGIC; signal cs_186_OBUF_GROM : STD_LOGIC; signal cs_130_OBUF_GROM : STD_LOGIC; signal cs_77_ENABLE : STD_LOGIC; signal cs_77_TORGTS : STD_LOGIC; signal cs_77_OUTMUX : STD_LOGIC; signal cs_85_ENABLE : STD_LOGIC; signal cs_85_TORGTS : STD_LOGIC; signal cs_85_OUTMUX : STD_LOGIC; signal cs_93_ENABLE : STD_LOGIC; signal cs_93_TORGTS : STD_LOGIC; signal cs_93_OUTMUX : STD_LOGIC; signal cs_78_ENABLE : STD_LOGIC; signal cs_78_TORGTS : STD_LOGIC; signal cs_78_OUTMUX : STD_LOGIC; signal cs_86_ENABLE : STD_LOGIC; signal cs_86_TORGTS : STD_LOGIC; signal cs_86_OUTMUX : STD_LOGIC; signal cs_94_ENABLE : STD_LOGIC; signal cs_94_TORGTS : STD_LOGIC; signal cs_94_OUTMUX : STD_LOGIC; signal cs_79_ENABLE : STD_LOGIC; signal cs_79_TORGTS : STD_LOGIC; signal cs_79_OUTMUX : STD_LOGIC; signal cs_87_ENABLE : STD_LOGIC; signal cs_87_TORGTS : STD_LOGIC; signal cs_87_OUTMUX : STD_LOGIC; signal cs_95_ENABLE : STD_LOGIC; signal cs_95_TORGTS : STD_LOGIC; signal cs_95_OUTMUX : STD_LOGIC; signal cs_88_ENABLE : STD_LOGIC; signal cs_88_TORGTS : STD_LOGIC; signal cs_88_OUTMUX : STD_LOGIC; signal cs_96_ENABLE : STD_LOGIC; signal cs_96_TORGTS : STD_LOGIC; signal cs_96_OUTMUX : STD_LOGIC; signal cs_89_ENABLE : STD_LOGIC; signal cs_89_TORGTS : STD_LOGIC; signal cs_89_OUTMUX : STD_LOGIC; signal cs_97_ENABLE : STD_LOGIC; signal cs_97_TORGTS : STD_LOGIC; signal cs_97_OUTMUX : STD_LOGIC; signal cs_98_ENABLE : STD_LOGIC; signal cs_98_TORGTS : STD_LOGIC; signal cs_98_OUTMUX : STD_LOGIC; signal cs_99_ENABLE : STD_LOGIC; signal cs_99_TORGTS : STD_LOGIC; signal cs_99_OUTMUX : STD_LOGIC; signal cs_0_ENABLE : STD_LOGIC; signal cs_0_TORGTS : STD_LOGIC; signal cs_0_OUTMUX : STD_LOGIC; signal cs_1_ENABLE : STD_LOGIC; signal cs_1_TORGTS : STD_LOGIC; signal cs_1_OUTMUX : STD_LOGIC; signal cs_2_ENABLE : STD_LOGIC; signal cs_2_TORGTS : STD_LOGIC; signal cs_2_OUTMUX : STD_LOGIC; signal cs_3_ENABLE : STD_LOGIC; signal cs_3_TORGTS : STD_LOGIC; signal cs_3_OUTMUX : STD_LOGIC; signal cs_4_ENABLE : STD_LOGIC; signal cs_4_TORGTS : STD_LOGIC; signal cs_4_OUTMUX : STD_LOGIC; signal cs_5_ENABLE : STD_LOGIC; signal cs_5_TORGTS : STD_LOGIC; signal cs_5_OUTMUX : STD_LOGIC; signal cs_6_ENABLE : STD_LOGIC; signal cs_6_TORGTS : STD_LOGIC; signal cs_6_OUTMUX : STD_LOGIC; signal cs_7_ENABLE : STD_LOGIC; signal cs_7_TORGTS : STD_LOGIC; signal cs_7_OUTMUX : STD_LOGIC; signal cs_8_ENABLE : STD_LOGIC; signal cs_8_TORGTS : STD_LOGIC; signal cs_8_OUTMUX : STD_LOGIC; signal cs_9_ENABLE : STD_LOGIC; signal cs_9_TORGTS : STD_LOGIC; signal cs_9_OUTMUX : STD_LOGIC; signal CHOICE45_FROM : STD_LOGIC; signal CHOICE45_GROM : STD_LOGIC; signal rw_OBUF_FROM : STD_LOGIC; signal rw_OBUF_GROM : STD_LOGIC; signal cs_122_OBUF_GROM : STD_LOGIC; signal cs_114_OBUF_GROM : STD_LOGIC; signal cs_106_OBUF_GROM : STD_LOGIC; signal cs_98_OBUF_GROM : STD_LOGIC; signal cs_208_OBUF_GROM : STD_LOGIC; signal cs_144_OBUF_GROM : STD_LOGIC; signal cs_136_OBUF_GROM : STD_LOGIC; signal cs_128_OBUF_GROM : STD_LOGIC; signal cs_219_OBUF_GROM : STD_LOGIC; signal cs_211_OBUF_GROM : STD_LOGIC; signal cs_203_OBUF_GROM : STD_LOGIC; signal cs_195_OBUF_GROM : STD_LOGIC; signal cs_187_OBUF_GROM : STD_LOGIC; signal cs_139_OBUF_GROM : STD_LOGIC; signal cs_131_OBUF_GROM : STD_LOGIC; signal cs_123_OBUF_GROM : STD_LOGIC; signal cs_115_OBUF_GROM : STD_LOGIC; signal cs_107_OBUF_GROM : STD_LOGIC; signal cs_217_OBUF_GROM : STD_LOGIC; signal cs_153_OBUF_GROM : STD_LOGIC; signal cs_145_OBUF_GROM : STD_LOGIC; signal cs_137_OBUF_GROM : STD_LOGIC; signal cs_220_OBUF_GROM : STD_LOGIC; signal cs_212_OBUF_GROM : STD_LOGIC; signal cs_204_OBUF_GROM : STD_LOGIC; signal cs_196_OBUF_GROM : STD_LOGIC; signal cs_188_OBUF_GROM : STD_LOGIC; signal cs_140_OBUF_GROM : STD_LOGIC; signal cs_132_OBUF_GROM : STD_LOGIC; signal cs_124_OBUF_GROM : STD_LOGIC; signal cs_116_OBUF_GROM : STD_LOGIC; signal cs_226_OBUF_GROM : STD_LOGIC; signal cs_218_OBUF_GROM : STD_LOGIC; signal cs_162_OBUF_GROM : STD_LOGIC; signal cs_154_OBUF_GROM : STD_LOGIC; signal cs_146_OBUF_GROM : STD_LOGIC; signal cs_138_OBUF_GROM : STD_LOGIC; signal cs_229_OBUF_GROM : STD_LOGIC; signal cs_221_OBUF_GROM : STD_LOGIC; signal cs_213_OBUF_GROM : STD_LOGIC; signal cs_205_OBUF_GROM : STD_LOGIC; signal cs_197_OBUF_GROM : STD_LOGIC; signal cs_149_OBUF_GROM : STD_LOGIC; signal cs_141_OBUF_GROM : STD_LOGIC; signal cs_133_OBUF_GROM : STD_LOGIC; signal cs_125_OBUF_GROM : STD_LOGIC; signal cs_235_OBUF_GROM : STD_LOGIC; signal cs_227_OBUF_GROM : STD_LOGIC; signal cs_171_OBUF_GROM : STD_LOGIC; signal cs_163_OBUF_GROM : STD_LOGIC; signal cs_155_OBUF_GROM : STD_LOGIC; signal cs_147_OBUF_GROM : STD_LOGIC; signal cs_230_OBUF_GROM : STD_LOGIC; signal cs_222_OBUF_GROM : STD_LOGIC; signal cs_214_OBUF_GROM : STD_LOGIC; signal cs_206_OBUF_GROM : STD_LOGIC; signal cs_198_OBUF_GROM : STD_LOGIC; signal cs_150_OBUF_GROM : STD_LOGIC; signal cs_142_OBUF_GROM : STD_LOGIC; signal cs_134_OBUF_GROM : STD_LOGIC; signal cs_244_OBUF_GROM : STD_LOGIC; signal cs_236_OBUF_GROM : STD_LOGIC; signal cs_228_OBUF_GROM : STD_LOGIC; signal cs_172_OBUF_GROM : STD_LOGIC; signal cs_164_OBUF_GROM : STD_LOGIC; signal cs_156_OBUF_GROM : STD_LOGIC; signal cs_148_OBUF_GROM : STD_LOGIC; signal cs_239_OBUF_GROM : STD_LOGIC; signal cs_231_OBUF_GROM : STD_LOGIC; signal cs_223_OBUF_GROM : STD_LOGIC; signal cs_215_OBUF_GROM : STD_LOGIC; signal cs_207_OBUF_GROM : STD_LOGIC; signal cs_159_OBUF_GROM : STD_LOGIC; signal cs_151_OBUF_GROM : STD_LOGIC; signal cs_143_OBUF_GROM : STD_LOGIC; signal cs_253_OBUF_GROM : STD_LOGIC; signal cs_245_OBUF_GROM : STD_LOGIC; signal cs_237_OBUF_GROM : STD_LOGIC; signal cs_173_OBUF_GROM : STD_LOGIC; signal cs_165_OBUF_GROM : STD_LOGIC; signal cs_157_OBUF_GROM : STD_LOGIC; signal cs_240_OBUF_GROM : STD_LOGIC; signal cs_232_OBUF_GROM : STD_LOGIC; signal cs_224_OBUF_GROM : STD_LOGIC; signal cs_216_OBUF_GROM : STD_LOGIC; signal cs_160_OBUF_GROM : STD_LOGIC; signal cs_152_OBUF_GROM : STD_LOGIC; signal cs_254_OBUF_GROM : STD_LOGIC; signal cs_246_OBUF_GROM : STD_LOGIC; signal cs_238_OBUF_GROM : STD_LOGIC; signal cs_174_OBUF_GROM : STD_LOGIC; signal cs_166_OBUF_GROM : STD_LOGIC; signal cs_158_OBUF_GROM : STD_LOGIC; signal cs_9_OBUF_GROM : STD_LOGIC; signal cs_249_OBUF_GROM : STD_LOGIC; signal cs_241_OBUF_GROM : STD_LOGIC; signal cs_233_OBUF_GROM : STD_LOGIC; signal cs_225_OBUF_GROM : STD_LOGIC; signal cs_169_OBUF_GROM : STD_LOGIC; signal cs_161_OBUF_GROM : STD_LOGIC; signal cs_255_OBUF_GROM : STD_LOGIC; signal cs_247_OBUF_GROM : STD_LOGIC; signal cs_175_OBUF_GROM : STD_LOGIC; signal cs_167_OBUF_GROM : STD_LOGIC; signal cs_10_OBUF_GROM : STD_LOGIC; signal cs_250_OBUF_GROM : STD_LOGIC; signal cs_242_OBUF_GROM : STD_LOGIC; signal cs_234_OBUF_GROM : STD_LOGIC; signal cs_170_OBUF_GROM : STD_LOGIC; signal cs_8_OBUF_GROM : STD_LOGIC; signal cs_248_OBUF_GROM : STD_LOGIC; signal cs_176_OBUF_GROM : STD_LOGIC; signal cs_168_OBUF_GROM : STD_LOGIC; signal cs_19_OBUF_GROM : STD_LOGIC; signal cs_11_OBUF_GROM : STD_LOGIC; signal cs_251_OBUF_GROM : STD_LOGIC; signal cs_243_OBUF_GROM : STD_LOGIC; signal cs_179_OBUF_GROM : STD_LOGIC; signal cs_17_OBUF_GROM : STD_LOGIC; signal cs_177_OBUF_GROM : STD_LOGIC; signal cs_20_OBUF_GROM : STD_LOGIC; signal cs_12_OBUF_GROM : STD_LOGIC; signal cs_252_OBUF_GROM : STD_LOGIC; signal cs_26_OBUF_GROM : STD_LOGIC; signal cs_18_OBUF_GROM : STD_LOGIC; signal cs_178_OBUF_GROM : STD_LOGIC; signal cs_29_OBUF_GROM : STD_LOGIC; signal cs_21_OBUF_GROM : STD_LOGIC; signal cs_13_OBUF_GROM : STD_LOGIC; signal cs_35_OBUF_GROM : STD_LOGIC; signal cs_27_OBUF_GROM : STD_LOGIC; signal cs_30_OBUF_GROM : STD_LOGIC; signal cs_22_OBUF_GROM : STD_LOGIC; signal cs_14_OBUF_GROM : STD_LOGIC; signal cs_44_OBUF_GROM : STD_LOGIC; signal cs_36_OBUF_GROM : STD_LOGIC; signal cs_28_OBUF_GROM : STD_LOGIC; signal cs_39_OBUF_GROM : STD_LOGIC; signal cs_31_OBUF_GROM : STD_LOGIC; signal cs_23_OBUF_GROM : STD_LOGIC; signal cs_15_OBUF_GROM : STD_LOGIC; signal cs_53_OBUF_GROM : STD_LOGIC; signal cs_45_OBUF_GROM : STD_LOGIC; signal cs_37_OBUF_GROM : STD_LOGIC; signal cs_40_OBUF_GROM : STD_LOGIC; signal cs_32_OBUF_GROM : STD_LOGIC; signal cs_24_OBUF_GROM : STD_LOGIC; signal cs_16_OBUF_GROM : STD_LOGIC; signal cs_62_OBUF_GROM : STD_LOGIC; signal cs_54_OBUF_GROM : STD_LOGIC; signal cs_46_OBUF_GROM : STD_LOGIC; signal cs_38_OBUF_GROM : STD_LOGIC; signal cs_49_OBUF_GROM : STD_LOGIC; signal cs_41_OBUF_GROM : STD_LOGIC; signal cs_33_OBUF_GROM : STD_LOGIC; signal cs_25_OBUF_GROM : STD_LOGIC; signal cs_71_OBUF_GROM : STD_LOGIC; signal cs_63_OBUF_GROM : STD_LOGIC; signal cs_55_OBUF_GROM : STD_LOGIC; signal cs_47_OBUF_GROM : STD_LOGIC; signal cs_50_OBUF_GROM : STD_LOGIC; signal cs_42_OBUF_GROM : STD_LOGIC; signal cs_34_OBUF_GROM : STD_LOGIC; signal cs_80_OBUF_GROM : STD_LOGIC; signal cs_72_OBUF_GROM : STD_LOGIC; signal cs_64_OBUF_GROM : STD_LOGIC; signal cs_56_OBUF_GROM : STD_LOGIC; signal cs_48_OBUF_GROM : STD_LOGIC; signal cs_59_OBUF_GROM : STD_LOGIC; signal cs_51_OBUF_GROM : STD_LOGIC; signal cs_43_OBUF_GROM : STD_LOGIC; signal cs_81_OBUF_GROM : STD_LOGIC; signal cs_73_OBUF_GROM : STD_LOGIC; signal cs_65_OBUF_GROM : STD_LOGIC; signal cs_57_OBUF_GROM : STD_LOGIC; signal cs_60_OBUF_GROM : STD_LOGIC; signal cs_52_OBUF_GROM : STD_LOGIC; signal cs_82_OBUF_GROM : STD_LOGIC; signal cs_74_OBUF_GROM : STD_LOGIC; signal cs_66_OBUF_GROM : STD_LOGIC; signal cs_58_OBUF_GROM : STD_LOGIC; signal cs_69_OBUF_GROM : STD_LOGIC; signal cs_61_OBUF_GROM : STD_LOGIC; signal cs_83_OBUF_GROM : STD_LOGIC; signal cs_75_OBUF_GROM : STD_LOGIC; signal cs_67_OBUF_GROM : STD_LOGIC; signal cs_70_OBUF_GROM : STD_LOGIC; signal cs_84_OBUF_GROM : STD_LOGIC; signal cs_76_OBUF_GROM : STD_LOGIC; signal cs_68_OBUF_GROM : STD_LOGIC; signal cs_79_OBUF_GROM : STD_LOGIC; signal cs_85_OBUF_GROM : STD_LOGIC; signal cs_77_OBUF_GROM : STD_LOGIC; signal cs_86_OBUF_GROM : STD_LOGIC; signal cs_78_OBUF_GROM : STD_LOGIC; signal cs_87_OBUF_GROM : STD_LOGIC; signal cs_88_OBUF_GROM : STD_LOGIC; signal rw_ENABLE : STD_LOGIC; signal rw_TORGTS : STD_LOGIC; signal rw_OUTMUX : STD_LOGIC; signal adr_bus_0_IBUF_0 : STD_LOGIC; signal adr_bus_1_IBUF_1 : STD_LOGIC; signal adr_bus_2_IBUF_2 : STD_LOGIC; signal adr_bus_3_IBUF_3 : STD_LOGIC; signal adr_bus_4_IBUF_4 : STD_LOGIC; signal adr_bus_5_IBUF_5 : STD_LOGIC; signal adr_bus_6_IBUF_6 : STD_LOGIC; signal adr_bus_7_IBUF_7 : STD_LOGIC; signal adr_bus_8_IBUF_8 : STD_LOGIC; signal adr_bus_9_IBUF_9 : STD_LOGIC; signal AEN_IBUF_10 : STD_LOGIC; signal IOR_IBUF_11 : STD_LOGIC; signal IOW_IBUF_12 : STD_LOGIC; signal cs_100_ENABLE : STD_LOGIC; signal cs_100_TORGTS : STD_LOGIC; signal cs_100_OUTMUX : STD_LOGIC; signal cs_101_ENABLE : STD_LOGIC; signal cs_101_TORGTS : STD_LOGIC; signal cs_101_OUTMUX : STD_LOGIC; signal cs_102_ENABLE : STD_LOGIC; signal cs_102_TORGTS : STD_LOGIC; signal cs_102_OUTMUX : STD_LOGIC; signal cs_110_ENABLE : STD_LOGIC; signal cs_110_TORGTS : STD_LOGIC; signal cs_110_OUTMUX : STD_LOGIC; signal cs_103_ENABLE : STD_LOGIC; signal cs_103_TORGTS : STD_LOGIC; signal cs_103_OUTMUX : STD_LOGIC; signal cs_111_ENABLE : STD_LOGIC; signal cs_111_TORGTS : STD_LOGIC; signal cs_111_OUTMUX : STD_LOGIC; signal cs_104_ENABLE : STD_LOGIC; signal cs_104_TORGTS : STD_LOGIC; signal cs_104_OUTMUX : STD_LOGIC; signal cs_112_ENABLE : STD_LOGIC; signal cs_112_TORGTS : STD_LOGIC; signal cs_112_OUTMUX : STD_LOGIC; signal cs_120_ENABLE : STD_LOGIC; signal cs_120_TORGTS : STD_LOGIC; signal cs_120_OUTMUX : STD_LOGIC; signal cs_200_ENABLE : STD_LOGIC; signal cs_200_TORGTS : STD_LOGIC; signal cs_200_OUTMUX : STD_LOGIC; signal cs_105_ENABLE : STD_LOGIC; signal cs_105_TORGTS : STD_LOGIC; signal cs_105_OUTMUX : STD_LOGIC; signal cs_113_ENABLE : STD_LOGIC; signal cs_113_TORGTS : STD_LOGIC; signal cs_113_OUTMUX : STD_LOGIC; signal cs_121_ENABLE : STD_LOGIC; signal cs_121_TORGTS : STD_LOGIC; signal cs_121_OUTMUX : STD_LOGIC; signal cs_201_ENABLE : STD_LOGIC; signal cs_201_TORGTS : STD_LOGIC; signal cs_201_OUTMUX : STD_LOGIC; signal cs_106_ENABLE : STD_LOGIC; signal cs_106_TORGTS : STD_LOGIC; signal cs_106_OUTMUX : STD_LOGIC; signal cs_114_ENABLE : STD_LOGIC; signal cs_114_TORGTS : STD_LOGIC; signal cs_114_OUTMUX : STD_LOGIC; signal cs_122_ENABLE : STD_LOGIC; signal cs_122_TORGTS : STD_LOGIC; signal cs_122_OUTMUX : STD_LOGIC; signal cs_130_ENABLE : STD_LOGIC; signal cs_130_TORGTS : STD_LOGIC; signal cs_130_OUTMUX : STD_LOGIC; signal cs_202_ENABLE : STD_LOGIC; signal cs_202_TORGTS : STD_LOGIC; signal cs_202_OUTMUX : STD_LOGIC; signal cs_210_ENABLE : STD_LOGIC; signal cs_210_TORGTS : STD_LOGIC; signal cs_210_OUTMUX : STD_LOGIC; signal cs_107_ENABLE : STD_LOGIC; signal cs_107_TORGTS : STD_LOGIC; signal cs_107_OUTMUX : STD_LOGIC; signal cs_115_ENABLE : STD_LOGIC; signal cs_115_TORGTS : STD_LOGIC; signal cs_115_OUTMUX : STD_LOGIC; signal cs_123_ENABLE : STD_LOGIC; signal cs_123_TORGTS : STD_LOGIC; signal cs_123_OUTMUX : STD_LOGIC; signal cs_131_ENABLE : STD_LOGIC; signal cs_131_TORGTS : STD_LOGIC; signal cs_131_OUTMUX : STD_LOGIC; signal cs_203_ENABLE : STD_LOGIC; signal cs_203_TORGTS : STD_LOGIC; signal cs_203_OUTMUX : STD_LOGIC; signal cs_211_ENABLE : STD_LOGIC; signal cs_211_TORGTS : STD_LOGIC; signal cs_211_OUTMUX : STD_LOGIC; signal cs_108_ENABLE : STD_LOGIC; signal cs_108_TORGTS : STD_LOGIC; signal cs_108_OUTMUX : STD_LOGIC; signal cs_116_ENABLE : STD_LOGIC; signal cs_116_TORGTS : STD_LOGIC; signal cs_116_OUTMUX : STD_LOGIC; signal cs_124_ENABLE : STD_LOGIC; signal cs_124_TORGTS : STD_LOGIC; signal cs_124_OUTMUX : STD_LOGIC; signal cs_132_ENABLE : STD_LOGIC; signal cs_132_TORGTS : STD_LOGIC; signal cs_132_OUTMUX : STD_LOGIC; signal cs_140_ENABLE : STD_LOGIC; signal cs_140_TORGTS : STD_LOGIC; signal cs_140_OUTMUX : STD_LOGIC; signal cs_204_ENABLE : STD_LOGIC; signal cs_204_TORGTS : STD_LOGIC; signal cs_204_OUTMUX : STD_LOGIC; signal cs_212_ENABLE : STD_LOGIC; signal cs_212_TORGTS : STD_LOGIC; signal cs_212_OUTMUX : STD_LOGIC; signal cs_220_ENABLE : STD_LOGIC; signal cs_220_TORGTS : STD_LOGIC; signal cs_220_OUTMUX : STD_LOGIC; signal cs_109_ENABLE : STD_LOGIC; signal cs_109_TORGTS : STD_LOGIC; signal cs_109_OUTMUX : STD_LOGIC; signal cs_117_ENABLE : STD_LOGIC; signal cs_117_TORGTS : STD_LOGIC; signal cs_117_OUTMUX : STD_LOGIC; signal cs_125_ENABLE : STD_LOGIC; signal cs_125_TORGTS : STD_LOGIC; signal cs_125_OUTMUX : STD_LOGIC; signal cs_133_ENABLE : STD_LOGIC; signal cs_133_TORGTS : STD_LOGIC; signal cs_133_OUTMUX : STD_LOGIC; signal cs_141_ENABLE : STD_LOGIC; signal cs_141_TORGTS : STD_LOGIC; signal cs_141_OUTMUX : STD_LOGIC; signal cs_205_ENABLE : STD_LOGIC; signal cs_205_TORGTS : STD_LOGIC; signal cs_205_OUTMUX : STD_LOGIC; signal cs_213_ENABLE : STD_LOGIC; signal cs_213_TORGTS : STD_LOGIC; signal cs_213_OUTMUX : STD_LOGIC; signal cs_221_ENABLE : STD_LOGIC; signal cs_221_TORGTS : STD_LOGIC; signal cs_221_OUTMUX : STD_LOGIC; signal cs_118_ENABLE : STD_LOGIC; signal cs_118_TORGTS : STD_LOGIC; signal cs_118_OUTMUX : STD_LOGIC; signal cs_126_ENABLE : STD_LOGIC; signal cs_126_TORGTS : STD_LOGIC; signal cs_126_OUTMUX : STD_LOGIC; signal cs_134_ENABLE : STD_LOGIC; signal cs_134_TORGTS : STD_LOGIC; signal cs_134_OUTMUX : STD_LOGIC; signal cs_142_ENABLE : STD_LOGIC; signal cs_142_TORGTS : STD_LOGIC; signal cs_142_OUTMUX : STD_LOGIC; signal cs_150_ENABLE : STD_LOGIC; signal cs_150_TORGTS : STD_LOGIC; signal cs_150_OUTMUX : STD_LOGIC; signal cs_206_ENABLE : STD_LOGIC; signal cs_206_TORGTS : STD_LOGIC; signal cs_206_OUTMUX : STD_LOGIC; signal cs_214_ENABLE : STD_LOGIC; signal cs_214_TORGTS : STD_LOGIC; signal cs_214_OUTMUX : STD_LOGIC; signal cs_222_ENABLE : STD_LOGIC; signal cs_222_TORGTS : STD_LOGIC; signal cs_222_OUTMUX : STD_LOGIC; signal cs_230_ENABLE : STD_LOGIC; signal cs_230_TORGTS : STD_LOGIC; signal cs_230_OUTMUX : STD_LOGIC; signal cs_119_ENABLE : STD_LOGIC; signal cs_119_TORGTS : STD_LOGIC; signal cs_119_OUTMUX : STD_LOGIC; signal cs_127_ENABLE : STD_LOGIC; signal cs_127_TORGTS : STD_LOGIC; signal cs_127_OUTMUX : STD_LOGIC; signal cs_135_ENABLE : STD_LOGIC; signal cs_135_TORGTS : STD_LOGIC; signal cs_135_OUTMUX : STD_LOGIC; signal cs_143_ENABLE : STD_LOGIC; signal cs_143_TORGTS : STD_LOGIC; signal cs_143_OUTMUX : STD_LOGIC; signal cs_151_ENABLE : STD_LOGIC; signal cs_151_TORGTS : STD_LOGIC; signal cs_151_OUTMUX : STD_LOGIC; signal cs_207_ENABLE : STD_LOGIC; signal cs_207_TORGTS : STD_LOGIC; signal cs_207_OUTMUX : STD_LOGIC; signal cs_215_ENABLE : STD_LOGIC; signal cs_215_TORGTS : STD_LOGIC; signal cs_215_OUTMUX : STD_LOGIC; signal cs_223_ENABLE : STD_LOGIC; signal cs_223_TORGTS : STD_LOGIC; signal cs_223_OUTMUX : STD_LOGIC; signal cs_231_ENABLE : STD_LOGIC; signal cs_231_TORGTS : STD_LOGIC; signal cs_231_OUTMUX : STD_LOGIC; signal cs_128_ENABLE : STD_LOGIC; signal cs_128_TORGTS : STD_LOGIC; signal cs_128_OUTMUX : STD_LOGIC; signal cs_136_ENABLE : STD_LOGIC; signal cs_136_TORGTS : STD_LOGIC; signal cs_136_OUTMUX : STD_LOGIC; signal cs_144_ENABLE : STD_LOGIC; signal cs_144_TORGTS : STD_LOGIC; signal cs_144_OUTMUX : STD_LOGIC; signal cs_152_ENABLE : STD_LOGIC; signal cs_152_TORGTS : STD_LOGIC; signal cs_152_OUTMUX : STD_LOGIC; signal cs_160_ENABLE : STD_LOGIC; signal cs_160_TORGTS : STD_LOGIC; signal cs_160_OUTMUX : STD_LOGIC; signal cs_208_ENABLE : STD_LOGIC; signal cs_208_TORGTS : STD_LOGIC; signal cs_208_OUTMUX : STD_LOGIC; signal cs_216_ENABLE : STD_LOGIC; signal cs_216_TORGTS : STD_LOGIC; signal cs_216_OUTMUX : STD_LOGIC; signal cs_224_ENABLE : STD_LOGIC; signal cs_224_TORGTS : STD_LOGIC; signal cs_224_OUTMUX : STD_LOGIC; signal cs_232_ENABLE : STD_LOGIC; signal cs_232_TORGTS : STD_LOGIC; signal cs_232_OUTMUX : STD_LOGIC; signal cs_240_ENABLE : STD_LOGIC; signal cs_240_TORGTS : STD_LOGIC; signal cs_240_OUTMUX : STD_LOGIC; signal cs_129_ENABLE : STD_LOGIC; signal cs_129_TORGTS : STD_LOGIC; signal cs_129_OUTMUX : STD_LOGIC; signal cs_137_ENABLE : STD_LOGIC; signal cs_137_TORGTS : STD_LOGIC; signal cs_137_OUTMUX : STD_LOGIC; signal cs_145_ENABLE : STD_LOGIC; signal cs_145_TORGTS : STD_LOGIC; signal cs_145_OUTMUX : STD_LOGIC; signal cs_153_ENABLE : STD_LOGIC; signal cs_153_TORGTS : STD_LOGIC; signal cs_153_OUTMUX : STD_LOGIC; signal cs_161_ENABLE : STD_LOGIC; signal cs_161_TORGTS : STD_LOGIC; signal cs_161_OUTMUX : STD_LOGIC; signal cs_209_ENABLE : STD_LOGIC; signal cs_209_TORGTS : STD_LOGIC; signal cs_209_OUTMUX : STD_LOGIC; signal cs_217_ENABLE : STD_LOGIC; signal cs_217_TORGTS : STD_LOGIC; signal cs_217_OUTMUX : STD_LOGIC; signal cs_225_ENABLE : STD_LOGIC; signal cs_225_TORGTS : STD_LOGIC; signal cs_225_OUTMUX : STD_LOGIC; signal cs_233_ENABLE : STD_LOGIC; signal cs_233_TORGTS : STD_LOGIC; signal cs_233_OUTMUX : STD_LOGIC; signal cs_241_ENABLE : STD_LOGIC; signal cs_241_TORGTS : STD_LOGIC; signal cs_241_OUTMUX : STD_LOGIC; signal cs_138_ENABLE : STD_LOGIC; signal cs_138_TORGTS : STD_LOGIC; signal cs_138_OUTMUX : STD_LOGIC; signal cs_146_ENABLE : STD_LOGIC; signal cs_146_TORGTS : STD_LOGIC; signal cs_146_OUTMUX : STD_LOGIC; signal cs_154_ENABLE : STD_LOGIC; signal cs_154_TORGTS : STD_LOGIC; signal cs_154_OUTMUX : STD_LOGIC; signal cs_162_ENABLE : STD_LOGIC; signal cs_162_TORGTS : STD_LOGIC; signal cs_162_OUTMUX : STD_LOGIC; signal cs_170_ENABLE : STD_LOGIC; signal cs_170_TORGTS : STD_LOGIC; signal cs_170_OUTMUX : STD_LOGIC; signal cs_218_ENABLE : STD_LOGIC; signal cs_218_TORGTS : STD_LOGIC; signal cs_218_OUTMUX : STD_LOGIC; signal cs_226_ENABLE : STD_LOGIC; signal cs_226_TORGTS : STD_LOGIC; signal cs_226_OUTMUX : STD_LOGIC; signal cs_234_ENABLE : STD_LOGIC; signal cs_234_TORGTS : STD_LOGIC; signal cs_234_OUTMUX : STD_LOGIC; signal cs_242_ENABLE : STD_LOGIC; signal cs_242_TORGTS : STD_LOGIC; signal cs_242_OUTMUX : STD_LOGIC; signal cs_250_ENABLE : STD_LOGIC; signal cs_250_TORGTS : STD_LOGIC; signal cs_250_OUTMUX : STD_LOGIC; signal cs_139_ENABLE : STD_LOGIC; signal cs_139_TORGTS : STD_LOGIC; signal cs_139_OUTMUX : STD_LOGIC; signal cs_147_ENABLE : STD_LOGIC; signal cs_147_TORGTS : STD_LOGIC; signal cs_147_OUTMUX : STD_LOGIC; signal cs_155_ENABLE : STD_LOGIC; signal cs_155_TORGTS : STD_LOGIC; signal cs_155_OUTMUX : STD_LOGIC; signal cs_163_ENABLE : STD_LOGIC; signal cs_163_TORGTS : STD_LOGIC; signal cs_163_OUTMUX : STD_LOGIC; signal cs_171_ENABLE : STD_LOGIC; signal cs_171_TORGTS : STD_LOGIC; signal cs_171_OUTMUX : STD_LOGIC; signal cs_219_ENABLE : STD_LOGIC; signal cs_219_TORGTS : STD_LOGIC; signal cs_219_OUTMUX : STD_LOGIC; signal cs_227_ENABLE : STD_LOGIC; signal cs_227_TORGTS : STD_LOGIC; signal cs_227_OUTMUX : STD_LOGIC; signal cs_235_ENABLE : STD_LOGIC; signal cs_235_TORGTS : STD_LOGIC; signal cs_235_OUTMUX : STD_LOGIC; signal cs_243_ENABLE : STD_LOGIC; signal cs_243_TORGTS : STD_LOGIC; signal cs_243_OUTMUX : STD_LOGIC; signal cs_251_ENABLE : STD_LOGIC; signal cs_251_TORGTS : STD_LOGIC; signal cs_251_OUTMUX : STD_LOGIC; signal cs_148_ENABLE : STD_LOGIC; signal cs_148_TORGTS : STD_LOGIC; signal cs_148_OUTMUX : STD_LOGIC; signal cs_156_ENABLE : STD_LOGIC; signal cs_156_TORGTS : STD_LOGIC; signal cs_156_OUTMUX : STD_LOGIC; signal cs_164_ENABLE : STD_LOGIC; signal cs_164_TORGTS : STD_LOGIC; signal cs_164_OUTMUX : STD_LOGIC; signal cs_172_ENABLE : STD_LOGIC; signal cs_172_TORGTS : STD_LOGIC; signal cs_172_OUTMUX : STD_LOGIC; signal cs_180_ENABLE : STD_LOGIC; signal cs_180_TORGTS : STD_LOGIC; signal cs_180_OUTMUX : STD_LOGIC; signal cs_228_ENABLE : STD_LOGIC; signal cs_228_TORGTS : STD_LOGIC; signal cs_228_OUTMUX : STD_LOGIC; signal cs_236_ENABLE : STD_LOGIC; signal cs_236_TORGTS : STD_LOGIC; signal cs_236_OUTMUX : STD_LOGIC; signal cs_244_ENABLE : STD_LOGIC; signal cs_244_TORGTS : STD_LOGIC; signal cs_244_OUTMUX : STD_LOGIC; signal cs_252_ENABLE : STD_LOGIC; signal cs_252_TORGTS : STD_LOGIC; signal cs_252_OUTMUX : STD_LOGIC; signal cs_149_ENABLE : STD_LOGIC; signal cs_149_TORGTS : STD_LOGIC; signal cs_149_OUTMUX : STD_LOGIC; signal cs_157_ENABLE : STD_LOGIC; signal cs_157_TORGTS : STD_LOGIC; signal cs_157_OUTMUX : STD_LOGIC; signal cs_165_ENABLE : STD_LOGIC; signal cs_165_TORGTS : STD_LOGIC; signal cs_165_OUTMUX : STD_LOGIC; signal cs_173_ENABLE : STD_LOGIC; signal cs_173_TORGTS : STD_LOGIC; signal cs_173_OUTMUX : STD_LOGIC; signal cs_181_ENABLE : STD_LOGIC; signal cs_181_TORGTS : STD_LOGIC; signal cs_181_OUTMUX : STD_LOGIC; signal cs_229_ENABLE : STD_LOGIC; signal cs_229_TORGTS : STD_LOGIC; signal cs_229_OUTMUX : STD_LOGIC; signal cs_237_ENABLE : STD_LOGIC; signal cs_237_TORGTS : STD_LOGIC; signal cs_237_OUTMUX : STD_LOGIC; signal cs_245_ENABLE : STD_LOGIC; signal cs_245_TORGTS : STD_LOGIC; signal cs_245_OUTMUX : STD_LOGIC; signal cs_253_ENABLE : STD_LOGIC; signal cs_253_TORGTS : STD_LOGIC; signal cs_253_OUTMUX : STD_LOGIC; signal cs_158_ENABLE : STD_LOGIC; signal cs_158_TORGTS : STD_LOGIC; signal cs_158_OUTMUX : STD_LOGIC; signal cs_166_ENABLE : STD_LOGIC; signal cs_166_TORGTS : STD_LOGIC; signal cs_166_OUTMUX : STD_LOGIC; signal cs_174_ENABLE : STD_LOGIC; signal cs_174_TORGTS : STD_LOGIC; signal cs_174_OUTMUX : STD_LOGIC; signal cs_182_ENABLE : STD_LOGIC; signal cs_182_TORGTS : STD_LOGIC; signal cs_182_OUTMUX : STD_LOGIC; signal cs_190_ENABLE : STD_LOGIC; signal cs_190_TORGTS : STD_LOGIC; signal cs_190_OUTMUX : STD_LOGIC; signal cs_238_ENABLE : STD_LOGIC; signal cs_238_TORGTS : STD_LOGIC; signal cs_238_OUTMUX : STD_LOGIC; signal cs_246_ENABLE : STD_LOGIC; signal cs_246_TORGTS : STD_LOGIC; signal cs_246_OUTMUX : STD_LOGIC; signal cs_254_ENABLE : STD_LOGIC; signal cs_254_TORGTS : STD_LOGIC; signal cs_254_OUTMUX : STD_LOGIC; signal cs_159_ENABLE : STD_LOGIC; signal cs_159_TORGTS : STD_LOGIC; signal cs_159_OUTMUX : STD_LOGIC; signal cs_167_ENABLE : STD_LOGIC; signal cs_167_TORGTS : STD_LOGIC; signal cs_167_OUTMUX : STD_LOGIC; signal cs_175_ENABLE : STD_LOGIC; signal cs_175_TORGTS : STD_LOGIC; signal cs_175_OUTMUX : STD_LOGIC; signal cs_183_ENABLE : STD_LOGIC; signal cs_183_TORGTS : STD_LOGIC; signal cs_183_OUTMUX : STD_LOGIC; signal cs_191_ENABLE : STD_LOGIC; signal cs_191_TORGTS : STD_LOGIC; signal cs_191_OUTMUX : STD_LOGIC; signal cs_239_ENABLE : STD_LOGIC; signal cs_239_TORGTS : STD_LOGIC; signal cs_239_OUTMUX : STD_LOGIC; signal cs_247_ENABLE : STD_LOGIC; signal cs_247_TORGTS : STD_LOGIC; signal cs_247_OUTMUX : STD_LOGIC; signal cs_255_ENABLE : STD_LOGIC; signal cs_255_TORGTS : STD_LOGIC; signal cs_255_OUTMUX : STD_LOGIC; signal cs_168_ENABLE : STD_LOGIC; signal cs_168_TORGTS : STD_LOGIC; signal cs_168_OUTMUX : STD_LOGIC; signal cs_176_ENABLE : STD_LOGIC; signal cs_176_TORGTS : STD_LOGIC; signal cs_176_OUTMUX : STD_LOGIC; signal cs_184_ENABLE : STD_LOGIC; signal cs_184_TORGTS : STD_LOGIC; signal cs_184_OUTMUX : STD_LOGIC; signal cs_192_ENABLE : STD_LOGIC; signal cs_192_TORGTS : STD_LOGIC; signal cs_192_OUTMUX : STD_LOGIC; signal cs_248_ENABLE : STD_LOGIC; signal cs_248_TORGTS : STD_LOGIC; signal cs_248_OUTMUX : STD_LOGIC; signal cs_169_ENABLE : STD_LOGIC; signal cs_169_TORGTS : STD_LOGIC; signal cs_169_OUTMUX : STD_LOGIC; signal cs_177_ENABLE : STD_LOGIC; signal cs_177_TORGTS : STD_LOGIC; signal cs_177_OUTMUX : STD_LOGIC; signal cs_185_ENABLE : STD_LOGIC; signal cs_185_TORGTS : STD_LOGIC; signal cs_185_OUTMUX : STD_LOGIC; signal cs_193_ENABLE : STD_LOGIC; signal cs_193_TORGTS : STD_LOGIC; signal cs_193_OUTMUX : STD_LOGIC; signal cs_249_ENABLE : STD_LOGIC; signal cs_249_TORGTS : STD_LOGIC; signal cs_249_OUTMUX : STD_LOGIC; signal cs_178_ENABLE : STD_LOGIC; signal cs_178_TORGTS : STD_LOGIC; signal cs_178_OUTMUX : STD_LOGIC; signal cs_186_ENABLE : STD_LOGIC; signal cs_186_TORGTS : STD_LOGIC; signal cs_186_OUTMUX : STD_LOGIC; signal cs_194_ENABLE : STD_LOGIC; signal cs_194_TORGTS : STD_LOGIC; signal cs_194_OUTMUX : STD_LOGIC; signal cs_179_ENABLE : STD_LOGIC; signal cs_179_TORGTS : STD_LOGIC; signal cs_179_OUTMUX : STD_LOGIC; signal cs_187_ENABLE : STD_LOGIC; signal cs_187_TORGTS : STD_LOGIC; signal cs_187_OUTMUX : STD_LOGIC; signal cs_195_ENABLE : STD_LOGIC; signal cs_195_TORGTS : STD_LOGIC; signal cs_195_OUTMUX : STD_LOGIC; signal cs_188_ENABLE : STD_LOGIC; signal cs_188_TORGTS : STD_LOGIC; signal cs_188_OUTMUX : STD_LOGIC; signal cs_196_ENABLE : STD_LOGIC; signal cs_196_TORGTS : STD_LOGIC; signal cs_196_OUTMUX : STD_LOGIC; signal cs_189_ENABLE : STD_LOGIC; signal cs_189_TORGTS : STD_LOGIC; signal cs_189_OUTMUX : STD_LOGIC; signal cs_197_ENABLE : STD_LOGIC; signal cs_197_TORGTS : STD_LOGIC; signal cs_197_OUTMUX : STD_LOGIC; signal cs_198_ENABLE : STD_LOGIC; signal cs_198_TORGTS : STD_LOGIC; signal cs_198_OUTMUX : STD_LOGIC; signal cs_199_ENABLE : STD_LOGIC; signal cs_199_TORGTS : STD_LOGIC; signal cs_199_OUTMUX : STD_LOGIC; signal clk_ENABLE : STD_LOGIC; signal clk_TORGTS : STD_LOGIC; signal clk_OUTMUX : STD_LOGIC; signal adr_bus_10_IBUF_13 : STD_LOGIC; signal adr_bus_11_IBUF_14 : STD_LOGIC; signal adr_bus_12_IBUF_15 : STD_LOGIC; signal adr_bus_13_IBUF_16 : STD_LOGIC; signal adr_bus_14_IBUF_17 : STD_LOGIC; signal adr_bus_15_IBUF_18 : STD_LOGIC; signal cs_10_ENABLE : STD_LOGIC; signal cs_10_TORGTS : STD_LOGIC; signal cs_10_OUTMUX : STD_LOGIC; signal cs_11_ENABLE : STD_LOGIC; signal cs_11_TORGTS : STD_LOGIC; signal cs_11_OUTMUX : STD_LOGIC; signal cs_12_ENABLE : STD_LOGIC; signal cs_12_TORGTS : STD_LOGIC; signal cs_12_OUTMUX : STD_LOGIC; signal cs_20_ENABLE : STD_LOGIC; signal cs_20_TORGTS : STD_LOGIC; signal cs_20_OUTMUX : STD_LOGIC; signal cs_13_ENABLE : STD_LOGIC; signal cs_13_TORGTS : STD_LOGIC; signal cs_13_OUTMUX : STD_LOGIC; signal cs_21_ENABLE : STD_LOGIC; signal cs_21_TORGTS : STD_LOGIC; signal cs_21_OUTMUX : STD_LOGIC; signal cs_14_ENABLE : STD_LOGIC; signal cs_14_TORGTS : STD_LOGIC; signal cs_14_OUTMUX : STD_LOGIC; signal cs_22_ENABLE : STD_LOGIC; signal cs_22_TORGTS : STD_LOGIC; signal cs_22_OUTMUX : STD_LOGIC; signal cs_30_ENABLE : STD_LOGIC; signal cs_30_TORGTS : STD_LOGIC; signal cs_30_OUTMUX : STD_LOGIC; signal cs_15_ENABLE : STD_LOGIC; signal cs_15_TORGTS : STD_LOGIC; signal cs_15_OUTMUX : STD_LOGIC; signal cs_23_ENABLE : STD_LOGIC; signal cs_23_TORGTS : STD_LOGIC; signal cs_23_OUTMUX : STD_LOGIC; signal cs_31_ENABLE : STD_LOGIC; signal cs_31_TORGTS : STD_LOGIC; signal cs_31_OUTMUX : STD_LOGIC; signal cs_16_ENABLE : STD_LOGIC; signal cs_16_TORGTS : STD_LOGIC; signal cs_16_OUTMUX : STD_LOGIC; signal cs_24_ENABLE : STD_LOGIC; signal cs_24_TORGTS : STD_LOGIC; signal cs_24_OUTMUX : STD_LOGIC; signal cs_32_ENABLE : STD_LOGIC; signal cs_32_TORGTS : STD_LOGIC; signal cs_32_OUTMUX : STD_LOGIC; signal cs_40_ENABLE : STD_LOGIC; signal cs_40_TORGTS : STD_LOGIC; signal cs_40_OUTMUX : STD_LOGIC; signal cs_17_ENABLE : STD_LOGIC; signal cs_17_TORGTS : STD_LOGIC; signal cs_17_OUTMUX : STD_LOGIC; signal cs_25_ENABLE : STD_LOGIC; signal cs_25_TORGTS : STD_LOGIC; signal cs_25_OUTMUX : STD_LOGIC; signal cs_33_ENABLE : STD_LOGIC; signal cs_33_TORGTS : STD_LOGIC; signal cs_33_OUTMUX : STD_LOGIC; signal cs_41_ENABLE : STD_LOGIC; signal cs_41_TORGTS : STD_LOGIC; signal cs_41_OUTMUX : STD_LOGIC; signal cs_18_ENABLE : STD_LOGIC; signal cs_18_TORGTS : STD_LOGIC; signal cs_18_OUTMUX : STD_LOGIC; signal cs_26_ENABLE : STD_LOGIC; signal cs_26_TORGTS : STD_LOGIC; signal cs_26_OUTMUX : STD_LOGIC; signal cs_34_ENABLE : STD_LOGIC; signal cs_34_TORGTS : STD_LOGIC; signal cs_34_OUTMUX : STD_LOGIC; signal cs_42_ENABLE : STD_LOGIC; signal cs_42_TORGTS : STD_LOGIC; signal cs_42_OUTMUX : STD_LOGIC; signal cs_50_ENABLE : STD_LOGIC; signal cs_50_TORGTS : STD_LOGIC; signal cs_50_OUTMUX : STD_LOGIC; signal cs_19_ENABLE : STD_LOGIC; signal cs_19_TORGTS : STD_LOGIC; signal cs_19_OUTMUX : STD_LOGIC; signal cs_27_ENABLE : STD_LOGIC; signal cs_27_TORGTS : STD_LOGIC; signal cs_27_OUTMUX : STD_LOGIC; signal cs_35_ENABLE : STD_LOGIC; signal cs_35_TORGTS : STD_LOGIC; signal cs_35_OUTMUX : STD_LOGIC; signal cs_43_ENABLE : STD_LOGIC; signal cs_43_TORGTS : STD_LOGIC; signal cs_43_OUTMUX : STD_LOGIC; signal cs_51_ENABLE : STD_LOGIC; signal cs_51_TORGTS : STD_LOGIC; signal cs_51_OUTMUX : STD_LOGIC; signal cs_28_ENABLE : STD_LOGIC; signal cs_28_TORGTS : STD_LOGIC; signal cs_28_OUTMUX : STD_LOGIC; signal cs_36_ENABLE : STD_LOGIC; signal cs_36_TORGTS : STD_LOGIC; signal cs_36_OUTMUX : STD_LOGIC; signal cs_44_ENABLE : STD_LOGIC; signal cs_44_TORGTS : STD_LOGIC; signal cs_44_OUTMUX : STD_LOGIC; signal cs_52_ENABLE : STD_LOGIC; signal cs_52_TORGTS : STD_LOGIC; signal cs_52_OUTMUX : STD_LOGIC; signal cs_60_ENABLE : STD_LOGIC; signal cs_60_TORGTS : STD_LOGIC; signal cs_60_OUTMUX : STD_LOGIC; signal cs_29_ENABLE : STD_LOGIC; signal cs_29_TORGTS : STD_LOGIC; signal cs_29_OUTMUX : STD_LOGIC; signal cs_37_ENABLE : STD_LOGIC; signal cs_37_TORGTS : STD_LOGIC; signal cs_37_OUTMUX : STD_LOGIC; signal cs_45_ENABLE : STD_LOGIC; signal cs_45_TORGTS : STD_LOGIC; signal cs_45_OUTMUX : STD_LOGIC; signal cs_53_ENABLE : STD_LOGIC; signal cs_53_TORGTS : STD_LOGIC; signal cs_53_OUTMUX : STD_LOGIC; signal cs_61_ENABLE : STD_LOGIC; signal cs_61_TORGTS : STD_LOGIC; signal cs_61_OUTMUX : STD_LOGIC; signal cs_38_ENABLE : STD_LOGIC; signal cs_38_TORGTS : STD_LOGIC; signal cs_38_OUTMUX : STD_LOGIC; signal cs_46_ENABLE : STD_LOGIC; signal cs_46_TORGTS : STD_LOGIC; signal cs_46_OUTMUX : STD_LOGIC; signal cs_54_ENABLE : STD_LOGIC; signal cs_54_TORGTS : STD_LOGIC; signal cs_54_OUTMUX : STD_LOGIC; signal cs_62_ENABLE : STD_LOGIC; signal cs_62_TORGTS : STD_LOGIC; signal cs_62_OUTMUX : STD_LOGIC; signal cs_70_ENABLE : STD_LOGIC; signal cs_70_TORGTS : STD_LOGIC; signal cs_70_OUTMUX : STD_LOGIC; signal cs_39_ENABLE : STD_LOGIC; signal cs_39_TORGTS : STD_LOGIC; signal cs_39_OUTMUX : STD_LOGIC; signal cs_47_ENABLE : STD_LOGIC; signal cs_47_TORGTS : STD_LOGIC; signal cs_47_OUTMUX : STD_LOGIC; signal cs_55_ENABLE : STD_LOGIC; signal cs_55_TORGTS : STD_LOGIC; signal cs_55_OUTMUX : STD_LOGIC; signal cs_63_ENABLE : STD_LOGIC; signal cs_63_TORGTS : STD_LOGIC; signal cs_63_OUTMUX : STD_LOGIC; signal cs_71_ENABLE : STD_LOGIC; signal cs_71_TORGTS : STD_LOGIC; signal cs_71_OUTMUX : STD_LOGIC; signal cs_48_ENABLE : STD_LOGIC; signal cs_48_TORGTS : STD_LOGIC; signal cs_48_OUTMUX : STD_LOGIC; signal cs_56_ENABLE : STD_LOGIC; signal cs_56_TORGTS : STD_LOGIC; signal cs_56_OUTMUX : STD_LOGIC; signal cs_64_ENABLE : STD_LOGIC; signal cs_64_TORGTS : STD_LOGIC; signal cs_64_OUTMUX : STD_LOGIC; signal cs_72_ENABLE : STD_LOGIC; signal cs_72_TORGTS : STD_LOGIC; signal cs_72_OUTMUX : STD_LOGIC; signal cs_80_ENABLE : STD_LOGIC; signal cs_80_TORGTS : STD_LOGIC; signal cs_80_OUTMUX : STD_LOGIC; signal cs_49_ENABLE : STD_LOGIC; signal cs_49_TORGTS : STD_LOGIC; signal cs_49_OUTMUX : STD_LOGIC; signal cs_57_ENABLE : STD_LOGIC; signal cs_57_TORGTS : STD_LOGIC; signal cs_57_OUTMUX : STD_LOGIC; signal cs_65_ENABLE : STD_LOGIC; signal cs_65_TORGTS : STD_LOGIC; signal cs_65_OUTMUX : STD_LOGIC; signal cs_73_ENABLE : STD_LOGIC; signal cs_73_TORGTS : STD_LOGIC; signal cs_73_OUTMUX : STD_LOGIC; signal cs_81_ENABLE : STD_LOGIC; signal cs_81_TORGTS : STD_LOGIC; signal cs_81_OUTMUX : STD_LOGIC; signal cs_58_ENABLE : STD_LOGIC; signal cs_58_TORGTS : STD_LOGIC; signal cs_58_OUTMUX : STD_LOGIC; signal cs_66_ENABLE : STD_LOGIC; signal cs_66_TORGTS : STD_LOGIC; signal cs_66_OUTMUX : STD_LOGIC; signal cs_74_ENABLE : STD_LOGIC; signal cs_74_TORGTS : STD_LOGIC; signal cs_74_OUTMUX : STD_LOGIC; signal cs_82_ENABLE : STD_LOGIC; signal cs_82_TORGTS : STD_LOGIC; signal cs_82_OUTMUX : STD_LOGIC; signal cs_90_ENABLE : STD_LOGIC; signal cs_90_TORGTS : STD_LOGIC; signal cs_90_OUTMUX : STD_LOGIC; signal cs_59_ENABLE : STD_LOGIC; signal cs_59_TORGTS : STD_LOGIC; signal cs_59_OUTMUX : STD_LOGIC; signal cs_67_ENABLE : STD_LOGIC; signal cs_67_TORGTS : STD_LOGIC; signal cs_67_OUTMUX : STD_LOGIC; signal cs_75_ENABLE : STD_LOGIC; signal cs_75_TORGTS : STD_LOGIC; signal cs_75_OUTMUX : STD_LOGIC; signal cs_83_ENABLE : STD_LOGIC; signal cs_83_TORGTS : STD_LOGIC; signal cs_83_OUTMUX : STD_LOGIC; signal cs_91_ENABLE : STD_LOGIC; signal cs_91_TORGTS : STD_LOGIC; signal cs_91_OUTMUX : STD_LOGIC; signal cs_68_ENABLE : STD_LOGIC; signal cs_68_TORGTS : STD_LOGIC; signal cs_68_OUTMUX : STD_LOGIC; signal cs_76_ENABLE : STD_LOGIC; signal cs_76_TORGTS : STD_LOGIC; signal cs_76_OUTMUX : STD_LOGIC; signal cs_84_ENABLE : STD_LOGIC; signal cs_84_TORGTS : STD_LOGIC; signal cs_84_OUTMUX : STD_LOGIC; signal cs_92_ENABLE : STD_LOGIC; signal cs_92_TORGTS : STD_LOGIC; signal cs_92_OUTMUX : STD_LOGIC; signal cs_69_ENABLE : STD_LOGIC; signal cs_69_TORGTS : STD_LOGIC; signal cs_69_OUTMUX : STD_LOGIC; signal VCC : STD_LOGIC; begin dadrL_BU2735 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N18117_FROM ); dadrL_BU2732 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N18117_GROM ); dadrL_N18117_XUSED : X_BUF port map ( I => dadrL_N18117_FROM, O => dadrL_N18117 ); dadrL_N18117_YUSED : X_BUF port map ( I => dadrL_N18117_GROM, O => dadrL_N18116 ); dadrL_BU2196 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N14638_FROM ); dadrL_BU2193 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N14638_GROM ); dadrL_N14638_XUSED : X_BUF port map ( I => dadrL_N14638_FROM, O => dadrL_N14638 ); dadrL_N14638_YUSED : X_BUF port map ( I => dadrL_N14638_GROM, O => dadrL_N14637 ); dadrL_BU2427 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N16129_FROM ); dadrL_BU2424 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N16129_GROM ); dadrL_N16129_XUSED : X_BUF port map ( I => dadrL_N16129_FROM, O => dadrL_N16129 ); dadrL_N16129_YUSED : X_BUF port map ( I => dadrL_N16129_GROM, O => dadrL_N16128 ); dadrL_BU2416 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N16058_FROM ); dadrL_BU2413 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N16058_GROM ); dadrL_N16058_XUSED : X_BUF port map ( I => dadrL_N16058_FROM, O => dadrL_N16058 ); dadrL_N16058_YUSED : X_BUF port map ( I => dadrL_N16058_GROM, O => dadrL_N16057 ); dadrL_BU139 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N1361_FROM ); dadrL_BU136 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N1361_GROM ); dadrL_N1361_XUSED : X_BUF port map ( I => dadrL_N1361_FROM, O => dadrL_N1361 ); dadrL_N1361_YUSED : X_BUF port map ( I => dadrL_N1361_GROM, O => dadrL_N1360 ); dadrL_BU128 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N1290_FROM ); dadrL_BU125 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N1290_GROM ); dadrL_N1290_XUSED : X_BUF port map ( I => dadrL_N1290_FROM, O => dadrL_N1290 ); dadrL_N1290_YUSED : X_BUF port map ( I => dadrL_N1290_GROM, O => dadrL_N1289 ); dadrL_BU1294 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N8816_FROM ); dadrL_BU1291 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N8816_GROM ); dadrL_N8816_XUSED : X_BUF port map ( I => dadrL_N8816_FROM, O => dadrL_N8816 ); dadrL_N8816_YUSED : X_BUF port map ( I => dadrL_N8816_GROM, O => dadrL_N8815 ); dadrL_BU1698 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N11442_FROM ); dadrL_BU1701 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N11442_GROM ); dadrL_N11442_XUSED : X_BUF port map ( I => dadrL_N11442_FROM, O => dadrL_N11442 ); dadrL_N11442_YUSED : X_BUF port map ( I => dadrL_N11442_GROM, O => dadrL_N11443 ); dadrL_BU1283 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N8745_FROM ); dadrL_BU1280 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N8745_GROM ); dadrL_N8745_XUSED : X_BUF port map ( I => dadrL_N8745_FROM, O => dadrL_N8745 ); dadrL_N8745_YUSED : X_BUF port map ( I => dadrL_N8745_GROM, O => dadrL_N8744 ); dadrL_BU1687 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N11371_FROM ); dadrL_BU1690 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N11371_GROM ); dadrL_N11371_XUSED : X_BUF port map ( I => dadrL_N11371_FROM, O => dadrL_N11371 ); dadrL_N11371_YUSED : X_BUF port map ( I => dadrL_N11371_GROM, O => dadrL_N11372 ); dadrL_BU2768 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N18330_FROM ); dadrL_BU2765 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N18330_GROM ); dadrL_N18330_XUSED : X_BUF port map ( I => dadrL_N18330_FROM, O => dadrL_N18330 ); dadrL_N18330_YUSED : X_BUF port map ( I => dadrL_N18330_GROM, O => dadrL_N18329 ); dadrL_BU2229 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N14851_FROM ); dadrL_BU2226 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N14851_GROM ); dadrL_N14851_XUSED : X_BUF port map ( I => dadrL_N14851_FROM, O => dadrL_N14851 ); dadrL_N14851_YUSED : X_BUF port map ( I => dadrL_N14851_GROM, O => dadrL_N14850 ); dadrL_BU2757 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N18259_FROM ); dadrL_BU2754 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N18259_GROM ); dadrL_N18259_XUSED : X_BUF port map ( I => dadrL_N18259_FROM, O => dadrL_N18259 ); dadrL_N18259_YUSED : X_BUF port map ( I => dadrL_N18259_GROM, O => dadrL_N18258 ); dadrL_BU2449 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N16271_FROM ); dadrL_BU2446 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N16271_GROM ); dadrL_N16271_XUSED : X_BUF port map ( I => dadrL_N16271_FROM, O => dadrL_N16271 ); dadrL_N16271_YUSED : X_BUF port map ( I => dadrL_N16271_GROM, O => dadrL_N16270 ); dadrL_BU2218 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N14780_FROM ); dadrL_BU2215 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N14780_GROM ); dadrL_N14780_XUSED : X_BUF port map ( I => dadrL_N14780_FROM, O => dadrL_N14780 ); dadrL_N14780_YUSED : X_BUF port map ( I => dadrL_N14780_GROM, O => dadrL_N14779 ); dadrL_BU2438 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N16200_FROM ); dadrL_BU2435 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N16200_GROM ); dadrL_N16200_XUSED : X_BUF port map ( I => dadrL_N16200_FROM, O => dadrL_N16200 ); dadrL_N16200_YUSED : X_BUF port map ( I => dadrL_N16200_GROM, O => dadrL_N16199 ); dadrL_BU158 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N1502_FROM ); dadrL_BU161 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N1502_GROM ); dadrL_N1502_XUSED : X_BUF port map ( I => dadrL_N1502_FROM, O => dadrL_N1502 ); dadrL_N1502_YUSED : X_BUF port map ( I => dadrL_N1502_GROM, O => dadrL_N1503 ); dadrL_BU147 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N1431_FROM ); dadrL_BU150 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N1431_GROM ); dadrL_N1431_XUSED : X_BUF port map ( I => dadrL_N1431_FROM, O => dadrL_N1431 ); dadrL_N1431_YUSED : X_BUF port map ( I => dadrL_N1431_GROM, O => dadrL_N1432 ); dadrL_BU1316 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N8958_FROM ); dadrL_BU1313 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N8958_GROM ); dadrL_N8958_XUSED : X_BUF port map ( I => dadrL_N8958_FROM, O => dadrL_N8958 ); dadrL_N8958_YUSED : X_BUF port map ( I => dadrL_N8958_GROM, O => dadrL_N8957 ); dadrL_BU1723 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N11585_FROM ); dadrL_BU1720 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N11585_GROM ); dadrL_N11585_XUSED : X_BUF port map ( I => dadrL_N11585_FROM, O => dadrL_N11585 ); dadrL_N11585_YUSED : X_BUF port map ( I => dadrL_N11585_GROM, O => dadrL_N11584 ); dadrL_BU1305 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N8887_FROM ); dadrL_BU1302 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N8887_GROM ); dadrL_N8887_XUSED : X_BUF port map ( I => dadrL_N8887_FROM, O => dadrL_N8887 ); dadrL_N8887_YUSED : X_BUF port map ( I => dadrL_N8887_GROM, O => dadrL_N8886 ); dadrL_BU1709 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N11513_FROM ); dadrL_BU1712 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N11513_GROM ); dadrL_N11513_XUSED : X_BUF port map ( I => dadrL_N11513_FROM, O => dadrL_N11513 ); dadrL_N11513_YUSED : X_BUF port map ( I => dadrL_N11513_GROM, O => dadrL_N11514 ); dadrL_BU2248 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N14992_FROM ); dadrL_BU2251 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N14992_GROM ); dadrL_N14992_XUSED : X_BUF port map ( I => dadrL_N14992_FROM, O => dadrL_N14992 ); dadrL_N14992_YUSED : X_BUF port map ( I => dadrL_N14992_GROM, O => dadrL_N14993 ); dadrL_BU2468 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N16412_FROM ); dadrL_BU2471 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N16412_GROM ); dadrL_N16412_XUSED : X_BUF port map ( I => dadrL_N16412_FROM, O => dadrL_N16412 ); dadrL_N16412_YUSED : X_BUF port map ( I => dadrL_N16412_GROM, O => dadrL_N16413 ); dadrL_BU2237 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N14921_FROM ); dadrL_BU2240 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N14921_GROM ); dadrL_N14921_XUSED : X_BUF port map ( I => dadrL_N14921_FROM, O => dadrL_N14921 ); dadrL_N14921_YUSED : X_BUF port map ( I => dadrL_N14921_GROM, O => dadrL_N14922 ); dadrL_BU2457 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N16341_FROM ); dadrL_BU2460 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N16341_GROM ); dadrL_N16341_XUSED : X_BUF port map ( I => dadrL_N16341_FROM, O => dadrL_N16341 ); dadrL_N16341_YUSED : X_BUF port map ( I => dadrL_N16341_GROM, O => dadrL_N16342 ); dadrL_BU183 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N1645_FROM ); dadrL_BU180 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N1645_GROM ); dadrL_N1645_XUSED : X_BUF port map ( I => dadrL_N1645_FROM, O => dadrL_N1645 ); dadrL_N1645_YUSED : X_BUF port map ( I => dadrL_N1645_GROM, O => dadrL_N1644 ); dadrL_BU169 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N1573_FROM ); dadrL_BU172 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N1573_GROM ); dadrL_N1573_XUSED : X_BUF port map ( I => dadrL_N1573_FROM, O => dadrL_N1573 ); dadrL_N1573_YUSED : X_BUF port map ( I => dadrL_N1573_GROM, O => dadrL_N1574 ); dadrL_BU1745 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N11727_FROM ); dadrL_BU1742 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N11727_GROM ); dadrL_N11727_XUSED : X_BUF port map ( I => dadrL_N11727_FROM, O => dadrL_N11727 ); dadrL_N11727_YUSED : X_BUF port map ( I => dadrL_N11727_GROM, O => dadrL_N11726 ); dadrL_BU1734 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N11656_FROM ); dadrL_BU1731 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N11656_GROM ); dadrL_N11656_XUSED : X_BUF port map ( I => dadrL_N11656_FROM, O => dadrL_N11656 ); dadrL_N11656_YUSED : X_BUF port map ( I => dadrL_N11656_GROM, O => dadrL_N11655 ); dadrL_BU2273 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N15135_FROM ); dadrL_BU2270 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N15135_GROM ); dadrL_N15135_XUSED : X_BUF port map ( I => dadrL_N15135_FROM, O => dadrL_N15135 ); dadrL_N15135_YUSED : X_BUF port map ( I => dadrL_N15135_GROM, O => dadrL_N15134 ); dadrL_BU2493 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N16555_FROM ); dadrL_BU2490 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N16555_GROM ); dadrL_N16555_XUSED : X_BUF port map ( I => dadrL_N16555_FROM, O => dadrL_N16555 ); dadrL_N16555_YUSED : X_BUF port map ( I => dadrL_N16555_GROM, O => dadrL_N16554 ); dadrL_BU2259 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N15063_FROM ); dadrL_BU2262 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N15063_GROM ); dadrL_N15063_XUSED : X_BUF port map ( I => dadrL_N15063_FROM, O => dadrL_N15063 ); dadrL_N15063_YUSED : X_BUF port map ( I => dadrL_N15063_GROM, O => dadrL_N15064 ); dadrL_BU2479 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N16483_FROM ); dadrL_BU2482 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N16483_GROM ); dadrL_N16483_XUSED : X_BUF port map ( I => dadrL_N16483_FROM, O => dadrL_N16483 ); dadrL_N16483_YUSED : X_BUF port map ( I => dadrL_N16483_GROM, O => dadrL_N16484 ); dadrL_BU205 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N1787_FROM ); dadrL_BU202 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N1787_GROM ); dadrL_N1787_XUSED : X_BUF port map ( I => dadrL_N1787_FROM, O => dadrL_N1787 ); dadrL_N1787_YUSED : X_BUF port map ( I => dadrL_N1787_GROM, O => dadrL_N1786 ); dadrL_BU194 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N1716_FROM ); dadrL_BU191 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N1716_GROM ); dadrL_N1716_XUSED : X_BUF port map ( I => dadrL_N1716_FROM, O => dadrL_N1716 ); dadrL_N1716_YUSED : X_BUF port map ( I => dadrL_N1716_GROM, O => dadrL_N1715 ); dadrL_BU1767 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N11869_FROM ); dadrL_BU1764 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N11869_GROM ); dadrL_N11869_XUSED : X_BUF port map ( I => dadrL_N11869_FROM, O => dadrL_N11869 ); dadrL_N11869_YUSED : X_BUF port map ( I => dadrL_N11869_GROM, O => dadrL_N11868 ); dadrL_BU1756 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N11798_FROM ); dadrL_BU1753 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N11798_GROM ); dadrL_N11798_XUSED : X_BUF port map ( I => dadrL_N11798_FROM, O => dadrL_N11798 ); dadrL_N11798_YUSED : X_BUF port map ( I => dadrL_N11798_GROM, O => dadrL_N11797 ); dadrL_BU2295 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N15277_FROM ); dadrL_BU2292 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N15277_GROM ); dadrL_N15277_XUSED : X_BUF port map ( I => dadrL_N15277_FROM, O => dadrL_N15277 ); dadrL_N15277_YUSED : X_BUF port map ( I => dadrL_N15277_GROM, O => dadrL_N15276 ); dadrL_BU2284 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N15206_FROM ); dadrL_BU2281 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N15206_GROM ); dadrL_N15206_XUSED : X_BUF port map ( I => dadrL_N15206_FROM, O => dadrL_N15206 ); dadrL_N15206_YUSED : X_BUF port map ( I => dadrL_N15206_GROM, O => dadrL_N15205 ); dadrL_BU2515 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N16697_FROM ); dadrL_BU2512 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N16697_GROM ); dadrL_N16697_XUSED : X_BUF port map ( I => dadrL_N16697_FROM, O => dadrL_N16697 ); dadrL_N16697_YUSED : X_BUF port map ( I => dadrL_N16697_GROM, O => dadrL_N16696 ); dadrL_BU2504 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N16626_FROM ); dadrL_BU2501 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N16626_GROM ); dadrL_N16626_XUSED : X_BUF port map ( I => dadrL_N16626_FROM, O => dadrL_N16626 ); dadrL_N16626_YUSED : X_BUF port map ( I => dadrL_N16626_GROM, O => dadrL_N16625 ); dadrL_BU227 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N1929_FROM ); dadrL_BU224 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N1929_GROM ); dadrL_N1929_XUSED : X_BUF port map ( I => dadrL_N1929_FROM, O => dadrL_N1929 ); dadrL_N1929_YUSED : X_BUF port map ( I => dadrL_N1929_GROM, O => dadrL_N1928 ); dadrL_BU216 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N1858_FROM ); dadrL_BU213 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N1858_GROM ); dadrL_N1858_XUSED : X_BUF port map ( I => dadrL_N1858_FROM, O => dadrL_N1858 ); dadrL_N1858_YUSED : X_BUF port map ( I => dadrL_N1858_GROM, O => dadrL_N1857 ); dadrL_BU1789 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N12011_FROM ); dadrL_BU1786 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N12011_GROM ); dadrL_N12011_XUSED : X_BUF port map ( I => dadrL_N12011_FROM, O => dadrL_N12011 ); dadrL_N12011_YUSED : X_BUF port map ( I => dadrL_N12011_GROM, O => dadrL_N12010 ); dadrL_BU1778 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N11940_FROM ); dadrL_BU1775 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N11940_GROM ); dadrL_N11940_XUSED : X_BUF port map ( I => dadrL_N11940_FROM, O => dadrL_N11940 ); dadrL_N11940_YUSED : X_BUF port map ( I => dadrL_N11940_GROM, O => dadrL_N11939 ); dadrL_BU2317 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N15419_FROM ); dadrL_BU2314 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N15419_GROM ); dadrL_N15419_XUSED : X_BUF port map ( I => dadrL_N15419_FROM, O => dadrL_N15419 ); dadrL_N15419_YUSED : X_BUF port map ( I => dadrL_N15419_GROM, O => dadrL_N15418 ); dadrL_BU2537 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N16839_FROM ); dadrL_BU2534 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N16839_GROM ); dadrL_N16839_XUSED : X_BUF port map ( I => dadrL_N16839_FROM, O => dadrL_N16839 ); dadrL_N16839_YUSED : X_BUF port map ( I => dadrL_N16839_GROM, O => dadrL_N16838 ); dadrL_BU2306 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N15348_FROM ); dadrL_BU2303 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N15348_GROM ); dadrL_N15348_XUSED : X_BUF port map ( I => dadrL_N15348_FROM, O => dadrL_N15348 ); dadrL_N15348_YUSED : X_BUF port map ( I => dadrL_N15348_GROM, O => dadrL_N15347 ); dadrL_BU2526 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N16768_FROM ); dadrL_BU2523 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N16768_GROM ); dadrL_N16768_XUSED : X_BUF port map ( I => dadrL_N16768_FROM, O => dadrL_N16768 ); dadrL_N16768_YUSED : X_BUF port map ( I => dadrL_N16768_GROM, O => dadrL_N16767 ); dadrL_BU1808 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N12152_FROM ); dadrL_BU1811 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N12152_GROM ); dadrL_N12152_XUSED : X_BUF port map ( I => dadrL_N12152_FROM, O => dadrL_N12152 ); dadrL_N12152_YUSED : X_BUF port map ( I => dadrL_N12152_GROM, O => dadrL_N12153 ); dadrL_BU1797 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N12081_FROM ); dadrL_BU1800 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N12081_GROM ); dadrL_N12081_XUSED : X_BUF port map ( I => dadrL_N12081_FROM, O => dadrL_N12081 ); dadrL_N12081_YUSED : X_BUF port map ( I => dadrL_N12081_GROM, O => dadrL_N12082 ); dadrL_BU2339 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N15561_FROM ); dadrL_BU2336 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N15561_GROM ); dadrL_N15561_XUSED : X_BUF port map ( I => dadrL_N15561_FROM, O => dadrL_N15561 ); dadrL_N15561_YUSED : X_BUF port map ( I => dadrL_N15561_GROM, O => dadrL_N15560 ); dadrL_BU2328 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N15490_FROM ); dadrL_BU2325 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N15490_GROM ); dadrL_N15490_XUSED : X_BUF port map ( I => dadrL_N15490_FROM, O => dadrL_N15490 ); dadrL_N15490_YUSED : X_BUF port map ( I => dadrL_N15490_GROM, O => dadrL_N15489 ); dadrL_BU2548 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N16910_FROM ); dadrL_BU2545 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N16910_GROM ); dadrL_N16910_XUSED : X_BUF port map ( I => dadrL_N16910_FROM, O => dadrL_N16910 ); dadrL_N16910_YUSED : X_BUF port map ( I => dadrL_N16910_GROM, O => dadrL_N16909 ); dadrL_BU609 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N4413_FROM ); dadrL_BU612 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N4413_GROM ); dadrL_N4413_XUSED : X_BUF port map ( I => dadrL_N4413_FROM, O => dadrL_N4413 ); dadrL_N4413_YUSED : X_BUF port map ( I => dadrL_N4413_GROM, O => dadrL_N4414 ); dadrL_BU598 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N4342_FROM ); dadrL_BU601 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N4342_GROM ); dadrL_N4342_XUSED : X_BUF port map ( I => dadrL_N4342_FROM, O => dadrL_N4342 ); dadrL_N4342_YUSED : X_BUF port map ( I => dadrL_N4342_GROM, O => dadrL_N4343 ); dadrL_BU1819 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N12223_FROM ); dadrL_BU1822 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N12223_GROM ); dadrL_N12223_XUSED : X_BUF port map ( I => dadrL_N12223_FROM, O => dadrL_N12223 ); dadrL_N12223_YUSED : X_BUF port map ( I => dadrL_N12223_GROM, O => dadrL_N12224 ); dadrL_BU2358 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N15702_FROM ); dadrL_BU2361 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N15702_GROM ); dadrL_N15702_XUSED : X_BUF port map ( I => dadrL_N15702_FROM, O => dadrL_N15702 ); dadrL_N15702_YUSED : X_BUF port map ( I => dadrL_N15702_GROM, O => dadrL_N15703 ); dadrL_BU2347 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N15631_FROM ); dadrL_BU2350 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N15631_GROM ); dadrL_N15631_XUSED : X_BUF port map ( I => dadrL_N15631_FROM, O => dadrL_N15631 ); dadrL_N15631_YUSED : X_BUF port map ( I => dadrL_N15631_GROM, O => dadrL_N15632 ); dadrL_BU634 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N4556_FROM ); dadrL_BU631 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N4556_GROM ); dadrL_N4556_XUSED : X_BUF port map ( I => dadrL_N4556_FROM, O => dadrL_N4556 ); dadrL_N4556_YUSED : X_BUF port map ( I => dadrL_N4556_GROM, O => dadrL_N4555 ); dadrL_BU623 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N4485_FROM ); dadrL_BU620 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N4485_GROM ); dadrL_N4485_XUSED : X_BUF port map ( I => dadrL_N4485_FROM, O => dadrL_N4485 ); dadrL_N4485_YUSED : X_BUF port map ( I => dadrL_N4485_GROM, O => dadrL_N4484 ); dadrL_BU1844 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N12366_FROM ); dadrL_BU1841 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N12366_GROM ); dadrL_N12366_XUSED : X_BUF port map ( I => dadrL_N12366_FROM, O => dadrL_N12366 ); dadrL_N12366_YUSED : X_BUF port map ( I => dadrL_N12366_GROM, O => dadrL_N12365 ); dadrL_BU2383 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N15845_FROM ); dadrL_BU2380 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N15845_GROM ); dadrL_N15845_XUSED : X_BUF port map ( I => dadrL_N15845_FROM, O => dadrL_N15845 ); dadrL_N15845_YUSED : X_BUF port map ( I => dadrL_N15845_GROM, O => dadrL_N15844 ); dadrL_BU1833 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N12295_FROM ); dadrL_BU1830 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N12295_GROM ); dadrL_N12295_XUSED : X_BUF port map ( I => dadrL_N12295_FROM, O => dadrL_N12295 ); dadrL_N12295_YUSED : X_BUF port map ( I => dadrL_N12295_GROM, O => dadrL_N12294 ); dadrL_BU2369 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N15773_FROM ); dadrL_BU2372 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N15773_GROM ); dadrL_N15773_XUSED : X_BUF port map ( I => dadrL_N15773_FROM, O => dadrL_N15773 ); dadrL_N15773_YUSED : X_BUF port map ( I => dadrL_N15773_GROM, O => dadrL_N15774 ); dadrL_BU656 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N4698_FROM ); dadrL_BU653 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N4698_GROM ); dadrL_N4698_XUSED : X_BUF port map ( I => dadrL_N4698_FROM, O => dadrL_N4698 ); dadrL_N4698_YUSED : X_BUF port map ( I => dadrL_N4698_GROM, O => dadrL_N4697 ); dadrL_BU645 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N4627_FROM ); dadrL_BU642 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N4627_GROM ); dadrL_N4627_XUSED : X_BUF port map ( I => dadrL_N4627_FROM, O => dadrL_N4627 ); dadrL_N4627_YUSED : X_BUF port map ( I => dadrL_N4627_GROM, O => dadrL_N4626 ); dadrL_BU1866 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N12508_FROM ); dadrL_BU1863 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N12508_GROM ); dadrL_N12508_XUSED : X_BUF port map ( I => dadrL_N12508_FROM, O => dadrL_N12508 ); dadrL_N12508_YUSED : X_BUF port map ( I => dadrL_N12508_GROM, O => dadrL_N12507 ); dadrL_BU2405 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N15987_FROM ); dadrL_BU2402 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N15987_GROM ); dadrL_N15987_XUSED : X_BUF port map ( I => dadrL_N15987_FROM, O => dadrL_N15987 ); dadrL_N15987_YUSED : X_BUF port map ( I => dadrL_N15987_GROM, O => dadrL_N15986 ); dadrL_BU1855 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N12437_FROM ); dadrL_BU1852 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N12437_GROM ); dadrL_N12437_XUSED : X_BUF port map ( I => dadrL_N12437_FROM, O => dadrL_N12437 ); dadrL_N12437_YUSED : X_BUF port map ( I => dadrL_N12437_GROM, O => dadrL_N12436 ); dadrL_BU2394 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N15916_FROM ); dadrL_BU2391 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N15916_GROM ); dadrL_N15916_XUSED : X_BUF port map ( I => dadrL_N15916_FROM, O => dadrL_N15916 ); dadrL_N15916_YUSED : X_BUF port map ( I => dadrL_N15916_GROM, O => dadrL_N15915 ); dadrL_BU678 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N4840_FROM ); dadrL_BU675 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N4840_GROM ); dadrL_N4840_XUSED : X_BUF port map ( I => dadrL_N4840_FROM, O => dadrL_N4840 ); dadrL_N4840_YUSED : X_BUF port map ( I => dadrL_N4840_GROM, O => dadrL_N4839 ); dadrL_BU667 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N4769_FROM ); dadrL_BU664 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N4769_GROM ); dadrL_N4769_XUSED : X_BUF port map ( I => dadrL_N4769_FROM, O => dadrL_N4769 ); dadrL_N4769_YUSED : X_BUF port map ( I => dadrL_N4769_GROM, O => dadrL_N4768 ); dadrL_BU1888 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N12650_FROM ); dadrL_BU1885 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N12650_GROM ); dadrL_N12650_XUSED : X_BUF port map ( I => dadrL_N12650_FROM, O => dadrL_N12650 ); dadrL_N12650_YUSED : X_BUF port map ( I => dadrL_N12650_GROM, O => dadrL_N12649 ); dadrL_BU1877 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N12579_FROM ); dadrL_BU1874 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N12579_GROM ); dadrL_N12579_XUSED : X_BUF port map ( I => dadrL_N12579_FROM, O => dadrL_N12579 ); dadrL_N12579_YUSED : X_BUF port map ( I => dadrL_N12579_GROM, O => dadrL_N12578 ); dadrL_BU697 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N4981_FROM ); dadrL_BU700 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N4981_GROM ); dadrL_N4981_XUSED : X_BUF port map ( I => dadrL_N4981_FROM, O => dadrL_N4981 ); dadrL_N4981_YUSED : X_BUF port map ( I => dadrL_N4981_GROM, O => dadrL_N4982 ); dadrL_BU689 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N4911_FROM ); dadrL_BU686 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N4911_GROM ); dadrL_N4911_XUSED : X_BUF port map ( I => dadrL_N4911_FROM, O => dadrL_N4911 ); dadrL_N4911_YUSED : X_BUF port map ( I => dadrL_N4911_GROM, O => dadrL_N4910 ); dadrL_BU755 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N5337_FROM ); dadrL_BU752 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N5337_GROM ); dadrL_N5337_XUSED : X_BUF port map ( I => dadrL_N5337_FROM, O => dadrL_N5337 ); dadrL_N5337_YUSED : X_BUF port map ( I => dadrL_N5337_GROM, O => dadrL_N5336 ); dadrL_BU744 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N5266_FROM ); dadrL_BU741 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N5266_GROM ); dadrL_N5266_XUSED : X_BUF port map ( I => dadrL_N5266_FROM, O => dadrL_N5266 ); dadrL_N5266_YUSED : X_BUF port map ( I => dadrL_N5266_GROM, O => dadrL_N5265 ); dadrL_BU1907 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N12791_FROM ); dadrL_BU1910 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N12791_GROM ); dadrL_N12791_XUSED : X_BUF port map ( I => dadrL_N12791_FROM, O => dadrL_N12791 ); dadrL_N12791_YUSED : X_BUF port map ( I => dadrL_N12791_GROM, O => dadrL_N12792 ); dadrL_BU1899 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N12721_FROM ); dadrL_BU1896 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N12721_GROM ); dadrL_N12721_XUSED : X_BUF port map ( I => dadrL_N12721_FROM, O => dadrL_N12721 ); dadrL_N12721_YUSED : X_BUF port map ( I => dadrL_N12721_GROM, O => dadrL_N12720 ); dadrL_BU719 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N5123_FROM ); dadrL_BU722 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N5123_GROM ); dadrL_N5123_XUSED : X_BUF port map ( I => dadrL_N5123_FROM, O => dadrL_N5123 ); dadrL_N5123_YUSED : X_BUF port map ( I => dadrL_N5123_GROM, O => dadrL_N5124 ); dadrL_BU708 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N5052_FROM ); dadrL_BU711 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N5052_GROM ); dadrL_N5052_XUSED : X_BUF port map ( I => dadrL_N5052_FROM, O => dadrL_N5052 ); dadrL_N5052_YUSED : X_BUF port map ( I => dadrL_N5052_GROM, O => dadrL_N5053 ); dadrL_BU777 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N5479_FROM ); dadrL_BU774 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N5479_GROM ); dadrL_N5479_XUSED : X_BUF port map ( I => dadrL_N5479_FROM, O => dadrL_N5479 ); dadrL_N5479_YUSED : X_BUF port map ( I => dadrL_N5479_GROM, O => dadrL_N5478 ); dadrL_BU766 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N5408_FROM ); dadrL_BU763 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N5408_GROM ); dadrL_N5408_XUSED : X_BUF port map ( I => dadrL_N5408_FROM, O => dadrL_N5408 ); dadrL_N5408_YUSED : X_BUF port map ( I => dadrL_N5408_GROM, O => dadrL_N5407 ); dadrL_BU1929 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N12933_FROM ); dadrL_BU1932 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N12933_GROM ); dadrL_N12933_XUSED : X_BUF port map ( I => dadrL_N12933_FROM, O => dadrL_N12933 ); dadrL_N12933_YUSED : X_BUF port map ( I => dadrL_N12933_GROM, O => dadrL_N12934 ); dadrL_BU1918 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N12862_FROM ); dadrL_BU1921 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N12862_GROM ); dadrL_N12862_XUSED : X_BUF port map ( I => dadrL_N12862_FROM, O => dadrL_N12862 ); dadrL_N12862_YUSED : X_BUF port map ( I => dadrL_N12862_GROM, O => dadrL_N12863 ); dadrL_BU733 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N5195_FROM ); dadrL_BU730 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N5195_GROM ); dadrL_N5195_XUSED : X_BUF port map ( I => dadrL_N5195_FROM, O => dadrL_N5195 ); dadrL_N5195_YUSED : X_BUF port map ( I => dadrL_N5195_GROM, O => dadrL_N5194 ); dadrL_BU799 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N5621_FROM ); dadrL_BU796 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N5621_GROM ); dadrL_N5621_XUSED : X_BUF port map ( I => dadrL_N5621_FROM, O => dadrL_N5621 ); dadrL_N5621_YUSED : X_BUF port map ( I => dadrL_N5621_GROM, O => dadrL_N5620 ); dadrL_BU788 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N5550_FROM ); dadrL_BU785 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N5550_GROM ); dadrL_N5550_XUSED : X_BUF port map ( I => dadrL_N5550_FROM, O => dadrL_N5550 ); dadrL_N5550_YUSED : X_BUF port map ( I => dadrL_N5550_GROM, O => dadrL_N5549 ); dadrL_BU1954 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N13076_FROM ); dadrL_BU1951 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N13076_GROM ); dadrL_N13076_XUSED : X_BUF port map ( I => dadrL_N13076_FROM, O => dadrL_N13076 ); dadrL_N13076_YUSED : X_BUF port map ( I => dadrL_N13076_GROM, O => dadrL_N13075 ); dadrL_BU1943 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N13005_FROM ); dadrL_BU1940 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N13005_GROM ); dadrL_N13005_XUSED : X_BUF port map ( I => dadrL_N13005_FROM, O => dadrL_N13005 ); dadrL_N13005_YUSED : X_BUF port map ( I => dadrL_N13005_GROM, O => dadrL_N13004 ); dadrL_BU818 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N5762_FROM ); dadrL_BU821 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N5762_GROM ); dadrL_N5762_XUSED : X_BUF port map ( I => dadrL_N5762_FROM, O => dadrL_N5762 ); dadrL_N5762_YUSED : X_BUF port map ( I => dadrL_N5762_GROM, O => dadrL_N5763 ); dadrL_BU807 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N5691_FROM ); dadrL_BU810 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N5691_GROM ); dadrL_N5691_XUSED : X_BUF port map ( I => dadrL_N5691_FROM, O => dadrL_N5691 ); dadrL_N5691_YUSED : X_BUF port map ( I => dadrL_N5691_GROM, O => dadrL_N5692 ); dadrL_BU1976 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N13218_FROM ); dadrL_BU1973 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N13218_GROM ); dadrL_N13218_XUSED : X_BUF port map ( I => dadrL_N13218_FROM, O => dadrL_N13218 ); dadrL_N13218_YUSED : X_BUF port map ( I => dadrL_N13218_GROM, O => dadrL_N13217 ); dadrL_BU1965 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N13147_FROM ); dadrL_BU1962 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N13147_GROM ); dadrL_N13147_XUSED : X_BUF port map ( I => dadrL_N13147_FROM, O => dadrL_N13147 ); dadrL_N13147_YUSED : X_BUF port map ( I => dadrL_N13147_GROM, O => dadrL_N13146 ); dadrL_BU843 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N5905_FROM ); dadrL_BU840 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N5905_GROM ); dadrL_N5905_XUSED : X_BUF port map ( I => dadrL_N5905_FROM, O => dadrL_N5905 ); dadrL_N5905_YUSED : X_BUF port map ( I => dadrL_N5905_GROM, O => dadrL_N5904 ); dadrL_BU829 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N5833_FROM ); dadrL_BU832 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N5833_GROM ); dadrL_N5833_XUSED : X_BUF port map ( I => dadrL_N5833_FROM, O => dadrL_N5833 ); dadrL_N5833_YUSED : X_BUF port map ( I => dadrL_N5833_GROM, O => dadrL_N5834 ); dadrL_BU1998 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N13360_FROM ); dadrL_BU1995 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N13360_GROM ); dadrL_N13360_XUSED : X_BUF port map ( I => dadrL_N13360_FROM, O => dadrL_N13360 ); dadrL_N13360_YUSED : X_BUF port map ( I => dadrL_N13360_GROM, O => dadrL_N13359 ); dadrL_BU1987 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N13289_FROM ); dadrL_BU1984 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N13289_GROM ); dadrL_N13289_XUSED : X_BUF port map ( I => dadrL_N13289_FROM, O => dadrL_N13289 ); dadrL_N13289_YUSED : X_BUF port map ( I => dadrL_N13289_GROM, O => dadrL_N13288 ); dadrL_BU2787 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N18471_FROM ); dadrL_BU2790 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N18471_GROM ); dadrL_N18471_XUSED : X_BUF port map ( I => dadrL_N18471_FROM, O => dadrL_N18471 ); dadrL_N18471_YUSED : X_BUF port map ( I => dadrL_N18471_GROM, O => dadrL_N18472 ); dadrL_BU2779 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N18401_FROM ); dadrL_BU2776 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N18401_GROM ); dadrL_N18401_XUSED : X_BUF port map ( I => dadrL_N18401_FROM, O => dadrL_N18401 ); dadrL_N18401_YUSED : X_BUF port map ( I => dadrL_N18401_GROM, O => dadrL_N18400 ); dadrL_BU865 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N6047_FROM ); dadrL_BU862 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N6047_GROM ); dadrL_N6047_XUSED : X_BUF port map ( I => dadrL_N6047_FROM, O => dadrL_N6047 ); dadrL_N6047_YUSED : X_BUF port map ( I => dadrL_N6047_GROM, O => dadrL_N6046 ); dadrL_BU854 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N5976_FROM ); dadrL_BU851 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N5976_GROM ); dadrL_N5976_XUSED : X_BUF port map ( I => dadrL_N5976_FROM, O => dadrL_N5976 ); dadrL_N5976_YUSED : X_BUF port map ( I => dadrL_N5976_GROM, O => dadrL_N5975 ); dadrL_BU1478 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N10022_FROM ); dadrL_BU1481 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N10022_GROM ); dadrL_N10022_XUSED : X_BUF port map ( I => dadrL_N10022_FROM, O => dadrL_N10022 ); dadrL_N10022_YUSED : X_BUF port map ( I => dadrL_N10022_GROM, O => dadrL_N10023 ); dadrL_BU2017 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N13501_FROM ); dadrL_BU2020 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N13501_GROM ); dadrL_N13501_XUSED : X_BUF port map ( I => dadrL_N13501_FROM, O => dadrL_N13501 ); dadrL_N13501_YUSED : X_BUF port map ( I => dadrL_N13501_GROM, O => dadrL_N13502 ); dadrL_BU1467 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N9951_FROM ); dadrL_BU1470 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N9951_GROM ); dadrL_N9951_XUSED : X_BUF port map ( I => dadrL_N9951_FROM, O => dadrL_N9951 ); dadrL_N9951_YUSED : X_BUF port map ( I => dadrL_N9951_GROM, O => dadrL_N9952 ); dadrL_BU2064 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N13786_FROM ); dadrL_BU2061 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N13786_GROM ); dadrL_N13786_XUSED : X_BUF port map ( I => dadrL_N13786_FROM, O => dadrL_N13786 ); dadrL_N13786_YUSED : X_BUF port map ( I => dadrL_N13786_GROM, O => dadrL_N13785 ); dadrL_BU2009 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N13431_FROM ); dadrL_BU2006 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N13431_GROM ); dadrL_N13431_XUSED : X_BUF port map ( I => dadrL_N13431_FROM, O => dadrL_N13431 ); dadrL_N13431_YUSED : X_BUF port map ( I => dadrL_N13431_GROM, O => dadrL_N13430 ); dadrL_BU2053 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N13715_FROM ); dadrL_BU2050 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N13715_GROM ); dadrL_N13715_XUSED : X_BUF port map ( I => dadrL_N13715_FROM, O => dadrL_N13715 ); dadrL_N13715_YUSED : X_BUF port map ( I => dadrL_N13715_GROM, O => dadrL_N13714 ); dadrL_BU2809 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N18613_FROM ); dadrL_BU2812 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N18613_GROM ); dadrL_N18613_XUSED : X_BUF port map ( I => dadrL_N18613_FROM, O => dadrL_N18613 ); dadrL_N18613_YUSED : X_BUF port map ( I => dadrL_N18613_GROM, O => dadrL_N18614 ); dadrL_BU2798 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N18542_FROM ); dadrL_BU2801 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N18542_GROM ); dadrL_N18542_XUSED : X_BUF port map ( I => dadrL_N18542_FROM, O => dadrL_N18542 ); dadrL_N18542_YUSED : X_BUF port map ( I => dadrL_N18542_GROM, O => dadrL_N18543 ); dadrL_BU1338 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N9100_FROM ); dadrL_BU1335 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N9100_GROM ); dadrL_N9100_XUSED : X_BUF port map ( I => dadrL_N9100_FROM, O => dadrL_N9100 ); dadrL_N9100_YUSED : X_BUF port map ( I => dadrL_N9100_GROM, O => dadrL_N9099 ); dadrL_BU887 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N6189_FROM ); dadrL_BU884 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N6189_GROM ); dadrL_N6189_XUSED : X_BUF port map ( I => dadrL_N6189_FROM, O => dadrL_N6189 ); dadrL_N6189_YUSED : X_BUF port map ( I => dadrL_N6189_GROM, O => dadrL_N6188 ); dadrL_BU1327 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N9029_FROM ); dadrL_BU1324 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N9029_GROM ); dadrL_N9029_XUSED : X_BUF port map ( I => dadrL_N9029_FROM, O => dadrL_N9029 ); dadrL_N9029_YUSED : X_BUF port map ( I => dadrL_N9029_GROM, O => dadrL_N9028 ); dadrL_BU876 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N6118_FROM ); dadrL_BU873 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N6118_GROM ); dadrL_N6118_XUSED : X_BUF port map ( I => dadrL_N6118_FROM, O => dadrL_N6118 ); dadrL_N6118_YUSED : X_BUF port map ( I => dadrL_N6118_GROM, O => dadrL_N6117 ); dadrL_BU1503 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N10165_FROM ); dadrL_BU1500 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N10165_GROM ); dadrL_N10165_XUSED : X_BUF port map ( I => dadrL_N10165_FROM, O => dadrL_N10165 ); dadrL_N10165_YUSED : X_BUF port map ( I => dadrL_N10165_GROM, O => dadrL_N10164 ); dadrL_BU2039 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N13643_FROM ); dadrL_BU2042 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N13643_GROM ); dadrL_N13643_XUSED : X_BUF port map ( I => dadrL_N13643_FROM, O => dadrL_N13643 ); dadrL_N13643_YUSED : X_BUF port map ( I => dadrL_N13643_GROM, O => dadrL_N13644 ); dadrL_BU1489 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N10093_FROM ); dadrL_BU1492 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N10093_GROM ); dadrL_N10093_XUSED : X_BUF port map ( I => dadrL_N10093_FROM, O => dadrL_N10093 ); dadrL_N10093_YUSED : X_BUF port map ( I => dadrL_N10093_GROM, O => dadrL_N10094 ); dadrL_BU2086 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N13928_FROM ); dadrL_BU2083 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N13928_GROM ); dadrL_N13928_XUSED : X_BUF port map ( I => dadrL_N13928_FROM, O => dadrL_N13928 ); dadrL_N13928_YUSED : X_BUF port map ( I => dadrL_N13928_GROM, O => dadrL_N13927 ); dadrL_BU2028 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N13572_FROM ); dadrL_BU2031 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N13572_GROM ); dadrL_N13572_XUSED : X_BUF port map ( I => dadrL_N13572_FROM, O => dadrL_N13572 ); dadrL_N13572_YUSED : X_BUF port map ( I => dadrL_N13572_GROM, O => dadrL_N13573 ); dadrL_BU2075 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N13857_FROM ); dadrL_BU2072 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N13857_GROM ); dadrL_N13857_XUSED : X_BUF port map ( I => dadrL_N13857_FROM, O => dadrL_N13857 ); dadrL_N13857_YUSED : X_BUF port map ( I => dadrL_N13857_GROM, O => dadrL_N13856 ); dadrL_BU2823 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N18685_FROM ); dadrL_BU2820 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N18685_GROM ); dadrL_N18685_XUSED : X_BUF port map ( I => dadrL_N18685_FROM, O => dadrL_N18685 ); dadrL_N18685_YUSED : X_BUF port map ( I => dadrL_N18685_GROM, O => dadrL_N18684 ); dadrL_BU1357 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N9241_FROM ); dadrL_BU1360 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N9241_GROM ); dadrL_N9241_XUSED : X_BUF port map ( I => dadrL_N9241_FROM, O => dadrL_N9241 ); dadrL_N9241_YUSED : X_BUF port map ( I => dadrL_N9241_GROM, O => dadrL_N9242 ); dadrL_BU909 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N6331_FROM ); dadrL_BU906 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N6331_GROM ); dadrL_N6331_XUSED : X_BUF port map ( I => dadrL_N6331_FROM, O => dadrL_N6331 ); dadrL_N6331_YUSED : X_BUF port map ( I => dadrL_N6331_GROM, O => dadrL_N6330 ); dadrL_BU1349 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N9171_FROM ); dadrL_BU1346 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N9171_GROM ); dadrL_N9171_XUSED : X_BUF port map ( I => dadrL_N9171_FROM, O => dadrL_N9171 ); dadrL_N9171_YUSED : X_BUF port map ( I => dadrL_N9171_GROM, O => dadrL_N9170 ); dadrL_BU898 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N6260_FROM ); dadrL_BU895 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N6260_GROM ); dadrL_N6260_XUSED : X_BUF port map ( I => dadrL_N6260_FROM, O => dadrL_N6260 ); dadrL_N6260_YUSED : X_BUF port map ( I => dadrL_N6260_GROM, O => dadrL_N6259 ); dadrL_BU1525 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N10307_FROM ); dadrL_BU1522 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N10307_GROM ); dadrL_N10307_XUSED : X_BUF port map ( I => dadrL_N10307_FROM, O => dadrL_N10307 ); dadrL_N10307_YUSED : X_BUF port map ( I => dadrL_N10307_GROM, O => dadrL_N10306 ); dadrL_BU1514 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N10236_FROM ); dadrL_BU1511 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N10236_GROM ); dadrL_N10236_XUSED : X_BUF port map ( I => dadrL_N10236_FROM, O => dadrL_N10236 ); dadrL_N10236_YUSED : X_BUF port map ( I => dadrL_N10236_GROM, O => dadrL_N10235 ); dadrL_BU2108 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N14070_FROM ); dadrL_BU2105 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N14070_GROM ); dadrL_N14070_XUSED : X_BUF port map ( I => dadrL_N14070_FROM, O => dadrL_N14070 ); dadrL_N14070_YUSED : X_BUF port map ( I => dadrL_N14070_GROM, O => dadrL_N14069 ); dadrL_BU2097 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N13999_FROM ); dadrL_BU2094 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N13999_GROM ); dadrL_N13999_XUSED : X_BUF port map ( I => dadrL_N13999_FROM, O => dadrL_N13999 ); dadrL_N13999_YUSED : X_BUF port map ( I => dadrL_N13999_GROM, O => dadrL_N13998 ); dadrL_BU1379 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N9383_FROM ); dadrL_BU1382 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N9383_GROM ); dadrL_N9383_XUSED : X_BUF port map ( I => dadrL_N9383_FROM, O => dadrL_N9383 ); dadrL_N9383_YUSED : X_BUF port map ( I => dadrL_N9383_GROM, O => dadrL_N9384 ); dadrL_BU928 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N6472_FROM ); dadrL_BU931 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N6472_GROM ); dadrL_N6472_XUSED : X_BUF port map ( I => dadrL_N6472_FROM, O => dadrL_N6472 ); dadrL_N6472_YUSED : X_BUF port map ( I => dadrL_N6472_GROM, O => dadrL_N6473 ); dadrL_BU389 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N2993_FROM ); dadrL_BU392 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N2993_GROM ); dadrL_N2993_XUSED : X_BUF port map ( I => dadrL_N2993_FROM, O => dadrL_N2993 ); dadrL_N2993_YUSED : X_BUF port map ( I => dadrL_N2993_GROM, O => dadrL_N2994 ); dadrL_BU1368 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N9312_FROM ); dadrL_BU1371 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N9312_GROM ); dadrL_N9312_XUSED : X_BUF port map ( I => dadrL_N9312_FROM, O => dadrL_N9312 ); dadrL_N9312_YUSED : X_BUF port map ( I => dadrL_N9312_GROM, O => dadrL_N9313 ); dadrL_BU917 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N6401_FROM ); dadrL_BU920 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N6401_GROM ); dadrL_N6401_XUSED : X_BUF port map ( I => dadrL_N6401_FROM, O => dadrL_N6401 ); dadrL_N6401_YUSED : X_BUF port map ( I => dadrL_N6401_GROM, O => dadrL_N6402 ); dadrL_BU378 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N2922_FROM ); dadrL_BU381 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N2922_GROM ); dadrL_N2922_XUSED : X_BUF port map ( I => dadrL_N2922_FROM, O => dadrL_N2922 ); dadrL_N2922_YUSED : X_BUF port map ( I => dadrL_N2922_GROM, O => dadrL_N2923 ); dadrL_BU1547 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N10449_FROM ); dadrL_BU1544 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N10449_GROM ); dadrL_N10449_XUSED : X_BUF port map ( I => dadrL_N10449_FROM, O => dadrL_N10449 ); dadrL_N10449_YUSED : X_BUF port map ( I => dadrL_N10449_GROM, O => dadrL_N10448 ); dadrL_BU1536 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N10378_FROM ); dadrL_BU1533 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N10378_GROM ); dadrL_N10378_XUSED : X_BUF port map ( I => dadrL_N10378_FROM, O => dadrL_N10378 ); dadrL_N10378_YUSED : X_BUF port map ( I => dadrL_N10378_GROM, O => dadrL_N10377 ); dadrL_BU2127 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N14211_FROM ); dadrL_BU2130 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N14211_GROM ); dadrL_N14211_XUSED : X_BUF port map ( I => dadrL_N14211_FROM, O => dadrL_N14211 ); dadrL_N14211_YUSED : X_BUF port map ( I => dadrL_N14211_GROM, O => dadrL_N14212 ); dadrL_BU2119 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N14141_FROM ); dadrL_BU2116 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N14141_GROM ); dadrL_N14141_XUSED : X_BUF port map ( I => dadrL_N14141_FROM, O => dadrL_N14141 ); dadrL_N14141_YUSED : X_BUF port map ( I => dadrL_N14141_GROM, O => dadrL_N14140 ); dadrL_BU1404 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N9526_FROM ); dadrL_BU1401 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N9526_GROM ); dadrL_N9526_XUSED : X_BUF port map ( I => dadrL_N9526_FROM, O => dadrL_N9526 ); dadrL_N9526_YUSED : X_BUF port map ( I => dadrL_N9526_GROM, O => dadrL_N9525 ); dadrL_BU953 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N6615_FROM ); dadrL_BU950 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N6615_GROM ); dadrL_N6615_XUSED : X_BUF port map ( I => dadrL_N6615_FROM, O => dadrL_N6615 ); dadrL_N6615_YUSED : X_BUF port map ( I => dadrL_N6615_GROM, O => dadrL_N6614 ); dadrL_BU414 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N3136_FROM ); dadrL_BU411 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N3136_GROM ); dadrL_N3136_XUSED : X_BUF port map ( I => dadrL_N3136_FROM, O => dadrL_N3136 ); dadrL_N3136_YUSED : X_BUF port map ( I => dadrL_N3136_GROM, O => dadrL_N3135 ); dadrL_BU1393 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N9455_FROM ); dadrL_BU1390 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N9455_GROM ); dadrL_N9455_XUSED : X_BUF port map ( I => dadrL_N9455_FROM, O => dadrL_N9455 ); dadrL_N9455_YUSED : X_BUF port map ( I => dadrL_N9455_GROM, O => dadrL_N9454 ); dadrL_BU939 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N6543_FROM ); dadrL_BU942 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N6543_GROM ); dadrL_N6543_XUSED : X_BUF port map ( I => dadrL_N6543_FROM, O => dadrL_N6543 ); dadrL_N6543_YUSED : X_BUF port map ( I => dadrL_N6543_GROM, O => dadrL_N6544 ); dadrL_BU403 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N3065_FROM ); dadrL_BU400 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N3065_GROM ); dadrL_N3065_XUSED : X_BUF port map ( I => dadrL_N3065_FROM, O => dadrL_N3065 ); dadrL_N3065_YUSED : X_BUF port map ( I => dadrL_N3065_GROM, O => dadrL_N3064 ); dadrL_BU1569 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N10591_FROM ); dadrL_BU1566 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N10591_GROM ); dadrL_N10591_XUSED : X_BUF port map ( I => dadrL_N10591_FROM, O => dadrL_N10591 ); dadrL_N10591_YUSED : X_BUF port map ( I => dadrL_N10591_GROM, O => dadrL_N10590 ); dadrL_BU1558 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N10520_FROM ); dadrL_BU1555 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N10520_GROM ); dadrL_N10520_XUSED : X_BUF port map ( I => dadrL_N10520_FROM, O => dadrL_N10520 ); dadrL_N10520_YUSED : X_BUF port map ( I => dadrL_N10520_GROM, O => dadrL_N10519 ); dadrL_BU2149 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N14353_FROM ); dadrL_BU2152 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N14353_GROM ); dadrL_N14353_XUSED : X_BUF port map ( I => dadrL_N14353_FROM, O => dadrL_N14353 ); dadrL_N14353_YUSED : X_BUF port map ( I => dadrL_N14353_GROM, O => dadrL_N14354 ); dadrL_BU2138 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N14282_FROM ); dadrL_BU2141 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N14282_GROM ); dadrL_N14282_XUSED : X_BUF port map ( I => dadrL_N14282_FROM, O => dadrL_N14282 ); dadrL_N14282_YUSED : X_BUF port map ( I => dadrL_N14282_GROM, O => dadrL_N14283 ); dadrL_BU1426 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N9668_FROM ); dadrL_BU1423 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N9668_GROM ); dadrL_N9668_XUSED : X_BUF port map ( I => dadrL_N9668_FROM, O => dadrL_N9668 ); dadrL_N9668_YUSED : X_BUF port map ( I => dadrL_N9668_GROM, O => dadrL_N9667 ); dadrL_BU436 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N3278_FROM ); dadrL_BU433 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N3278_GROM ); dadrL_N3278_XUSED : X_BUF port map ( I => dadrL_N3278_FROM, O => dadrL_N3278 ); dadrL_N3278_YUSED : X_BUF port map ( I => dadrL_N3278_GROM, O => dadrL_N3277 ); dadrL_BU1415 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N9597_FROM ); dadrL_BU1412 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N9597_GROM ); dadrL_N9597_XUSED : X_BUF port map ( I => dadrL_N9597_FROM, O => dadrL_N9597 ); dadrL_N9597_YUSED : X_BUF port map ( I => dadrL_N9597_GROM, O => dadrL_N9596 ); dadrL_BU425 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N3207_FROM ); dadrL_BU422 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N3207_GROM ); dadrL_N3207_XUSED : X_BUF port map ( I => dadrL_N3207_FROM, O => dadrL_N3207 ); dadrL_N3207_YUSED : X_BUF port map ( I => dadrL_N3207_GROM, O => dadrL_N3206 ); dadrL_BU1588 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N10732_FROM ); dadrL_BU1591 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N10732_GROM ); dadrL_N10732_XUSED : X_BUF port map ( I => dadrL_N10732_FROM, O => dadrL_N10732 ); dadrL_N10732_YUSED : X_BUF port map ( I => dadrL_N10732_GROM, O => dadrL_N10733 ); dadrL_BU1577 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N10661_FROM ); dadrL_BU1580 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N10661_GROM ); dadrL_N10661_XUSED : X_BUF port map ( I => dadrL_N10661_FROM, O => dadrL_N10661 ); dadrL_N10661_YUSED : X_BUF port map ( I => dadrL_N10661_GROM, O => dadrL_N10662 ); dadrL_BU2174 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N14496_FROM ); dadrL_BU2171 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N14496_GROM ); dadrL_N14496_XUSED : X_BUF port map ( I => dadrL_N14496_FROM, O => dadrL_N14496 ); dadrL_N14496_YUSED : X_BUF port map ( I => dadrL_N14496_GROM, O => dadrL_N14495 ); dadrL_BU2163 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N14425_FROM ); dadrL_BU2160 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N14425_GROM ); dadrL_N14425_XUSED : X_BUF port map ( I => dadrL_N14425_FROM, O => dadrL_N14425 ); dadrL_N14425_YUSED : X_BUF port map ( I => dadrL_N14425_GROM, O => dadrL_N14424 ); dadrL_BU1448 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N9810_FROM ); dadrL_BU1445 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N9810_GROM ); dadrL_N9810_XUSED : X_BUF port map ( I => dadrL_N9810_FROM, O => dadrL_N9810 ); dadrL_N9810_YUSED : X_BUF port map ( I => dadrL_N9810_GROM, O => dadrL_N9809 ); dadrL_BU975 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N6757_FROM ); dadrL_BU972 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N6757_GROM ); dadrL_N6757_XUSED : X_BUF port map ( I => dadrL_N6757_FROM, O => dadrL_N6757 ); dadrL_N6757_YUSED : X_BUF port map ( I => dadrL_N6757_GROM, O => dadrL_N6756 ); dadrL_BU458 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N3420_FROM ); dadrL_BU455 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N3420_GROM ); dadrL_N3420_XUSED : X_BUF port map ( I => dadrL_N3420_FROM, O => dadrL_N3420 ); dadrL_N3420_YUSED : X_BUF port map ( I => dadrL_N3420_GROM, O => dadrL_N3419 ); dadrL_BU1437 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N9739_FROM ); dadrL_BU1434 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N9739_GROM ); dadrL_N9739_XUSED : X_BUF port map ( I => dadrL_N9739_FROM, O => dadrL_N9739 ); dadrL_N9739_YUSED : X_BUF port map ( I => dadrL_N9739_GROM, O => dadrL_N9738 ); dadrL_BU964 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N6686_FROM ); dadrL_BU961 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N6686_GROM ); dadrL_N6686_XUSED : X_BUF port map ( I => dadrL_N6686_FROM, O => dadrL_N6686 ); dadrL_N6686_YUSED : X_BUF port map ( I => dadrL_N6686_GROM, O => dadrL_N6685 ); dadrL_BU447 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N3349_FROM ); dadrL_BU444 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N3349_GROM ); dadrL_N3349_XUSED : X_BUF port map ( I => dadrL_N3349_FROM, O => dadrL_N3349 ); dadrL_N3349_YUSED : X_BUF port map ( I => dadrL_N3349_GROM, O => dadrL_N3348 ); dadrL_BU1613 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N10875_FROM ); dadrL_BU1610 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N10875_GROM ); dadrL_N10875_XUSED : X_BUF port map ( I => dadrL_N10875_FROM, O => dadrL_N10875 ); dadrL_N10875_YUSED : X_BUF port map ( I => dadrL_N10875_GROM, O => dadrL_N10874 ); dadrL_BU1599 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N10803_FROM ); dadrL_BU1602 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N10803_GROM ); dadrL_N10803_XUSED : X_BUF port map ( I => dadrL_N10803_FROM, O => dadrL_N10803 ); dadrL_N10803_YUSED : X_BUF port map ( I => dadrL_N10803_GROM, O => dadrL_N10804 ); dadrL_BU2185 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N14567_FROM ); dadrL_BU2182 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N14567_GROM ); dadrL_N14567_XUSED : X_BUF port map ( I => dadrL_N14567_FROM, O => dadrL_N14567 ); dadrL_N14567_YUSED : X_BUF port map ( I => dadrL_N14567_GROM, O => dadrL_N14566 ); dadrL_BU249 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N2071_FROM ); dadrL_BU246 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N2071_GROM ); dadrL_N2071_XUSED : X_BUF port map ( I => dadrL_N2071_FROM, O => dadrL_N2071 ); dadrL_N2071_YUSED : X_BUF port map ( I => dadrL_N2071_GROM, O => dadrL_N2070 ); dadrL_BU238 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N2000_FROM ); dadrL_BU235 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N2000_GROM ); dadrL_N2000_XUSED : X_BUF port map ( I => dadrL_N2000_FROM, O => dadrL_N2000 ); dadrL_N2000_YUSED : X_BUF port map ( I => dadrL_N2000_GROM, O => dadrL_N1999 ); dadrL_BU997 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N6899_FROM ); dadrL_BU994 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N6899_GROM ); dadrL_N6899_XUSED : X_BUF port map ( I => dadrL_N6899_FROM, O => dadrL_N6899 ); dadrL_N6899_YUSED : X_BUF port map ( I => dadrL_N6899_GROM, O => dadrL_N6898 ); dadrL_BU477 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N3561_FROM ); dadrL_BU480 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N3561_GROM ); dadrL_N3561_XUSED : X_BUF port map ( I => dadrL_N3561_FROM, O => dadrL_N3561 ); dadrL_N3561_YUSED : X_BUF port map ( I => dadrL_N3561_GROM, O => dadrL_N3562 ); dadrL_BU1459 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N9881_FROM ); dadrL_BU1456 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N9881_GROM ); dadrL_N9881_XUSED : X_BUF port map ( I => dadrL_N9881_FROM, O => dadrL_N9881 ); dadrL_N9881_YUSED : X_BUF port map ( I => dadrL_N9881_GROM, O => dadrL_N9880 ); dadrL_BU986 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N6828_FROM ); dadrL_BU983 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N6828_GROM ); dadrL_N6828_XUSED : X_BUF port map ( I => dadrL_N6828_FROM, O => dadrL_N6828 ); dadrL_N6828_YUSED : X_BUF port map ( I => dadrL_N6828_GROM, O => dadrL_N6827 ); dadrL_BU469 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N3491_FROM ); dadrL_BU466 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N3491_GROM ); dadrL_N3491_XUSED : X_BUF port map ( I => dadrL_N3491_FROM, O => dadrL_N3491 ); dadrL_N3491_YUSED : X_BUF port map ( I => dadrL_N3491_GROM, O => dadrL_N3490 ); dadrL_BU1635 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N11017_FROM ); dadrL_BU1632 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N11017_GROM ); dadrL_N11017_XUSED : X_BUF port map ( I => dadrL_N11017_FROM, O => dadrL_N11017 ); dadrL_N11017_YUSED : X_BUF port map ( I => dadrL_N11017_GROM, O => dadrL_N11016 ); dadrL_BU1624 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N10946_FROM ); dadrL_BU1621 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N10946_GROM ); dadrL_N10946_XUSED : X_BUF port map ( I => dadrL_N10946_FROM, O => dadrL_N10946 ); dadrL_N10946_YUSED : X_BUF port map ( I => dadrL_N10946_GROM, O => dadrL_N10945 ); dadrL_BU2567 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N17051_FROM ); dadrL_BU2570 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N17051_GROM ); dadrL_N17051_XUSED : X_BUF port map ( I => dadrL_N17051_FROM, O => dadrL_N17051 ); dadrL_N17051_YUSED : X_BUF port map ( I => dadrL_N17051_GROM, O => dadrL_N17052 ); dadrL_BU268 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N2212_FROM ); dadrL_BU271 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N2212_GROM ); dadrL_N2212_XUSED : X_BUF port map ( I => dadrL_N2212_FROM, O => dadrL_N2212 ); dadrL_N2212_YUSED : X_BUF port map ( I => dadrL_N2212_GROM, O => dadrL_N2213 ); dadrL_BU2559 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N16981_FROM ); dadrL_BU2556 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N16981_GROM ); dadrL_N16981_XUSED : X_BUF port map ( I => dadrL_N16981_FROM, O => dadrL_N16981 ); dadrL_N16981_YUSED : X_BUF port map ( I => dadrL_N16981_GROM, O => dadrL_N16980 ); dadrL_BU257 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N2141_FROM ); dadrL_BU260 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N2141_GROM ); dadrL_N2141_XUSED : X_BUF port map ( I => dadrL_N2141_FROM, O => dadrL_N2141 ); dadrL_N2141_YUSED : X_BUF port map ( I => dadrL_N2141_GROM, O => dadrL_N2142 ); dadrL_BU499 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N3703_FROM ); dadrL_BU502 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N3703_GROM ); dadrL_N3703_XUSED : X_BUF port map ( I => dadrL_N3703_FROM, O => dadrL_N3703 ); dadrL_N3703_YUSED : X_BUF port map ( I => dadrL_N3703_GROM, O => dadrL_N3704 ); dadrL_BU1019 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N7041_FROM ); dadrL_BU1016 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N7041_GROM ); dadrL_N7041_XUSED : X_BUF port map ( I => dadrL_N7041_FROM, O => dadrL_N7041 ); dadrL_N7041_YUSED : X_BUF port map ( I => dadrL_N7041_GROM, O => dadrL_N7040 ); dadrL_BU488 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N3632_FROM ); dadrL_BU491 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N3632_GROM ); dadrL_N3632_XUSED : X_BUF port map ( I => dadrL_N3632_FROM, O => dadrL_N3632 ); dadrL_N3632_YUSED : X_BUF port map ( I => dadrL_N3632_GROM, O => dadrL_N3633 ); dadrL_BU1657 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N11159_FROM ); dadrL_BU1654 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N11159_GROM ); dadrL_N11159_XUSED : X_BUF port map ( I => dadrL_N11159_FROM, O => dadrL_N11159 ); dadrL_N11159_YUSED : X_BUF port map ( I => dadrL_N11159_GROM, O => dadrL_N11158 ); dadrL_BU1118 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N7680_FROM ); dadrL_BU1115 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N7680_GROM ); dadrL_N7680_XUSED : X_BUF port map ( I => dadrL_N7680_FROM, O => dadrL_N7680 ); dadrL_N7680_YUSED : X_BUF port map ( I => dadrL_N7680_GROM, O => dadrL_N7679 ); dadrL_BU1008 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N6970_FROM ); dadrL_BU1005 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N6970_GROM ); dadrL_N6970_XUSED : X_BUF port map ( I => dadrL_N6970_FROM, O => dadrL_N6970 ); dadrL_N6970_YUSED : X_BUF port map ( I => dadrL_N6970_GROM, O => dadrL_N6969 ); dadrL_BU1646 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N11088_FROM ); dadrL_BU1643 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N11088_GROM ); dadrL_N11088_XUSED : X_BUF port map ( I => dadrL_N11088_FROM, O => dadrL_N11088 ); dadrL_N11088_YUSED : X_BUF port map ( I => dadrL_N11088_GROM, O => dadrL_N11087 ); dadrL_BU1107 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N7609_FROM ); dadrL_BU1104 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N7609_GROM ); dadrL_N7609_XUSED : X_BUF port map ( I => dadrL_N7609_FROM, O => dadrL_N7609 ); dadrL_N7609_YUSED : X_BUF port map ( I => dadrL_N7609_GROM, O => dadrL_N7608 ); dadrL_BU2589 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N17193_FROM ); dadrL_BU2592 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N17193_GROM ); dadrL_N17193_XUSED : X_BUF port map ( I => dadrL_N17193_FROM, O => dadrL_N17193 ); dadrL_N17193_YUSED : X_BUF port map ( I => dadrL_N17193_GROM, O => dadrL_N17194 ); dadrL_BU293 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N2355_FROM ); dadrL_BU290 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N2355_GROM ); dadrL_N2355_XUSED : X_BUF port map ( I => dadrL_N2355_FROM, O => dadrL_N2355 ); dadrL_N2355_YUSED : X_BUF port map ( I => dadrL_N2355_GROM, O => dadrL_N2354 ); dadrL_BU2578 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N17122_FROM ); dadrL_BU2581 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N17122_GROM ); dadrL_N17122_XUSED : X_BUF port map ( I => dadrL_N17122_FROM, O => dadrL_N17122 ); dadrL_N17122_YUSED : X_BUF port map ( I => dadrL_N17122_GROM, O => dadrL_N17123 ); dadrL_BU279 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N2283_FROM ); dadrL_BU282 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N2283_GROM ); dadrL_N2283_XUSED : X_BUF port map ( I => dadrL_N2283_FROM, O => dadrL_N2283 ); dadrL_N2283_YUSED : X_BUF port map ( I => dadrL_N2283_GROM, O => dadrL_N2284 ); dadrL_BU524 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N3846_FROM ); dadrL_BU521 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N3846_GROM ); dadrL_N3846_XUSED : X_BUF port map ( I => dadrL_N3846_FROM, O => dadrL_N3846 ); dadrL_N3846_YUSED : X_BUF port map ( I => dadrL_N3846_GROM, O => dadrL_N3845 ); dadrL_BU1038 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N7182_FROM ); dadrL_BU1041 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N7182_GROM ); dadrL_N7182_XUSED : X_BUF port map ( I => dadrL_N7182_FROM, O => dadrL_N7182 ); dadrL_N7182_YUSED : X_BUF port map ( I => dadrL_N7182_GROM, O => dadrL_N7183 ); dadrL_BU513 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N3775_FROM ); dadrL_BU510 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N3775_GROM ); dadrL_N3775_XUSED : X_BUF port map ( I => dadrL_N3775_FROM, O => dadrL_N3775 ); dadrL_N3775_YUSED : X_BUF port map ( I => dadrL_N3775_GROM, O => dadrL_N3774 ); dadrL_BU1679 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N11301_FROM ); dadrL_BU1676 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N11301_GROM ); dadrL_N11301_XUSED : X_BUF port map ( I => dadrL_N11301_FROM, O => dadrL_N11301 ); dadrL_N11301_YUSED : X_BUF port map ( I => dadrL_N11301_GROM, O => dadrL_N11300 ); dadrL_BU1137 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N7821_FROM ); dadrL_BU1140 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N7821_GROM ); dadrL_N7821_XUSED : X_BUF port map ( I => dadrL_N7821_FROM, O => dadrL_N7821 ); dadrL_N7821_YUSED : X_BUF port map ( I => dadrL_N7821_GROM, O => dadrL_N7822 ); dadrL_BU1027 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N7111_FROM ); dadrL_BU1030 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N7111_GROM ); dadrL_N7111_XUSED : X_BUF port map ( I => dadrL_N7111_FROM, O => dadrL_N7111 ); dadrL_N7111_YUSED : X_BUF port map ( I => dadrL_N7111_GROM, O => dadrL_N7112 ); dadrL_BU1668 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N11230_FROM ); dadrL_BU1665 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N11230_GROM ); dadrL_N11230_XUSED : X_BUF port map ( I => dadrL_N11230_FROM, O => dadrL_N11230 ); dadrL_N11230_YUSED : X_BUF port map ( I => dadrL_N11230_GROM, O => dadrL_N11229 ); dadrL_BU1129 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N7751_FROM ); dadrL_BU1126 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N7751_GROM ); dadrL_N7751_XUSED : X_BUF port map ( I => dadrL_N7751_FROM, O => dadrL_N7751 ); dadrL_N7751_YUSED : X_BUF port map ( I => dadrL_N7751_GROM, O => dadrL_N7750 ); dadrL_BU2614 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N17336_FROM ); dadrL_BU2611 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N17336_GROM ); dadrL_N17336_XUSED : X_BUF port map ( I => dadrL_N17336_FROM, O => dadrL_N17336 ); dadrL_N17336_YUSED : X_BUF port map ( I => dadrL_N17336_GROM, O => dadrL_N17335 ); dadrL_BU315 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N2497_FROM ); dadrL_BU312 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N2497_GROM ); dadrL_N2497_XUSED : X_BUF port map ( I => dadrL_N2497_FROM, O => dadrL_N2497 ); dadrL_N2497_YUSED : X_BUF port map ( I => dadrL_N2497_GROM, O => dadrL_N2496 ); dadrL_BU2603 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N17265_FROM ); dadrL_BU2600 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N17265_GROM ); dadrL_N17265_XUSED : X_BUF port map ( I => dadrL_N17265_FROM, O => dadrL_N17265 ); dadrL_N17265_YUSED : X_BUF port map ( I => dadrL_N17265_GROM, O => dadrL_N17264 ); dadrL_BU304 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N2426_FROM ); dadrL_BU301 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N2426_GROM ); dadrL_N2426_XUSED : X_BUF port map ( I => dadrL_N2426_FROM, O => dadrL_N2426 ); dadrL_N2426_YUSED : X_BUF port map ( I => dadrL_N2426_GROM, O => dadrL_N2425 ); dadrL_BU546 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N3988_FROM ); dadrL_BU543 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N3988_GROM ); dadrL_N3988_XUSED : X_BUF port map ( I => dadrL_N3988_FROM, O => dadrL_N3988 ); dadrL_N3988_YUSED : X_BUF port map ( I => dadrL_N3988_GROM, O => dadrL_N3987 ); dadrL_BU1063 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N7325_FROM ); dadrL_BU1060 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N7325_GROM ); dadrL_N7325_XUSED : X_BUF port map ( I => dadrL_N7325_FROM, O => dadrL_N7325 ); dadrL_N7325_YUSED : X_BUF port map ( I => dadrL_N7325_GROM, O => dadrL_N7324 ); dadrL_BU535 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N3917_FROM ); dadrL_BU532 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N3917_GROM ); dadrL_N3917_XUSED : X_BUF port map ( I => dadrL_N3917_FROM, O => dadrL_N3917 ); dadrL_N3917_YUSED : X_BUF port map ( I => dadrL_N3917_GROM, O => dadrL_N3916 ); dadrL_BU1159 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N7963_FROM ); dadrL_BU1162 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N7963_GROM ); dadrL_N7963_XUSED : X_BUF port map ( I => dadrL_N7963_FROM, O => dadrL_N7963 ); dadrL_N7963_YUSED : X_BUF port map ( I => dadrL_N7963_GROM, O => dadrL_N7964 ); dadrL_BU1049 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N7253_FROM ); dadrL_BU1052 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N7253_GROM ); dadrL_N7253_XUSED : X_BUF port map ( I => dadrL_N7253_FROM, O => dadrL_N7253 ); dadrL_N7253_YUSED : X_BUF port map ( I => dadrL_N7253_GROM, O => dadrL_N7254 ); dadrL_BU1148 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N7892_FROM ); dadrL_BU1151 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N7892_GROM ); dadrL_N7892_XUSED : X_BUF port map ( I => dadrL_N7892_FROM, O => dadrL_N7892 ); dadrL_N7892_YUSED : X_BUF port map ( I => dadrL_N7892_GROM, O => dadrL_N7893 ); dadrL_BU2636 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N17478_FROM ); dadrL_BU2633 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N17478_GROM ); dadrL_N17478_XUSED : X_BUF port map ( I => dadrL_N17478_FROM, O => dadrL_N17478 ); dadrL_N17478_YUSED : X_BUF port map ( I => dadrL_N17478_GROM, O => dadrL_N17477 ); dadrL_BU337 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N2639_FROM ); dadrL_BU334 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N2639_GROM ); dadrL_N2639_XUSED : X_BUF port map ( I => dadrL_N2639_FROM, O => dadrL_N2639 ); dadrL_N2639_YUSED : X_BUF port map ( I => dadrL_N2639_GROM, O => dadrL_N2638 ); dadrL_BU2625 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N17407_FROM ); dadrL_BU2622 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N17407_GROM ); dadrL_N17407_XUSED : X_BUF port map ( I => dadrL_N17407_FROM, O => dadrL_N17407 ); dadrL_N17407_YUSED : X_BUF port map ( I => dadrL_N17407_GROM, O => dadrL_N17406 ); dadrL_BU326 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N2568_FROM ); dadrL_BU323 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N2568_GROM ); dadrL_N2568_XUSED : X_BUF port map ( I => dadrL_N2568_FROM, O => dadrL_N2568 ); dadrL_N2568_YUSED : X_BUF port map ( I => dadrL_N2568_GROM, O => dadrL_N2567 ); dadrL_BU568 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N4130_FROM ); dadrL_BU565 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N4130_GROM ); dadrL_N4130_XUSED : X_BUF port map ( I => dadrL_N4130_FROM, O => dadrL_N4130 ); dadrL_N4130_YUSED : X_BUF port map ( I => dadrL_N4130_GROM, O => dadrL_N4129 ); dadrL_BU1085 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N7467_FROM ); dadrL_BU1082 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N7467_GROM ); dadrL_N7467_XUSED : X_BUF port map ( I => dadrL_N7467_FROM, O => dadrL_N7467 ); dadrL_N7467_YUSED : X_BUF port map ( I => dadrL_N7467_GROM, O => dadrL_N7466 ); dadrL_BU29 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N651_FROM ); dadrL_BU26 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N651_GROM ); dadrL_N651_XUSED : X_BUF port map ( I => dadrL_N651_FROM, O => dadrL_N651 ); dadrL_N651_YUSED : X_BUF port map ( I => dadrL_N651_GROM, O => dadrL_N650 ); dadrL_BU557 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N4059_FROM ); dadrL_BU554 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N4059_GROM ); dadrL_N4059_XUSED : X_BUF port map ( I => dadrL_N4059_FROM, O => dadrL_N4059 ); dadrL_N4059_YUSED : X_BUF port map ( I => dadrL_N4059_GROM, O => dadrL_N4058 ); dadrL_BU1184 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N8106_FROM ); dadrL_BU1181 : X_LUT4 generic map( INIT => X"1000" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N8106_GROM ); dadrL_N8106_XUSED : X_BUF port map ( I => dadrL_N8106_FROM, O => dadrL_N8106 ); dadrL_N8106_YUSED : X_BUF port map ( I => dadrL_N8106_GROM, O => dadrL_N8105 ); dadrL_BU1074 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N7396_FROM ); dadrL_BU1071 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N7396_GROM ); dadrL_N7396_XUSED : X_BUF port map ( I => dadrL_N7396_FROM, O => dadrL_N7396 ); dadrL_N7396_YUSED : X_BUF port map ( I => dadrL_N7396_GROM, O => dadrL_N7395 ); dadrL_BU18 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N580_FROM ); dadrL_BU15 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N580_GROM ); dadrL_N580_XUSED : X_BUF port map ( I => dadrL_N580_FROM, O => dadrL_N580 ); dadrL_N580_YUSED : X_BUF port map ( I => dadrL_N580_GROM, O => dadrL_N579 ); dadrL_BU1173 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N8035_FROM ); dadrL_BU1170 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N8035_GROM ); dadrL_N8035_XUSED : X_BUF port map ( I => dadrL_N8035_FROM, O => dadrL_N8035 ); dadrL_N8035_YUSED : X_BUF port map ( I => dadrL_N8035_GROM, O => dadrL_N8034 ); dadrL_BU2658 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N17620_FROM ); dadrL_BU2655 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N17620_GROM ); dadrL_N17620_XUSED : X_BUF port map ( I => dadrL_N17620_FROM, O => dadrL_N17620 ); dadrL_N17620_YUSED : X_BUF port map ( I => dadrL_N17620_GROM, O => dadrL_N17619 ); dadrL_BU359 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N2781_FROM ); dadrL_BU356 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N2781_GROM ); dadrL_N2781_XUSED : X_BUF port map ( I => dadrL_N2781_FROM, O => dadrL_N2781 ); dadrL_N2781_YUSED : X_BUF port map ( I => dadrL_N2781_GROM, O => dadrL_N2780 ); dadrL_BU2647 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N17549_FROM ); dadrL_BU2644 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N17549_GROM ); dadrL_N17549_XUSED : X_BUF port map ( I => dadrL_N17549_FROM, O => dadrL_N17549 ); dadrL_N17549_YUSED : X_BUF port map ( I => dadrL_N17549_GROM, O => dadrL_N17548 ); dadrL_BU348 : X_LUT4 generic map( INIT => X"0080" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N2710_FROM ); dadrL_BU345 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N2710_GROM ); dadrL_N2710_XUSED : X_BUF port map ( I => dadrL_N2710_FROM, O => dadrL_N2710 ); dadrL_N2710_YUSED : X_BUF port map ( I => dadrL_N2710_GROM, O => dadrL_N2709 ); dadrL_BU587 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N4271_FROM ); dadrL_BU590 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N4271_GROM ); dadrL_N4271_XUSED : X_BUF port map ( I => dadrL_N4271_FROM, O => dadrL_N4271 ); dadrL_N4271_YUSED : X_BUF port map ( I => dadrL_N4271_GROM, O => dadrL_N4272 ); dadrL_BU48 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N792_FROM ); dadrL_BU51 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N792_GROM ); dadrL_N792_XUSED : X_BUF port map ( I => dadrL_N792_FROM, O => dadrL_N792 ); dadrL_N792_YUSED : X_BUF port map ( I => dadrL_N792_GROM, O => dadrL_N793 ); dadrL_BU579 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N4201_FROM ); dadrL_BU576 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N4201_GROM ); dadrL_N4201_XUSED : X_BUF port map ( I => dadrL_N4201_FROM, O => dadrL_N4201 ); dadrL_N4201_YUSED : X_BUF port map ( I => dadrL_N4201_GROM, O => dadrL_N4200 ); dadrL_BU1096 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N7538_FROM ); dadrL_BU1093 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N7538_GROM ); dadrL_N7538_XUSED : X_BUF port map ( I => dadrL_N7538_FROM, O => dadrL_N7538 ); dadrL_N7538_YUSED : X_BUF port map ( I => dadrL_N7538_GROM, O => dadrL_N7537 ); dadrL_BU1206 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N8248_FROM ); dadrL_BU1203 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N8248_GROM ); dadrL_N8248_XUSED : X_BUF port map ( I => dadrL_N8248_FROM, O => dadrL_N8248 ); dadrL_N8248_YUSED : X_BUF port map ( I => dadrL_N8248_GROM, O => dadrL_N8247 ); dadrL_BU37 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N721_FROM ); dadrL_BU40 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N721_GROM ); dadrL_N721_XUSED : X_BUF port map ( I => dadrL_N721_FROM, O => dadrL_N721 ); dadrL_N721_YUSED : X_BUF port map ( I => dadrL_N721_GROM, O => dadrL_N722 ); dadrL_BU1195 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N8177_FROM ); dadrL_BU1192 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N8177_GROM ); dadrL_N8177_XUSED : X_BUF port map ( I => dadrL_N8177_FROM, O => dadrL_N8177 ); dadrL_N8177_YUSED : X_BUF port map ( I => dadrL_N8177_GROM, O => dadrL_N8176 ); dadrL_BU2677 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N17761_FROM ); dadrL_BU2680 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N17761_GROM ); dadrL_N17761_XUSED : X_BUF port map ( I => dadrL_N17761_FROM, O => dadrL_N17761 ); dadrL_N17761_YUSED : X_BUF port map ( I => dadrL_N17761_GROM, O => dadrL_N17762 ); dadrL_BU2669 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N17691_FROM ); dadrL_BU2666 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N17691_GROM ); dadrL_N17691_XUSED : X_BUF port map ( I => dadrL_N17691_FROM, O => dadrL_N17691 ); dadrL_N17691_YUSED : X_BUF port map ( I => dadrL_N17691_GROM, O => dadrL_N17690 ); dadrL_BU367 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N2851_FROM ); dadrL_BU370 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N2851_GROM ); dadrL_N2851_XUSED : X_BUF port map ( I => dadrL_N2851_FROM, O => dadrL_N2851 ); dadrL_N2851_YUSED : X_BUF port map ( I => dadrL_N2851_GROM, O => dadrL_N2852 ); dadrL_BU73 : X_LUT4 generic map( INIT => X"0020" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N935_FROM ); dadrL_BU70 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N935_GROM ); dadrL_N935_XUSED : X_BUF port map ( I => dadrL_N935_FROM, O => dadrL_N935 ); dadrL_N935_YUSED : X_BUF port map ( I => dadrL_N935_GROM, O => dadrL_N934 ); dadrL_BU1228 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N8390_FROM ); dadrL_BU1225 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N8390_GROM ); dadrL_N8390_XUSED : X_BUF port map ( I => dadrL_N8390_FROM, O => dadrL_N8390 ); dadrL_N8390_YUSED : X_BUF port map ( I => dadrL_N8390_GROM, O => dadrL_N8389 ); dadrL_BU59 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N863_FROM ); dadrL_BU62 : X_LUT4 generic map( INIT => X"0002" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N863_GROM ); dadrL_N863_XUSED : X_BUF port map ( I => dadrL_N863_FROM, O => dadrL_N863 ); dadrL_N863_YUSED : X_BUF port map ( I => dadrL_N863_GROM, O => dadrL_N864 ); dadrL_BU1217 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N8319_FROM ); dadrL_BU1214 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N8319_GROM ); dadrL_N8319_XUSED : X_BUF port map ( I => dadrL_N8319_FROM, O => dadrL_N8319 ); dadrL_N8319_YUSED : X_BUF port map ( I => dadrL_N8319_GROM, O => dadrL_N8318 ); dadrL_BU2699 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N17903_FROM ); dadrL_BU2702 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_0_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N17903_GROM ); dadrL_N17903_XUSED : X_BUF port map ( I => dadrL_N17903_FROM, O => dadrL_N17903 ); dadrL_N17903_YUSED : X_BUF port map ( I => dadrL_N17903_GROM, O => dadrL_N17904 ); dadrL_BU2688 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N17832_FROM ); dadrL_BU2691 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N17832_GROM ); dadrL_N17832_XUSED : X_BUF port map ( I => dadrL_N17832_FROM, O => dadrL_N17832 ); dadrL_N17832_YUSED : X_BUF port map ( I => dadrL_N17832_GROM, O => dadrL_N17833 ); dadrL_BU95 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N1077_FROM ); dadrL_BU92 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N1077_GROM ); dadrL_N1077_XUSED : X_BUF port map ( I => dadrL_N1077_FROM, O => dadrL_N1077 ); dadrL_N1077_YUSED : X_BUF port map ( I => dadrL_N1077_GROM, O => dadrL_N1076 ); dadrL_BU1247 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N8531_FROM ); dadrL_BU1250 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N8531_GROM ); dadrL_N8531_XUSED : X_BUF port map ( I => dadrL_N8531_FROM, O => dadrL_N8531 ); dadrL_N8531_YUSED : X_BUF port map ( I => dadrL_N8531_GROM, O => dadrL_N8532 ); dadrL_BU84 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N1006_FROM ); dadrL_BU81 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N1006_GROM ); dadrL_N1006_XUSED : X_BUF port map ( I => dadrL_N1006_FROM, O => dadrL_N1006 ); dadrL_N1006_YUSED : X_BUF port map ( I => dadrL_N1006_GROM, O => dadrL_N1005 ); dadrL_BU1239 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N8461_FROM ); dadrL_BU1236 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N8461_GROM ); dadrL_N8461_XUSED : X_BUF port map ( I => dadrL_N8461_FROM, O => dadrL_N8461 ); dadrL_N8461_YUSED : X_BUF port map ( I => dadrL_N8461_GROM, O => dadrL_N8460 ); dadrL_BU2724 : X_LUT4 generic map( INIT => X"0200" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N18046_FROM ); dadrL_BU2721 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N18046_GROM ); dadrL_N18046_XUSED : X_BUF port map ( I => dadrL_N18046_FROM, O => dadrL_N18046 ); dadrL_N18046_YUSED : X_BUF port map ( I => dadrL_N18046_GROM, O => dadrL_N18045 ); dadrL_BU2713 : X_LUT4 generic map( INIT => X"0040" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_2_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N17975_FROM ); dadrL_BU2710 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N17975_GROM ); dadrL_N17975_XUSED : X_BUF port map ( I => dadrL_N17975_FROM, O => dadrL_N17975 ); dadrL_N17975_YUSED : X_BUF port map ( I => dadrL_N17975_GROM, O => dadrL_N17974 ); dadrL_BU117 : X_LUT4 generic map( INIT => X"0400" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_2_IBUF, ADR3 => adr_bus_0_IBUF, O => dadrL_N1219_FROM ); dadrL_BU114 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_7_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_4_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N1219_GROM ); dadrL_N1219_XUSED : X_BUF port map ( I => dadrL_N1219_FROM, O => dadrL_N1219 ); dadrL_N1219_YUSED : X_BUF port map ( I => dadrL_N1219_GROM, O => dadrL_N1218 ); dadrL_BU106 : X_LUT4 generic map( INIT => X"0010" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N1148_FROM ); dadrL_BU103 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_5_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_6_IBUF, O => dadrL_N1148_GROM ); dadrL_N1148_XUSED : X_BUF port map ( I => dadrL_N1148_FROM, O => dadrL_N1148 ); dadrL_N1148_YUSED : X_BUF port map ( I => dadrL_N1148_GROM, O => dadrL_N1147 ); dadrL_BU1269 : X_LUT4 generic map( INIT => X"2000" ) port map ( ADR0 => adr_bus_5_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_6_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N8673_FROM ); dadrL_BU1272 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_3_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_1_IBUF, O => dadrL_N8673_GROM ); dadrL_N8673_XUSED : X_BUF port map ( I => dadrL_N8673_FROM, O => dadrL_N8673 ); dadrL_N8673_YUSED : X_BUF port map ( I => dadrL_N8673_GROM, O => dadrL_N8674 ); dadrL_BU1258 : X_LUT4 generic map( INIT => X"0800" ) port map ( ADR0 => adr_bus_4_IBUF, ADR1 => adr_bus_6_IBUF, ADR2 => adr_bus_7_IBUF, ADR3 => adr_bus_5_IBUF, O => dadrL_N8602_FROM ); dadrL_BU1261 : X_LUT4 generic map( INIT => X"0004" ) port map ( ADR0 => adr_bus_1_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_3_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N8602_GROM ); dadrL_N8602_XUSED : X_BUF port map ( I => dadrL_N8602_FROM, O => dadrL_N8602 ); dadrL_N8602_YUSED : X_BUF port map ( I => dadrL_N8602_GROM, O => dadrL_N8603 ); dadrL_BU2746 : X_LUT4 generic map( INIT => X"0100" ) port map ( ADR0 => adr_bus_2_IBUF, ADR1 => adr_bus_1_IBUF, ADR2 => adr_bus_0_IBUF, ADR3 => adr_bus_3_IBUF, O => dadrL_N18188_FROM ); dadrL_BU2743 : X_LUT4 generic map( INIT => X"8000" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_4_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_7_IBUF, O => dadrL_N18188_GROM ); dadrL_N18188_XUSED : X_BUF port map ( I => dadrL_N18188_FROM, O => dadrL_N18188 ); dadrL_N18188_YUSED : X_BUF port map ( I => dadrL_N18188_GROM, O => dadrL_N18187 ); dadrL_BU2207 : X_LUT4 generic map( INIT => X"4000" ) port map ( ADR0 => adr_bus_3_IBUF, ADR1 => adr_bus_0_IBUF, ADR2 => adr_bus_1_IBUF, ADR3 => adr_bus_2_IBUF, O => dadrL_N14709_FROM ); dadrL_BU2204 : X_LUT4 generic map( INIT => X"0008" ) port map ( ADR0 => adr_bus_6_IBUF, ADR1 => adr_bus_7_IBUF, ADR2 => adr_bus_5_IBUF, ADR3 => adr_bus_4_IBUF, O => dadrL_N14709_GROM ); dadrL_N14709_XUSED : X_BUF port map ( I => dadrL_N14709_FROM, O => dadrL_N14709 ); dadrL_N14709_YUSED : X_BUF port map ( I => dadrL_N14709_GROM, O => dadrL_N14708 ); dadrL_BU32 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N650, ADR3 => dadrL_N651, O => cs_1_OBUF_GROM ); cs_1_OBUF_YUSED : X_BUF port map ( I => cs_1_OBUF_GROM, O => cs_1_OBUF ); dadrL_BU43 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N722, ADR1 => dadrL_N721, ADR2 => reg_select, ADR3 => VCC, O => cs_2_OBUF_GROM ); cs_2_OBUF_YUSED : X_BUF port map ( I => cs_2_OBUF_GROM, O => cs_2_OBUF ); dadrL_BU54 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N792, ADR1 => reg_select, ADR2 => dadrL_N793, ADR3 => VCC, O => cs_3_OBUF_GROM ); cs_3_OBUF_YUSED : X_BUF port map ( I => cs_3_OBUF_GROM, O => cs_3_OBUF ); dadrL_BU65 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N864, ADR1 => dadrL_N863, ADR2 => reg_select, ADR3 => VCC, O => cs_4_OBUF_GROM ); cs_4_OBUF_YUSED : X_BUF port map ( I => cs_4_OBUF_GROM, O => cs_4_OBUF ); dadrL_BU76 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N935, ADR1 => VCC, ADR2 => dadrL_N934, ADR3 => reg_select, O => cs_5_OBUF_GROM ); cs_5_OBUF_YUSED : X_BUF port map ( I => cs_5_OBUF_GROM, O => cs_5_OBUF ); dadrL_BU87 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N1005, ADR1 => dadrL_N1006, ADR2 => VCC, ADR3 => reg_select, O => cs_6_OBUF_GROM ); cs_6_OBUF_YUSED : X_BUF port map ( I => cs_6_OBUF_GROM, O => cs_6_OBUF ); dadrL_BU98 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N1076, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N1077, O => cs_7_OBUF_GROM ); cs_7_OBUF_YUSED : X_BUF port map ( I => cs_7_OBUF_GROM, O => cs_7_OBUF ); reg_select32 : X_LUT4 generic map( INIT => X"0001" ) port map ( ADR0 => adr_bus_9_IBUF, ADR1 => adr_bus_11_IBUF, ADR2 => N5267, ADR3 => adr_bus_10_IBUF, O => reg_select_FROM ); dadrL_BU21 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N579, ADR1 => dadrL_N580, ADR2 => VCC, ADR3 => reg_select, O => reg_select_GROM ); reg_select_XUSED : X_BUF port map ( I => reg_select_FROM, O => reg_select ); reg_select_YUSED : X_BUF port map ( I => reg_select_GROM, O => cs_0_OBUF ); dadrL_BU1000 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N6898, ADR3 => dadrL_N6899, O => cs_89_OBUF_GROM ); cs_89_OBUF_YUSED : X_BUF port map ( I => cs_89_OBUF_GROM, O => cs_89_OBUF ); dadrL_BU1011 : X_LUT4 generic map( INIT => X"C000" ) port map ( ADR0 => VCC, ADR1 => dadrL_N6970, ADR2 => reg_select, ADR3 => dadrL_N6969, O => cs_90_OBUF_GROM ); cs_90_OBUF_YUSED : X_BUF port map ( I => cs_90_OBUF_GROM, O => cs_90_OBUF ); dadrL_BU1110 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N7608, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N7609, O => cs_99_OBUF_GROM ); cs_99_OBUF_YUSED : X_BUF port map ( I => cs_99_OBUF_GROM, O => cs_99_OBUF ); dadrL_BU1022 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N7041, ADR1 => reg_select, ADR2 => dadrL_N7040, ADR3 => VCC, O => cs_91_OBUF_GROM ); cs_91_OBUF_YUSED : X_BUF port map ( I => cs_91_OBUF_GROM, O => cs_91_OBUF ); dadrL_BU2001 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N13359, ADR3 => dadrL_N13360, O => cs_180_OBUF_GROM ); cs_180_OBUF_YUSED : X_BUF port map ( I => cs_180_OBUF_GROM, O => cs_180_OBUF ); dadrL_BU1121 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N7679, ADR3 => dadrL_N7680, O => cs_100_OBUF_GROM ); cs_100_OBUF_YUSED : X_BUF port map ( I => cs_100_OBUF_GROM, O => cs_100_OBUF ); dadrL_BU1033 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => reg_select, ADR1 => dadrL_N7111, ADR2 => VCC, ADR3 => dadrL_N7112, O => cs_92_OBUF_GROM ); cs_92_OBUF_YUSED : X_BUF port map ( I => cs_92_OBUF_GROM, O => cs_92_OBUF ); dadrL_BU2100 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N13998, ADR1 => dadrL_N13999, ADR2 => reg_select, ADR3 => VCC, O => cs_189_OBUF_GROM ); cs_189_OBUF_YUSED : X_BUF port map ( I => cs_189_OBUF_GROM, O => cs_189_OBUF ); dadrL_BU2012 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N13430, ADR1 => dadrL_N13431, ADR2 => reg_select, ADR3 => VCC, O => cs_181_OBUF_GROM ); cs_181_OBUF_YUSED : X_BUF port map ( I => cs_181_OBUF_GROM, O => cs_181_OBUF ); dadrL_BU1220 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N8318, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N8319, O => cs_109_OBUF_GROM ); cs_109_OBUF_YUSED : X_BUF port map ( I => cs_109_OBUF_GROM, O => cs_109_OBUF ); dadrL_BU1132 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N7750, ADR1 => dadrL_N7751, ADR2 => reg_select, ADR3 => VCC, O => cs_101_OBUF_GROM ); cs_101_OBUF_YUSED : X_BUF port map ( I => cs_101_OBUF_GROM, O => cs_101_OBUF ); dadrL_BU1044 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N7182, ADR1 => VCC, ADR2 => dadrL_N7183, ADR3 => reg_select, O => cs_93_OBUF_GROM ); cs_93_OBUF_YUSED : X_BUF port map ( I => cs_93_OBUF_GROM, O => cs_93_OBUF ); dadrL_BU2111 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N14070, ADR1 => reg_select, ADR2 => dadrL_N14069, ADR3 => VCC, O => cs_190_OBUF_GROM ); cs_190_OBUF_YUSED : X_BUF port map ( I => cs_190_OBUF_GROM, O => cs_190_OBUF ); dadrL_BU2023 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N13502, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N13501, O => cs_182_OBUF_GROM ); cs_182_OBUF_YUSED : X_BUF port map ( I => cs_182_OBUF_GROM, O => cs_182_OBUF ); dadrL_BU1231 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N8390, ADR1 => VCC, ADR2 => dadrL_N8389, ADR3 => reg_select, O => cs_110_OBUF_GROM ); cs_110_OBUF_YUSED : X_BUF port map ( I => cs_110_OBUF_GROM, O => cs_110_OBUF ); dadrL_BU1143 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N7821, ADR1 => reg_select, ADR2 => dadrL_N7822, ADR3 => VCC, O => cs_102_OBUF_GROM ); cs_102_OBUF_YUSED : X_BUF port map ( I => cs_102_OBUF_GROM, O => cs_102_OBUF ); dadrL_BU1055 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => reg_select, ADR1 => dadrL_N7253, ADR2 => VCC, ADR3 => dadrL_N7254, O => cs_94_OBUF_GROM ); cs_94_OBUF_YUSED : X_BUF port map ( I => cs_94_OBUF_GROM, O => cs_94_OBUF ); dadrL_BU1209 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N8248, ADR1 => reg_select, ADR2 => dadrL_N8247, ADR3 => VCC, O => cs_108_OBUF_GROM ); cs_108_OBUF_YUSED : X_BUF port map ( I => cs_108_OBUF_GROM, O => cs_108_OBUF ); dadrL_BU2210 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N14709, ADR3 => dadrL_N14708, O => cs_199_OBUF_GROM ); cs_199_OBUF_YUSED : X_BUF port map ( I => cs_199_OBUF_GROM, O => cs_199_OBUF ); dadrL_BU2122 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => reg_select, ADR1 => dadrL_N14140, ADR2 => VCC, ADR3 => dadrL_N14141, O => cs_191_OBUF_GROM ); cs_191_OBUF_YUSED : X_BUF port map ( I => cs_191_OBUF_GROM, O => cs_191_OBUF ); dadrL_BU2034 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N13573, ADR1 => VCC, ADR2 => dadrL_N13572, ADR3 => reg_select, O => cs_183_OBUF_GROM ); cs_183_OBUF_YUSED : X_BUF port map ( I => cs_183_OBUF_GROM, O => cs_183_OBUF ); dadrL_BU1330 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N9028, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N9029, O => cs_119_OBUF_GROM ); cs_119_OBUF_YUSED : X_BUF port map ( I => cs_119_OBUF_GROM, O => cs_119_OBUF ); dadrL_BU1242 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N8460, ADR1 => dadrL_N8461, ADR2 => reg_select, ADR3 => VCC, O => cs_111_OBUF_GROM ); cs_111_OBUF_YUSED : X_BUF port map ( I => cs_111_OBUF_GROM, O => cs_111_OBUF ); dadrL_BU1154 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N7893, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N7892, O => cs_103_OBUF_GROM ); cs_103_OBUF_YUSED : X_BUF port map ( I => cs_103_OBUF_GROM, O => cs_103_OBUF ); dadrL_BU1066 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N7325, ADR1 => VCC, ADR2 => dadrL_N7324, ADR3 => reg_select, O => cs_95_OBUF_GROM ); cs_95_OBUF_YUSED : X_BUF port map ( I => cs_95_OBUF_GROM, O => cs_95_OBUF ); dadrL_BU1308 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N8887, ADR1 => dadrL_N8886, ADR2 => VCC, ADR3 => reg_select, O => cs_117_OBUF_GROM ); cs_117_OBUF_YUSED : X_BUF port map ( I => cs_117_OBUF_GROM, O => cs_117_OBUF ); dadrL_BU2221 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N14779, ADR1 => dadrL_N14780, ADR2 => reg_select, ADR3 => VCC, O => cs_200_OBUF_GROM ); cs_200_OBUF_YUSED : X_BUF port map ( I => cs_200_OBUF_GROM, O => cs_200_OBUF ); dadrL_BU2133 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N14212, ADR3 => dadrL_N14211, O => cs_192_OBUF_GROM ); cs_192_OBUF_YUSED : X_BUF port map ( I => cs_192_OBUF_GROM, O => cs_192_OBUF ); dadrL_BU2045 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N13643, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N13644, O => cs_184_OBUF_GROM ); cs_184_OBUF_YUSED : X_BUF port map ( I => cs_184_OBUF_GROM, O => cs_184_OBUF ); dadrL_BU1341 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N9100, ADR3 => dadrL_N9099, O => cs_120_OBUF_GROM ); cs_120_OBUF_YUSED : X_BUF port map ( I => cs_120_OBUF_GROM, O => cs_120_OBUF ); dadrL_BU1253 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N8532, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N8531, O => cs_112_OBUF_GROM ); cs_112_OBUF_YUSED : X_BUF port map ( I => cs_112_OBUF_GROM, O => cs_112_OBUF ); dadrL_BU1165 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N7963, ADR1 => reg_select, ADR2 => dadrL_N7964, ADR3 => VCC, O => cs_104_OBUF_GROM ); cs_104_OBUF_YUSED : X_BUF port map ( I => cs_104_OBUF_GROM, O => cs_104_OBUF ); dadrL_BU1077 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N7395, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N7396, O => cs_96_OBUF_GROM ); cs_96_OBUF_YUSED : X_BUF port map ( I => cs_96_OBUF_GROM, O => cs_96_OBUF ); dadrL_BU1407 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N9525, ADR3 => dadrL_N9526, O => cs_126_OBUF_GROM ); cs_126_OBUF_YUSED : X_BUF port map ( I => cs_126_OBUF_GROM, O => cs_126_OBUF ); dadrL_BU1319 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N8958, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N8957, O => cs_118_OBUF_GROM ); cs_118_OBUF_YUSED : X_BUF port map ( I => cs_118_OBUF_GROM, O => cs_118_OBUF ); dadrL_BU2320 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N15418, ADR3 => dadrL_N15419, O => cs_209_OBUF_GROM ); cs_209_OBUF_YUSED : X_BUF port map ( I => cs_209_OBUF_GROM, O => cs_209_OBUF ); dadrL_BU2232 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N14851, ADR1 => reg_select, ADR2 => dadrL_N14850, ADR3 => VCC, O => cs_201_OBUF_GROM ); cs_201_OBUF_YUSED : X_BUF port map ( I => cs_201_OBUF_GROM, O => cs_201_OBUF ); dadrL_BU2144 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N14282, ADR3 => dadrL_N14283, O => cs_193_OBUF_GROM ); cs_193_OBUF_YUSED : X_BUF port map ( I => cs_193_OBUF_GROM, O => cs_193_OBUF ); dadrL_BU2056 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => reg_select, ADR1 => dadrL_N13715, ADR2 => VCC, ADR3 => dadrL_N13714, O => cs_185_OBUF_GROM ); cs_185_OBUF_YUSED : X_BUF port map ( I => cs_185_OBUF_GROM, O => cs_185_OBUF ); dadrL_BU1440 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N9738, ADR1 => dadrL_N9739, ADR2 => VCC, ADR3 => reg_select, O => cs_129_OBUF_GROM ); cs_129_OBUF_YUSED : X_BUF port map ( I => cs_129_OBUF_GROM, O => cs_129_OBUF ); dadrL_BU1352 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N9171, ADR1 => dadrL_N9170, ADR2 => VCC, ADR3 => reg_select, O => cs_121_OBUF_GROM ); cs_121_OBUF_YUSED : X_BUF port map ( I => cs_121_OBUF_GROM, O => cs_121_OBUF ); dadrL_BU1264 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N8603, ADR1 => dadrL_N8602, ADR2 => reg_select, ADR3 => VCC, O => cs_113_OBUF_GROM ); cs_113_OBUF_YUSED : X_BUF port map ( I => cs_113_OBUF_GROM, O => cs_113_OBUF ); dadrL_BU1176 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N8034, ADR1 => dadrL_N8035, ADR2 => reg_select, ADR3 => VCC, O => cs_105_OBUF_GROM ); cs_105_OBUF_YUSED : X_BUF port map ( I => cs_105_OBUF_GROM, O => cs_105_OBUF ); dadrL_BU1088 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N7467, ADR3 => dadrL_N7466, O => cs_97_OBUF_GROM ); cs_97_OBUF_YUSED : X_BUF port map ( I => cs_97_OBUF_GROM, O => cs_97_OBUF ); dadrL_BU1506 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N10164, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N10165, O => cs_135_OBUF_GROM ); cs_135_OBUF_YUSED : X_BUF port map ( I => cs_135_OBUF_GROM, O => cs_135_OBUF ); dadrL_BU1418 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N9596, ADR1 => dadrL_N9597, ADR2 => VCC, ADR3 => reg_select, O => cs_127_OBUF_GROM ); cs_127_OBUF_YUSED : X_BUF port map ( I => cs_127_OBUF_GROM, O => cs_127_OBUF ); dadrL_BU2331 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N15489, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N15490, O => cs_210_OBUF_GROM ); cs_210_OBUF_YUSED : X_BUF port map ( I => cs_210_OBUF_GROM, O => cs_210_OBUF ); dadrL_BU2243 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N14922, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N14921, O => cs_202_OBUF_GROM ); cs_202_OBUF_YUSED : X_BUF port map ( I => cs_202_OBUF_GROM, O => cs_202_OBUF ); dadrL_BU2155 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N14353, ADR1 => VCC, ADR2 => dadrL_N14354, ADR3 => reg_select, O => cs_194_OBUF_GROM ); cs_194_OBUF_YUSED : X_BUF port map ( I => cs_194_OBUF_GROM, O => cs_194_OBUF ); dadrL_BU2067 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N13785, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N13786, O => cs_186_OBUF_GROM ); cs_186_OBUF_YUSED : X_BUF port map ( I => cs_186_OBUF_GROM, O => cs_186_OBUF ); dadrL_BU1451 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N9809, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N9810, O => cs_130_OBUF_GROM ); cs_130_OBUF_YUSED : X_BUF port map ( I => cs_130_OBUF_GROM, O => cs_130_OBUF ); cs_77_OBUF_19 : X_TRI port map ( I => cs_77_OUTMUX, CTL => cs_77_ENABLE, O => cs(77) ); cs_77_ENABLEINV : X_INV port map ( I => cs_77_TORGTS, O => cs_77_ENABLE ); cs_77_GTS_OR : X_BUF port map ( I => GTS, O => cs_77_TORGTS ); cs_77_OUTMUX_20 : X_BUF port map ( I => cs_77_OBUF, O => cs_77_OUTMUX ); cs_85_OBUF_21 : X_TRI port map ( I => cs_85_OUTMUX, CTL => cs_85_ENABLE, O => cs(85) ); cs_85_ENABLEINV : X_INV port map ( I => cs_85_TORGTS, O => cs_85_ENABLE ); cs_85_GTS_OR : X_BUF port map ( I => GTS, O => cs_85_TORGTS ); cs_85_OUTMUX_22 : X_BUF port map ( I => cs_85_OBUF, O => cs_85_OUTMUX ); cs_93_OBUF_23 : X_TRI port map ( I => cs_93_OUTMUX, CTL => cs_93_ENABLE, O => cs(93) ); cs_93_ENABLEINV : X_INV port map ( I => cs_93_TORGTS, O => cs_93_ENABLE ); cs_93_GTS_OR : X_BUF port map ( I => GTS, O => cs_93_TORGTS ); cs_93_OUTMUX_24 : X_BUF port map ( I => cs_93_OBUF, O => cs_93_OUTMUX ); cs_78_OBUF_25 : X_TRI port map ( I => cs_78_OUTMUX, CTL => cs_78_ENABLE, O => cs(78) ); cs_78_ENABLEINV : X_INV port map ( I => cs_78_TORGTS, O => cs_78_ENABLE ); cs_78_GTS_OR : X_BUF port map ( I => GTS, O => cs_78_TORGTS ); cs_78_OUTMUX_26 : X_BUF port map ( I => cs_78_OBUF, O => cs_78_OUTMUX ); cs_86_OBUF_27 : X_TRI port map ( I => cs_86_OUTMUX, CTL => cs_86_ENABLE, O => cs(86) ); cs_86_ENABLEINV : X_INV port map ( I => cs_86_TORGTS, O => cs_86_ENABLE ); cs_86_GTS_OR : X_BUF port map ( I => GTS, O => cs_86_TORGTS ); cs_86_OUTMUX_28 : X_BUF port map ( I => cs_86_OBUF, O => cs_86_OUTMUX ); cs_94_OBUF_29 : X_TRI port map ( I => cs_94_OUTMUX, CTL => cs_94_ENABLE, O => cs(94) ); cs_94_ENABLEINV : X_INV port map ( I => cs_94_TORGTS, O => cs_94_ENABLE ); cs_94_GTS_OR : X_BUF port map ( I => GTS, O => cs_94_TORGTS ); cs_94_OUTMUX_30 : X_BUF port map ( I => cs_94_OBUF, O => cs_94_OUTMUX ); cs_79_OBUF_31 : X_TRI port map ( I => cs_79_OUTMUX, CTL => cs_79_ENABLE, O => cs(79) ); cs_79_ENABLEINV : X_INV port map ( I => cs_79_TORGTS, O => cs_79_ENABLE ); cs_79_GTS_OR : X_BUF port map ( I => GTS, O => cs_79_TORGTS ); cs_79_OUTMUX_32 : X_BUF port map ( I => cs_79_OBUF, O => cs_79_OUTMUX ); cs_87_OBUF_33 : X_TRI port map ( I => cs_87_OUTMUX, CTL => cs_87_ENABLE, O => cs(87) ); cs_87_ENABLEINV : X_INV port map ( I => cs_87_TORGTS, O => cs_87_ENABLE ); cs_87_GTS_OR : X_BUF port map ( I => GTS, O => cs_87_TORGTS ); cs_87_OUTMUX_34 : X_BUF port map ( I => cs_87_OBUF, O => cs_87_OUTMUX ); cs_95_OBUF_35 : X_TRI port map ( I => cs_95_OUTMUX, CTL => cs_95_ENABLE, O => cs(95) ); cs_95_ENABLEINV : X_INV port map ( I => cs_95_TORGTS, O => cs_95_ENABLE ); cs_95_GTS_OR : X_BUF port map ( I => GTS, O => cs_95_TORGTS ); cs_95_OUTMUX_36 : X_BUF port map ( I => cs_95_OBUF, O => cs_95_OUTMUX ); cs_88_OBUF_37 : X_TRI port map ( I => cs_88_OUTMUX, CTL => cs_88_ENABLE, O => cs(88) ); cs_88_ENABLEINV : X_INV port map ( I => cs_88_TORGTS, O => cs_88_ENABLE ); cs_88_GTS_OR : X_BUF port map ( I => GTS, O => cs_88_TORGTS ); cs_88_OUTMUX_38 : X_BUF port map ( I => cs_88_OBUF, O => cs_88_OUTMUX ); cs_96_OBUF_39 : X_TRI port map ( I => cs_96_OUTMUX, CTL => cs_96_ENABLE, O => cs(96) ); cs_96_ENABLEINV : X_INV port map ( I => cs_96_TORGTS, O => cs_96_ENABLE ); cs_96_GTS_OR : X_BUF port map ( I => GTS, O => cs_96_TORGTS ); cs_96_OUTMUX_40 : X_BUF port map ( I => cs_96_OBUF, O => cs_96_OUTMUX ); cs_89_OBUF_41 : X_TRI port map ( I => cs_89_OUTMUX, CTL => cs_89_ENABLE, O => cs(89) ); cs_89_ENABLEINV : X_INV port map ( I => cs_89_TORGTS, O => cs_89_ENABLE ); cs_89_GTS_OR : X_BUF port map ( I => GTS, O => cs_89_TORGTS ); cs_89_OUTMUX_42 : X_BUF port map ( I => cs_89_OBUF, O => cs_89_OUTMUX ); cs_97_OBUF_43 : X_TRI port map ( I => cs_97_OUTMUX, CTL => cs_97_ENABLE, O => cs(97) ); cs_97_ENABLEINV : X_INV port map ( I => cs_97_TORGTS, O => cs_97_ENABLE ); cs_97_GTS_OR : X_BUF port map ( I => GTS, O => cs_97_TORGTS ); cs_97_OUTMUX_44 : X_BUF port map ( I => cs_97_OBUF, O => cs_97_OUTMUX ); cs_98_OBUF_45 : X_TRI port map ( I => cs_98_OUTMUX, CTL => cs_98_ENABLE, O => cs(98) ); cs_98_ENABLEINV : X_INV port map ( I => cs_98_TORGTS, O => cs_98_ENABLE ); cs_98_GTS_OR : X_BUF port map ( I => GTS, O => cs_98_TORGTS ); cs_98_OUTMUX_46 : X_BUF port map ( I => cs_98_OBUF, O => cs_98_OUTMUX ); cs_99_OBUF_47 : X_TRI port map ( I => cs_99_OUTMUX, CTL => cs_99_ENABLE, O => cs(99) ); cs_99_ENABLEINV : X_INV port map ( I => cs_99_TORGTS, O => cs_99_ENABLE ); cs_99_GTS_OR : X_BUF port map ( I => GTS, O => cs_99_TORGTS ); cs_99_OUTMUX_48 : X_BUF port map ( I => cs_99_OBUF, O => cs_99_OUTMUX ); cs_0_OBUF_49 : X_TRI port map ( I => cs_0_OUTMUX, CTL => cs_0_ENABLE, O => cs(0) ); cs_0_ENABLEINV : X_INV port map ( I => cs_0_TORGTS, O => cs_0_ENABLE ); cs_0_GTS_OR : X_BUF port map ( I => GTS, O => cs_0_TORGTS ); cs_0_OUTMUX_50 : X_BUF port map ( I => cs_0_OBUF, O => cs_0_OUTMUX ); cs_1_OBUF_51 : X_TRI port map ( I => cs_1_OUTMUX, CTL => cs_1_ENABLE, O => cs(1) ); cs_1_ENABLEINV : X_INV port map ( I => cs_1_TORGTS, O => cs_1_ENABLE ); cs_1_GTS_OR : X_BUF port map ( I => GTS, O => cs_1_TORGTS ); cs_1_OUTMUX_52 : X_BUF port map ( I => cs_1_OBUF, O => cs_1_OUTMUX ); cs_2_OBUF_53 : X_TRI port map ( I => cs_2_OUTMUX, CTL => cs_2_ENABLE, O => cs(2) ); cs_2_ENABLEINV : X_INV port map ( I => cs_2_TORGTS, O => cs_2_ENABLE ); cs_2_GTS_OR : X_BUF port map ( I => GTS, O => cs_2_TORGTS ); cs_2_OUTMUX_54 : X_BUF port map ( I => cs_2_OBUF, O => cs_2_OUTMUX ); cs_3_OBUF_55 : X_TRI port map ( I => cs_3_OUTMUX, CTL => cs_3_ENABLE, O => cs(3) ); cs_3_ENABLEINV : X_INV port map ( I => cs_3_TORGTS, O => cs_3_ENABLE ); cs_3_GTS_OR : X_BUF port map ( I => GTS, O => cs_3_TORGTS ); cs_3_OUTMUX_56 : X_BUF port map ( I => cs_3_OBUF, O => cs_3_OUTMUX ); cs_4_OBUF_57 : X_TRI port map ( I => cs_4_OUTMUX, CTL => cs_4_ENABLE, O => cs(4) ); cs_4_ENABLEINV : X_INV port map ( I => cs_4_TORGTS, O => cs_4_ENABLE ); cs_4_GTS_OR : X_BUF port map ( I => GTS, O => cs_4_TORGTS ); cs_4_OUTMUX_58 : X_BUF port map ( I => cs_4_OBUF, O => cs_4_OUTMUX ); cs_5_OBUF_59 : X_TRI port map ( I => cs_5_OUTMUX, CTL => cs_5_ENABLE, O => cs(5) ); cs_5_ENABLEINV : X_INV port map ( I => cs_5_TORGTS, O => cs_5_ENABLE ); cs_5_GTS_OR : X_BUF port map ( I => GTS, O => cs_5_TORGTS ); cs_5_OUTMUX_60 : X_BUF port map ( I => cs_5_OBUF, O => cs_5_OUTMUX ); cs_6_OBUF_61 : X_TRI port map ( I => cs_6_OUTMUX, CTL => cs_6_ENABLE, O => cs(6) ); cs_6_ENABLEINV : X_INV port map ( I => cs_6_TORGTS, O => cs_6_ENABLE ); cs_6_GTS_OR : X_BUF port map ( I => GTS, O => cs_6_TORGTS ); cs_6_OUTMUX_62 : X_BUF port map ( I => cs_6_OBUF, O => cs_6_OUTMUX ); cs_7_OBUF_63 : X_TRI port map ( I => cs_7_OUTMUX, CTL => cs_7_ENABLE, O => cs(7) ); cs_7_ENABLEINV : X_INV port map ( I => cs_7_TORGTS, O => cs_7_ENABLE ); cs_7_GTS_OR : X_BUF port map ( I => GTS, O => cs_7_TORGTS ); cs_7_OUTMUX_64 : X_BUF port map ( I => cs_7_OBUF, O => cs_7_OUTMUX ); cs_8_OBUF_65 : X_TRI port map ( I => cs_8_OUTMUX, CTL => cs_8_ENABLE, O => cs(8) ); cs_8_ENABLEINV : X_INV port map ( I => cs_8_TORGTS, O => cs_8_ENABLE ); cs_8_GTS_OR : X_BUF port map ( I => GTS, O => cs_8_TORGTS ); cs_8_OUTMUX_66 : X_BUF port map ( I => cs_8_OBUF, O => cs_8_OUTMUX ); cs_9_OBUF_67 : X_TRI port map ( I => cs_9_OUTMUX, CTL => cs_9_ENABLE, O => cs(9) ); cs_9_ENABLEINV : X_INV port map ( I => cs_9_TORGTS, O => cs_9_ENABLE ); cs_9_GTS_OR : X_BUF port map ( I => GTS, O => cs_9_TORGTS ); cs_9_OUTMUX_68 : X_BUF port map ( I => cs_9_OBUF, O => cs_9_OUTMUX ); reg_select24 : X_LUT4 generic map( INIT => X"0404" ) port map ( ADR0 => adr_bus_15_IBUF, ADR1 => adr_bus_8_IBUF, ADR2 => AEN_IBUF, ADR3 => VCC, O => CHOICE45_FROM ); reg_select32_SW0 : X_LUT4 generic map( INIT => X"FEFF" ) port map ( ADR0 => adr_bus_14_IBUF, ADR1 => adr_bus_12_IBUF, ADR2 => adr_bus_13_IBUF, ADR3 => CHOICE45, O => CHOICE45_GROM ); CHOICE45_XUSED : X_BUF port map ( I => CHOICE45_FROM, O => CHOICE45 ); CHOICE45_YUSED : X_BUF port map ( I => CHOICE45_GROM, O => N5267 ); Q_n00031 : X_LUT4 generic map( INIT => X"000C" ) port map ( ADR0 => VCC, ADR1 => IOW_IBUF, ADR2 => IOR_IBUF, ADR3 => AEN_IBUF, O => rw_OBUF_FROM ); Q_n00021 : X_LUT4 generic map( INIT => X"FF88" ) port map ( ADR0 => IOW_IBUF, ADR1 => IOR_IBUF, ADR2 => VCC, ADR3 => AEN_IBUF, O => rw_OBUF_GROM ); rw_OBUF_XUSED : X_BUF port map ( I => rw_OBUF_FROM, O => rw_OBUF ); rw_OBUF_YUSED : X_BUF port map ( I => rw_OBUF_GROM, O => clk_OBUF ); dadrL_BU1363 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N9241, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N9242, O => cs_122_OBUF_GROM ); cs_122_OBUF_YUSED : X_BUF port map ( I => cs_122_OBUF_GROM, O => cs_122_OBUF ); dadrL_BU1275 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N8673, ADR1 => reg_select, ADR2 => dadrL_N8674, ADR3 => VCC, O => cs_114_OBUF_GROM ); cs_114_OBUF_YUSED : X_BUF port map ( I => cs_114_OBUF_GROM, O => cs_114_OBUF ); dadrL_BU1187 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N8105, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N8106, O => cs_106_OBUF_GROM ); cs_106_OBUF_YUSED : X_BUF port map ( I => cs_106_OBUF_GROM, O => cs_106_OBUF ); dadrL_BU1099 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N7537, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N7538, O => cs_98_OBUF_GROM ); cs_98_OBUF_YUSED : X_BUF port map ( I => cs_98_OBUF_GROM, O => cs_98_OBUF ); dadrL_BU2309 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N15347, ADR1 => dadrL_N15348, ADR2 => VCC, ADR3 => reg_select, O => cs_208_OBUF_GROM ); cs_208_OBUF_YUSED : X_BUF port map ( I => cs_208_OBUF_GROM, O => cs_208_OBUF ); dadrL_BU1605 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N10804, ADR1 => VCC, ADR2 => dadrL_N10803, ADR3 => reg_select, O => cs_144_OBUF_GROM ); cs_144_OBUF_YUSED : X_BUF port map ( I => cs_144_OBUF_GROM, O => cs_144_OBUF ); dadrL_BU1517 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N10235, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N10236, O => cs_136_OBUF_GROM ); cs_136_OBUF_YUSED : X_BUF port map ( I => cs_136_OBUF_GROM, O => cs_136_OBUF ); dadrL_BU1429 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N9667, ADR3 => dadrL_N9668, O => cs_128_OBUF_GROM ); cs_128_OBUF_YUSED : X_BUF port map ( I => cs_128_OBUF_GROM, O => cs_128_OBUF ); dadrL_BU2430 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => reg_select, ADR1 => dadrL_N16129, ADR2 => VCC, ADR3 => dadrL_N16128, O => cs_219_OBUF_GROM ); cs_219_OBUF_YUSED : X_BUF port map ( I => cs_219_OBUF_GROM, O => cs_219_OBUF ); dadrL_BU2342 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N15560, ADR3 => dadrL_N15561, O => cs_211_OBUF_GROM ); cs_211_OBUF_YUSED : X_BUF port map ( I => cs_211_OBUF_GROM, O => cs_211_OBUF ); dadrL_BU2254 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N14993, ADR3 => dadrL_N14992, O => cs_203_OBUF_GROM ); cs_203_OBUF_YUSED : X_BUF port map ( I => cs_203_OBUF_GROM, O => cs_203_OBUF ); dadrL_BU2166 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N14424, ADR1 => dadrL_N14425, ADR2 => VCC, ADR3 => reg_select, O => cs_195_OBUF_GROM ); cs_195_OBUF_YUSED : X_BUF port map ( I => cs_195_OBUF_GROM, O => cs_195_OBUF ); dadrL_BU2078 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N13856, ADR1 => dadrL_N13857, ADR2 => VCC, ADR3 => reg_select, O => cs_187_OBUF_GROM ); cs_187_OBUF_YUSED : X_BUF port map ( I => cs_187_OBUF_GROM, O => cs_187_OBUF ); dadrL_BU1550 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N10448, ADR1 => dadrL_N10449, ADR2 => VCC, ADR3 => reg_select, O => cs_139_OBUF_GROM ); cs_139_OBUF_YUSED : X_BUF port map ( I => cs_139_OBUF_GROM, O => cs_139_OBUF ); dadrL_BU1462 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N9880, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N9881, O => cs_131_OBUF_GROM ); cs_131_OBUF_YUSED : X_BUF port map ( I => cs_131_OBUF_GROM, O => cs_131_OBUF ); dadrL_BU1374 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N9313, ADR1 => dadrL_N9312, ADR2 => reg_select, ADR3 => VCC, O => cs_123_OBUF_GROM ); cs_123_OBUF_YUSED : X_BUF port map ( I => cs_123_OBUF_GROM, O => cs_123_OBUF ); dadrL_BU1286 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => reg_select, ADR1 => dadrL_N8745, ADR2 => VCC, ADR3 => dadrL_N8744, O => cs_115_OBUF_GROM ); cs_115_OBUF_YUSED : X_BUF port map ( I => cs_115_OBUF_GROM, O => cs_115_OBUF ); dadrL_BU1198 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N8176, ADR1 => dadrL_N8177, ADR2 => reg_select, ADR3 => VCC, O => cs_107_OBUF_GROM ); cs_107_OBUF_YUSED : X_BUF port map ( I => cs_107_OBUF_GROM, O => cs_107_OBUF ); dadrL_BU2408 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N15987, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N15986, O => cs_217_OBUF_GROM ); cs_217_OBUF_YUSED : X_BUF port map ( I => cs_217_OBUF_GROM, O => cs_217_OBUF ); dadrL_BU1704 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N11442, ADR1 => reg_select, ADR2 => dadrL_N11443, ADR3 => VCC, O => cs_153_OBUF_GROM ); cs_153_OBUF_YUSED : X_BUF port map ( I => cs_153_OBUF_GROM, O => cs_153_OBUF ); dadrL_BU1616 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N10874, ADR3 => dadrL_N10875, O => cs_145_OBUF_GROM ); cs_145_OBUF_YUSED : X_BUF port map ( I => cs_145_OBUF_GROM, O => cs_145_OBUF ); dadrL_BU1528 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N10306, ADR3 => dadrL_N10307, O => cs_137_OBUF_GROM ); cs_137_OBUF_YUSED : X_BUF port map ( I => cs_137_OBUF_GROM, O => cs_137_OBUF ); dadrL_BU2441 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N16199, ADR1 => dadrL_N16200, ADR2 => VCC, ADR3 => reg_select, O => cs_220_OBUF_GROM ); cs_220_OBUF_YUSED : X_BUF port map ( I => cs_220_OBUF_GROM, O => cs_220_OBUF ); dadrL_BU2353 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N15632, ADR1 => dadrL_N15631, ADR2 => reg_select, ADR3 => VCC, O => cs_212_OBUF_GROM ); cs_212_OBUF_YUSED : X_BUF port map ( I => cs_212_OBUF_GROM, O => cs_212_OBUF ); dadrL_BU2265 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N15064, ADR1 => dadrL_N15063, ADR2 => VCC, ADR3 => reg_select, O => cs_204_OBUF_GROM ); cs_204_OBUF_YUSED : X_BUF port map ( I => cs_204_OBUF_GROM, O => cs_204_OBUF ); dadrL_BU2177 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N14495, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N14496, O => cs_196_OBUF_GROM ); cs_196_OBUF_YUSED : X_BUF port map ( I => cs_196_OBUF_GROM, O => cs_196_OBUF ); dadrL_BU2089 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N13927, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N13928, O => cs_188_OBUF_GROM ); cs_188_OBUF_YUSED : X_BUF port map ( I => cs_188_OBUF_GROM, O => cs_188_OBUF ); dadrL_BU1561 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => reg_select, ADR1 => dadrL_N10520, ADR2 => dadrL_N10519, ADR3 => VCC, O => cs_140_OBUF_GROM ); cs_140_OBUF_YUSED : X_BUF port map ( I => cs_140_OBUF_GROM, O => cs_140_OBUF ); dadrL_BU1473 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N9952, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N9951, O => cs_132_OBUF_GROM ); cs_132_OBUF_YUSED : X_BUF port map ( I => cs_132_OBUF_GROM, O => cs_132_OBUF ); dadrL_BU1385 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N9383, ADR1 => VCC, ADR2 => dadrL_N9384, ADR3 => reg_select, O => cs_124_OBUF_GROM ); cs_124_OBUF_YUSED : X_BUF port map ( I => cs_124_OBUF_GROM, O => cs_124_OBUF ); dadrL_BU1297 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N8816, ADR1 => reg_select, ADR2 => dadrL_N8815, ADR3 => VCC, O => cs_116_OBUF_GROM ); cs_116_OBUF_YUSED : X_BUF port map ( I => cs_116_OBUF_GROM, O => cs_116_OBUF ); dadrL_BU2507 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N16626, ADR1 => dadrL_N16625, ADR2 => VCC, ADR3 => reg_select, O => cs_226_OBUF_GROM ); cs_226_OBUF_YUSED : X_BUF port map ( I => cs_226_OBUF_GROM, O => cs_226_OBUF ); dadrL_BU2419 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N16057, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N16058, O => cs_218_OBUF_GROM ); cs_218_OBUF_YUSED : X_BUF port map ( I => cs_218_OBUF_GROM, O => cs_218_OBUF ); dadrL_BU1803 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N12082, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N12081, O => cs_162_OBUF_GROM ); cs_162_OBUF_YUSED : X_BUF port map ( I => cs_162_OBUF_GROM, O => cs_162_OBUF ); dadrL_BU1715 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N11514, ADR1 => dadrL_N11513, ADR2 => reg_select, ADR3 => VCC, O => cs_154_OBUF_GROM ); cs_154_OBUF_YUSED : X_BUF port map ( I => cs_154_OBUF_GROM, O => cs_154_OBUF ); dadrL_BU1627 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N10945, ADR1 => dadrL_N10946, ADR2 => reg_select, ADR3 => VCC, O => cs_146_OBUF_GROM ); cs_146_OBUF_YUSED : X_BUF port map ( I => cs_146_OBUF_GROM, O => cs_146_OBUF ); dadrL_BU1539 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N10377, ADR1 => dadrL_N10378, ADR2 => reg_select, ADR3 => VCC, O => cs_138_OBUF_GROM ); cs_138_OBUF_YUSED : X_BUF port map ( I => cs_138_OBUF_GROM, O => cs_138_OBUF ); dadrL_BU2540 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N16839, ADR1 => reg_select, ADR2 => dadrL_N16838, ADR3 => VCC, O => cs_229_OBUF_GROM ); cs_229_OBUF_YUSED : X_BUF port map ( I => cs_229_OBUF_GROM, O => cs_229_OBUF ); dadrL_BU2452 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N16271, ADR1 => VCC, ADR2 => dadrL_N16270, ADR3 => reg_select, O => cs_221_OBUF_GROM ); cs_221_OBUF_YUSED : X_BUF port map ( I => cs_221_OBUF_GROM, O => cs_221_OBUF ); dadrL_BU2364 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N15702, ADR1 => reg_select, ADR2 => dadrL_N15703, ADR3 => VCC, O => cs_213_OBUF_GROM ); cs_213_OBUF_YUSED : X_BUF port map ( I => cs_213_OBUF_GROM, O => cs_213_OBUF ); dadrL_BU2276 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N15134, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N15135, O => cs_205_OBUF_GROM ); cs_205_OBUF_YUSED : X_BUF port map ( I => cs_205_OBUF_GROM, O => cs_205_OBUF ); dadrL_BU2188 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N14566, ADR1 => dadrL_N14567, ADR2 => VCC, ADR3 => reg_select, O => cs_197_OBUF_GROM ); cs_197_OBUF_YUSED : X_BUF port map ( I => cs_197_OBUF_GROM, O => cs_197_OBUF ); dadrL_BU1660 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N11159, ADR1 => VCC, ADR2 => dadrL_N11158, ADR3 => reg_select, O => cs_149_OBUF_GROM ); cs_149_OBUF_YUSED : X_BUF port map ( I => cs_149_OBUF_GROM, O => cs_149_OBUF ); dadrL_BU1572 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N10590, ADR3 => dadrL_N10591, O => cs_141_OBUF_GROM ); cs_141_OBUF_YUSED : X_BUF port map ( I => cs_141_OBUF_GROM, O => cs_141_OBUF ); dadrL_BU1484 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N10022, ADR1 => reg_select, ADR2 => dadrL_N10023, ADR3 => VCC, O => cs_133_OBUF_GROM ); cs_133_OBUF_YUSED : X_BUF port map ( I => cs_133_OBUF_GROM, O => cs_133_OBUF ); dadrL_BU1396 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N9454, ADR1 => dadrL_N9455, ADR2 => VCC, ADR3 => reg_select, O => cs_125_OBUF_GROM ); cs_125_OBUF_YUSED : X_BUF port map ( I => cs_125_OBUF_GROM, O => cs_125_OBUF ); dadrL_BU2606 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N17264, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N17265, O => cs_235_OBUF_GROM ); cs_235_OBUF_YUSED : X_BUF port map ( I => cs_235_OBUF_GROM, O => cs_235_OBUF ); dadrL_BU2518 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N16696, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N16697, O => cs_227_OBUF_GROM ); cs_227_OBUF_YUSED : X_BUF port map ( I => cs_227_OBUF_GROM, O => cs_227_OBUF ); dadrL_BU1902 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N12720, ADR1 => dadrL_N12721, ADR2 => VCC, ADR3 => reg_select, O => cs_171_OBUF_GROM ); cs_171_OBUF_YUSED : X_BUF port map ( I => cs_171_OBUF_GROM, O => cs_171_OBUF ); dadrL_BU1814 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N12152, ADR3 => dadrL_N12153, O => cs_163_OBUF_GROM ); cs_163_OBUF_YUSED : X_BUF port map ( I => cs_163_OBUF_GROM, O => cs_163_OBUF ); dadrL_BU1726 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N11585, ADR1 => reg_select, ADR2 => dadrL_N11584, ADR3 => VCC, O => cs_155_OBUF_GROM ); cs_155_OBUF_YUSED : X_BUF port map ( I => cs_155_OBUF_GROM, O => cs_155_OBUF ); dadrL_BU1638 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N11017, ADR1 => reg_select, ADR2 => dadrL_N11016, ADR3 => VCC, O => cs_147_OBUF_GROM ); cs_147_OBUF_YUSED : X_BUF port map ( I => cs_147_OBUF_GROM, O => cs_147_OBUF ); dadrL_BU2551 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N16909, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N16910, O => cs_230_OBUF_GROM ); cs_230_OBUF_YUSED : X_BUF port map ( I => cs_230_OBUF_GROM, O => cs_230_OBUF ); dadrL_BU2463 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N16342, ADR1 => dadrL_N16341, ADR2 => VCC, ADR3 => reg_select, O => cs_222_OBUF_GROM ); cs_222_OBUF_YUSED : X_BUF port map ( I => cs_222_OBUF_GROM, O => cs_222_OBUF ); dadrL_BU2375 : X_LUT4 generic map( INIT => X"C000" ) port map ( ADR0 => VCC, ADR1 => dadrL_N15773, ADR2 => reg_select, ADR3 => dadrL_N15774, O => cs_214_OBUF_GROM ); cs_214_OBUF_YUSED : X_BUF port map ( I => cs_214_OBUF_GROM, O => cs_214_OBUF ); dadrL_BU2287 : X_LUT4 generic map( INIT => X"C000" ) port map ( ADR0 => VCC, ADR1 => dadrL_N15206, ADR2 => reg_select, ADR3 => dadrL_N15205, O => cs_206_OBUF_GROM ); cs_206_OBUF_YUSED : X_BUF port map ( I => cs_206_OBUF_GROM, O => cs_206_OBUF ); dadrL_BU2199 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N14638, ADR1 => dadrL_N14637, ADR2 => VCC, ADR3 => reg_select, O => cs_198_OBUF_GROM ); cs_198_OBUF_YUSED : X_BUF port map ( I => cs_198_OBUF_GROM, O => cs_198_OBUF ); dadrL_BU1671 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N11229, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N11230, O => cs_150_OBUF_GROM ); cs_150_OBUF_YUSED : X_BUF port map ( I => cs_150_OBUF_GROM, O => cs_150_OBUF ); dadrL_BU1583 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N10661, ADR1 => dadrL_N10662, ADR2 => VCC, ADR3 => reg_select, O => cs_142_OBUF_GROM ); cs_142_OBUF_YUSED : X_BUF port map ( I => cs_142_OBUF_GROM, O => cs_142_OBUF ); dadrL_BU1495 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N10094, ADR1 => dadrL_N10093, ADR2 => VCC, ADR3 => reg_select, O => cs_134_OBUF_GROM ); cs_134_OBUF_YUSED : X_BUF port map ( I => cs_134_OBUF_GROM, O => cs_134_OBUF ); dadrL_BU2705 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N17904, ADR3 => dadrL_N17903, O => cs_244_OBUF_GROM ); cs_244_OBUF_YUSED : X_BUF port map ( I => cs_244_OBUF_GROM, O => cs_244_OBUF ); dadrL_BU2617 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N17335, ADR3 => dadrL_N17336, O => cs_236_OBUF_GROM ); cs_236_OBUF_YUSED : X_BUF port map ( I => cs_236_OBUF_GROM, O => cs_236_OBUF ); dadrL_BU2529 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N16767, ADR1 => dadrL_N16768, ADR2 => VCC, ADR3 => reg_select, O => cs_228_OBUF_GROM ); cs_228_OBUF_YUSED : X_BUF port map ( I => cs_228_OBUF_GROM, O => cs_228_OBUF ); dadrL_BU1913 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N12792, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N12791, O => cs_172_OBUF_GROM ); cs_172_OBUF_YUSED : X_BUF port map ( I => cs_172_OBUF_GROM, O => cs_172_OBUF ); dadrL_BU1825 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N12224, ADR1 => dadrL_N12223, ADR2 => VCC, ADR3 => reg_select, O => cs_164_OBUF_GROM ); cs_164_OBUF_YUSED : X_BUF port map ( I => cs_164_OBUF_GROM, O => cs_164_OBUF ); dadrL_BU1737 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => reg_select, ADR1 => dadrL_N11656, ADR2 => VCC, ADR3 => dadrL_N11655, O => cs_156_OBUF_GROM ); cs_156_OBUF_YUSED : X_BUF port map ( I => cs_156_OBUF_GROM, O => cs_156_OBUF ); dadrL_BU1649 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N11087, ADR1 => dadrL_N11088, ADR2 => VCC, ADR3 => reg_select, O => cs_148_OBUF_GROM ); cs_148_OBUF_YUSED : X_BUF port map ( I => cs_148_OBUF_GROM, O => cs_148_OBUF ); dadrL_BU2650 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N17548, ADR1 => dadrL_N17549, ADR2 => VCC, ADR3 => reg_select, O => cs_239_OBUF_GROM ); cs_239_OBUF_YUSED : X_BUF port map ( I => cs_239_OBUF_GROM, O => cs_239_OBUF ); dadrL_BU2562 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N16980, ADR1 => dadrL_N16981, ADR2 => reg_select, ADR3 => VCC, O => cs_231_OBUF_GROM ); cs_231_OBUF_YUSED : X_BUF port map ( I => cs_231_OBUF_GROM, O => cs_231_OBUF ); dadrL_BU2474 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N16413, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N16412, O => cs_223_OBUF_GROM ); cs_223_OBUF_YUSED : X_BUF port map ( I => cs_223_OBUF_GROM, O => cs_223_OBUF ); dadrL_BU2386 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N15845, ADR1 => reg_select, ADR2 => dadrL_N15844, ADR3 => VCC, O => cs_215_OBUF_GROM ); cs_215_OBUF_YUSED : X_BUF port map ( I => cs_215_OBUF_GROM, O => cs_215_OBUF ); dadrL_BU2298 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N15277, ADR1 => reg_select, ADR2 => dadrL_N15276, ADR3 => VCC, O => cs_207_OBUF_GROM ); cs_207_OBUF_YUSED : X_BUF port map ( I => cs_207_OBUF_GROM, O => cs_207_OBUF ); dadrL_BU1770 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N11869, ADR1 => VCC, ADR2 => dadrL_N11868, ADR3 => reg_select, O => cs_159_OBUF_GROM ); cs_159_OBUF_YUSED : X_BUF port map ( I => cs_159_OBUF_GROM, O => cs_159_OBUF ); dadrL_BU1682 : X_LUT4 generic map( INIT => X"C000" ) port map ( ADR0 => VCC, ADR1 => reg_select, ADR2 => dadrL_N11301, ADR3 => dadrL_N11300, O => cs_151_OBUF_GROM ); cs_151_OBUF_YUSED : X_BUF port map ( I => cs_151_OBUF_GROM, O => cs_151_OBUF ); dadrL_BU1594 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N10733, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N10732, O => cs_143_OBUF_GROM ); cs_143_OBUF_YUSED : X_BUF port map ( I => cs_143_OBUF_GROM, O => cs_143_OBUF ); dadrL_BU2804 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N18543, ADR1 => dadrL_N18542, ADR2 => VCC, ADR3 => reg_select, O => cs_253_OBUF_GROM ); cs_253_OBUF_YUSED : X_BUF port map ( I => cs_253_OBUF_GROM, O => cs_253_OBUF ); dadrL_BU2716 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N17974, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N17975, O => cs_245_OBUF_GROM ); cs_245_OBUF_YUSED : X_BUF port map ( I => cs_245_OBUF_GROM, O => cs_245_OBUF ); dadrL_BU2628 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N17406, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N17407, O => cs_237_OBUF_GROM ); cs_237_OBUF_YUSED : X_BUF port map ( I => cs_237_OBUF_GROM, O => cs_237_OBUF ); dadrL_BU1924 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N12863, ADR1 => dadrL_N12862, ADR2 => reg_select, ADR3 => VCC, O => cs_173_OBUF_GROM ); cs_173_OBUF_YUSED : X_BUF port map ( I => cs_173_OBUF_GROM, O => cs_173_OBUF ); dadrL_BU1836 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N12294, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N12295, O => cs_165_OBUF_GROM ); cs_165_OBUF_YUSED : X_BUF port map ( I => cs_165_OBUF_GROM, O => cs_165_OBUF ); dadrL_BU1748 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N11727, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N11726, O => cs_157_OBUF_GROM ); cs_157_OBUF_YUSED : X_BUF port map ( I => cs_157_OBUF_GROM, O => cs_157_OBUF ); dadrL_BU2661 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N17620, ADR1 => reg_select, ADR2 => dadrL_N17619, ADR3 => VCC, O => cs_240_OBUF_GROM ); cs_240_OBUF_YUSED : X_BUF port map ( I => cs_240_OBUF_GROM, O => cs_240_OBUF ); dadrL_BU2573 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N17051, ADR1 => reg_select, ADR2 => dadrL_N17052, ADR3 => VCC, O => cs_232_OBUF_GROM ); cs_232_OBUF_YUSED : X_BUF port map ( I => cs_232_OBUF_GROM, O => cs_232_OBUF ); dadrL_BU2485 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N16484, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N16483, O => cs_224_OBUF_GROM ); cs_224_OBUF_YUSED : X_BUF port map ( I => cs_224_OBUF_GROM, O => cs_224_OBUF ); dadrL_BU2397 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N15916, ADR1 => dadrL_N15915, ADR2 => VCC, ADR3 => reg_select, O => cs_216_OBUF_GROM ); cs_216_OBUF_YUSED : X_BUF port map ( I => cs_216_OBUF_GROM, O => cs_216_OBUF ); dadrL_BU1781 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => reg_select, ADR1 => dadrL_N11940, ADR2 => VCC, ADR3 => dadrL_N11939, O => cs_160_OBUF_GROM ); cs_160_OBUF_YUSED : X_BUF port map ( I => cs_160_OBUF_GROM, O => cs_160_OBUF ); dadrL_BU1693 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => reg_select, ADR1 => dadrL_N11371, ADR2 => VCC, ADR3 => dadrL_N11372, O => cs_152_OBUF_GROM ); cs_152_OBUF_YUSED : X_BUF port map ( I => cs_152_OBUF_GROM, O => cs_152_OBUF ); dadrL_BU2815 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N18613, ADR1 => reg_select, ADR2 => dadrL_N18614, ADR3 => VCC, O => cs_254_OBUF_GROM ); cs_254_OBUF_YUSED : X_BUF port map ( I => cs_254_OBUF_GROM, O => cs_254_OBUF ); dadrL_BU2727 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N18046, ADR1 => VCC, ADR2 => dadrL_N18045, ADR3 => reg_select, O => cs_246_OBUF_GROM ); cs_246_OBUF_YUSED : X_BUF port map ( I => cs_246_OBUF_GROM, O => cs_246_OBUF ); dadrL_BU2639 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N17477, ADR3 => dadrL_N17478, O => cs_238_OBUF_GROM ); cs_238_OBUF_YUSED : X_BUF port map ( I => cs_238_OBUF_GROM, O => cs_238_OBUF ); dadrL_BU1935 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N12933, ADR1 => reg_select, ADR2 => dadrL_N12934, ADR3 => VCC, O => cs_174_OBUF_GROM ); cs_174_OBUF_YUSED : X_BUF port map ( I => cs_174_OBUF_GROM, O => cs_174_OBUF ); dadrL_BU1847 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N12366, ADR1 => reg_select, ADR2 => dadrL_N12365, ADR3 => VCC, O => cs_166_OBUF_GROM ); cs_166_OBUF_YUSED : X_BUF port map ( I => cs_166_OBUF_GROM, O => cs_166_OBUF ); dadrL_BU1759 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N11797, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N11798, O => cs_158_OBUF_GROM ); cs_158_OBUF_YUSED : X_BUF port map ( I => cs_158_OBUF_GROM, O => cs_158_OBUF ); dadrL_BU120 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N1218, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N1219, O => cs_9_OBUF_GROM ); cs_9_OBUF_YUSED : X_BUF port map ( I => cs_9_OBUF_GROM, O => cs_9_OBUF ); dadrL_BU2760 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N18258, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N18259, O => cs_249_OBUF_GROM ); cs_249_OBUF_YUSED : X_BUF port map ( I => cs_249_OBUF_GROM, O => cs_249_OBUF ); dadrL_BU2672 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => reg_select, ADR1 => dadrL_N17691, ADR2 => VCC, ADR3 => dadrL_N17690, O => cs_241_OBUF_GROM ); cs_241_OBUF_YUSED : X_BUF port map ( I => cs_241_OBUF_GROM, O => cs_241_OBUF ); dadrL_BU2584 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N17123, ADR1 => dadrL_N17122, ADR2 => VCC, ADR3 => reg_select, O => cs_233_OBUF_GROM ); cs_233_OBUF_YUSED : X_BUF port map ( I => cs_233_OBUF_GROM, O => cs_233_OBUF ); dadrL_BU2496 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N16554, ADR3 => dadrL_N16555, O => cs_225_OBUF_GROM ); cs_225_OBUF_YUSED : X_BUF port map ( I => cs_225_OBUF_GROM, O => cs_225_OBUF ); dadrL_BU1880 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N12578, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N12579, O => cs_169_OBUF_GROM ); cs_169_OBUF_YUSED : X_BUF port map ( I => cs_169_OBUF_GROM, O => cs_169_OBUF ); dadrL_BU1792 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N12010, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N12011, O => cs_161_OBUF_GROM ); cs_161_OBUF_YUSED : X_BUF port map ( I => cs_161_OBUF_GROM, O => cs_161_OBUF ); dadrL_BU2826 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N18684, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N18685, O => cs_255_OBUF_GROM ); cs_255_OBUF_YUSED : X_BUF port map ( I => cs_255_OBUF_GROM, O => cs_255_OBUF ); dadrL_BU2738 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => reg_select, ADR1 => dadrL_N18116, ADR2 => VCC, ADR3 => dadrL_N18117, O => cs_247_OBUF_GROM ); cs_247_OBUF_YUSED : X_BUF port map ( I => cs_247_OBUF_GROM, O => cs_247_OBUF ); dadrL_BU1946 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N13004, ADR1 => dadrL_N13005, ADR2 => reg_select, ADR3 => VCC, O => cs_175_OBUF_GROM ); cs_175_OBUF_YUSED : X_BUF port map ( I => cs_175_OBUF_GROM, O => cs_175_OBUF ); dadrL_BU1858 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N12436, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N12437, O => cs_167_OBUF_GROM ); cs_167_OBUF_YUSED : X_BUF port map ( I => cs_167_OBUF_GROM, O => cs_167_OBUF ); dadrL_BU131 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N1289, ADR1 => dadrL_N1290, ADR2 => reg_select, ADR3 => VCC, O => cs_10_OBUF_GROM ); cs_10_OBUF_YUSED : X_BUF port map ( I => cs_10_OBUF_GROM, O => cs_10_OBUF ); dadrL_BU2771 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N18330, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N18329, O => cs_250_OBUF_GROM ); cs_250_OBUF_YUSED : X_BUF port map ( I => cs_250_OBUF_GROM, O => cs_250_OBUF ); dadrL_BU2683 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N17761, ADR1 => VCC, ADR2 => dadrL_N17762, ADR3 => reg_select, O => cs_242_OBUF_GROM ); cs_242_OBUF_YUSED : X_BUF port map ( I => cs_242_OBUF_GROM, O => cs_242_OBUF ); dadrL_BU2595 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N17194, ADR3 => dadrL_N17193, O => cs_234_OBUF_GROM ); cs_234_OBUF_YUSED : X_BUF port map ( I => cs_234_OBUF_GROM, O => cs_234_OBUF ); dadrL_BU1891 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N12649, ADR3 => dadrL_N12650, O => cs_170_OBUF_GROM ); cs_170_OBUF_YUSED : X_BUF port map ( I => cs_170_OBUF_GROM, O => cs_170_OBUF ); dadrL_BU109 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N1147, ADR1 => dadrL_N1148, ADR2 => VCC, ADR3 => reg_select, O => cs_8_OBUF_GROM ); cs_8_OBUF_YUSED : X_BUF port map ( I => cs_8_OBUF_GROM, O => cs_8_OBUF ); dadrL_BU2749 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N18187, ADR1 => VCC, ADR2 => dadrL_N18188, ADR3 => reg_select, O => cs_248_OBUF_GROM ); cs_248_OBUF_YUSED : X_BUF port map ( I => cs_248_OBUF_GROM, O => cs_248_OBUF ); dadrL_BU1957 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N13076, ADR1 => VCC, ADR2 => dadrL_N13075, ADR3 => reg_select, O => cs_176_OBUF_GROM ); cs_176_OBUF_YUSED : X_BUF port map ( I => cs_176_OBUF_GROM, O => cs_176_OBUF ); dadrL_BU1869 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N12508, ADR1 => reg_select, ADR2 => dadrL_N12507, ADR3 => VCC, O => cs_168_OBUF_GROM ); cs_168_OBUF_YUSED : X_BUF port map ( I => cs_168_OBUF_GROM, O => cs_168_OBUF ); dadrL_BU230 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N1929, ADR3 => dadrL_N1928, O => cs_19_OBUF_GROM ); cs_19_OBUF_YUSED : X_BUF port map ( I => cs_19_OBUF_GROM, O => cs_19_OBUF ); dadrL_BU142 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N1360, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N1361, O => cs_11_OBUF_GROM ); cs_11_OBUF_YUSED : X_BUF port map ( I => cs_11_OBUF_GROM, O => cs_11_OBUF ); dadrL_BU2782 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N18400, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N18401, O => cs_251_OBUF_GROM ); cs_251_OBUF_YUSED : X_BUF port map ( I => cs_251_OBUF_GROM, O => cs_251_OBUF ); dadrL_BU2694 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N17833, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N17832, O => cs_243_OBUF_GROM ); cs_243_OBUF_YUSED : X_BUF port map ( I => cs_243_OBUF_GROM, O => cs_243_OBUF ); dadrL_BU1990 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N13288, ADR3 => dadrL_N13289, O => cs_179_OBUF_GROM ); cs_179_OBUF_YUSED : X_BUF port map ( I => cs_179_OBUF_GROM, O => cs_179_OBUF ); dadrL_BU208 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N1786, ADR3 => dadrL_N1787, O => cs_17_OBUF_GROM ); cs_17_OBUF_YUSED : X_BUF port map ( I => cs_17_OBUF_GROM, O => cs_17_OBUF ); dadrL_BU1968 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N13146, ADR1 => dadrL_N13147, ADR2 => VCC, ADR3 => reg_select, O => cs_177_OBUF_GROM ); cs_177_OBUF_YUSED : X_BUF port map ( I => cs_177_OBUF_GROM, O => cs_177_OBUF ); dadrL_BU241 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N1999, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N2000, O => cs_20_OBUF_GROM ); cs_20_OBUF_YUSED : X_BUF port map ( I => cs_20_OBUF_GROM, O => cs_20_OBUF ); dadrL_BU153 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N1432, ADR1 => dadrL_N1431, ADR2 => reg_select, ADR3 => VCC, O => cs_12_OBUF_GROM ); cs_12_OBUF_YUSED : X_BUF port map ( I => cs_12_OBUF_GROM, O => cs_12_OBUF ); dadrL_BU2793 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N18472, ADR3 => dadrL_N18471, O => cs_252_OBUF_GROM ); cs_252_OBUF_YUSED : X_BUF port map ( I => cs_252_OBUF_GROM, O => cs_252_OBUF ); dadrL_BU307 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N2425, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N2426, O => cs_26_OBUF_GROM ); cs_26_OBUF_YUSED : X_BUF port map ( I => cs_26_OBUF_GROM, O => cs_26_OBUF ); dadrL_BU219 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N1857, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N1858, O => cs_18_OBUF_GROM ); cs_18_OBUF_YUSED : X_BUF port map ( I => cs_18_OBUF_GROM, O => cs_18_OBUF ); dadrL_BU1979 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N13217, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N13218, O => cs_178_OBUF_GROM ); cs_178_OBUF_YUSED : X_BUF port map ( I => cs_178_OBUF_GROM, O => cs_178_OBUF ); dadrL_BU340 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N2638, ADR3 => dadrL_N2639, O => cs_29_OBUF_GROM ); cs_29_OBUF_YUSED : X_BUF port map ( I => cs_29_OBUF_GROM, O => cs_29_OBUF ); dadrL_BU252 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N2071, ADR3 => dadrL_N2070, O => cs_21_OBUF_GROM ); cs_21_OBUF_YUSED : X_BUF port map ( I => cs_21_OBUF_GROM, O => cs_21_OBUF ); dadrL_BU164 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N1502, ADR1 => VCC, ADR2 => dadrL_N1503, ADR3 => reg_select, O => cs_13_OBUF_GROM ); cs_13_OBUF_YUSED : X_BUF port map ( I => cs_13_OBUF_GROM, O => cs_13_OBUF ); dadrL_BU406 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N3064, ADR1 => dadrL_N3065, ADR2 => VCC, ADR3 => reg_select, O => cs_35_OBUF_GROM ); cs_35_OBUF_YUSED : X_BUF port map ( I => cs_35_OBUF_GROM, O => cs_35_OBUF ); dadrL_BU318 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N2497, ADR3 => dadrL_N2496, O => cs_27_OBUF_GROM ); cs_27_OBUF_YUSED : X_BUF port map ( I => cs_27_OBUF_GROM, O => cs_27_OBUF ); dadrL_BU351 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N2709, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N2710, O => cs_30_OBUF_GROM ); cs_30_OBUF_YUSED : X_BUF port map ( I => cs_30_OBUF_GROM, O => cs_30_OBUF ); dadrL_BU263 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N2142, ADR1 => dadrL_N2141, ADR2 => reg_select, ADR3 => VCC, O => cs_22_OBUF_GROM ); cs_22_OBUF_YUSED : X_BUF port map ( I => cs_22_OBUF_GROM, O => cs_22_OBUF ); dadrL_BU175 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N1574, ADR1 => dadrL_N1573, ADR2 => VCC, ADR3 => reg_select, O => cs_14_OBUF_GROM ); cs_14_OBUF_YUSED : X_BUF port map ( I => cs_14_OBUF_GROM, O => cs_14_OBUF ); dadrL_BU505 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N3703, ADR1 => VCC, ADR2 => dadrL_N3704, ADR3 => reg_select, O => cs_44_OBUF_GROM ); cs_44_OBUF_YUSED : X_BUF port map ( I => cs_44_OBUF_GROM, O => cs_44_OBUF ); dadrL_BU417 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N3135, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N3136, O => cs_36_OBUF_GROM ); cs_36_OBUF_YUSED : X_BUF port map ( I => cs_36_OBUF_GROM, O => cs_36_OBUF ); dadrL_BU329 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N2567, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N2568, O => cs_28_OBUF_GROM ); cs_28_OBUF_YUSED : X_BUF port map ( I => cs_28_OBUF_GROM, O => cs_28_OBUF ); dadrL_BU450 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N3348, ADR1 => dadrL_N3349, ADR2 => reg_select, ADR3 => VCC, O => cs_39_OBUF_GROM ); cs_39_OBUF_YUSED : X_BUF port map ( I => cs_39_OBUF_GROM, O => cs_39_OBUF ); dadrL_BU362 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N2780, ADR3 => dadrL_N2781, O => cs_31_OBUF_GROM ); cs_31_OBUF_YUSED : X_BUF port map ( I => cs_31_OBUF_GROM, O => cs_31_OBUF ); dadrL_BU274 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N2212, ADR1 => reg_select, ADR2 => dadrL_N2213, ADR3 => VCC, O => cs_23_OBUF_GROM ); cs_23_OBUF_YUSED : X_BUF port map ( I => cs_23_OBUF_GROM, O => cs_23_OBUF ); dadrL_BU186 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N1645, ADR3 => dadrL_N1644, O => cs_15_OBUF_GROM ); cs_15_OBUF_YUSED : X_BUF port map ( I => cs_15_OBUF_GROM, O => cs_15_OBUF ); dadrL_BU604 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N4343, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N4342, O => cs_53_OBUF_GROM ); cs_53_OBUF_YUSED : X_BUF port map ( I => cs_53_OBUF_GROM, O => cs_53_OBUF ); dadrL_BU516 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N3774, ADR1 => dadrL_N3775, ADR2 => VCC, ADR3 => reg_select, O => cs_45_OBUF_GROM ); cs_45_OBUF_YUSED : X_BUF port map ( I => cs_45_OBUF_GROM, O => cs_45_OBUF ); dadrL_BU428 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N3206, ADR1 => dadrL_N3207, ADR2 => VCC, ADR3 => reg_select, O => cs_37_OBUF_GROM ); cs_37_OBUF_YUSED : X_BUF port map ( I => cs_37_OBUF_GROM, O => cs_37_OBUF ); dadrL_BU461 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N3420, ADR1 => reg_select, ADR2 => dadrL_N3419, ADR3 => VCC, O => cs_40_OBUF_GROM ); cs_40_OBUF_YUSED : X_BUF port map ( I => cs_40_OBUF_GROM, O => cs_40_OBUF ); dadrL_BU373 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N2851, ADR1 => dadrL_N2852, ADR2 => VCC, ADR3 => reg_select, O => cs_32_OBUF_GROM ); cs_32_OBUF_YUSED : X_BUF port map ( I => cs_32_OBUF_GROM, O => cs_32_OBUF ); dadrL_BU285 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N2284, ADR1 => dadrL_N2283, ADR2 => VCC, ADR3 => reg_select, O => cs_24_OBUF_GROM ); cs_24_OBUF_YUSED : X_BUF port map ( I => cs_24_OBUF_GROM, O => cs_24_OBUF ); dadrL_BU197 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N1715, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N1716, O => cs_16_OBUF_GROM ); cs_16_OBUF_YUSED : X_BUF port map ( I => cs_16_OBUF_GROM, O => cs_16_OBUF ); dadrL_BU703 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N4982, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N4981, O => cs_62_OBUF_GROM ); cs_62_OBUF_YUSED : X_BUF port map ( I => cs_62_OBUF_GROM, O => cs_62_OBUF ); dadrL_BU615 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N4414, ADR3 => dadrL_N4413, O => cs_54_OBUF_GROM ); cs_54_OBUF_YUSED : X_BUF port map ( I => cs_54_OBUF_GROM, O => cs_54_OBUF ); dadrL_BU527 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N3845, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N3846, O => cs_46_OBUF_GROM ); cs_46_OBUF_YUSED : X_BUF port map ( I => cs_46_OBUF_GROM, O => cs_46_OBUF ); dadrL_BU439 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N3278, ADR1 => VCC, ADR2 => dadrL_N3277, ADR3 => reg_select, O => cs_38_OBUF_GROM ); cs_38_OBUF_YUSED : X_BUF port map ( I => cs_38_OBUF_GROM, O => cs_38_OBUF ); dadrL_BU560 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N4058, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N4059, O => cs_49_OBUF_GROM ); cs_49_OBUF_YUSED : X_BUF port map ( I => cs_49_OBUF_GROM, O => cs_49_OBUF ); dadrL_BU472 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N3490, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N3491, O => cs_41_OBUF_GROM ); cs_41_OBUF_YUSED : X_BUF port map ( I => cs_41_OBUF_GROM, O => cs_41_OBUF ); dadrL_BU384 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N2923, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N2922, O => cs_33_OBUF_GROM ); cs_33_OBUF_YUSED : X_BUF port map ( I => cs_33_OBUF_GROM, O => cs_33_OBUF ); dadrL_BU296 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N2355, ADR1 => reg_select, ADR2 => dadrL_N2354, ADR3 => VCC, O => cs_25_OBUF_GROM ); cs_25_OBUF_YUSED : X_BUF port map ( I => cs_25_OBUF_GROM, O => cs_25_OBUF ); dadrL_BU802 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N5620, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N5621, O => cs_71_OBUF_GROM ); cs_71_OBUF_YUSED : X_BUF port map ( I => cs_71_OBUF_GROM, O => cs_71_OBUF ); dadrL_BU714 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N5053, ADR1 => dadrL_N5052, ADR2 => reg_select, ADR3 => VCC, O => cs_63_OBUF_GROM ); cs_63_OBUF_YUSED : X_BUF port map ( I => cs_63_OBUF_GROM, O => cs_63_OBUF ); dadrL_BU626 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => reg_select, ADR1 => dadrL_N4485, ADR2 => VCC, ADR3 => dadrL_N4484, O => cs_55_OBUF_GROM ); cs_55_OBUF_YUSED : X_BUF port map ( I => cs_55_OBUF_GROM, O => cs_55_OBUF ); dadrL_BU538 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N3916, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N3917, O => cs_47_OBUF_GROM ); cs_47_OBUF_YUSED : X_BUF port map ( I => cs_47_OBUF_GROM, O => cs_47_OBUF ); dadrL_BU571 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N4129, ADR3 => dadrL_N4130, O => cs_50_OBUF_GROM ); cs_50_OBUF_YUSED : X_BUF port map ( I => cs_50_OBUF_GROM, O => cs_50_OBUF ); dadrL_BU483 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N3562, ADR3 => dadrL_N3561, O => cs_42_OBUF_GROM ); cs_42_OBUF_YUSED : X_BUF port map ( I => cs_42_OBUF_GROM, O => cs_42_OBUF ); dadrL_BU395 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N2993, ADR3 => dadrL_N2994, O => cs_34_OBUF_GROM ); cs_34_OBUF_YUSED : X_BUF port map ( I => cs_34_OBUF_GROM, O => cs_34_OBUF ); dadrL_BU901 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N6259, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N6260, O => cs_80_OBUF_GROM ); cs_80_OBUF_YUSED : X_BUF port map ( I => cs_80_OBUF_GROM, O => cs_80_OBUF ); dadrL_BU813 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N5692, ADR1 => dadrL_N5691, ADR2 => VCC, ADR3 => reg_select, O => cs_72_OBUF_GROM ); cs_72_OBUF_YUSED : X_BUF port map ( I => cs_72_OBUF_GROM, O => cs_72_OBUF ); dadrL_BU725 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N5123, ADR1 => reg_select, ADR2 => dadrL_N5124, ADR3 => VCC, O => cs_64_OBUF_GROM ); cs_64_OBUF_YUSED : X_BUF port map ( I => cs_64_OBUF_GROM, O => cs_64_OBUF ); dadrL_BU637 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N4556, ADR1 => VCC, ADR2 => dadrL_N4555, ADR3 => reg_select, O => cs_56_OBUF_GROM ); cs_56_OBUF_YUSED : X_BUF port map ( I => cs_56_OBUF_GROM, O => cs_56_OBUF ); dadrL_BU549 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N3987, ADR3 => dadrL_N3988, O => cs_48_OBUF_GROM ); cs_48_OBUF_YUSED : X_BUF port map ( I => cs_48_OBUF_GROM, O => cs_48_OBUF ); dadrL_BU670 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N4768, ADR1 => dadrL_N4769, ADR2 => VCC, ADR3 => reg_select, O => cs_59_OBUF_GROM ); cs_59_OBUF_YUSED : X_BUF port map ( I => cs_59_OBUF_GROM, O => cs_59_OBUF ); dadrL_BU582 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N4200, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N4201, O => cs_51_OBUF_GROM ); cs_51_OBUF_YUSED : X_BUF port map ( I => cs_51_OBUF_GROM, O => cs_51_OBUF ); dadrL_BU494 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N3632, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N3633, O => cs_43_OBUF_GROM ); cs_43_OBUF_YUSED : X_BUF port map ( I => cs_43_OBUF_GROM, O => cs_43_OBUF ); dadrL_BU912 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N6330, ADR3 => dadrL_N6331, O => cs_81_OBUF_GROM ); cs_81_OBUF_YUSED : X_BUF port map ( I => cs_81_OBUF_GROM, O => cs_81_OBUF ); dadrL_BU824 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N5763, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N5762, O => cs_73_OBUF_GROM ); cs_73_OBUF_YUSED : X_BUF port map ( I => cs_73_OBUF_GROM, O => cs_73_OBUF ); dadrL_BU736 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N5194, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N5195, O => cs_65_OBUF_GROM ); cs_65_OBUF_YUSED : X_BUF port map ( I => cs_65_OBUF_GROM, O => cs_65_OBUF ); dadrL_BU648 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N4626, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N4627, O => cs_57_OBUF_GROM ); cs_57_OBUF_YUSED : X_BUF port map ( I => cs_57_OBUF_GROM, O => cs_57_OBUF ); dadrL_BU681 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => reg_select, ADR1 => VCC, ADR2 => dadrL_N4839, ADR3 => dadrL_N4840, O => cs_60_OBUF_GROM ); cs_60_OBUF_YUSED : X_BUF port map ( I => cs_60_OBUF_GROM, O => cs_60_OBUF ); dadrL_BU593 : X_LUT4 generic map( INIT => X"C000" ) port map ( ADR0 => VCC, ADR1 => reg_select, ADR2 => dadrL_N4271, ADR3 => dadrL_N4272, O => cs_52_OBUF_GROM ); cs_52_OBUF_YUSED : X_BUF port map ( I => cs_52_OBUF_GROM, O => cs_52_OBUF ); dadrL_BU923 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N6402, ADR1 => dadrL_N6401, ADR2 => VCC, ADR3 => reg_select, O => cs_82_OBUF_GROM ); cs_82_OBUF_YUSED : X_BUF port map ( I => cs_82_OBUF_GROM, O => cs_82_OBUF ); dadrL_BU835 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N5834, ADR1 => dadrL_N5833, ADR2 => reg_select, ADR3 => VCC, O => cs_74_OBUF_GROM ); cs_74_OBUF_YUSED : X_BUF port map ( I => cs_74_OBUF_GROM, O => cs_74_OBUF ); dadrL_BU747 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N5265, ADR1 => dadrL_N5266, ADR2 => reg_select, ADR3 => VCC, O => cs_66_OBUF_GROM ); cs_66_OBUF_YUSED : X_BUF port map ( I => cs_66_OBUF_GROM, O => cs_66_OBUF ); dadrL_BU659 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N4697, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N4698, O => cs_58_OBUF_GROM ); cs_58_OBUF_YUSED : X_BUF port map ( I => cs_58_OBUF_GROM, O => cs_58_OBUF ); dadrL_BU780 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N5478, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N5479, O => cs_69_OBUF_GROM ); cs_69_OBUF_YUSED : X_BUF port map ( I => cs_69_OBUF_GROM, O => cs_69_OBUF ); dadrL_BU692 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N4910, ADR1 => dadrL_N4911, ADR2 => VCC, ADR3 => reg_select, O => cs_61_OBUF_GROM ); cs_61_OBUF_YUSED : X_BUF port map ( I => cs_61_OBUF_GROM, O => cs_61_OBUF ); dadrL_BU934 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N6473, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N6472, O => cs_83_OBUF_GROM ); cs_83_OBUF_YUSED : X_BUF port map ( I => cs_83_OBUF_GROM, O => cs_83_OBUF ); dadrL_BU846 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N5905, ADR1 => reg_select, ADR2 => dadrL_N5904, ADR3 => VCC, O => cs_75_OBUF_GROM ); cs_75_OBUF_YUSED : X_BUF port map ( I => cs_75_OBUF_GROM, O => cs_75_OBUF ); dadrL_BU758 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N5336, ADR1 => reg_select, ADR2 => VCC, ADR3 => dadrL_N5337, O => cs_67_OBUF_GROM ); cs_67_OBUF_YUSED : X_BUF port map ( I => cs_67_OBUF_GROM, O => cs_67_OBUF ); dadrL_BU791 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N5549, ADR1 => dadrL_N5550, ADR2 => VCC, ADR3 => reg_select, O => cs_70_OBUF_GROM ); cs_70_OBUF_YUSED : X_BUF port map ( I => cs_70_OBUF_GROM, O => cs_70_OBUF ); dadrL_BU945 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N6543, ADR1 => VCC, ADR2 => dadrL_N6544, ADR3 => reg_select, O => cs_84_OBUF_GROM ); cs_84_OBUF_YUSED : X_BUF port map ( I => cs_84_OBUF_GROM, O => cs_84_OBUF ); dadrL_BU857 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N5975, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N5976, O => cs_76_OBUF_GROM ); cs_76_OBUF_YUSED : X_BUF port map ( I => cs_76_OBUF_GROM, O => cs_76_OBUF ); dadrL_BU769 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N5407, ADR1 => dadrL_N5408, ADR2 => VCC, ADR3 => reg_select, O => cs_68_OBUF_GROM ); cs_68_OBUF_YUSED : X_BUF port map ( I => cs_68_OBUF_GROM, O => cs_68_OBUF ); dadrL_BU890 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N6188, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N6189, O => cs_79_OBUF_GROM ); cs_79_OBUF_YUSED : X_BUF port map ( I => cs_79_OBUF_GROM, O => cs_79_OBUF ); dadrL_BU956 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N6615, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N6614, O => cs_85_OBUF_GROM ); cs_85_OBUF_YUSED : X_BUF port map ( I => cs_85_OBUF_GROM, O => cs_85_OBUF ); dadrL_BU868 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N6047, ADR1 => VCC, ADR2 => dadrL_N6046, ADR3 => reg_select, O => cs_77_OBUF_GROM ); cs_77_OBUF_YUSED : X_BUF port map ( I => cs_77_OBUF_GROM, O => cs_77_OBUF ); dadrL_BU967 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N6685, ADR1 => dadrL_N6686, ADR2 => VCC, ADR3 => reg_select, O => cs_86_OBUF_GROM ); cs_86_OBUF_YUSED : X_BUF port map ( I => cs_86_OBUF_GROM, O => cs_86_OBUF ); dadrL_BU879 : X_LUT4 generic map( INIT => X"8080" ) port map ( ADR0 => dadrL_N6117, ADR1 => dadrL_N6118, ADR2 => reg_select, ADR3 => VCC, O => cs_78_OBUF_GROM ); cs_78_OBUF_YUSED : X_BUF port map ( I => cs_78_OBUF_GROM, O => cs_78_OBUF ); dadrL_BU978 : X_LUT4 generic map( INIT => X"A000" ) port map ( ADR0 => dadrL_N6756, ADR1 => VCC, ADR2 => reg_select, ADR3 => dadrL_N6757, O => cs_87_OBUF_GROM ); cs_87_OBUF_YUSED : X_BUF port map ( I => cs_87_OBUF_GROM, O => cs_87_OBUF ); dadrL_BU989 : X_LUT4 generic map( INIT => X"8800" ) port map ( ADR0 => dadrL_N6827, ADR1 => dadrL_N6828, ADR2 => VCC, ADR3 => reg_select, O => cs_88_OBUF_GROM ); cs_88_OBUF_YUSED : X_BUF port map ( I => cs_88_OBUF_GROM, O => cs_88_OBUF ); rw_OBUF_69 : X_TRI port map ( I => rw_OUTMUX, CTL => rw_ENABLE, O => rw ); rw_ENABLEINV : X_INV port map ( I => rw_TORGTS, O => rw_ENABLE ); rw_GTS_OR : X_BUF port map ( I => GTS, O => rw_TORGTS ); rw_OUTMUX_70 : X_BUF port map ( I => rw_OBUF, O => rw_OUTMUX ); adr_bus_0_IMUX : X_BUF port map ( I => adr_bus_0_IBUF_0, O => adr_bus_0_IBUF ); adr_bus_0_IBUF_71 : X_BUF port map ( I => adr_bus(0), O => adr_bus_0_IBUF_0 ); adr_bus_1_IMUX : X_BUF port map ( I => adr_bus_1_IBUF_1, O => adr_bus_1_IBUF ); adr_bus_1_IBUF_72 : X_BUF port map ( I => adr_bus(1), O => adr_bus_1_IBUF_1 ); adr_bus_2_IMUX : X_BUF port map ( I => adr_bus_2_IBUF_2, O => adr_bus_2_IBUF ); adr_bus_2_IBUF_73 : X_BUF port map ( I => adr_bus(2), O => adr_bus_2_IBUF_2 ); adr_bus_3_IMUX : X_BUF port map ( I => adr_bus_3_IBUF_3, O => adr_bus_3_IBUF ); adr_bus_3_IBUF_74 : X_BUF port map ( I => adr_bus(3), O => adr_bus_3_IBUF_3 ); adr_bus_4_IMUX : X_BUF port map ( I => adr_bus_4_IBUF_4, O => adr_bus_4_IBUF ); adr_bus_4_IBUF_75 : X_BUF port map ( I => adr_bus(4), O => adr_bus_4_IBUF_4 ); adr_bus_5_IMUX : X_BUF port map ( I => adr_bus_5_IBUF_5, O => adr_bus_5_IBUF ); adr_bus_5_IBUF_76 : X_BUF port map ( I => adr_bus(5), O => adr_bus_5_IBUF_5 ); adr_bus_6_IMUX : X_BUF port map ( I => adr_bus_6_IBUF_6, O => adr_bus_6_IBUF ); adr_bus_6_IBUF_77 : X_BUF port map ( I => adr_bus(6), O => adr_bus_6_IBUF_6 ); adr_bus_7_IMUX : X_BUF port map ( I => adr_bus_7_IBUF_7, O => adr_bus_7_IBUF ); adr_bus_7_IBUF_78 : X_BUF port map ( I => adr_bus(7), O => adr_bus_7_IBUF_7 ); adr_bus_8_IMUX : X_BUF port map ( I => adr_bus_8_IBUF_8, O => adr_bus_8_IBUF ); adr_bus_8_IBUF_79 : X_BUF port map ( I => adr_bus(8), O => adr_bus_8_IBUF_8 ); adr_bus_9_IMUX : X_BUF port map ( I => adr_bus_9_IBUF_9, O => adr_bus_9_IBUF ); adr_bus_9_IBUF_80 : X_BUF port map ( I => adr_bus(9), O => adr_bus_9_IBUF_9 ); AEN_IMUX : X_BUF port map ( I => AEN_IBUF_10, O => AEN_IBUF ); AEN_IBUF_81 : X_BUF port map ( I => AEN, O => AEN_IBUF_10 ); IOR_IMUX : X_BUF port map ( I => IOR_IBUF_11, O => IOR_IBUF ); IOR_IBUF_82 : X_BUF port map ( I => IOR, O => IOR_IBUF_11 ); IOW_IMUX : X_BUF port map ( I => IOW_IBUF_12, O => IOW_IBUF ); IOW_IBUF_83 : X_BUF port map ( I => IOW, O => IOW_IBUF_12 ); cs_100_OBUF_84 : X_TRI port map ( I => cs_100_OUTMUX, CTL => cs_100_ENABLE, O => cs(100) ); cs_100_ENABLEINV : X_INV port map ( I => cs_100_TORGTS, O => cs_100_ENABLE ); cs_100_GTS_OR : X_BUF port map ( I => GTS, O => cs_100_TORGTS ); cs_100_OUTMUX_85 : X_BUF port map ( I => cs_100_OBUF, O => cs_100_OUTMUX ); cs_101_OBUF_86 : X_TRI port map ( I => cs_101_OUTMUX, CTL => cs_101_ENABLE, O => cs(101) ); cs_101_ENABLEINV : X_INV port map ( I => cs_101_TORGTS, O => cs_101_ENABLE ); cs_101_GTS_OR : X_BUF port map ( I => GTS, O => cs_101_TORGTS ); cs_101_OUTMUX_87 : X_BUF port map ( I => cs_101_OBUF, O => cs_101_OUTMUX ); cs_102_OBUF_88 : X_TRI port map ( I => cs_102_OUTMUX, CTL => cs_102_ENABLE, O => cs(102) ); cs_102_ENABLEINV : X_INV port map ( I => cs_102_TORGTS, O => cs_102_ENABLE ); cs_102_GTS_OR : X_BUF port map ( I => GTS, O => cs_102_TORGTS ); cs_102_OUTMUX_89 : X_BUF port map ( I => cs_102_OBUF, O => cs_102_OUTMUX ); cs_110_OBUF_90 : X_TRI port map ( I => cs_110_OUTMUX, CTL => cs_110_ENABLE, O => cs(110) ); cs_110_ENABLEINV : X_INV port map ( I => cs_110_TORGTS, O => cs_110_ENABLE ); cs_110_GTS_OR : X_BUF port map ( I => GTS, O => cs_110_TORGTS ); cs_110_OUTMUX_91 : X_BUF port map ( I => cs_110_OBUF, O => cs_110_OUTMUX ); cs_103_OBUF_92 : X_TRI port map ( I => cs_103_OUTMUX, CTL => cs_103_ENABLE, O => cs(103) ); cs_103_ENABLEINV : X_INV port map ( I => cs_103_TORGTS, O => cs_103_ENABLE ); cs_103_GTS_OR : X_BUF port map ( I => GTS, O => cs_103_TORGTS ); cs_103_OUTMUX_93 : X_BUF port map ( I => cs_103_OBUF, O => cs_103_OUTMUX ); cs_111_OBUF_94 : X_TRI port map ( I => cs_111_OUTMUX, CTL => cs_111_ENABLE, O => cs(111) ); cs_111_ENABLEINV : X_INV port map ( I => cs_111_TORGTS, O => cs_111_ENABLE ); cs_111_GTS_OR : X_BUF port map ( I => GTS, O => cs_111_TORGTS ); cs_111_OUTMUX_95 : X_BUF port map ( I => cs_111_OBUF, O => cs_111_OUTMUX ); cs_104_OBUF_96 : X_TRI port map ( I => cs_104_OUTMUX, CTL => cs_104_ENABLE, O => cs(104) ); cs_104_ENABLEINV : X_INV port map ( I => cs_104_TORGTS, O => cs_104_ENABLE ); cs_104_GTS_OR : X_BUF port map ( I => GTS, O => cs_104_TORGTS ); cs_104_OUTMUX_97 : X_BUF port map ( I => cs_104_OBUF, O => cs_104_OUTMUX ); cs_112_OBUF_98 : X_TRI port map ( I => cs_112_OUTMUX, CTL => cs_112_ENABLE, O => cs(112) ); cs_112_ENABLEINV : X_INV port map ( I => cs_112_TORGTS, O => cs_112_ENABLE ); cs_112_GTS_OR : X_BUF port map ( I => GTS, O => cs_112_TORGTS ); cs_112_OUTMUX_99 : X_BUF port map ( I => cs_112_OBUF, O => cs_112_OUTMUX ); cs_120_OBUF_100 : X_TRI port map ( I => cs_120_OUTMUX, CTL => cs_120_ENABLE, O => cs(120) ); cs_120_ENABLEINV : X_INV port map ( I => cs_120_TORGTS, O => cs_120_ENABLE ); cs_120_GTS_OR : X_BUF port map ( I => GTS, O => cs_120_TORGTS ); cs_120_OUTMUX_101 : X_BUF port map ( I => cs_120_OBUF, O => cs_120_OUTMUX ); cs_200_OBUF_102 : X_TRI port map ( I => cs_200_OUTMUX, CTL => cs_200_ENABLE, O => cs(200) ); cs_200_ENABLEINV : X_INV port map ( I => cs_200_TORGTS, O => cs_200_ENABLE ); cs_200_GTS_OR : X_BUF port map ( I => GTS, O => cs_200_TORGTS ); cs_200_OUTMUX_103 : X_BUF port map ( I => cs_200_OBUF, O => cs_200_OUTMUX ); cs_105_OBUF_104 : X_TRI port map ( I => cs_105_OUTMUX, CTL => cs_105_ENABLE, O => cs(105) ); cs_105_ENABLEINV : X_INV port map ( I => cs_105_TORGTS, O => cs_105_ENABLE ); cs_105_GTS_OR : X_BUF port map ( I => GTS, O => cs_105_TORGTS ); cs_105_OUTMUX_105 : X_BUF port map ( I => cs_105_OBUF, O => cs_105_OUTMUX ); cs_113_OBUF_106 : X_TRI port map ( I => cs_113_OUTMUX, CTL => cs_113_ENABLE, O => cs(113) ); cs_113_ENABLEINV : X_INV port map ( I => cs_113_TORGTS, O => cs_113_ENABLE ); cs_113_GTS_OR : X_BUF port map ( I => GTS, O => cs_113_TORGTS ); cs_113_OUTMUX_107 : X_BUF port map ( I => cs_113_OBUF, O => cs_113_OUTMUX ); cs_121_OBUF_108 : X_TRI port map ( I => cs_121_OUTMUX, CTL => cs_121_ENABLE, O => cs(121) ); cs_121_ENABLEINV : X_INV port map ( I => cs_121_TORGTS, O => cs_121_ENABLE ); cs_121_GTS_OR : X_BUF port map ( I => GTS, O => cs_121_TORGTS ); cs_121_OUTMUX_109 : X_BUF port map ( I => cs_121_OBUF, O => cs_121_OUTMUX ); cs_201_OBUF_110 : X_TRI port map ( I => cs_201_OUTMUX, CTL => cs_201_ENABLE, O => cs(201) ); cs_201_ENABLEINV : X_INV port map ( I => cs_201_TORGTS, O => cs_201_ENABLE ); cs_201_GTS_OR : X_BUF port map ( I => GTS, O => cs_201_TORGTS ); cs_201_OUTMUX_111 : X_BUF port map ( I => cs_201_OBUF, O => cs_201_OUTMUX ); cs_106_OBUF_112 : X_TRI port map ( I => cs_106_OUTMUX, CTL => cs_106_ENABLE, O => cs(106) ); cs_106_ENABLEINV : X_INV port map ( I => cs_106_TORGTS, O => cs_106_ENABLE ); cs_106_GTS_OR : X_BUF port map ( I => GTS, O => cs_106_TORGTS ); cs_106_OUTMUX_113 : X_BUF port map ( I => cs_106_OBUF, O => cs_106_OUTMUX ); cs_114_OBUF_114 : X_TRI port map ( I => cs_114_OUTMUX, CTL => cs_114_ENABLE, O => cs(114) ); cs_114_ENABLEINV : X_INV port map ( I => cs_114_TORGTS, O => cs_114_ENABLE ); cs_114_GTS_OR : X_BUF port map ( I => GTS, O => cs_114_TORGTS ); cs_114_OUTMUX_115 : X_BUF port map ( I => cs_114_OBUF, O => cs_114_OUTMUX ); cs_122_OBUF_116 : X_TRI port map ( I => cs_122_OUTMUX, CTL => cs_122_ENABLE, O => cs(122) ); cs_122_ENABLEINV : X_INV port map ( I => cs_122_TORGTS, O => cs_122_ENABLE ); cs_122_GTS_OR : X_BUF port map ( I => GTS, O => cs_122_TORGTS ); cs_122_OUTMUX_117 : X_BUF port map ( I => cs_122_OBUF, O => cs_122_OUTMUX ); cs_130_OBUF_118 : X_TRI port map ( I => cs_130_OUTMUX, CTL => cs_130_ENABLE, O => cs(130) ); cs_130_ENABLEINV : X_INV port map ( I => cs_130_TORGTS, O => cs_130_ENABLE ); cs_130_GTS_OR : X_BUF port map ( I => GTS, O => cs_130_TORGTS ); cs_130_OUTMUX_119 : X_BUF port map ( I => cs_130_OBUF, O => cs_130_OUTMUX ); cs_202_OBUF_120 : X_TRI port map ( I => cs_202_OUTMUX, CTL => cs_202_ENABLE, O => cs(202) ); cs_202_ENABLEINV : X_INV port map ( I => cs_202_TORGTS, O => cs_202_ENABLE ); cs_202_GTS_OR : X_BUF port map ( I => GTS, O => cs_202_TORGTS ); cs_202_OUTMUX_121 : X_BUF port map ( I => cs_202_OBUF, O => cs_202_OUTMUX ); cs_210_OBUF_122 : X_TRI port map ( I => cs_210_OUTMUX, CTL => cs_210_ENABLE, O => cs(210) ); cs_210_ENABLEINV : X_INV port map ( I => cs_210_TORGTS, O => cs_210_ENABLE ); cs_210_GTS_OR : X_BUF port map ( I => GTS, O => cs_210_TORGTS ); cs_210_OUTMUX_123 : X_BUF port map ( I => cs_210_OBUF, O => cs_210_OUTMUX ); cs_107_OBUF_124 : X_TRI port map ( I => cs_107_OUTMUX, CTL => cs_107_ENABLE, O => cs(107) ); cs_107_ENABLEINV : X_INV port map ( I => cs_107_TORGTS, O => cs_107_ENABLE ); cs_107_GTS_OR : X_BUF port map ( I => GTS, O => cs_107_TORGTS ); cs_107_OUTMUX_125 : X_BUF port map ( I => cs_107_OBUF, O => cs_107_OUTMUX ); cs_115_OBUF_126 : X_TRI port map ( I => cs_115_OUTMUX, CTL => cs_115_ENABLE, O => cs(115) ); cs_115_ENABLEINV : X_INV port map ( I => cs_115_TORGTS, O => cs_115_ENABLE ); cs_115_GTS_OR : X_BUF port map ( I => GTS, O => cs_115_TORGTS ); cs_115_OUTMUX_127 : X_BUF port map ( I => cs_115_OBUF, O => cs_115_OUTMUX ); cs_123_OBUF_128 : X_TRI port map ( I => cs_123_OUTMUX, CTL => cs_123_ENABLE, O => cs(123) ); cs_123_ENABLEINV : X_INV port map ( I => cs_123_TORGTS, O => cs_123_ENABLE ); cs_123_GTS_OR : X_BUF port map ( I => GTS, O => cs_123_TORGTS ); cs_123_OUTMUX_129 : X_BUF port map ( I => cs_123_OBUF, O => cs_123_OUTMUX ); cs_131_OBUF_130 : X_TRI port map ( I => cs_131_OUTMUX, CTL => cs_131_ENABLE, O => cs(131) ); cs_131_ENABLEINV : X_INV port map ( I => cs_131_TORGTS, O => cs_131_ENABLE ); cs_131_GTS_OR : X_BUF port map ( I => GTS, O => cs_131_TORGTS ); cs_131_OUTMUX_131 : X_BUF port map ( I => cs_131_OBUF, O => cs_131_OUTMUX ); cs_203_OBUF_132 : X_TRI port map ( I => cs_203_OUTMUX, CTL => cs_203_ENABLE, O => cs(203) ); cs_203_ENABLEINV : X_INV port map ( I => cs_203_TORGTS, O => cs_203_ENABLE ); cs_203_GTS_OR : X_BUF port map ( I => GTS, O => cs_203_TORGTS ); cs_203_OUTMUX_133 : X_BUF port map ( I => cs_203_OBUF, O => cs_203_OUTMUX ); cs_211_OBUF_134 : X_TRI port map ( I => cs_211_OUTMUX, CTL => cs_211_ENABLE, O => cs(211) ); cs_211_ENABLEINV : X_INV port map ( I => cs_211_TORGTS, O => cs_211_ENABLE ); cs_211_GTS_OR : X_BUF port map ( I => GTS, O => cs_211_TORGTS ); cs_211_OUTMUX_135 : X_BUF port map ( I => cs_211_OBUF, O => cs_211_OUTMUX ); cs_108_OBUF_136 : X_TRI port map ( I => cs_108_OUTMUX, CTL => cs_108_ENABLE, O => cs(108) ); cs_108_ENABLEINV : X_INV port map ( I => cs_108_TORGTS, O => cs_108_ENABLE ); cs_108_GTS_OR : X_BUF port map ( I => GTS, O => cs_108_TORGTS ); cs_108_OUTMUX_137 : X_BUF port map ( I => cs_108_OBUF, O => cs_108_OUTMUX ); cs_116_OBUF_138 : X_TRI port map ( I => cs_116_OUTMUX, CTL => cs_116_ENABLE, O => cs(116) ); cs_116_ENABLEINV : X_INV port map ( I => cs_116_TORGTS, O => cs_116_ENABLE ); cs_116_GTS_OR : X_BUF port map ( I => GTS, O => cs_116_TORGTS ); cs_116_OUTMUX_139 : X_BUF port map ( I => cs_116_OBUF, O => cs_116_OUTMUX ); cs_124_OBUF_140 : X_TRI port map ( I => cs_124_OUTMUX, CTL => cs_124_ENABLE, O => cs(124) ); cs_124_ENABLEINV : X_INV port map ( I => cs_124_TORGTS, O => cs_124_ENABLE ); cs_124_GTS_OR : X_BUF port map ( I => GTS, O => cs_124_TORGTS ); cs_124_OUTMUX_141 : X_BUF port map ( I => cs_124_OBUF, O => cs_124_OUTMUX ); cs_132_OBUF_142 : X_TRI port map ( I => cs_132_OUTMUX, CTL => cs_132_ENABLE, O => cs(132) ); cs_132_ENABLEINV : X_INV port map ( I => cs_132_TORGTS, O => cs_132_ENABLE ); cs_132_GTS_OR : X_BUF port map ( I => GTS, O => cs_132_TORGTS ); cs_132_OUTMUX_143 : X_BUF port map ( I => cs_132_OBUF, O => cs_132_OUTMUX ); cs_140_OBUF_144 : X_TRI port map ( I => cs_140_OUTMUX, CTL => cs_140_ENABLE, O => cs(140) ); cs_140_ENABLEINV : X_INV port map ( I => cs_140_TORGTS, O => cs_140_ENABLE ); cs_140_GTS_OR : X_BUF port map ( I => GTS, O => cs_140_TORGTS ); cs_140_OUTMUX_145 : X_BUF port map ( I => cs_140_OBUF, O => cs_140_OUTMUX ); cs_204_OBUF_146 : X_TRI port map ( I => cs_204_OUTMUX, CTL => cs_204_ENABLE, O => cs(204) ); cs_204_ENABLEINV : X_INV port map ( I => cs_204_TORGTS, O => cs_204_ENABLE ); cs_204_GTS_OR : X_BUF port map ( I => GTS, O => cs_204_TORGTS ); cs_204_OUTMUX_147 : X_BUF port map ( I => cs_204_OBUF, O => cs_204_OUTMUX ); cs_212_OBUF_148 : X_TRI port map ( I => cs_212_OUTMUX, CTL => cs_212_ENABLE, O => cs(212) ); cs_212_ENABLEINV : X_INV port map ( I => cs_212_TORGTS, O => cs_212_ENABLE ); cs_212_GTS_OR : X_BUF port map ( I => GTS, O => cs_212_TORGTS ); cs_212_OUTMUX_149 : X_BUF port map ( I => cs_212_OBUF, O => cs_212_OUTMUX ); cs_220_OBUF_150 : X_TRI port map ( I => cs_220_OUTMUX, CTL => cs_220_ENABLE, O => cs(220) ); cs_220_ENABLEINV : X_INV port map ( I => cs_220_TORGTS, O => cs_220_ENABLE ); cs_220_GTS_OR : X_BUF port map ( I => GTS, O => cs_220_TORGTS ); cs_220_OUTMUX_151 : X_BUF port map ( I => cs_220_OBUF, O => cs_220_OUTMUX ); cs_109_OBUF_152 : X_TRI port map ( I => cs_109_OUTMUX, CTL => cs_109_ENABLE, O => cs(109) ); cs_109_ENABLEINV : X_INV port map ( I => cs_109_TORGTS, O => cs_109_ENABLE ); cs_109_GTS_OR : X_BUF port map ( I => GTS, O => cs_109_TORGTS ); cs_109_OUTMUX_153 : X_BUF port map ( I => cs_109_OBUF, O => cs_109_OUTMUX ); cs_117_OBUF_154 : X_TRI port map ( I => cs_117_OUTMUX, CTL => cs_117_ENABLE, O => cs(117) ); cs_117_ENABLEINV : X_INV port map ( I => cs_117_TORGTS, O => cs_117_ENABLE ); cs_117_GTS_OR : X_BUF port map ( I => GTS, O => cs_117_TORGTS ); cs_117_OUTMUX_155 : X_BUF port map ( I => cs_117_OBUF, O => cs_117_OUTMUX ); cs_125_OBUF_156 : X_TRI port map ( I => cs_125_OUTMUX, CTL => cs_125_ENABLE, O => cs(125) ); cs_125_ENABLEINV : X_INV port map ( I => cs_125_TORGTS, O => cs_125_ENABLE ); cs_125_GTS_OR : X_BUF port map ( I => GTS, O => cs_125_TORGTS ); cs_125_OUTMUX_157 : X_BUF port map ( I => cs_125_OBUF, O => cs_125_OUTMUX ); cs_133_OBUF_158 : X_TRI port map ( I => cs_133_OUTMUX, CTL => cs_133_ENABLE, O => cs(133) ); cs_133_ENABLEINV : X_INV port map ( I => cs_133_TORGTS, O => cs_133_ENABLE ); cs_133_GTS_OR : X_BUF port map ( I => GTS, O => cs_133_TORGTS ); cs_133_OUTMUX_159 : X_BUF port map ( I => cs_133_OBUF, O => cs_133_OUTMUX ); cs_141_OBUF_160 : X_TRI port map ( I => cs_141_OUTMUX, CTL => cs_141_ENABLE, O => cs(141) ); cs_141_ENABLEINV : X_INV port map ( I => cs_141_TORGTS, O => cs_141_ENABLE ); cs_141_GTS_OR : X_BUF port map ( I => GTS, O => cs_141_TORGTS ); cs_141_OUTMUX_161 : X_BUF port map ( I => cs_141_OBUF, O => cs_141_OUTMUX ); cs_205_OBUF_162 : X_TRI port map ( I => cs_205_OUTMUX, CTL => cs_205_ENABLE, O => cs(205) ); cs_205_ENABLEINV : X_INV port map ( I => cs_205_TORGTS, O => cs_205_ENABLE ); cs_205_GTS_OR : X_BUF port map ( I => GTS, O => cs_205_TORGTS ); cs_205_OUTMUX_163 : X_BUF port map ( I => cs_205_OBUF, O => cs_205_OUTMUX ); cs_213_OBUF_164 : X_TRI port map ( I => cs_213_OUTMUX, CTL => cs_213_ENABLE, O => cs(213) ); cs_213_ENABLEINV : X_INV port map ( I => cs_213_TORGTS, O => cs_213_ENABLE ); cs_213_GTS_OR : X_BUF port map ( I => GTS, O => cs_213_TORGTS ); cs_213_OUTMUX_165 : X_BUF port map ( I => cs_213_OBUF, O => cs_213_OUTMUX ); cs_221_OBUF_166 : X_TRI port map ( I => cs_221_OUTMUX, CTL => cs_221_ENABLE, O => cs(221) ); cs_221_ENABLEINV : X_INV port map ( I => cs_221_TORGTS, O => cs_221_ENABLE ); cs_221_GTS_OR : X_BUF port map ( I => GTS, O => cs_221_TORGTS ); cs_221_OUTMUX_167 : X_BUF port map ( I => cs_221_OBUF, O => cs_221_OUTMUX ); cs_118_OBUF_168 : X_TRI port map ( I => cs_118_OUTMUX, CTL => cs_118_ENABLE, O => cs(118) ); cs_118_ENABLEINV : X_INV port map ( I => cs_118_TORGTS, O => cs_118_ENABLE ); cs_118_GTS_OR : X_BUF port map ( I => GTS, O => cs_118_TORGTS ); cs_118_OUTMUX_169 : X_BUF port map ( I => cs_118_OBUF, O => cs_118_OUTMUX ); cs_126_OBUF_170 : X_TRI port map ( I => cs_126_OUTMUX, CTL => cs_126_ENABLE, O => cs(126) ); cs_126_ENABLEINV : X_INV port map ( I => cs_126_TORGTS, O => cs_126_ENABLE ); cs_126_GTS_OR : X_BUF port map ( I => GTS, O => cs_126_TORGTS ); cs_126_OUTMUX_171 : X_BUF port map ( I => cs_126_OBUF, O => cs_126_OUTMUX ); cs_134_OBUF_172 : X_TRI port map ( I => cs_134_OUTMUX, CTL => cs_134_ENABLE, O => cs(134) ); cs_134_ENABLEINV : X_INV port map ( I => cs_134_TORGTS, O => cs_134_ENABLE ); cs_134_GTS_OR : X_BUF port map ( I => GTS, O => cs_134_TORGTS ); cs_134_OUTMUX_173 : X_BUF port map ( I => cs_134_OBUF, O => cs_134_OUTMUX ); cs_142_OBUF_174 : X_TRI port map ( I => cs_142_OUTMUX, CTL => cs_142_ENABLE, O => cs(142) ); cs_142_ENABLEINV : X_INV port map ( I => cs_142_TORGTS, O => cs_142_ENABLE ); cs_142_GTS_OR : X_BUF port map ( I => GTS, O => cs_142_TORGTS ); cs_142_OUTMUX_175 : X_BUF port map ( I => cs_142_OBUF, O => cs_142_OUTMUX ); cs_150_OBUF_176 : X_TRI port map ( I => cs_150_OUTMUX, CTL => cs_150_ENABLE, O => cs(150) ); cs_150_ENABLEINV : X_INV port map ( I => cs_150_TORGTS, O => cs_150_ENABLE ); cs_150_GTS_OR : X_BUF port map ( I => GTS, O => cs_150_TORGTS ); cs_150_OUTMUX_177 : X_BUF port map ( I => cs_150_OBUF, O => cs_150_OUTMUX ); cs_206_OBUF_178 : X_TRI port map ( I => cs_206_OUTMUX, CTL => cs_206_ENABLE, O => cs(206) ); cs_206_ENABLEINV : X_INV port map ( I => cs_206_TORGTS, O => cs_206_ENABLE ); cs_206_GTS_OR : X_BUF port map ( I => GTS, O => cs_206_TORGTS ); cs_206_OUTMUX_179 : X_BUF port map ( I => cs_206_OBUF, O => cs_206_OUTMUX ); cs_214_OBUF_180 : X_TRI port map ( I => cs_214_OUTMUX, CTL => cs_214_ENABLE, O => cs(214) ); cs_214_ENABLEINV : X_INV port map ( I => cs_214_TORGTS, O => cs_214_ENABLE ); cs_214_GTS_OR : X_BUF port map ( I => GTS, O => cs_214_TORGTS ); cs_214_OUTMUX_181 : X_BUF port map ( I => cs_214_OBUF, O => cs_214_OUTMUX ); cs_222_OBUF_182 : X_TRI port map ( I => cs_222_OUTMUX, CTL => cs_222_ENABLE, O => cs(222) ); cs_222_ENABLEINV : X_INV port map ( I => cs_222_TORGTS, O => cs_222_ENABLE ); cs_222_GTS_OR : X_BUF port map ( I => GTS, O => cs_222_TORGTS ); cs_222_OUTMUX_183 : X_BUF port map ( I => cs_222_OBUF, O => cs_222_OUTMUX ); cs_230_OBUF_184 : X_TRI port map ( I => cs_230_OUTMUX, CTL => cs_230_ENABLE, O => cs(230) ); cs_230_ENABLEINV : X_INV port map ( I => cs_230_TORGTS, O => cs_230_ENABLE ); cs_230_GTS_OR : X_BUF port map ( I => GTS, O => cs_230_TORGTS ); cs_230_OUTMUX_185 : X_BUF port map ( I => cs_230_OBUF, O => cs_230_OUTMUX ); cs_119_OBUF_186 : X_TRI port map ( I => cs_119_OUTMUX, CTL => cs_119_ENABLE, O => cs(119) ); cs_119_ENABLEINV : X_INV port map ( I => cs_119_TORGTS, O => cs_119_ENABLE ); cs_119_GTS_OR : X_BUF port map ( I => GTS, O => cs_119_TORGTS ); cs_119_OUTMUX_187 : X_BUF port map ( I => cs_119_OBUF, O => cs_119_OUTMUX ); cs_127_OBUF_188 : X_TRI port map ( I => cs_127_OUTMUX, CTL => cs_127_ENABLE, O => cs(127) ); cs_127_ENABLEINV : X_INV port map ( I => cs_127_TORGTS, O => cs_127_ENABLE ); cs_127_GTS_OR : X_BUF port map ( I => GTS, O => cs_127_TORGTS ); cs_127_OUTMUX_189 : X_BUF port map ( I => cs_127_OBUF, O => cs_127_OUTMUX ); cs_135_OBUF_190 : X_TRI port map ( I => cs_135_OUTMUX, CTL => cs_135_ENABLE, O => cs(135) ); cs_135_ENABLEINV : X_INV port map ( I => cs_135_TORGTS, O => cs_135_ENABLE ); cs_135_GTS_OR : X_BUF port map ( I => GTS, O => cs_135_TORGTS ); cs_135_OUTMUX_191 : X_BUF port map ( I => cs_135_OBUF, O => cs_135_OUTMUX ); cs_143_OBUF_192 : X_TRI port map ( I => cs_143_OUTMUX, CTL => cs_143_ENABLE, O => cs(143) ); cs_143_ENABLEINV : X_INV port map ( I => cs_143_TORGTS, O => cs_143_ENABLE ); cs_143_GTS_OR : X_BUF port map ( I => GTS, O => cs_143_TORGTS ); cs_143_OUTMUX_193 : X_BUF port map ( I => cs_143_OBUF, O => cs_143_OUTMUX ); cs_151_OBUF_194 : X_TRI port map ( I => cs_151_OUTMUX, CTL => cs_151_ENABLE, O => cs(151) ); cs_151_ENABLEINV : X_INV port map ( I => cs_151_TORGTS, O => cs_151_ENABLE ); cs_151_GTS_OR : X_BUF port map ( I => GTS, O => cs_151_TORGTS ); cs_151_OUTMUX_195 : X_BUF port map ( I => cs_151_OBUF, O => cs_151_OUTMUX ); cs_207_OBUF_196 : X_TRI port map ( I => cs_207_OUTMUX, CTL => cs_207_ENABLE, O => cs(207) ); cs_207_ENABLEINV : X_INV port map ( I => cs_207_TORGTS, O => cs_207_ENABLE ); cs_207_GTS_OR : X_BUF port map ( I => GTS, O => cs_207_TORGTS ); cs_207_OUTMUX_197 : X_BUF port map ( I => cs_207_OBUF, O => cs_207_OUTMUX ); cs_215_OBUF_198 : X_TRI port map ( I => cs_215_OUTMUX, CTL => cs_215_ENABLE, O => cs(215) ); cs_215_ENABLEINV : X_INV port map ( I => cs_215_TORGTS, O => cs_215_ENABLE ); cs_215_GTS_OR : X_BUF port map ( I => GTS, O => cs_215_TORGTS ); cs_215_OUTMUX_199 : X_BUF port map ( I => cs_215_OBUF, O => cs_215_OUTMUX ); cs_223_OBUF_200 : X_TRI port map ( I => cs_223_OUTMUX, CTL => cs_223_ENABLE, O => cs(223) ); cs_223_ENABLEINV : X_INV port map ( I => cs_223_TORGTS, O => cs_223_ENABLE ); cs_223_GTS_OR : X_BUF port map ( I => GTS, O => cs_223_TORGTS ); cs_223_OUTMUX_201 : X_BUF port map ( I => cs_223_OBUF, O => cs_223_OUTMUX ); cs_231_OBUF_202 : X_TRI port map ( I => cs_231_OUTMUX, CTL => cs_231_ENABLE, O => cs(231) ); cs_231_ENABLEINV : X_INV port map ( I => cs_231_TORGTS, O => cs_231_ENABLE ); cs_231_GTS_OR : X_BUF port map ( I => GTS, O => cs_231_TORGTS ); cs_231_OUTMUX_203 : X_BUF port map ( I => cs_231_OBUF, O => cs_231_OUTMUX ); cs_128_OBUF_204 : X_TRI port map ( I => cs_128_OUTMUX, CTL => cs_128_ENABLE, O => cs(128) ); cs_128_ENABLEINV : X_INV port map ( I => cs_128_TORGTS, O => cs_128_ENABLE ); cs_128_GTS_OR : X_BUF port map ( I => GTS, O => cs_128_TORGTS ); cs_128_OUTMUX_205 : X_BUF port map ( I => cs_128_OBUF, O => cs_128_OUTMUX ); cs_136_OBUF_206 : X_TRI port map ( I => cs_136_OUTMUX, CTL => cs_136_ENABLE, O => cs(136) ); cs_136_ENABLEINV : X_INV port map ( I => cs_136_TORGTS, O => cs_136_ENABLE ); cs_136_GTS_OR : X_BUF port map ( I => GTS, O => cs_136_TORGTS ); cs_136_OUTMUX_207 : X_BUF port map ( I => cs_136_OBUF, O => cs_136_OUTMUX ); cs_144_OBUF_208 : X_TRI port map ( I => cs_144_OUTMUX, CTL => cs_144_ENABLE, O => cs(144) ); cs_144_ENABLEINV : X_INV port map ( I => cs_144_TORGTS, O => cs_144_ENABLE ); cs_144_GTS_OR : X_BUF port map ( I => GTS, O => cs_144_TORGTS ); cs_144_OUTMUX_209 : X_BUF port map ( I => cs_144_OBUF, O => cs_144_OUTMUX ); cs_152_OBUF_210 : X_TRI port map ( I => cs_152_OUTMUX, CTL => cs_152_ENABLE, O => cs(152) ); cs_152_ENABLEINV : X_INV port map ( I => cs_152_TORGTS, O => cs_152_ENABLE ); cs_152_GTS_OR : X_BUF port map ( I => GTS, O => cs_152_TORGTS ); cs_152_OUTMUX_211 : X_BUF port map ( I => cs_152_OBUF, O => cs_152_OUTMUX ); cs_160_OBUF_212 : X_TRI port map ( I => cs_160_OUTMUX, CTL => cs_160_ENABLE, O => cs(160) ); cs_160_ENABLEINV : X_INV port map ( I => cs_160_TORGTS, O => cs_160_ENABLE ); cs_160_GTS_OR : X_BUF port map ( I => GTS, O => cs_160_TORGTS ); cs_160_OUTMUX_213 : X_BUF port map ( I => cs_160_OBUF, O => cs_160_OUTMUX ); cs_208_OBUF_214 : X_TRI port map ( I => cs_208_OUTMUX, CTL => cs_208_ENABLE, O => cs(208) ); cs_208_ENABLEINV : X_INV port map ( I => cs_208_TORGTS, O => cs_208_ENABLE ); cs_208_GTS_OR : X_BUF port map ( I => GTS, O => cs_208_TORGTS ); cs_208_OUTMUX_215 : X_BUF port map ( I => cs_208_OBUF, O => cs_208_OUTMUX ); cs_216_OBUF_216 : X_TRI port map ( I => cs_216_OUTMUX, CTL => cs_216_ENABLE, O => cs(216) ); cs_216_ENABLEINV : X_INV port map ( I => cs_216_TORGTS, O => cs_216_ENABLE ); cs_216_GTS_OR : X_BUF port map ( I => GTS, O => cs_216_TORGTS ); cs_216_OUTMUX_217 : X_BUF port map ( I => cs_216_OBUF, O => cs_216_OUTMUX ); cs_224_OBUF_218 : X_TRI port map ( I => cs_224_OUTMUX, CTL => cs_224_ENABLE, O => cs(224) ); cs_224_ENABLEINV : X_INV port map ( I => cs_224_TORGTS, O => cs_224_ENABLE ); cs_224_GTS_OR : X_BUF port map ( I => GTS, O => cs_224_TORGTS ); cs_224_OUTMUX_219 : X_BUF port map ( I => cs_224_OBUF, O => cs_224_OUTMUX ); cs_232_OBUF_220 : X_TRI port map ( I => cs_232_OUTMUX, CTL => cs_232_ENABLE, O => cs(232) ); cs_232_ENABLEINV : X_INV port map ( I => cs_232_TORGTS, O => cs_232_ENABLE ); cs_232_GTS_OR : X_BUF port map ( I => GTS, O => cs_232_TORGTS ); cs_232_OUTMUX_221 : X_BUF port map ( I => cs_232_OBUF, O => cs_232_OUTMUX ); cs_240_OBUF_222 : X_TRI port map ( I => cs_240_OUTMUX, CTL => cs_240_ENABLE, O => cs(240) ); cs_240_ENABLEINV : X_INV port map ( I => cs_240_TORGTS, O => cs_240_ENABLE ); cs_240_GTS_OR : X_BUF port map ( I => GTS, O => cs_240_TORGTS ); cs_240_OUTMUX_223 : X_BUF port map ( I => cs_240_OBUF, O => cs_240_OUTMUX ); cs_129_OBUF_224 : X_TRI port map ( I => cs_129_OUTMUX, CTL => cs_129_ENABLE, O => cs(129) ); cs_129_ENABLEINV : X_INV port map ( I => cs_129_TORGTS, O => cs_129_ENABLE ); cs_129_GTS_OR : X_BUF port map ( I => GTS, O => cs_129_TORGTS ); cs_129_OUTMUX_225 : X_BUF port map ( I => cs_129_OBUF, O => cs_129_OUTMUX ); cs_137_OBUF_226 : X_TRI port map ( I => cs_137_OUTMUX, CTL => cs_137_ENABLE, O => cs(137) ); cs_137_ENABLEINV : X_INV port map ( I => cs_137_TORGTS, O => cs_137_ENABLE ); cs_137_GTS_OR : X_BUF port map ( I => GTS, O => cs_137_TORGTS ); cs_137_OUTMUX_227 : X_BUF port map ( I => cs_137_OBUF, O => cs_137_OUTMUX ); cs_145_OBUF_228 : X_TRI port map ( I => cs_145_OUTMUX, CTL => cs_145_ENABLE, O => cs(145) ); cs_145_ENABLEINV : X_INV port map ( I => cs_145_TORGTS, O => cs_145_ENABLE ); cs_145_GTS_OR : X_BUF port map ( I => GTS, O => cs_145_TORGTS ); cs_145_OUTMUX_229 : X_BUF port map ( I => cs_145_OBUF, O => cs_145_OUTMUX ); cs_153_OBUF_230 : X_TRI port map ( I => cs_153_OUTMUX, CTL => cs_153_ENABLE, O => cs(153) ); cs_153_ENABLEINV : X_INV port map ( I => cs_153_TORGTS, O => cs_153_ENABLE ); cs_153_GTS_OR : X_BUF port map ( I => GTS, O => cs_153_TORGTS ); cs_153_OUTMUX_231 : X_BUF port map ( I => cs_153_OBUF, O => cs_153_OUTMUX ); cs_161_OBUF_232 : X_TRI port map ( I => cs_161_OUTMUX, CTL => cs_161_ENABLE, O => cs(161) ); cs_161_ENABLEINV : X_INV port map ( I => cs_161_TORGTS, O => cs_161_ENABLE ); cs_161_GTS_OR : X_BUF port map ( I => GTS, O => cs_161_TORGTS ); cs_161_OUTMUX_233 : X_BUF port map ( I => cs_161_OBUF, O => cs_161_OUTMUX ); cs_209_OBUF_234 : X_TRI port map ( I => cs_209_OUTMUX, CTL => cs_209_ENABLE, O => cs(209) ); cs_209_ENABLEINV : X_INV port map ( I => cs_209_TORGTS, O => cs_209_ENABLE ); cs_209_GTS_OR : X_BUF port map ( I => GTS, O => cs_209_TORGTS ); cs_209_OUTMUX_235 : X_BUF port map ( I => cs_209_OBUF, O => cs_209_OUTMUX ); cs_217_OBUF_236 : X_TRI port map ( I => cs_217_OUTMUX, CTL => cs_217_ENABLE, O => cs(217) ); cs_217_ENABLEINV : X_INV port map ( I => cs_217_TORGTS, O => cs_217_ENABLE ); cs_217_GTS_OR : X_BUF port map ( I => GTS, O => cs_217_TORGTS ); cs_217_OUTMUX_237 : X_BUF port map ( I => cs_217_OBUF, O => cs_217_OUTMUX ); cs_225_OBUF_238 : X_TRI port map ( I => cs_225_OUTMUX, CTL => cs_225_ENABLE, O => cs(225) ); cs_225_ENABLEINV : X_INV port map ( I => cs_225_TORGTS, O => cs_225_ENABLE ); cs_225_GTS_OR : X_BUF port map ( I => GTS, O => cs_225_TORGTS ); cs_225_OUTMUX_239 : X_BUF port map ( I => cs_225_OBUF, O => cs_225_OUTMUX ); cs_233_OBUF_240 : X_TRI port map ( I => cs_233_OUTMUX, CTL => cs_233_ENABLE, O => cs(233) ); cs_233_ENABLEINV : X_INV port map ( I => cs_233_TORGTS, O => cs_233_ENABLE ); cs_233_GTS_OR : X_BUF port map ( I => GTS, O => cs_233_TORGTS ); cs_233_OUTMUX_241 : X_BUF port map ( I => cs_233_OBUF, O => cs_233_OUTMUX ); cs_241_OBUF_242 : X_TRI port map ( I => cs_241_OUTMUX, CTL => cs_241_ENABLE, O => cs(241) ); cs_241_ENABLEINV : X_INV port map ( I => cs_241_TORGTS, O => cs_241_ENABLE ); cs_241_GTS_OR : X_BUF port map ( I => GTS, O => cs_241_TORGTS ); cs_241_OUTMUX_243 : X_BUF port map ( I => cs_241_OBUF, O => cs_241_OUTMUX ); cs_138_OBUF_244 : X_TRI port map ( I => cs_138_OUTMUX, CTL => cs_138_ENABLE, O => cs(138) ); cs_138_ENABLEINV : X_INV port map ( I => cs_138_TORGTS, O => cs_138_ENABLE ); cs_138_GTS_OR : X_BUF port map ( I => GTS, O => cs_138_TORGTS ); cs_138_OUTMUX_245 : X_BUF port map ( I => cs_138_OBUF, O => cs_138_OUTMUX ); cs_146_OBUF_246 : X_TRI port map ( I => cs_146_OUTMUX, CTL => cs_146_ENABLE, O => cs(146) ); cs_146_ENABLEINV : X_INV port map ( I => cs_146_TORGTS, O => cs_146_ENABLE ); cs_146_GTS_OR : X_BUF port map ( I => GTS, O => cs_146_TORGTS ); cs_146_OUTMUX_247 : X_BUF port map ( I => cs_146_OBUF, O => cs_146_OUTMUX ); cs_154_OBUF_248 : X_TRI port map ( I => cs_154_OUTMUX, CTL => cs_154_ENABLE, O => cs(154) ); cs_154_ENABLEINV : X_INV port map ( I => cs_154_TORGTS, O => cs_154_ENABLE ); cs_154_GTS_OR : X_BUF port map ( I => GTS, O => cs_154_TORGTS ); cs_154_OUTMUX_249 : X_BUF port map ( I => cs_154_OBUF, O => cs_154_OUTMUX ); cs_162_OBUF_250 : X_TRI port map ( I => cs_162_OUTMUX, CTL => cs_162_ENABLE, O => cs(162) ); cs_162_ENABLEINV : X_INV port map ( I => cs_162_TORGTS, O => cs_162_ENABLE ); cs_162_GTS_OR : X_BUF port map ( I => GTS, O => cs_162_TORGTS ); cs_162_OUTMUX_251 : X_BUF port map ( I => cs_162_OBUF, O => cs_162_OUTMUX ); cs_170_OBUF_252 : X_TRI port map ( I => cs_170_OUTMUX, CTL => cs_170_ENABLE, O => cs(170) ); cs_170_ENABLEINV : X_INV port map ( I => cs_170_TORGTS, O => cs_170_ENABLE ); cs_170_GTS_OR : X_BUF port map ( I => GTS, O => cs_170_TORGTS ); cs_170_OUTMUX_253 : X_BUF port map ( I => cs_170_OBUF, O => cs_170_OUTMUX ); cs_218_OBUF_254 : X_TRI port map ( I => cs_218_OUTMUX, CTL => cs_218_ENABLE, O => cs(218) ); cs_218_ENABLEINV : X_INV port map ( I => cs_218_TORGTS, O => cs_218_ENABLE ); cs_218_GTS_OR : X_BUF port map ( I => GTS, O => cs_218_TORGTS ); cs_218_OUTMUX_255 : X_BUF port map ( I => cs_218_OBUF, O => cs_218_OUTMUX ); cs_226_OBUF_256 : X_TRI port map ( I => cs_226_OUTMUX, CTL => cs_226_ENABLE, O => cs(226) ); cs_226_ENABLEINV : X_INV port map ( I => cs_226_TORGTS, O => cs_226_ENABLE ); cs_226_GTS_OR : X_BUF port map ( I => GTS, O => cs_226_TORGTS ); cs_226_OUTMUX_257 : X_BUF port map ( I => cs_226_OBUF, O => cs_226_OUTMUX ); cs_234_OBUF_258 : X_TRI port map ( I => cs_234_OUTMUX, CTL => cs_234_ENABLE, O => cs(234) ); cs_234_ENABLEINV : X_INV port map ( I => cs_234_TORGTS, O => cs_234_ENABLE ); cs_234_GTS_OR : X_BUF port map ( I => GTS, O => cs_234_TORGTS ); cs_234_OUTMUX_259 : X_BUF port map ( I => cs_234_OBUF, O => cs_234_OUTMUX ); cs_242_OBUF_260 : X_TRI port map ( I => cs_242_OUTMUX, CTL => cs_242_ENABLE, O => cs(242) ); cs_242_ENABLEINV : X_INV port map ( I => cs_242_TORGTS, O => cs_242_ENABLE ); cs_242_GTS_OR : X_BUF port map ( I => GTS, O => cs_242_TORGTS ); cs_242_OUTMUX_261 : X_BUF port map ( I => cs_242_OBUF, O => cs_242_OUTMUX ); cs_250_OBUF_262 : X_TRI port map ( I => cs_250_OUTMUX, CTL => cs_250_ENABLE, O => cs(250) ); cs_250_ENABLEINV : X_INV port map ( I => cs_250_TORGTS, O => cs_250_ENABLE ); cs_250_GTS_OR : X_BUF port map ( I => GTS, O => cs_250_TORGTS ); cs_250_OUTMUX_263 : X_BUF port map ( I => cs_250_OBUF, O => cs_250_OUTMUX ); cs_139_OBUF_264 : X_TRI port map ( I => cs_139_OUTMUX, CTL => cs_139_ENABLE, O => cs(139) ); cs_139_ENABLEINV : X_INV port map ( I => cs_139_TORGTS, O => cs_139_ENABLE ); cs_139_GTS_OR : X_BUF port map ( I => GTS, O => cs_139_TORGTS ); cs_139_OUTMUX_265 : X_BUF port map ( I => cs_139_OBUF, O => cs_139_OUTMUX ); cs_147_OBUF_266 : X_TRI port map ( I => cs_147_OUTMUX, CTL => cs_147_ENABLE, O => cs(147) ); cs_147_ENABLEINV : X_INV port map ( I => cs_147_TORGTS, O => cs_147_ENABLE ); cs_147_GTS_OR : X_BUF port map ( I => GTS, O => cs_147_TORGTS ); cs_147_OUTMUX_267 : X_BUF port map ( I => cs_147_OBUF, O => cs_147_OUTMUX ); cs_155_OBUF_268 : X_TRI port map ( I => cs_155_OUTMUX, CTL => cs_155_ENABLE, O => cs(155) ); cs_155_ENABLEINV : X_INV port map ( I => cs_155_TORGTS, O => cs_155_ENABLE ); cs_155_GTS_OR : X_BUF port map ( I => GTS, O => cs_155_TORGTS ); cs_155_OUTMUX_269 : X_BUF port map ( I => cs_155_OBUF, O => cs_155_OUTMUX ); cs_163_OBUF_270 : X_TRI port map ( I => cs_163_OUTMUX, CTL => cs_163_ENABLE, O => cs(163) ); cs_163_ENABLEINV : X_INV port map ( I => cs_163_TORGTS, O => cs_163_ENABLE ); cs_163_GTS_OR : X_BUF port map ( I => GTS, O => cs_163_TORGTS ); cs_163_OUTMUX_271 : X_BUF port map ( I => cs_163_OBUF, O => cs_163_OUTMUX ); cs_171_OBUF_272 : X_TRI port map ( I => cs_171_OUTMUX, CTL => cs_171_ENABLE, O => cs(171) ); cs_171_ENABLEINV : X_INV port map ( I => cs_171_TORGTS, O => cs_171_ENABLE ); cs_171_GTS_OR : X_BUF port map ( I => GTS, O => cs_171_TORGTS ); cs_171_OUTMUX_273 : X_BUF port map ( I => cs_171_OBUF, O => cs_171_OUTMUX ); cs_219_OBUF_274 : X_TRI port map ( I => cs_219_OUTMUX, CTL => cs_219_ENABLE, O => cs(219) ); cs_219_ENABLEINV : X_INV port map ( I => cs_219_TORGTS, O => cs_219_ENABLE ); cs_219_GTS_OR : X_BUF port map ( I => GTS, O => cs_219_TORGTS ); cs_219_OUTMUX_275 : X_BUF port map ( I => cs_219_OBUF, O => cs_219_OUTMUX ); cs_227_OBUF_276 : X_TRI port map ( I => cs_227_OUTMUX, CTL => cs_227_ENABLE, O => cs(227) ); cs_227_ENABLEINV : X_INV port map ( I => cs_227_TORGTS, O => cs_227_ENABLE ); cs_227_GTS_OR : X_BUF port map ( I => GTS, O => cs_227_TORGTS ); cs_227_OUTMUX_277 : X_BUF port map ( I => cs_227_OBUF, O => cs_227_OUTMUX ); cs_235_OBUF_278 : X_TRI port map ( I => cs_235_OUTMUX, CTL => cs_235_ENABLE, O => cs(235) ); cs_235_ENABLEINV : X_INV port map ( I => cs_235_TORGTS, O => cs_235_ENABLE ); cs_235_GTS_OR : X_BUF port map ( I => GTS, O => cs_235_TORGTS ); cs_235_OUTMUX_279 : X_BUF port map ( I => cs_235_OBUF, O => cs_235_OUTMUX ); cs_243_OBUF_280 : X_TRI port map ( I => cs_243_OUTMUX, CTL => cs_243_ENABLE, O => cs(243) ); cs_243_ENABLEINV : X_INV port map ( I => cs_243_TORGTS, O => cs_243_ENABLE ); cs_243_GTS_OR : X_BUF port map ( I => GTS, O => cs_243_TORGTS ); cs_243_OUTMUX_281 : X_BUF port map ( I => cs_243_OBUF, O => cs_243_OUTMUX ); cs_251_OBUF_282 : X_TRI port map ( I => cs_251_OUTMUX, CTL => cs_251_ENABLE, O => cs(251) ); cs_251_ENABLEINV : X_INV port map ( I => cs_251_TORGTS, O => cs_251_ENABLE ); cs_251_GTS_OR : X_BUF port map ( I => GTS, O => cs_251_TORGTS ); cs_251_OUTMUX_283 : X_BUF port map ( I => cs_251_OBUF, O => cs_251_OUTMUX ); cs_148_OBUF_284 : X_TRI port map ( I => cs_148_OUTMUX, CTL => cs_148_ENABLE, O => cs(148) ); cs_148_ENABLEINV : X_INV port map ( I => cs_148_TORGTS, O => cs_148_ENABLE ); cs_148_GTS_OR : X_BUF port map ( I => GTS, O => cs_148_TORGTS ); cs_148_OUTMUX_285 : X_BUF port map ( I => cs_148_OBUF, O => cs_148_OUTMUX ); cs_156_OBUF_286 : X_TRI port map ( I => cs_156_OUTMUX, CTL => cs_156_ENABLE, O => cs(156) ); cs_156_ENABLEINV : X_INV port map ( I => cs_156_TORGTS, O => cs_156_ENABLE ); cs_156_GTS_OR : X_BUF port map ( I => GTS, O => cs_156_TORGTS ); cs_156_OUTMUX_287 : X_BUF port map ( I => cs_156_OBUF, O => cs_156_OUTMUX ); cs_164_OBUF_288 : X_TRI port map ( I => cs_164_OUTMUX, CTL => cs_164_ENABLE, O => cs(164) ); cs_164_ENABLEINV : X_INV port map ( I => cs_164_TORGTS, O => cs_164_ENABLE ); cs_164_GTS_OR : X_BUF port map ( I => GTS, O => cs_164_TORGTS ); cs_164_OUTMUX_289 : X_BUF port map ( I => cs_164_OBUF, O => cs_164_OUTMUX ); cs_172_OBUF_290 : X_TRI port map ( I => cs_172_OUTMUX, CTL => cs_172_ENABLE, O => cs(172) ); cs_172_ENABLEINV : X_INV port map ( I => cs_172_TORGTS, O => cs_172_ENABLE ); cs_172_GTS_OR : X_BUF port map ( I => GTS, O => cs_172_TORGTS ); cs_172_OUTMUX_291 : X_BUF port map ( I => cs_172_OBUF, O => cs_172_OUTMUX ); cs_180_OBUF_292 : X_TRI port map ( I => cs_180_OUTMUX, CTL => cs_180_ENABLE, O => cs(180) ); cs_180_ENABLEINV : X_INV port map ( I => cs_180_TORGTS, O => cs_180_ENABLE ); cs_180_GTS_OR : X_BUF port map ( I => GTS, O => cs_180_TORGTS ); cs_180_OUTMUX_293 : X_BUF port map ( I => cs_180_OBUF, O => cs_180_OUTMUX ); cs_228_OBUF_294 : X_TRI port map ( I => cs_228_OUTMUX, CTL => cs_228_ENABLE, O => cs(228) ); cs_228_ENABLEINV : X_INV port map ( I => cs_228_TORGTS, O => cs_228_ENABLE ); cs_228_GTS_OR : X_BUF port map ( I => GTS, O => cs_228_TORGTS ); cs_228_OUTMUX_295 : X_BUF port map ( I => cs_228_OBUF, O => cs_228_OUTMUX ); cs_236_OBUF_296 : X_TRI port map ( I => cs_236_OUTMUX, CTL => cs_236_ENABLE, O => cs(236) ); cs_236_ENABLEINV : X_INV port map ( I => cs_236_TORGTS, O => cs_236_ENABLE ); cs_236_GTS_OR : X_BUF port map ( I => GTS, O => cs_236_TORGTS ); cs_236_OUTMUX_297 : X_BUF port map ( I => cs_236_OBUF, O => cs_236_OUTMUX ); cs_244_OBUF_298 : X_TRI port map ( I => cs_244_OUTMUX, CTL => cs_244_ENABLE, O => cs(244) ); cs_244_ENABLEINV : X_INV port map ( I => cs_244_TORGTS, O => cs_244_ENABLE ); cs_244_GTS_OR : X_BUF port map ( I => GTS, O => cs_244_TORGTS ); cs_244_OUTMUX_299 : X_BUF port map ( I => cs_244_OBUF, O => cs_244_OUTMUX ); cs_252_OBUF_300 : X_TRI port map ( I => cs_252_OUTMUX, CTL => cs_252_ENABLE, O => cs(252) ); cs_252_ENABLEINV : X_INV port map ( I => cs_252_TORGTS, O => cs_252_ENABLE ); cs_252_GTS_OR : X_BUF port map ( I => GTS, O => cs_252_TORGTS ); cs_252_OUTMUX_301 : X_BUF port map ( I => cs_252_OBUF, O => cs_252_OUTMUX ); cs_149_OBUF_302 : X_TRI port map ( I => cs_149_OUTMUX, CTL => cs_149_ENABLE, O => cs(149) ); cs_149_ENABLEINV : X_INV port map ( I => cs_149_TORGTS, O => cs_149_ENABLE ); cs_149_GTS_OR : X_BUF port map ( I => GTS, O => cs_149_TORGTS ); cs_149_OUTMUX_303 : X_BUF port map ( I => cs_149_OBUF, O => cs_149_OUTMUX ); cs_157_OBUF_304 : X_TRI port map ( I => cs_157_OUTMUX, CTL => cs_157_ENABLE, O => cs(157) ); cs_157_ENABLEINV : X_INV port map ( I => cs_157_TORGTS, O => cs_157_ENABLE ); cs_157_GTS_OR : X_BUF port map ( I => GTS, O => cs_157_TORGTS ); cs_157_OUTMUX_305 : X_BUF port map ( I => cs_157_OBUF, O => cs_157_OUTMUX ); cs_165_OBUF_306 : X_TRI port map ( I => cs_165_OUTMUX, CTL => cs_165_ENABLE, O => cs(165) ); cs_165_ENABLEINV : X_INV port map ( I => cs_165_TORGTS, O => cs_165_ENABLE ); cs_165_GTS_OR : X_BUF port map ( I => GTS, O => cs_165_TORGTS ); cs_165_OUTMUX_307 : X_BUF port map ( I => cs_165_OBUF, O => cs_165_OUTMUX ); cs_173_OBUF_308 : X_TRI port map ( I => cs_173_OUTMUX, CTL => cs_173_ENABLE, O => cs(173) ); cs_173_ENABLEINV : X_INV port map ( I => cs_173_TORGTS, O => cs_173_ENABLE ); cs_173_GTS_OR : X_BUF port map ( I => GTS, O => cs_173_TORGTS ); cs_173_OUTMUX_309 : X_BUF port map ( I => cs_173_OBUF, O => cs_173_OUTMUX ); cs_181_OBUF_310 : X_TRI port map ( I => cs_181_OUTMUX, CTL => cs_181_ENABLE, O => cs(181) ); cs_181_ENABLEINV : X_INV port map ( I => cs_181_TORGTS, O => cs_181_ENABLE ); cs_181_GTS_OR : X_BUF port map ( I => GTS, O => cs_181_TORGTS ); cs_181_OUTMUX_311 : X_BUF port map ( I => cs_181_OBUF, O => cs_181_OUTMUX ); cs_229_OBUF_312 : X_TRI port map ( I => cs_229_OUTMUX, CTL => cs_229_ENABLE, O => cs(229) ); cs_229_ENABLEINV : X_INV port map ( I => cs_229_TORGTS, O => cs_229_ENABLE ); cs_229_GTS_OR : X_BUF port map ( I => GTS, O => cs_229_TORGTS ); cs_229_OUTMUX_313 : X_BUF port map ( I => cs_229_OBUF, O => cs_229_OUTMUX ); cs_237_OBUF_314 : X_TRI port map ( I => cs_237_OUTMUX, CTL => cs_237_ENABLE, O => cs(237) ); cs_237_ENABLEINV : X_INV port map ( I => cs_237_TORGTS, O => cs_237_ENABLE ); cs_237_GTS_OR : X_BUF port map ( I => GTS, O => cs_237_TORGTS ); cs_237_OUTMUX_315 : X_BUF port map ( I => cs_237_OBUF, O => cs_237_OUTMUX ); cs_245_OBUF_316 : X_TRI port map ( I => cs_245_OUTMUX, CTL => cs_245_ENABLE, O => cs(245) ); cs_245_ENABLEINV : X_INV port map ( I => cs_245_TORGTS, O => cs_245_ENABLE ); cs_245_GTS_OR : X_BUF port map ( I => GTS, O => cs_245_TORGTS ); cs_245_OUTMUX_317 : X_BUF port map ( I => cs_245_OBUF, O => cs_245_OUTMUX ); cs_253_OBUF_318 : X_TRI port map ( I => cs_253_OUTMUX, CTL => cs_253_ENABLE, O => cs(253) ); cs_253_ENABLEINV : X_INV port map ( I => cs_253_TORGTS, O => cs_253_ENABLE ); cs_253_GTS_OR : X_BUF port map ( I => GTS, O => cs_253_TORGTS ); cs_253_OUTMUX_319 : X_BUF port map ( I => cs_253_OBUF, O => cs_253_OUTMUX ); cs_158_OBUF_320 : X_TRI port map ( I => cs_158_OUTMUX, CTL => cs_158_ENABLE, O => cs(158) ); cs_158_ENABLEINV : X_INV port map ( I => cs_158_TORGTS, O => cs_158_ENABLE ); cs_158_GTS_OR : X_BUF port map ( I => GTS, O => cs_158_TORGTS ); cs_158_OUTMUX_321 : X_BUF port map ( I => cs_158_OBUF, O => cs_158_OUTMUX ); cs_166_OBUF_322 : X_TRI port map ( I => cs_166_OUTMUX, CTL => cs_166_ENABLE, O => cs(166) ); cs_166_ENABLEINV : X_INV port map ( I => cs_166_TORGTS, O => cs_166_ENABLE ); cs_166_GTS_OR : X_BUF port map ( I => GTS, O => cs_166_TORGTS ); cs_166_OUTMUX_323 : X_BUF port map ( I => cs_166_OBUF, O => cs_166_OUTMUX ); cs_174_OBUF_324 : X_TRI port map ( I => cs_174_OUTMUX, CTL => cs_174_ENABLE, O => cs(174) ); cs_174_ENABLEINV : X_INV port map ( I => cs_174_TORGTS, O => cs_174_ENABLE ); cs_174_GTS_OR : X_BUF port map ( I => GTS, O => cs_174_TORGTS ); cs_174_OUTMUX_325 : X_BUF port map ( I => cs_174_OBUF, O => cs_174_OUTMUX ); cs_182_OBUF_326 : X_TRI port map ( I => cs_182_OUTMUX, CTL => cs_182_ENABLE, O => cs(182) ); cs_182_ENABLEINV : X_INV port map ( I => cs_182_TORGTS, O => cs_182_ENABLE ); cs_182_GTS_OR : X_BUF port map ( I => GTS, O => cs_182_TORGTS ); cs_182_OUTMUX_327 : X_BUF port map ( I => cs_182_OBUF, O => cs_182_OUTMUX ); cs_190_OBUF_328 : X_TRI port map ( I => cs_190_OUTMUX, CTL => cs_190_ENABLE, O => cs(190) ); cs_190_ENABLEINV : X_INV port map ( I => cs_190_TORGTS, O => cs_190_ENABLE ); cs_190_GTS_OR : X_BUF port map ( I => GTS, O => cs_190_TORGTS ); cs_190_OUTMUX_329 : X_BUF port map ( I => cs_190_OBUF, O => cs_190_OUTMUX ); cs_238_OBUF_330 : X_TRI port map ( I => cs_238_OUTMUX, CTL => cs_238_ENABLE, O => cs(238) ); cs_238_ENABLEINV : X_INV port map ( I => cs_238_TORGTS, O => cs_238_ENABLE ); cs_238_GTS_OR : X_BUF port map ( I => GTS, O => cs_238_TORGTS ); cs_238_OUTMUX_331 : X_BUF port map ( I => cs_238_OBUF, O => cs_238_OUTMUX ); cs_246_OBUF_332 : X_TRI port map ( I => cs_246_OUTMUX, CTL => cs_246_ENABLE, O => cs(246) ); cs_246_ENABLEINV : X_INV port map ( I => cs_246_TORGTS, O => cs_246_ENABLE ); cs_246_GTS_OR : X_BUF port map ( I => GTS, O => cs_246_TORGTS ); cs_246_OUTMUX_333 : X_BUF port map ( I => cs_246_OBUF, O => cs_246_OUTMUX ); cs_254_OBUF_334 : X_TRI port map ( I => cs_254_OUTMUX, CTL => cs_254_ENABLE, O => cs(254) ); cs_254_ENABLEINV : X_INV port map ( I => cs_254_TORGTS, O => cs_254_ENABLE ); cs_254_GTS_OR : X_BUF port map ( I => GTS, O => cs_254_TORGTS ); cs_254_OUTMUX_335 : X_BUF port map ( I => cs_254_OBUF, O => cs_254_OUTMUX ); cs_159_OBUF_336 : X_TRI port map ( I => cs_159_OUTMUX, CTL => cs_159_ENABLE, O => cs(159) ); cs_159_ENABLEINV : X_INV port map ( I => cs_159_TORGTS, O => cs_159_ENABLE ); cs_159_GTS_OR : X_BUF port map ( I => GTS, O => cs_159_TORGTS ); cs_159_OUTMUX_337 : X_BUF port map ( I => cs_159_OBUF, O => cs_159_OUTMUX ); cs_167_OBUF_338 : X_TRI port map ( I => cs_167_OUTMUX, CTL => cs_167_ENABLE, O => cs(167) ); cs_167_ENABLEINV : X_INV port map ( I => cs_167_TORGTS, O => cs_167_ENABLE ); cs_167_GTS_OR : X_BUF port map ( I => GTS, O => cs_167_TORGTS ); cs_167_OUTMUX_339 : X_BUF port map ( I => cs_167_OBUF, O => cs_167_OUTMUX ); cs_175_OBUF_340 : X_TRI port map ( I => cs_175_OUTMUX, CTL => cs_175_ENABLE, O => cs(175) ); cs_175_ENABLEINV : X_INV port map ( I => cs_175_TORGTS, O => cs_175_ENABLE ); cs_175_GTS_OR : X_BUF port map ( I => GTS, O => cs_175_TORGTS ); cs_175_OUTMUX_341 : X_BUF port map ( I => cs_175_OBUF, O => cs_175_OUTMUX ); cs_183_OBUF_342 : X_TRI port map ( I => cs_183_OUTMUX, CTL => cs_183_ENABLE, O => cs(183) ); cs_183_ENABLEINV : X_INV port map ( I => cs_183_TORGTS, O => cs_183_ENABLE ); cs_183_GTS_OR : X_BUF port map ( I => GTS, O => cs_183_TORGTS ); cs_183_OUTMUX_343 : X_BUF port map ( I => cs_183_OBUF, O => cs_183_OUTMUX ); cs_191_OBUF_344 : X_TRI port map ( I => cs_191_OUTMUX, CTL => cs_191_ENABLE, O => cs(191) ); cs_191_ENABLEINV : X_INV port map ( I => cs_191_TORGTS, O => cs_191_ENABLE ); cs_191_GTS_OR : X_BUF port map ( I => GTS, O => cs_191_TORGTS ); cs_191_OUTMUX_345 : X_BUF port map ( I => cs_191_OBUF, O => cs_191_OUTMUX ); cs_239_OBUF_346 : X_TRI port map ( I => cs_239_OUTMUX, CTL => cs_239_ENABLE, O => cs(239) ); cs_239_ENABLEINV : X_INV port map ( I => cs_239_TORGTS, O => cs_239_ENABLE ); cs_239_GTS_OR : X_BUF port map ( I => GTS, O => cs_239_TORGTS ); cs_239_OUTMUX_347 : X_BUF port map ( I => cs_239_OBUF, O => cs_239_OUTMUX ); cs_247_OBUF_348 : X_TRI port map ( I => cs_247_OUTMUX, CTL => cs_247_ENABLE, O => cs(247) ); cs_247_ENABLEINV : X_INV port map ( I => cs_247_TORGTS, O => cs_247_ENABLE ); cs_247_GTS_OR : X_BUF port map ( I => GTS, O => cs_247_TORGTS ); cs_247_OUTMUX_349 : X_BUF port map ( I => cs_247_OBUF, O => cs_247_OUTMUX ); cs_255_OBUF_350 : X_TRI port map ( I => cs_255_OUTMUX, CTL => cs_255_ENABLE, O => cs(255) ); cs_255_ENABLEINV : X_INV port map ( I => cs_255_TORGTS, O => cs_255_ENABLE ); cs_255_GTS_OR : X_BUF port map ( I => GTS, O => cs_255_TORGTS ); cs_255_OUTMUX_351 : X_BUF port map ( I => cs_255_OBUF, O => cs_255_OUTMUX ); cs_168_OBUF_352 : X_TRI port map ( I => cs_168_OUTMUX, CTL => cs_168_ENABLE, O => cs(168) ); cs_168_ENABLEINV : X_INV port map ( I => cs_168_TORGTS, O => cs_168_ENABLE ); cs_168_GTS_OR : X_BUF port map ( I => GTS, O => cs_168_TORGTS ); cs_168_OUTMUX_353 : X_BUF port map ( I => cs_168_OBUF, O => cs_168_OUTMUX ); cs_176_OBUF_354 : X_TRI port map ( I => cs_176_OUTMUX, CTL => cs_176_ENABLE, O => cs(176) ); cs_176_ENABLEINV : X_INV port map ( I => cs_176_TORGTS, O => cs_176_ENABLE ); cs_176_GTS_OR : X_BUF port map ( I => GTS, O => cs_176_TORGTS ); cs_176_OUTMUX_355 : X_BUF port map ( I => cs_176_OBUF, O => cs_176_OUTMUX ); cs_184_OBUF_356 : X_TRI port map ( I => cs_184_OUTMUX, CTL => cs_184_ENABLE, O => cs(184) ); cs_184_ENABLEINV : X_INV port map ( I => cs_184_TORGTS, O => cs_184_ENABLE ); cs_184_GTS_OR : X_BUF port map ( I => GTS, O => cs_184_TORGTS ); cs_184_OUTMUX_357 : X_BUF port map ( I => cs_184_OBUF, O => cs_184_OUTMUX ); cs_192_OBUF_358 : X_TRI port map ( I => cs_192_OUTMUX, CTL => cs_192_ENABLE, O => cs(192) ); cs_192_ENABLEINV : X_INV port map ( I => cs_192_TORGTS, O => cs_192_ENABLE ); cs_192_GTS_OR : X_BUF port map ( I => GTS, O => cs_192_TORGTS ); cs_192_OUTMUX_359 : X_BUF port map ( I => cs_192_OBUF, O => cs_192_OUTMUX ); cs_248_OBUF_360 : X_TRI port map ( I => cs_248_OUTMUX, CTL => cs_248_ENABLE, O => cs(248) ); cs_248_ENABLEINV : X_INV port map ( I => cs_248_TORGTS, O => cs_248_ENABLE ); cs_248_GTS_OR : X_BUF port map ( I => GTS, O => cs_248_TORGTS ); cs_248_OUTMUX_361 : X_BUF port map ( I => cs_248_OBUF, O => cs_248_OUTMUX ); cs_169_OBUF_362 : X_TRI port map ( I => cs_169_OUTMUX, CTL => cs_169_ENABLE, O => cs(169) ); cs_169_ENABLEINV : X_INV port map ( I => cs_169_TORGTS, O => cs_169_ENABLE ); cs_169_GTS_OR : X_BUF port map ( I => GTS, O => cs_169_TORGTS ); cs_169_OUTMUX_363 : X_BUF port map ( I => cs_169_OBUF, O => cs_169_OUTMUX ); cs_177_OBUF_364 : X_TRI port map ( I => cs_177_OUTMUX, CTL => cs_177_ENABLE, O => cs(177) ); cs_177_ENABLEINV : X_INV port map ( I => cs_177_TORGTS, O => cs_177_ENABLE ); cs_177_GTS_OR : X_BUF port map ( I => GTS, O => cs_177_TORGTS ); cs_177_OUTMUX_365 : X_BUF port map ( I => cs_177_OBUF, O => cs_177_OUTMUX ); cs_185_OBUF_366 : X_TRI port map ( I => cs_185_OUTMUX, CTL => cs_185_ENABLE, O => cs(185) ); cs_185_ENABLEINV : X_INV port map ( I => cs_185_TORGTS, O => cs_185_ENABLE ); cs_185_GTS_OR : X_BUF port map ( I => GTS, O => cs_185_TORGTS ); cs_185_OUTMUX_367 : X_BUF port map ( I => cs_185_OBUF, O => cs_185_OUTMUX ); cs_193_OBUF_368 : X_TRI port map ( I => cs_193_OUTMUX, CTL => cs_193_ENABLE, O => cs(193) ); cs_193_ENABLEINV : X_INV port map ( I => cs_193_TORGTS, O => cs_193_ENABLE ); cs_193_GTS_OR : X_BUF port map ( I => GTS, O => cs_193_TORGTS ); cs_193_OUTMUX_369 : X_BUF port map ( I => cs_193_OBUF, O => cs_193_OUTMUX ); cs_249_OBUF_370 : X_TRI port map ( I => cs_249_OUTMUX, CTL => cs_249_ENABLE, O => cs(249) ); cs_249_ENABLEINV : X_INV port map ( I => cs_249_TORGTS, O => cs_249_ENABLE ); cs_249_GTS_OR : X_BUF port map ( I => GTS, O => cs_249_TORGTS ); cs_249_OUTMUX_371 : X_BUF port map ( I => cs_249_OBUF, O => cs_249_OUTMUX ); cs_178_OBUF_372 : X_TRI port map ( I => cs_178_OUTMUX, CTL => cs_178_ENABLE, O => cs(178) ); cs_178_ENABLEINV : X_INV port map ( I => cs_178_TORGTS, O => cs_178_ENABLE ); cs_178_GTS_OR : X_BUF port map ( I => GTS, O => cs_178_TORGTS ); cs_178_OUTMUX_373 : X_BUF port map ( I => cs_178_OBUF, O => cs_178_OUTMUX ); cs_186_OBUF_374 : X_TRI port map ( I => cs_186_OUTMUX, CTL => cs_186_ENABLE, O => cs(186) ); cs_186_ENABLEINV : X_INV port map ( I => cs_186_TORGTS, O => cs_186_ENABLE ); cs_186_GTS_OR : X_BUF port map ( I => GTS, O => cs_186_TORGTS ); cs_186_OUTMUX_375 : X_BUF port map ( I => cs_186_OBUF, O => cs_186_OUTMUX ); cs_194_OBUF_376 : X_TRI port map ( I => cs_194_OUTMUX, CTL => cs_194_ENABLE, O => cs(194) ); cs_194_ENABLEINV : X_INV port map ( I => cs_194_TORGTS, O => cs_194_ENABLE ); cs_194_GTS_OR : X_BUF port map ( I => GTS, O => cs_194_TORGTS ); cs_194_OUTMUX_377 : X_BUF port map ( I => cs_194_OBUF, O => cs_194_OUTMUX ); cs_179_OBUF_378 : X_TRI port map ( I => cs_179_OUTMUX, CTL => cs_179_ENABLE, O => cs(179) ); cs_179_ENABLEINV : X_INV port map ( I => cs_179_TORGTS, O => cs_179_ENABLE ); cs_179_GTS_OR : X_BUF port map ( I => GTS, O => cs_179_TORGTS ); cs_179_OUTMUX_379 : X_BUF port map ( I => cs_179_OBUF, O => cs_179_OUTMUX ); cs_187_OBUF_380 : X_TRI port map ( I => cs_187_OUTMUX, CTL => cs_187_ENABLE, O => cs(187) ); cs_187_ENABLEINV : X_INV port map ( I => cs_187_TORGTS, O => cs_187_ENABLE ); cs_187_GTS_OR : X_BUF port map ( I => GTS, O => cs_187_TORGTS ); cs_187_OUTMUX_381 : X_BUF port map ( I => cs_187_OBUF, O => cs_187_OUTMUX ); cs_195_OBUF_382 : X_TRI port map ( I => cs_195_OUTMUX, CTL => cs_195_ENABLE, O => cs(195) ); cs_195_ENABLEINV : X_INV port map ( I => cs_195_TORGTS, O => cs_195_ENABLE ); cs_195_GTS_OR : X_BUF port map ( I => GTS, O => cs_195_TORGTS ); cs_195_OUTMUX_383 : X_BUF port map ( I => cs_195_OBUF, O => cs_195_OUTMUX ); cs_188_OBUF_384 : X_TRI port map ( I => cs_188_OUTMUX, CTL => cs_188_ENABLE, O => cs(188) ); cs_188_ENABLEINV : X_INV port map ( I => cs_188_TORGTS, O => cs_188_ENABLE ); cs_188_GTS_OR : X_BUF port map ( I => GTS, O => cs_188_TORGTS ); cs_188_OUTMUX_385 : X_BUF port map ( I => cs_188_OBUF, O => cs_188_OUTMUX ); cs_196_OBUF_386 : X_TRI port map ( I => cs_196_OUTMUX, CTL => cs_196_ENABLE, O => cs(196) ); cs_196_ENABLEINV : X_INV port map ( I => cs_196_TORGTS, O => cs_196_ENABLE ); cs_196_GTS_OR : X_BUF port map ( I => GTS, O => cs_196_TORGTS ); cs_196_OUTMUX_387 : X_BUF port map ( I => cs_196_OBUF, O => cs_196_OUTMUX ); cs_189_OBUF_388 : X_TRI port map ( I => cs_189_OUTMUX, CTL => cs_189_ENABLE, O => cs(189) ); cs_189_ENABLEINV : X_INV port map ( I => cs_189_TORGTS, O => cs_189_ENABLE ); cs_189_GTS_OR : X_BUF port map ( I => GTS, O => cs_189_TORGTS ); cs_189_OUTMUX_389 : X_BUF port map ( I => cs_189_OBUF, O => cs_189_OUTMUX ); cs_197_OBUF_390 : X_TRI port map ( I => cs_197_OUTMUX, CTL => cs_197_ENABLE, O => cs(197) ); cs_197_ENABLEINV : X_INV port map ( I => cs_197_TORGTS, O => cs_197_ENABLE ); cs_197_GTS_OR : X_BUF port map ( I => GTS, O => cs_197_TORGTS ); cs_197_OUTMUX_391 : X_BUF port map ( I => cs_197_OBUF, O => cs_197_OUTMUX ); cs_198_OBUF_392 : X_TRI port map ( I => cs_198_OUTMUX, CTL => cs_198_ENABLE, O => cs(198) ); cs_198_ENABLEINV : X_INV port map ( I => cs_198_TORGTS, O => cs_198_ENABLE ); cs_198_GTS_OR : X_BUF port map ( I => GTS, O => cs_198_TORGTS ); cs_198_OUTMUX_393 : X_BUF port map ( I => cs_198_OBUF, O => cs_198_OUTMUX ); cs_199_OBUF_394 : X_TRI port map ( I => cs_199_OUTMUX, CTL => cs_199_ENABLE, O => cs(199) ); cs_199_ENABLEINV : X_INV port map ( I => cs_199_TORGTS, O => cs_199_ENABLE ); cs_199_GTS_OR : X_BUF port map ( I => GTS, O => cs_199_TORGTS ); cs_199_OUTMUX_395 : X_BUF port map ( I => cs_199_OBUF, O => cs_199_OUTMUX ); clk_OBUF_396 : X_TRI port map ( I => clk_OUTMUX, CTL => clk_ENABLE, O => clk ); clk_ENABLEINV : X_INV port map ( I => clk_TORGTS, O => clk_ENABLE ); clk_GTS_OR : X_BUF port map ( I => GTS, O => clk_TORGTS ); clk_OUTMUX_397 : X_BUF port map ( I => clk_OBUF, O => clk_OUTMUX ); adr_bus_10_IMUX : X_BUF port map ( I => adr_bus_10_IBUF_13, O => adr_bus_10_IBUF ); adr_bus_10_IBUF_398 : X_BUF port map ( I => adr_bus(10), O => adr_bus_10_IBUF_13 ); adr_bus_11_IMUX : X_BUF port map ( I => adr_bus_11_IBUF_14, O => adr_bus_11_IBUF ); adr_bus_11_IBUF_399 : X_BUF port map ( I => adr_bus(11), O => adr_bus_11_IBUF_14 ); adr_bus_12_IMUX : X_BUF port map ( I => adr_bus_12_IBUF_15, O => adr_bus_12_IBUF ); adr_bus_12_IBUF_400 : X_BUF port map ( I => adr_bus(12), O => adr_bus_12_IBUF_15 ); adr_bus_13_IMUX : X_BUF port map ( I => adr_bus_13_IBUF_16, O => adr_bus_13_IBUF ); adr_bus_13_IBUF_401 : X_BUF port map ( I => adr_bus(13), O => adr_bus_13_IBUF_16 ); adr_bus_14_IMUX : X_BUF port map ( I => adr_bus_14_IBUF_17, O => adr_bus_14_IBUF ); adr_bus_14_IBUF_402 : X_BUF port map ( I => adr_bus(14), O => adr_bus_14_IBUF_17 ); adr_bus_15_IMUX : X_BUF port map ( I => adr_bus_15_IBUF_18, O => adr_bus_15_IBUF ); adr_bus_15_IBUF_403 : X_BUF port map ( I => adr_bus(15), O => adr_bus_15_IBUF_18 ); cs_10_OBUF_404 : X_TRI port map ( I => cs_10_OUTMUX, CTL => cs_10_ENABLE, O => cs(10) ); cs_10_ENABLEINV : X_INV port map ( I => cs_10_TORGTS, O => cs_10_ENABLE ); cs_10_GTS_OR : X_BUF port map ( I => GTS, O => cs_10_TORGTS ); cs_10_OUTMUX_405 : X_BUF port map ( I => cs_10_OBUF, O => cs_10_OUTMUX ); cs_11_OBUF_406 : X_TRI port map ( I => cs_11_OUTMUX, CTL => cs_11_ENABLE, O => cs(11) ); cs_11_ENABLEINV : X_INV port map ( I => cs_11_TORGTS, O => cs_11_ENABLE ); cs_11_GTS_OR : X_BUF port map ( I => GTS, O => cs_11_TORGTS ); cs_11_OUTMUX_407 : X_BUF port map ( I => cs_11_OBUF, O => cs_11_OUTMUX ); cs_12_OBUF_408 : X_TRI port map ( I => cs_12_OUTMUX, CTL => cs_12_ENABLE, O => cs(12) ); cs_12_ENABLEINV : X_INV port map ( I => cs_12_TORGTS, O => cs_12_ENABLE ); cs_12_GTS_OR : X_BUF port map ( I => GTS, O => cs_12_TORGTS ); cs_12_OUTMUX_409 : X_BUF port map ( I => cs_12_OBUF, O => cs_12_OUTMUX ); cs_20_OBUF_410 : X_TRI port map ( I => cs_20_OUTMUX, CTL => cs_20_ENABLE, O => cs(20) ); cs_20_ENABLEINV : X_INV port map ( I => cs_20_TORGTS, O => cs_20_ENABLE ); cs_20_GTS_OR : X_BUF port map ( I => GTS, O => cs_20_TORGTS ); cs_20_OUTMUX_411 : X_BUF port map ( I => cs_20_OBUF, O => cs_20_OUTMUX ); cs_13_OBUF_412 : X_TRI port map ( I => cs_13_OUTMUX, CTL => cs_13_ENABLE, O => cs(13) ); cs_13_ENABLEINV : X_INV port map ( I => cs_13_TORGTS, O => cs_13_ENABLE ); cs_13_GTS_OR : X_BUF port map ( I => GTS, O => cs_13_TORGTS ); cs_13_OUTMUX_413 : X_BUF port map ( I => cs_13_OBUF, O => cs_13_OUTMUX ); cs_21_OBUF_414 : X_TRI port map ( I => cs_21_OUTMUX, CTL => cs_21_ENABLE, O => cs(21) ); cs_21_ENABLEINV : X_INV port map ( I => cs_21_TORGTS, O => cs_21_ENABLE ); cs_21_GTS_OR : X_BUF port map ( I => GTS, O => cs_21_TORGTS ); cs_21_OUTMUX_415 : X_BUF port map ( I => cs_21_OBUF, O => cs_21_OUTMUX ); cs_14_OBUF_416 : X_TRI port map ( I => cs_14_OUTMUX, CTL => cs_14_ENABLE, O => cs(14) ); cs_14_ENABLEINV : X_INV port map ( I => cs_14_TORGTS, O => cs_14_ENABLE ); cs_14_GTS_OR : X_BUF port map ( I => GTS, O => cs_14_TORGTS ); cs_14_OUTMUX_417 : X_BUF port map ( I => cs_14_OBUF, O => cs_14_OUTMUX ); cs_22_OBUF_418 : X_TRI port map ( I => cs_22_OUTMUX, CTL => cs_22_ENABLE, O => cs(22) ); cs_22_ENABLEINV : X_INV port map ( I => cs_22_TORGTS, O => cs_22_ENABLE ); cs_22_GTS_OR : X_BUF port map ( I => GTS, O => cs_22_TORGTS ); cs_22_OUTMUX_419 : X_BUF port map ( I => cs_22_OBUF, O => cs_22_OUTMUX ); cs_30_OBUF_420 : X_TRI port map ( I => cs_30_OUTMUX, CTL => cs_30_ENABLE, O => cs(30) ); cs_30_ENABLEINV : X_INV port map ( I => cs_30_TORGTS, O => cs_30_ENABLE ); cs_30_GTS_OR : X_BUF port map ( I => GTS, O => cs_30_TORGTS ); cs_30_OUTMUX_421 : X_BUF port map ( I => cs_30_OBUF, O => cs_30_OUTMUX ); cs_15_OBUF_422 : X_TRI port map ( I => cs_15_OUTMUX, CTL => cs_15_ENABLE, O => cs(15) ); cs_15_ENABLEINV : X_INV port map ( I => cs_15_TORGTS, O => cs_15_ENABLE ); cs_15_GTS_OR : X_BUF port map ( I => GTS, O => cs_15_TORGTS ); cs_15_OUTMUX_423 : X_BUF port map ( I => cs_15_OBUF, O => cs_15_OUTMUX ); cs_23_OBUF_424 : X_TRI port map ( I => cs_23_OUTMUX, CTL => cs_23_ENABLE, O => cs(23) ); cs_23_ENABLEINV : X_INV port map ( I => cs_23_TORGTS, O => cs_23_ENABLE ); cs_23_GTS_OR : X_BUF port map ( I => GTS, O => cs_23_TORGTS ); cs_23_OUTMUX_425 : X_BUF port map ( I => cs_23_OBUF, O => cs_23_OUTMUX ); cs_31_OBUF_426 : X_TRI port map ( I => cs_31_OUTMUX, CTL => cs_31_ENABLE, O => cs(31) ); cs_31_ENABLEINV : X_INV port map ( I => cs_31_TORGTS, O => cs_31_ENABLE ); cs_31_GTS_OR : X_BUF port map ( I => GTS, O => cs_31_TORGTS ); cs_31_OUTMUX_427 : X_BUF port map ( I => cs_31_OBUF, O => cs_31_OUTMUX ); cs_16_OBUF_428 : X_TRI port map ( I => cs_16_OUTMUX, CTL => cs_16_ENABLE, O => cs(16) ); cs_16_ENABLEINV : X_INV port map ( I => cs_16_TORGTS, O => cs_16_ENABLE ); cs_16_GTS_OR : X_BUF port map ( I => GTS, O => cs_16_TORGTS ); cs_16_OUTMUX_429 : X_BUF port map ( I => cs_16_OBUF, O => cs_16_OUTMUX ); cs_24_OBUF_430 : X_TRI port map ( I => cs_24_OUTMUX, CTL => cs_24_ENABLE, O => cs(24) ); cs_24_ENABLEINV : X_INV port map ( I => cs_24_TORGTS, O => cs_24_ENABLE ); cs_24_GTS_OR : X_BUF port map ( I => GTS, O => cs_24_TORGTS ); cs_24_OUTMUX_431 : X_BUF port map ( I => cs_24_OBUF, O => cs_24_OUTMUX ); cs_32_OBUF_432 : X_TRI port map ( I => cs_32_OUTMUX, CTL => cs_32_ENABLE, O => cs(32) ); cs_32_ENABLEINV : X_INV port map ( I => cs_32_TORGTS, O => cs_32_ENABLE ); cs_32_GTS_OR : X_BUF port map ( I => GTS, O => cs_32_TORGTS ); cs_32_OUTMUX_433 : X_BUF port map ( I => cs_32_OBUF, O => cs_32_OUTMUX ); cs_40_OBUF_434 : X_TRI port map ( I => cs_40_OUTMUX, CTL => cs_40_ENABLE, O => cs(40) ); cs_40_ENABLEINV : X_INV port map ( I => cs_40_TORGTS, O => cs_40_ENABLE ); cs_40_GTS_OR : X_BUF port map ( I => GTS, O => cs_40_TORGTS ); cs_40_OUTMUX_435 : X_BUF port map ( I => cs_40_OBUF, O => cs_40_OUTMUX ); cs_17_OBUF_436 : X_TRI port map ( I => cs_17_OUTMUX, CTL => cs_17_ENABLE, O => cs(17) ); cs_17_ENABLEINV : X_INV port map ( I => cs_17_TORGTS, O => cs_17_ENABLE ); cs_17_GTS_OR : X_BUF port map ( I => GTS, O => cs_17_TORGTS ); cs_17_OUTMUX_437 : X_BUF port map ( I => cs_17_OBUF, O => cs_17_OUTMUX ); cs_25_OBUF_438 : X_TRI port map ( I => cs_25_OUTMUX, CTL => cs_25_ENABLE, O => cs(25) ); cs_25_ENABLEINV : X_INV port map ( I => cs_25_TORGTS, O => cs_25_ENABLE ); cs_25_GTS_OR : X_BUF port map ( I => GTS, O => cs_25_TORGTS ); cs_25_OUTMUX_439 : X_BUF port map ( I => cs_25_OBUF, O => cs_25_OUTMUX ); cs_33_OBUF_440 : X_TRI port map ( I => cs_33_OUTMUX, CTL => cs_33_ENABLE, O => cs(33) ); cs_33_ENABLEINV : X_INV port map ( I => cs_33_TORGTS, O => cs_33_ENABLE ); cs_33_GTS_OR : X_BUF port map ( I => GTS, O => cs_33_TORGTS ); cs_33_OUTMUX_441 : X_BUF port map ( I => cs_33_OBUF, O => cs_33_OUTMUX ); cs_41_OBUF_442 : X_TRI port map ( I => cs_41_OUTMUX, CTL => cs_41_ENABLE, O => cs(41) ); cs_41_ENABLEINV : X_INV port map ( I => cs_41_TORGTS, O => cs_41_ENABLE ); cs_41_GTS_OR : X_BUF port map ( I => GTS, O => cs_41_TORGTS ); cs_41_OUTMUX_443 : X_BUF port map ( I => cs_41_OBUF, O => cs_41_OUTMUX ); cs_18_OBUF_444 : X_TRI port map ( I => cs_18_OUTMUX, CTL => cs_18_ENABLE, O => cs(18) ); cs_18_ENABLEINV : X_INV port map ( I => cs_18_TORGTS, O => cs_18_ENABLE ); cs_18_GTS_OR : X_BUF port map ( I => GTS, O => cs_18_TORGTS ); cs_18_OUTMUX_445 : X_BUF port map ( I => cs_18_OBUF, O => cs_18_OUTMUX ); cs_26_OBUF_446 : X_TRI port map ( I => cs_26_OUTMUX, CTL => cs_26_ENABLE, O => cs(26) ); cs_26_ENABLEINV : X_INV port map ( I => cs_26_TORGTS, O => cs_26_ENABLE ); cs_26_GTS_OR : X_BUF port map ( I => GTS, O => cs_26_TORGTS ); cs_26_OUTMUX_447 : X_BUF port map ( I => cs_26_OBUF, O => cs_26_OUTMUX ); cs_34_OBUF_448 : X_TRI port map ( I => cs_34_OUTMUX, CTL => cs_34_ENABLE, O => cs(34) ); cs_34_ENABLEINV : X_INV port map ( I => cs_34_TORGTS, O => cs_34_ENABLE ); cs_34_GTS_OR : X_BUF port map ( I => GTS, O => cs_34_TORGTS ); cs_34_OUTMUX_449 : X_BUF port map ( I => cs_34_OBUF, O => cs_34_OUTMUX ); cs_42_OBUF_450 : X_TRI port map ( I => cs_42_OUTMUX, CTL => cs_42_ENABLE, O => cs(42) ); cs_42_ENABLEINV : X_INV port map ( I => cs_42_TORGTS, O => cs_42_ENABLE ); cs_42_GTS_OR : X_BUF port map ( I => GTS, O => cs_42_TORGTS ); cs_42_OUTMUX_451 : X_BUF port map ( I => cs_42_OBUF, O => cs_42_OUTMUX ); cs_50_OBUF_452 : X_TRI port map ( I => cs_50_OUTMUX, CTL => cs_50_ENABLE, O => cs(50) ); cs_50_ENABLEINV : X_INV port map ( I => cs_50_TORGTS, O => cs_50_ENABLE ); cs_50_GTS_OR : X_BUF port map ( I => GTS, O => cs_50_TORGTS ); cs_50_OUTMUX_453 : X_BUF port map ( I => cs_50_OBUF, O => cs_50_OUTMUX ); cs_19_OBUF_454 : X_TRI port map ( I => cs_19_OUTMUX, CTL => cs_19_ENABLE, O => cs(19) ); cs_19_ENABLEINV : X_INV port map ( I => cs_19_TORGTS, O => cs_19_ENABLE ); cs_19_GTS_OR : X_BUF port map ( I => GTS, O => cs_19_TORGTS ); cs_19_OUTMUX_455 : X_BUF port map ( I => cs_19_OBUF, O => cs_19_OUTMUX ); cs_27_OBUF_456 : X_TRI port map ( I => cs_27_OUTMUX, CTL => cs_27_ENABLE, O => cs(27) ); cs_27_ENABLEINV : X_INV port map ( I => cs_27_TORGTS, O => cs_27_ENABLE ); cs_27_GTS_OR : X_BUF port map ( I => GTS, O => cs_27_TORGTS ); cs_27_OUTMUX_457 : X_BUF port map ( I => cs_27_OBUF, O => cs_27_OUTMUX ); cs_35_OBUF_458 : X_TRI port map ( I => cs_35_OUTMUX, CTL => cs_35_ENABLE, O => cs(35) ); cs_35_ENABLEINV : X_INV port map ( I => cs_35_TORGTS, O => cs_35_ENABLE ); cs_35_GTS_OR : X_BUF port map ( I => GTS, O => cs_35_TORGTS ); cs_35_OUTMUX_459 : X_BUF port map ( I => cs_35_OBUF, O => cs_35_OUTMUX ); cs_43_OBUF_460 : X_TRI port map ( I => cs_43_OUTMUX, CTL => cs_43_ENABLE, O => cs(43) ); cs_43_ENABLEINV : X_INV port map ( I => cs_43_TORGTS, O => cs_43_ENABLE ); cs_43_GTS_OR : X_BUF port map ( I => GTS, O => cs_43_TORGTS ); cs_43_OUTMUX_461 : X_BUF port map ( I => cs_43_OBUF, O => cs_43_OUTMUX ); cs_51_OBUF_462 : X_TRI port map ( I => cs_51_OUTMUX, CTL => cs_51_ENABLE, O => cs(51) ); cs_51_ENABLEINV : X_INV port map ( I => cs_51_TORGTS, O => cs_51_ENABLE ); cs_51_GTS_OR : X_BUF port map ( I => GTS, O => cs_51_TORGTS ); cs_51_OUTMUX_463 : X_BUF port map ( I => cs_51_OBUF, O => cs_51_OUTMUX ); cs_28_OBUF_464 : X_TRI port map ( I => cs_28_OUTMUX, CTL => cs_28_ENABLE, O => cs(28) ); cs_28_ENABLEINV : X_INV port map ( I => cs_28_TORGTS, O => cs_28_ENABLE ); cs_28_GTS_OR : X_BUF port map ( I => GTS, O => cs_28_TORGTS ); cs_28_OUTMUX_465 : X_BUF port map ( I => cs_28_OBUF, O => cs_28_OUTMUX ); cs_36_OBUF_466 : X_TRI port map ( I => cs_36_OUTMUX, CTL => cs_36_ENABLE, O => cs(36) ); cs_36_ENABLEINV : X_INV port map ( I => cs_36_TORGTS, O => cs_36_ENABLE ); cs_36_GTS_OR : X_BUF port map ( I => GTS, O => cs_36_TORGTS ); cs_36_OUTMUX_467 : X_BUF port map ( I => cs_36_OBUF, O => cs_36_OUTMUX ); cs_44_OBUF_468 : X_TRI port map ( I => cs_44_OUTMUX, CTL => cs_44_ENABLE, O => cs(44) ); cs_44_ENABLEINV : X_INV port map ( I => cs_44_TORGTS, O => cs_44_ENABLE ); cs_44_GTS_OR : X_BUF port map ( I => GTS, O => cs_44_TORGTS ); cs_44_OUTMUX_469 : X_BUF port map ( I => cs_44_OBUF, O => cs_44_OUTMUX ); cs_52_OBUF_470 : X_TRI port map ( I => cs_52_OUTMUX, CTL => cs_52_ENABLE, O => cs(52) ); cs_52_ENABLEINV : X_INV port map ( I => cs_52_TORGTS, O => cs_52_ENABLE ); cs_52_GTS_OR : X_BUF port map ( I => GTS, O => cs_52_TORGTS ); cs_52_OUTMUX_471 : X_BUF port map ( I => cs_52_OBUF, O => cs_52_OUTMUX ); cs_60_OBUF_472 : X_TRI port map ( I => cs_60_OUTMUX, CTL => cs_60_ENABLE, O => cs(60) ); cs_60_ENABLEINV : X_INV port map ( I => cs_60_TORGTS, O => cs_60_ENABLE ); cs_60_GTS_OR : X_BUF port map ( I => GTS, O => cs_60_TORGTS ); cs_60_OUTMUX_473 : X_BUF port map ( I => cs_60_OBUF, O => cs_60_OUTMUX ); cs_29_OBUF_474 : X_TRI port map ( I => cs_29_OUTMUX, CTL => cs_29_ENABLE, O => cs(29) ); cs_29_ENABLEINV : X_INV port map ( I => cs_29_TORGTS, O => cs_29_ENABLE ); cs_29_GTS_OR : X_BUF port map ( I => GTS, O => cs_29_TORGTS ); cs_29_OUTMUX_475 : X_BUF port map ( I => cs_29_OBUF, O => cs_29_OUTMUX ); cs_37_OBUF_476 : X_TRI port map ( I => cs_37_OUTMUX, CTL => cs_37_ENABLE, O => cs(37) ); cs_37_ENABLEINV : X_INV port map ( I => cs_37_TORGTS, O => cs_37_ENABLE ); cs_37_GTS_OR : X_BUF port map ( I => GTS, O => cs_37_TORGTS ); cs_37_OUTMUX_477 : X_BUF port map ( I => cs_37_OBUF, O => cs_37_OUTMUX ); cs_45_OBUF_478 : X_TRI port map ( I => cs_45_OUTMUX, CTL => cs_45_ENABLE, O => cs(45) ); cs_45_ENABLEINV : X_INV port map ( I => cs_45_TORGTS, O => cs_45_ENABLE ); cs_45_GTS_OR : X_BUF port map ( I => GTS, O => cs_45_TORGTS ); cs_45_OUTMUX_479 : X_BUF port map ( I => cs_45_OBUF, O => cs_45_OUTMUX ); cs_53_OBUF_480 : X_TRI port map ( I => cs_53_OUTMUX, CTL => cs_53_ENABLE, O => cs(53) ); cs_53_ENABLEINV : X_INV port map ( I => cs_53_TORGTS, O => cs_53_ENABLE ); cs_53_GTS_OR : X_BUF port map ( I => GTS, O => cs_53_TORGTS ); cs_53_OUTMUX_481 : X_BUF port map ( I => cs_53_OBUF, O => cs_53_OUTMUX ); cs_61_OBUF_482 : X_TRI port map ( I => cs_61_OUTMUX, CTL => cs_61_ENABLE, O => cs(61) ); cs_61_ENABLEINV : X_INV port map ( I => cs_61_TORGTS, O => cs_61_ENABLE ); cs_61_GTS_OR : X_BUF port map ( I => GTS, O => cs_61_TORGTS ); cs_61_OUTMUX_483 : X_BUF port map ( I => cs_61_OBUF, O => cs_61_OUTMUX ); cs_38_OBUF_484 : X_TRI port map ( I => cs_38_OUTMUX, CTL => cs_38_ENABLE, O => cs(38) ); cs_38_ENABLEINV : X_INV port map ( I => cs_38_TORGTS, O => cs_38_ENABLE ); cs_38_GTS_OR : X_BUF port map ( I => GTS, O => cs_38_TORGTS ); cs_38_OUTMUX_485 : X_BUF port map ( I => cs_38_OBUF, O => cs_38_OUTMUX ); cs_46_OBUF_486 : X_TRI port map ( I => cs_46_OUTMUX, CTL => cs_46_ENABLE, O => cs(46) ); cs_46_ENABLEINV : X_INV port map ( I => cs_46_TORGTS, O => cs_46_ENABLE ); cs_46_GTS_OR : X_BUF port map ( I => GTS, O => cs_46_TORGTS ); cs_46_OUTMUX_487 : X_BUF port map ( I => cs_46_OBUF, O => cs_46_OUTMUX ); cs_54_OBUF_488 : X_TRI port map ( I => cs_54_OUTMUX, CTL => cs_54_ENABLE, O => cs(54) ); cs_54_ENABLEINV : X_INV port map ( I => cs_54_TORGTS, O => cs_54_ENABLE ); cs_54_GTS_OR : X_BUF port map ( I => GTS, O => cs_54_TORGTS ); cs_54_OUTMUX_489 : X_BUF port map ( I => cs_54_OBUF, O => cs_54_OUTMUX ); cs_62_OBUF_490 : X_TRI port map ( I => cs_62_OUTMUX, CTL => cs_62_ENABLE, O => cs(62) ); cs_62_ENABLEINV : X_INV port map ( I => cs_62_TORGTS, O => cs_62_ENABLE ); cs_62_GTS_OR : X_BUF port map ( I => GTS, O => cs_62_TORGTS ); cs_62_OUTMUX_491 : X_BUF port map ( I => cs_62_OBUF, O => cs_62_OUTMUX ); cs_70_OBUF_492 : X_TRI port map ( I => cs_70_OUTMUX, CTL => cs_70_ENABLE, O => cs(70) ); cs_70_ENABLEINV : X_INV port map ( I => cs_70_TORGTS, O => cs_70_ENABLE ); cs_70_GTS_OR : X_BUF port map ( I => GTS, O => cs_70_TORGTS ); cs_70_OUTMUX_493 : X_BUF port map ( I => cs_70_OBUF, O => cs_70_OUTMUX ); cs_39_OBUF_494 : X_TRI port map ( I => cs_39_OUTMUX, CTL => cs_39_ENABLE, O => cs(39) ); cs_39_ENABLEINV : X_INV port map ( I => cs_39_TORGTS, O => cs_39_ENABLE ); cs_39_GTS_OR : X_BUF port map ( I => GTS, O => cs_39_TORGTS ); cs_39_OUTMUX_495 : X_BUF port map ( I => cs_39_OBUF, O => cs_39_OUTMUX ); cs_47_OBUF_496 : X_TRI port map ( I => cs_47_OUTMUX, CTL => cs_47_ENABLE, O => cs(47) ); cs_47_ENABLEINV : X_INV port map ( I => cs_47_TORGTS, O => cs_47_ENABLE ); cs_47_GTS_OR : X_BUF port map ( I => GTS, O => cs_47_TORGTS ); cs_47_OUTMUX_497 : X_BUF port map ( I => cs_47_OBUF, O => cs_47_OUTMUX ); cs_55_OBUF_498 : X_TRI port map ( I => cs_55_OUTMUX, CTL => cs_55_ENABLE, O => cs(55) ); cs_55_ENABLEINV : X_INV port map ( I => cs_55_TORGTS, O => cs_55_ENABLE ); cs_55_GTS_OR : X_BUF port map ( I => GTS, O => cs_55_TORGTS ); cs_55_OUTMUX_499 : X_BUF port map ( I => cs_55_OBUF, O => cs_55_OUTMUX ); cs_63_OBUF_500 : X_TRI port map ( I => cs_63_OUTMUX, CTL => cs_63_ENABLE, O => cs(63) ); cs_63_ENABLEINV : X_INV port map ( I => cs_63_TORGTS, O => cs_63_ENABLE ); cs_63_GTS_OR : X_BUF port map ( I => GTS, O => cs_63_TORGTS ); cs_63_OUTMUX_501 : X_BUF port map ( I => cs_63_OBUF, O => cs_63_OUTMUX ); cs_71_OBUF_502 : X_TRI port map ( I => cs_71_OUTMUX, CTL => cs_71_ENABLE, O => cs(71) ); cs_71_ENABLEINV : X_INV port map ( I => cs_71_TORGTS, O => cs_71_ENABLE ); cs_71_GTS_OR : X_BUF port map ( I => GTS, O => cs_71_TORGTS ); cs_71_OUTMUX_503 : X_BUF port map ( I => cs_71_OBUF, O => cs_71_OUTMUX ); cs_48_OBUF_504 : X_TRI port map ( I => cs_48_OUTMUX, CTL => cs_48_ENABLE, O => cs(48) ); cs_48_ENABLEINV : X_INV port map ( I => cs_48_TORGTS, O => cs_48_ENABLE ); cs_48_GTS_OR : X_BUF port map ( I => GTS, O => cs_48_TORGTS ); cs_48_OUTMUX_505 : X_BUF port map ( I => cs_48_OBUF, O => cs_48_OUTMUX ); cs_56_OBUF_506 : X_TRI port map ( I => cs_56_OUTMUX, CTL => cs_56_ENABLE, O => cs(56) ); cs_56_ENABLEINV : X_INV port map ( I => cs_56_TORGTS, O => cs_56_ENABLE ); cs_56_GTS_OR : X_BUF port map ( I => GTS, O => cs_56_TORGTS ); cs_56_OUTMUX_507 : X_BUF port map ( I => cs_56_OBUF, O => cs_56_OUTMUX ); cs_64_OBUF_508 : X_TRI port map ( I => cs_64_OUTMUX, CTL => cs_64_ENABLE, O => cs(64) ); cs_64_ENABLEINV : X_INV port map ( I => cs_64_TORGTS, O => cs_64_ENABLE ); cs_64_GTS_OR : X_BUF port map ( I => GTS, O => cs_64_TORGTS ); cs_64_OUTMUX_509 : X_BUF port map ( I => cs_64_OBUF, O => cs_64_OUTMUX ); cs_72_OBUF_510 : X_TRI port map ( I => cs_72_OUTMUX, CTL => cs_72_ENABLE, O => cs(72) ); cs_72_ENABLEINV : X_INV port map ( I => cs_72_TORGTS, O => cs_72_ENABLE ); cs_72_GTS_OR : X_BUF port map ( I => GTS, O => cs_72_TORGTS ); cs_72_OUTMUX_511 : X_BUF port map ( I => cs_72_OBUF, O => cs_72_OUTMUX ); cs_80_OBUF_512 : X_TRI port map ( I => cs_80_OUTMUX, CTL => cs_80_ENABLE, O => cs(80) ); cs_80_ENABLEINV : X_INV port map ( I => cs_80_TORGTS, O => cs_80_ENABLE ); cs_80_GTS_OR : X_BUF port map ( I => GTS, O => cs_80_TORGTS ); cs_80_OUTMUX_513 : X_BUF port map ( I => cs_80_OBUF, O => cs_80_OUTMUX ); cs_49_OBUF_514 : X_TRI port map ( I => cs_49_OUTMUX, CTL => cs_49_ENABLE, O => cs(49) ); cs_49_ENABLEINV : X_INV port map ( I => cs_49_TORGTS, O => cs_49_ENABLE ); cs_49_GTS_OR : X_BUF port map ( I => GTS, O => cs_49_TORGTS ); cs_49_OUTMUX_515 : X_BUF port map ( I => cs_49_OBUF, O => cs_49_OUTMUX ); cs_57_OBUF_516 : X_TRI port map ( I => cs_57_OUTMUX, CTL => cs_57_ENABLE, O => cs(57) ); cs_57_ENABLEINV : X_INV port map ( I => cs_57_TORGTS, O => cs_57_ENABLE ); cs_57_GTS_OR : X_BUF port map ( I => GTS, O => cs_57_TORGTS ); cs_57_OUTMUX_517 : X_BUF port map ( I => cs_57_OBUF, O => cs_57_OUTMUX ); cs_65_OBUF_518 : X_TRI port map ( I => cs_65_OUTMUX, CTL => cs_65_ENABLE, O => cs(65) ); cs_65_ENABLEINV : X_INV port map ( I => cs_65_TORGTS, O => cs_65_ENABLE ); cs_65_GTS_OR : X_BUF port map ( I => GTS, O => cs_65_TORGTS ); cs_65_OUTMUX_519 : X_BUF port map ( I => cs_65_OBUF, O => cs_65_OUTMUX ); cs_73_OBUF_520 : X_TRI port map ( I => cs_73_OUTMUX, CTL => cs_73_ENABLE, O => cs(73) ); cs_73_ENABLEINV : X_INV port map ( I => cs_73_TORGTS, O => cs_73_ENABLE ); cs_73_GTS_OR : X_BUF port map ( I => GTS, O => cs_73_TORGTS ); cs_73_OUTMUX_521 : X_BUF port map ( I => cs_73_OBUF, O => cs_73_OUTMUX ); cs_81_OBUF_522 : X_TRI port map ( I => cs_81_OUTMUX, CTL => cs_81_ENABLE, O => cs(81) ); cs_81_ENABLEINV : X_INV port map ( I => cs_81_TORGTS, O => cs_81_ENABLE ); cs_81_GTS_OR : X_BUF port map ( I => GTS, O => cs_81_TORGTS ); cs_81_OUTMUX_523 : X_BUF port map ( I => cs_81_OBUF, O => cs_81_OUTMUX ); cs_58_OBUF_524 : X_TRI port map ( I => cs_58_OUTMUX, CTL => cs_58_ENABLE, O => cs(58) ); cs_58_ENABLEINV : X_INV port map ( I => cs_58_TORGTS, O => cs_58_ENABLE ); cs_58_GTS_OR : X_BUF port map ( I => GTS, O => cs_58_TORGTS ); cs_58_OUTMUX_525 : X_BUF port map ( I => cs_58_OBUF, O => cs_58_OUTMUX ); cs_66_OBUF_526 : X_TRI port map ( I => cs_66_OUTMUX, CTL => cs_66_ENABLE, O => cs(66) ); cs_66_ENABLEINV : X_INV port map ( I => cs_66_TORGTS, O => cs_66_ENABLE ); cs_66_GTS_OR : X_BUF port map ( I => GTS, O => cs_66_TORGTS ); cs_66_OUTMUX_527 : X_BUF port map ( I => cs_66_OBUF, O => cs_66_OUTMUX ); cs_74_OBUF_528 : X_TRI port map ( I => cs_74_OUTMUX, CTL => cs_74_ENABLE, O => cs(74) ); cs_74_ENABLEINV : X_INV port map ( I => cs_74_TORGTS, O => cs_74_ENABLE ); cs_74_GTS_OR : X_BUF port map ( I => GTS, O => cs_74_TORGTS ); cs_74_OUTMUX_529 : X_BUF port map ( I => cs_74_OBUF, O => cs_74_OUTMUX ); cs_82_OBUF_530 : X_TRI port map ( I => cs_82_OUTMUX, CTL => cs_82_ENABLE, O => cs(82) ); cs_82_ENABLEINV : X_INV port map ( I => cs_82_TORGTS, O => cs_82_ENABLE ); cs_82_GTS_OR : X_BUF port map ( I => GTS, O => cs_82_TORGTS ); cs_82_OUTMUX_531 : X_BUF port map ( I => cs_82_OBUF, O => cs_82_OUTMUX ); cs_90_OBUF_532 : X_TRI port map ( I => cs_90_OUTMUX, CTL => cs_90_ENABLE, O => cs(90) ); cs_90_ENABLEINV : X_INV port map ( I => cs_90_TORGTS, O => cs_90_ENABLE ); cs_90_GTS_OR : X_BUF port map ( I => GTS, O => cs_90_TORGTS ); cs_90_OUTMUX_533 : X_BUF port map ( I => cs_90_OBUF, O => cs_90_OUTMUX ); cs_59_OBUF_534 : X_TRI port map ( I => cs_59_OUTMUX, CTL => cs_59_ENABLE, O => cs(59) ); cs_59_ENABLEINV : X_INV port map ( I => cs_59_TORGTS, O => cs_59_ENABLE ); cs_59_GTS_OR : X_BUF port map ( I => GTS, O => cs_59_TORGTS ); cs_59_OUTMUX_535 : X_BUF port map ( I => cs_59_OBUF, O => cs_59_OUTMUX ); cs_67_OBUF_536 : X_TRI port map ( I => cs_67_OUTMUX, CTL => cs_67_ENABLE, O => cs(67) ); cs_67_ENABLEINV : X_INV port map ( I => cs_67_TORGTS, O => cs_67_ENABLE ); cs_67_GTS_OR : X_BUF port map ( I => GTS, O => cs_67_TORGTS ); cs_67_OUTMUX_537 : X_BUF port map ( I => cs_67_OBUF, O => cs_67_OUTMUX ); cs_75_OBUF_538 : X_TRI port map ( I => cs_75_OUTMUX, CTL => cs_75_ENABLE, O => cs(75) ); cs_75_ENABLEINV : X_INV port map ( I => cs_75_TORGTS, O => cs_75_ENABLE ); cs_75_GTS_OR : X_BUF port map ( I => GTS, O => cs_75_TORGTS ); cs_75_OUTMUX_539 : X_BUF port map ( I => cs_75_OBUF, O => cs_75_OUTMUX ); cs_83_OBUF_540 : X_TRI port map ( I => cs_83_OUTMUX, CTL => cs_83_ENABLE, O => cs(83) ); cs_83_ENABLEINV : X_INV port map ( I => cs_83_TORGTS, O => cs_83_ENABLE ); cs_83_GTS_OR : X_BUF port map ( I => GTS, O => cs_83_TORGTS ); cs_83_OUTMUX_541 : X_BUF port map ( I => cs_83_OBUF, O => cs_83_OUTMUX ); cs_91_OBUF_542 : X_TRI port map ( I => cs_91_OUTMUX, CTL => cs_91_ENABLE, O => cs(91) ); cs_91_ENABLEINV : X_INV port map ( I => cs_91_TORGTS, O => cs_91_ENABLE ); cs_91_GTS_OR : X_BUF port map ( I => GTS, O => cs_91_TORGTS ); cs_91_OUTMUX_543 : X_BUF port map ( I => cs_91_OBUF, O => cs_91_OUTMUX ); cs_68_OBUF_544 : X_TRI port map ( I => cs_68_OUTMUX, CTL => cs_68_ENABLE, O => cs(68) ); cs_68_ENABLEINV : X_INV port map ( I => cs_68_TORGTS, O => cs_68_ENABLE ); cs_68_GTS_OR : X_BUF port map ( I => GTS, O => cs_68_TORGTS ); cs_68_OUTMUX_545 : X_BUF port map ( I => cs_68_OBUF, O => cs_68_OUTMUX ); cs_76_OBUF_546 : X_TRI port map ( I => cs_76_OUTMUX, CTL => cs_76_ENABLE, O => cs(76) ); cs_76_ENABLEINV : X_INV port map ( I => cs_76_TORGTS, O => cs_76_ENABLE ); cs_76_GTS_OR : X_BUF port map ( I => GTS, O => cs_76_TORGTS ); cs_76_OUTMUX_547 : X_BUF port map ( I => cs_76_OBUF, O => cs_76_OUTMUX ); cs_84_OBUF_548 : X_TRI port map ( I => cs_84_OUTMUX, CTL => cs_84_ENABLE, O => cs(84) ); cs_84_ENABLEINV : X_INV port map ( I => cs_84_TORGTS, O => cs_84_ENABLE ); cs_84_GTS_OR : X_BUF port map ( I => GTS, O => cs_84_TORGTS ); cs_84_OUTMUX_549 : X_BUF port map ( I => cs_84_OBUF, O => cs_84_OUTMUX ); cs_92_OBUF_550 : X_TRI port map ( I => cs_92_OUTMUX, CTL => cs_92_ENABLE, O => cs(92) ); cs_92_ENABLEINV : X_INV port map ( I => cs_92_TORGTS, O => cs_92_ENABLE ); cs_92_GTS_OR : X_BUF port map ( I => GTS, O => cs_92_TORGTS ); cs_92_OUTMUX_551 : X_BUF port map ( I => cs_92_OBUF, O => cs_92_OUTMUX ); cs_69_OBUF_552 : X_TRI port map ( I => cs_69_OUTMUX, CTL => cs_69_ENABLE, O => cs(69) ); cs_69_ENABLEINV : X_INV port map ( I => cs_69_TORGTS, O => cs_69_ENABLE ); cs_69_GTS_OR : X_BUF port map ( I => GTS, O => cs_69_TORGTS ); cs_69_OUTMUX_553 : X_BUF port map ( I => cs_69_OBUF, O => cs_69_OUTMUX ); NlwBlock_decodisa_VCC : X_ONE port map ( O => VCC ); NlwBlockROC : X_ROC generic map (ROC_WIDTH => 100 ns) port map (O => GSR); NlwBlockTOC : X_TOC port map (O => GTS); end Structure;