From cc38f7ef364080a968977d099a22d92410954f60 Mon Sep 17 00:00:00 2001 From: galmes Date: Tue, 30 Mar 2004 11:11:00 +0000 Subject: SUppression de la première version du gestionnaire d'interruption, car on a changé la philosophie de fonctionnement du gestionnaire. --- 2004/n/fpga/src/interrupt/IRQ_manager.vhd | 30 ------- 2004/n/fpga/src/interrupt/bch_IRQ_manager.vhd | 52 ------------ 2004/n/fpga/src/interrupt/bch_conserv1.vhd | 60 -------------- 2004/n/fpga/src/interrupt/bch_conserv8.vhd | 60 -------------- 2004/n/fpga/src/interrupt/bch_seq_interrupt.vhd | 76 ----------------- 2004/n/fpga/src/interrupt/conserv1.vhd | 54 ------------ 2004/n/fpga/src/interrupt/conserv8.vhd | 51 ------------ 2004/n/fpga/src/interrupt/seq_interrupt.vhd | 106 ------------------------ 8 files changed, 489 deletions(-) delete mode 100644 2004/n/fpga/src/interrupt/IRQ_manager.vhd delete mode 100644 2004/n/fpga/src/interrupt/bch_IRQ_manager.vhd delete mode 100644 2004/n/fpga/src/interrupt/bch_conserv1.vhd delete mode 100644 2004/n/fpga/src/interrupt/bch_conserv8.vhd delete mode 100644 2004/n/fpga/src/interrupt/bch_seq_interrupt.vhd delete mode 100644 2004/n/fpga/src/interrupt/conserv1.vhd delete mode 100644 2004/n/fpga/src/interrupt/conserv8.vhd delete mode 100644 2004/n/fpga/src/interrupt/seq_interrupt.vhd (limited to '2004/n') diff --git a/2004/n/fpga/src/interrupt/IRQ_manager.vhd b/2004/n/fpga/src/interrupt/IRQ_manager.vhd deleted file mode 100644 index 47359a7..0000000 --- a/2004/n/fpga/src/interrupt/IRQ_manager.vhd +++ /dev/null @@ -1,30 +0,0 @@ --- IRQ_manager.vhd --- Eurobot 2004 : APB Team --- Auteur : Pierre-André Galmes --- Bloc de gestion des IRQ (~ OU logique). - --- Principe : --- Bloc trois états (three-state) qui met les sorties en hautes impédance si --- elle ne sont pas "enabled". - -library ieee; -use ieee.std_logic_1164.all; ---use ieee.std_logic_arith.all; ---use ieee.std_logic_unsigned.all; - -use work.isa_const.all; -use work.nono_const.all; - - -entity IRQ_manager is - port ( - it_detected : in std_logic_vector(2 downto 0); - IRQ : out std_logic - ); -end entity; - -architecture RTL of IRQ_manager is -begin - -- partie combinatoire. - IRQ <= IRQ_ON when (it_detected /= "000") else IRQ_OFF; -end RTL; diff --git a/2004/n/fpga/src/interrupt/bch_IRQ_manager.vhd b/2004/n/fpga/src/interrupt/bch_IRQ_manager.vhd deleted file mode 100644 index 1c59d1b..0000000 --- a/2004/n/fpga/src/interrupt/bch_IRQ_manager.vhd +++ /dev/null @@ -1,52 +0,0 @@ --- bch_IRQ_manager.vhd --- Eurobot 2004 : APB Team --- Auteur : Pierre-André Galmes --- Test de IRQ_manager. - -library ieee; -use ieee.std_logic_1164.all; -use ieee.std_logic_arith.all; -use ieee.std_logic_unsigned.all; - -use work.isa_const.all; -use work.nono_const.all; - - -entity bch_IRQ_manager is -end bch_IRQ_manager; - -architecture sim1 of bch_IRQ_manager is - - component IRQ_manager - port ( - it_detected : in std_logic_vector(2 downto 0); - IRQ : out std_logic - ); - end component; - - -- définiton des signaux - signal it_detected : std_logic_vector(2 downto 0); - signal IRQ : std_logic; - -begin - U1 : IRQ_manager port map ( - it_detected => it_detected, - IRQ => IRQ - ); - - it_detected <= "000", - "001" after 2*CK_PERIOD, - "000" after 3*CK_PERIOD, - "010" after 4*CK_PERIOD, - "000" after 5*CK_PERIOD, - "100" after 6*CK_PERIOD, - "000" after 7*CK_PERIOD; - --x"03" after 5*CK_PERIOD; -end sim1; - -configuration cf1_bch_IRQ_manager of bch_IRQ_manager is - for sim1 - for all : IRQ_manager use entity work.IRQ_manager(RTL); end for; - end for; -end cf1_bch_IRQ_manager; - diff --git a/2004/n/fpga/src/interrupt/bch_conserv1.vhd b/2004/n/fpga/src/interrupt/bch_conserv1.vhd deleted file mode 100644 index 50230f7..0000000 --- a/2004/n/fpga/src/interrupt/bch_conserv1.vhd +++ /dev/null @@ -1,60 +0,0 @@ --- bch_conserv1.vhd --- Eurobot 2004 : APB Team --- Auteur : Pierre-André Galmes --- Test de conserv1. - -library ieee; -use ieee.std_logic_1164.all; ---use ieee.std_logic_arith.all; ---use ieee.std_logic_unsigned.all; - -use work.isa_const.all; -use work.nono_const.all; - - -entity bch_conserv1 is -end bch_conserv1; - -architecture sim1 of bch_conserv1 is - - component conserv1 - port ( - clk : in std_logic; - rst : in std_logic; - pin_in : in std_logic; - pin_out : out std_logic - ); - end component; - - -- définiton des signaux - signal clk : std_logic := '0'; - signal rst : std_logic; - signal pin_in : std_logic; - signal pin_out : std_logic; - -begin - U1 : conserv1 port map ( - clk => clk, - rst => rst, - pin_in => pin_in, - pin_out => pin_out - ); - - clk <= not clk after CK_PERIOD/2; - rst <= '1', - '0' after CK_PERIOD, - '1' after 7*CK_PERIOD, - '0' after 8*CK_PERIOD; - pin_in <= '1', - '0' after 2*CK_PERIOD, - '1' after 5*CK_PERIOD, - '0' after 7*CK_PERIOD; - --x"03" after 5*CK_PERIOD; -end sim1; - -configuration cf1_bch_conserv1 of bch_conserv1 is - for sim1 - for all : conserv1 use entity work.conserv1(RTL); end for; - end for; -end cf1_bch_conserv1; - diff --git a/2004/n/fpga/src/interrupt/bch_conserv8.vhd b/2004/n/fpga/src/interrupt/bch_conserv8.vhd deleted file mode 100644 index 8ad7a3e..0000000 --- a/2004/n/fpga/src/interrupt/bch_conserv8.vhd +++ /dev/null @@ -1,60 +0,0 @@ --- bch_conserv8.vhd --- Eurobot 2004 : APB Team --- Auteur : Pierre-André Galmes --- Test de conserv8. - -library ieee; -use ieee.std_logic_1164.all; ---use ieee.std_logic_arith.all; ---use ieee.std_logic_unsigned.all; - -use work.isa_const.all; -use work.nono_const.all; - - -entity bch_conserv8 is -end bch_conserv8; - -architecture sim1 of bch_conserv8 is - - component conserv8 - port ( - clk : in std_logic; - rst : in std_logic; - data_in : in T_DATA; - data_out : out T_DATA - ); - end component; - - -- définiton des signaux - signal clk : std_logic := '0'; - signal rst : std_logic; - signal data_in : T_DATA; - signal data_out : T_DATA; - -begin - U1 : conserv8 port map ( - clk => clk, - rst => rst, - data_in => data_in, - data_out => data_out - ); - - clk <= not clk after CK_PERIOD/2; - rst <= '1', - '0' after CK_PERIOD; - data_in <= x"01", - x"00" after 2*CK_PERIOD, - x"08" after 5*CK_PERIOD, - x"00" after 10*CK_PERIOD, - x"09" after 11*CK_PERIOD, - x"00" after 12*CK_PERIOD; - --x"03" after 5*CK_PERIOD; -end sim1; - -configuration cf1_bch_conserv8 of bch_conserv8 is - for sim1 - for all : conserv8 use entity work.conserv8(RTL); end for; - end for; -end cf1_bch_conserv8; - diff --git a/2004/n/fpga/src/interrupt/bch_seq_interrupt.vhd b/2004/n/fpga/src/interrupt/bch_seq_interrupt.vhd deleted file mode 100644 index eb93269..0000000 --- a/2004/n/fpga/src/interrupt/bch_seq_interrupt.vhd +++ /dev/null @@ -1,76 +0,0 @@ --- bch_seq_interrupt.vhd --- Eurobot 2004 : APB Team --- Auteur : Pierre-André Galmes --- Test de seq_interrupt. - -library ieee; -use ieee.std_logic_1164.all; -use ieee.std_logic_arith.all; -use ieee.std_logic_unsigned.all; - -use work.isa_const.all; -use work.nono_const.all; - - -entity bch_seq_interrupt is -end bch_seq_interrupt; - -architecture sim1 of bch_seq_interrupt is - - component seq_interrupt - port ( - rst : in std_logic; - clk : in std_logic; - irq : in std_logic; -- On a une interruption. - rst_bas : out std_logic; -- raz des bascules. - rst_irq : out std_logic; -- raz de l'IRQ. - en_reg : out std_logic; - -- Chip select - cs0 : in std_logic; - cs1 : in std_logic; - cs2 : in std_logic - ); - end component; - - -- définiton des signaux - signal rst : std_logic; - signal clk : std_logic := '0'; - signal irq : std_logic; - signal rst_bas : std_logic; - signal rst_irq : std_logic; - signal en_reg : std_logic; - signal cs0 : std_logic; - signal cs1 : std_logic; - signal cs2 : std_logic; - -begin - U1 : seq_interrupt port map ( - rst, clk, irq, rst_bas, rst_irq, en_reg, cs0, cs1, cs2); - - rst <= '1', - '0' after CK_PERIOD/4; - clk <= not clk after CK_PERIOD/2; - - irq <= '0', - '1' after 2*CK_PERIOD; - - cs0 <= '0', - '1' after 3*CK_PERIOD, - '0' after 4*CK_PERIOD; - - cs1 <= '0', - '1' after 4*CK_PERIOD, - '0' after 5*CK_PERIOD; - - cs2 <= '0', - '1' after 5*CK_PERIOD, - '0' after 6*CK_PERIOD; - -end sim1; - -configuration cf1_bch_seq_interrupt of bch_seq_interrupt is - for sim1 - for all : seq_interrupt use entity work.seq_interrupt(RTL); end for; - end for; -end cf1_bch_seq_interrupt; - diff --git a/2004/n/fpga/src/interrupt/conserv1.vhd b/2004/n/fpga/src/interrupt/conserv1.vhd deleted file mode 100644 index 8afffe7..0000000 --- a/2004/n/fpga/src/interrupt/conserv1.vhd +++ /dev/null @@ -1,54 +0,0 @@ --- conserv1.vhd --- Eurobot 2004 : APB Team --- Auteur : Pierre-André Galmes --- Lors de la détection d'un front, garde un état haut durant 2 cycles --- d'horloge. Marche sur une patte. - - -library ieee; -use ieee.std_logic_1164.all; ---use ieee.std_logic_arith.all; -use ieee.std_logic_unsigned.all; - -use work.isa_const.all; -use work.nono_const.all; - - -entity conserv1 is - port ( - clk : in std_logic; - rst : in std_logic; - pin_in : in std_logic; - pin_out : out std_logic - ); -end entity; - -architecture RTL of conserv1 is - - -- Signal interne - signal cycle : std_logic_vector (1 downto 0); - -begin - -- process séquentiel - process (rst, clk) - begin - if (rst = '1') then - pin_out <= '0'; - cycle <= "00"; - elsif (clk'event and clk = '1') then - if (cycle = "10") then - pin_out <= '0'; - cycle <= "00"; - end if; - -- - if (pin_in /= '0' or cycle = "01") then - cycle <= cycle + "01"; - pin_out <= '1'; - end if; - - end if; - end process; - - -- process combinatoire. - -end RTL; diff --git a/2004/n/fpga/src/interrupt/conserv8.vhd b/2004/n/fpga/src/interrupt/conserv8.vhd deleted file mode 100644 index dac7b4c..0000000 --- a/2004/n/fpga/src/interrupt/conserv8.vhd +++ /dev/null @@ -1,51 +0,0 @@ --- conserv8.vhd --- Eurobot 2004 : APB Team --- Auteur : Pierre-André Galmes --- Test de conserv1. - -library ieee; -use ieee.std_logic_1164.all; ---use ieee.std_logic_arith.all; ---use ieee.std_logic_unsigned.all; - -use work.isa_const.all; -use work.nono_const.all; - - -entity conserv8 is - port ( - clk : in std_logic; - rst : in std_logic; - data_in : in T_DATA; - data_out : out T_DATA - ); -end conserv8; - -architecture RTL of conserv8 is - - component conserv1 - port ( - clk : in std_logic; - rst : in std_logic; - pin_in : in std_logic; - pin_out : out std_logic - ); - end component; - - -- définiton des signaux - --signal clk : std_logic; - --signal rst : std_logic; - --signal pin_in : std_logic; - --signal pin_out : std_logic; - -begin - pin0 : conserv1 port map (clk, rst, data_in(0), data_out(0)); - pin1 : conserv1 port map (clk, rst, data_in(1), data_out(1)); - pin2 : conserv1 port map (clk, rst, data_in(2), data_out(2)); - pin3 : conserv1 port map (clk, rst, data_in(3), data_out(3)); - pin4 : conserv1 port map (clk, rst, data_in(4), data_out(4)); - pin5 : conserv1 port map (clk, rst, data_in(5), data_out(5)); - pin6 : conserv1 port map (clk, rst, data_in(6), data_out(6)); - pin7 : conserv1 port map (clk, rst, data_in(7), data_out(7)); - -end RTL; diff --git a/2004/n/fpga/src/interrupt/seq_interrupt.vhd b/2004/n/fpga/src/interrupt/seq_interrupt.vhd deleted file mode 100644 index e8ae64d..0000000 --- a/2004/n/fpga/src/interrupt/seq_interrupt.vhd +++ /dev/null @@ -1,106 +0,0 @@ --- seq_interrupt.vhd --- Eurobot 2004 : APB Team --- Auteur : Pierre-André Galmes --- Séquenceur du gestionnaire d'interruptions. - - -library IEEE; -use IEEE.STD_LOGIC_1164.all; --- use IEEE.std_logic_arith.all; --- use IEEE.std_logic_unsigned.all; - -entity seq_interrupt is - port ( - rst : in std_logic; - clk : in std_logic; - irq : in std_logic; -- On a une interruption. - rst_bas : out std_logic; -- raz des bascules. - rst_irq : out std_logic; -- raz de l'IRQ. - en_reg : out std_logic; - -- Chip select - cs0 : in std_logic; - cs1 : in std_logic; - cs2 : in std_logic - ); -end seq_interrupt; - - -architecture RTL of seq_interrupt is --- déclaration d'un nouveau type. -type state_seq is ( - s_idle, - s_mem_reg, - s_rst_bas, - s_wait_read, - s_rst_irq -); -signal statec, statef : state_seq; -signal read_reg0, read_reg1, read_reg2 : std_logic; - -begin - -- Partie synchrone - p_synch : process (rst, clk) - begin - if (rst = '1') then - statec <= s_idle; - rst_bas <= '1'; - rst_irq <= '1'; - elsif (clk'event and clk = '1') then - statec <= statef; - end if; - end process p_synch; - - -- Partie combinatoire - p_combi : process (irq, cs0, cs1, cs2) - begin - -- valeurs par defaut - en_reg <= '0'; rst_bas <= '0'; rst_irq <= '0'; - statef <= statec; - - case statec is - when s_idle => - read_reg0 <= '0'; - read_reg1 <= '0'; - read_reg2 <= '0'; - if (irq = '1') then - statef <= s_mem_reg; - end if; - - when s_mem_reg => - en_reg <= '1'; - statef <= s_rst_bas; - - when s_rst_bas => - rst_bas <= '1'; - statef <= s_wait_read; - - -- on attend la lecture des trois registres. - when s_wait_read => - if (cs0 = '1') then - read_reg0 <= '1'; - end if; - if (cs0 = '1') then - read_reg0 <= '1'; - end if; - if (cs0 = '1') then - read_reg0 <= '1'; - end if; - -- TODO : ici, la condition pour arrêter le signal - -- d'interruption. Pour l'instant, j'attend qu'il ai fini de - -- faire les 3 lectures (remis tous les CS à 0). - if (read_reg0 = '1' and read_reg1 = '1' and - read_reg2 = '1' and cs0 = '0' and cs1 = '0' and cs2 = '0') then - statef <= s_rst_irq; - else - statef <= statec; - end if; - - when s_rst_irq => - rst_irq <= '1'; - statef <= s_idle; - - when others => NULL; - - end case; - end process; -end RTL; -- cgit v1.2.3