From 7815edf8cffb20a4a33199599a35bb8c107b16d1 Mon Sep 17 00:00:00 2001 From: prot Date: Thu, 26 Feb 2004 10:47:33 +0000 Subject: . --- 2004/n/fpga/src/registre/registre.vhd | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to '2004/n/fpga/src') diff --git a/2004/n/fpga/src/registre/registre.vhd b/2004/n/fpga/src/registre/registre.vhd index 94be6c2..e0445fb 100644 --- a/2004/n/fpga/src/registre/registre.vhd +++ b/2004/n/fpga/src/registre/registre.vhd @@ -45,7 +45,7 @@ end entity; architecture rtl of regIO is -signal REG : T_DATA :=(others => '1'); +signal REG : T_DATA :=(others => '0'); begin p_w:process(ck,load,input,rst) @@ -104,3 +104,4 @@ end rtl; + -- cgit v1.2.3