From 2a8c2d3c2521de1599f6dc0d5a6b116d9c28bea3 Mon Sep 17 00:00:00 2001 From: prot Date: Sat, 3 Apr 2004 18:18:36 +0000 Subject: Modif aprs cration du top fpga.vhd --- 2004/n/fpga/src/decodisa/decodisa_translate.vhd | 14082 ++++++++++++++++++++++ 1 file changed, 14082 insertions(+) create mode 100644 2004/n/fpga/src/decodisa/decodisa_translate.vhd (limited to '2004/n/fpga/src/decodisa/decodisa_translate.vhd') diff --git a/2004/n/fpga/src/decodisa/decodisa_translate.vhd b/2004/n/fpga/src/decodisa/decodisa_translate.vhd new file mode 100644 index 0000000..095f62b --- /dev/null +++ b/2004/n/fpga/src/decodisa/decodisa_translate.vhd @@ -0,0 +1,14082 @@ +-- Xilinx Vhdl netlist produced by netgen application (version G.26) +-- Command : -intstyle ise -rpw 100 -tpw 0 -ar Structure -xon true -w -ofmt vhdl -sim decodisa.ngd decodisa_translate.vhd +-- Input file : decodisa.ngd +-- Output file : decodisa_translate.vhd +-- Design name : decodisa +-- # of Entities : 1 +-- Xilinx : D:/xilinx +-- Device : 2s200fg456-6 + +-- This vhdl netlist is a simulation model and uses simulation +-- primitives which may not represent the true implementation of the +-- device, however the netlist is functionally correct and should not +-- be modified. This file cannot be synthesized and should only be used +-- with supported simulation tools. + +library IEEE; +use IEEE.STD_LOGIC_1164.ALL; +library SIMPRIM; +use SIMPRIM.VCOMPONENTS.ALL; +use SIMPRIM.VPACKAGE.ALL; + +entity decodisa is + port ( + AEN : in STD_LOGIC := 'X'; + IOR : in STD_LOGIC := 'X'; + IOW : in STD_LOGIC := 'X'; + clk : out STD_LOGIC; + rw : out STD_LOGIC; + adr_bus : in STD_LOGIC_VECTOR ( 23 downto 0 ); + cs : out STD_LOGIC_VECTOR ( 255 downto 0 ) + ); +end decodisa; + +architecture Structure of decodisa is + signal clk_OBUF : STD_LOGIC; + signal adr_bus_11_IBUF : STD_LOGIC; + signal rw_OBUF : STD_LOGIC; + signal adr_bus_10_IBUF : STD_LOGIC; + signal AEN_IBUF : STD_LOGIC; + signal IOR_IBUF : STD_LOGIC; + signal IOW_IBUF : STD_LOGIC; + signal adr_bus_9_IBUF : STD_LOGIC; + signal cs_0_OBUF : STD_LOGIC; + signal adr_bus_14_IBUF : STD_LOGIC; + signal adr_bus_15_IBUF : STD_LOGIC; + signal adr_bus_6_IBUF : STD_LOGIC; + signal adr_bus_0_IBUF : STD_LOGIC; + signal adr_bus_8_IBUF : STD_LOGIC; + signal cs_2_OBUF : STD_LOGIC; + signal adr_bus_7_IBUF : STD_LOGIC; + signal cs_1_OBUF : STD_LOGIC; + signal adr_bus_3_IBUF : STD_LOGIC; + signal adr_bus_4_IBUF : STD_LOGIC; + signal adr_bus_2_IBUF : STD_LOGIC; + signal adr_bus_5_IBUF : STD_LOGIC; + signal adr_bus_1_IBUF : STD_LOGIC; + signal adr_bus_13_IBUF : STD_LOGIC; + signal adr_bus_12_IBUF : STD_LOGIC; + signal reg_select : STD_LOGIC; + signal cs_3_OBUF : STD_LOGIC; + signal cs_255_OBUF : STD_LOGIC; + signal cs_254_OBUF : STD_LOGIC; + signal cs_253_OBUF : STD_LOGIC; + signal cs_252_OBUF : STD_LOGIC; + signal cs_251_OBUF : STD_LOGIC; + signal cs_250_OBUF : STD_LOGIC; + signal cs_249_OBUF : STD_LOGIC; + signal cs_248_OBUF : STD_LOGIC; + signal cs_247_OBUF : STD_LOGIC; + signal cs_246_OBUF : STD_LOGIC; + signal cs_245_OBUF : STD_LOGIC; + signal cs_244_OBUF : STD_LOGIC; + signal cs_243_OBUF : STD_LOGIC; + signal cs_242_OBUF : STD_LOGIC; + signal cs_241_OBUF : STD_LOGIC; + signal cs_240_OBUF : STD_LOGIC; + signal cs_239_OBUF : STD_LOGIC; + signal cs_238_OBUF : STD_LOGIC; + signal cs_237_OBUF : STD_LOGIC; + signal cs_236_OBUF : STD_LOGIC; + signal cs_235_OBUF : STD_LOGIC; + signal cs_234_OBUF : STD_LOGIC; + signal cs_233_OBUF : STD_LOGIC; + signal cs_232_OBUF : STD_LOGIC; + signal cs_231_OBUF : STD_LOGIC; + signal cs_230_OBUF : STD_LOGIC; + signal cs_229_OBUF : STD_LOGIC; + signal cs_228_OBUF : STD_LOGIC; + signal cs_227_OBUF : STD_LOGIC; + signal cs_226_OBUF : STD_LOGIC; + signal cs_225_OBUF : STD_LOGIC; + signal cs_224_OBUF : STD_LOGIC; + signal cs_223_OBUF : STD_LOGIC; + signal cs_222_OBUF : STD_LOGIC; + signal cs_221_OBUF : STD_LOGIC; + signal cs_220_OBUF : STD_LOGIC; + signal cs_219_OBUF : STD_LOGIC; + signal cs_218_OBUF : STD_LOGIC; + signal cs_217_OBUF : STD_LOGIC; + signal cs_216_OBUF : STD_LOGIC; + signal cs_215_OBUF : STD_LOGIC; + signal cs_214_OBUF : STD_LOGIC; + signal cs_213_OBUF : STD_LOGIC; + signal cs_212_OBUF : STD_LOGIC; + signal cs_211_OBUF : STD_LOGIC; + signal cs_210_OBUF : STD_LOGIC; + signal cs_209_OBUF : STD_LOGIC; + signal cs_208_OBUF : STD_LOGIC; + signal cs_207_OBUF : STD_LOGIC; + signal cs_206_OBUF : STD_LOGIC; + signal cs_205_OBUF : STD_LOGIC; + signal cs_204_OBUF : STD_LOGIC; + signal cs_203_OBUF : STD_LOGIC; + signal cs_202_OBUF : STD_LOGIC; + signal cs_201_OBUF : STD_LOGIC; + signal cs_200_OBUF : STD_LOGIC; + signal cs_199_OBUF : STD_LOGIC; + signal cs_198_OBUF : STD_LOGIC; + signal cs_197_OBUF : STD_LOGIC; + signal cs_196_OBUF : STD_LOGIC; + signal cs_195_OBUF : STD_LOGIC; + signal cs_194_OBUF : STD_LOGIC; + signal cs_193_OBUF : STD_LOGIC; + signal cs_192_OBUF : STD_LOGIC; + signal cs_191_OBUF : STD_LOGIC; + signal cs_190_OBUF : STD_LOGIC; + signal cs_189_OBUF : STD_LOGIC; + signal cs_188_OBUF : STD_LOGIC; + signal cs_187_OBUF : STD_LOGIC; + signal cs_186_OBUF : STD_LOGIC; + signal cs_185_OBUF : STD_LOGIC; + signal cs_184_OBUF : STD_LOGIC; + signal cs_183_OBUF : STD_LOGIC; + signal cs_182_OBUF : STD_LOGIC; + signal cs_181_OBUF : STD_LOGIC; + signal cs_180_OBUF : STD_LOGIC; + signal cs_179_OBUF : STD_LOGIC; + signal cs_178_OBUF : STD_LOGIC; + signal cs_177_OBUF : STD_LOGIC; + signal cs_176_OBUF : STD_LOGIC; + signal cs_175_OBUF : STD_LOGIC; + signal cs_174_OBUF : STD_LOGIC; + signal cs_173_OBUF : STD_LOGIC; + signal cs_172_OBUF : STD_LOGIC; + signal cs_171_OBUF : STD_LOGIC; + signal cs_170_OBUF : STD_LOGIC; + signal cs_169_OBUF : STD_LOGIC; + signal cs_168_OBUF : STD_LOGIC; + signal cs_167_OBUF : STD_LOGIC; + signal cs_166_OBUF : STD_LOGIC; + signal cs_165_OBUF : STD_LOGIC; + signal cs_164_OBUF : STD_LOGIC; + signal cs_163_OBUF : STD_LOGIC; + signal cs_162_OBUF : STD_LOGIC; + signal cs_161_OBUF : STD_LOGIC; + signal cs_160_OBUF : STD_LOGIC; + signal cs_159_OBUF : STD_LOGIC; + signal cs_158_OBUF : STD_LOGIC; + signal cs_157_OBUF : STD_LOGIC; + signal cs_156_OBUF : STD_LOGIC; + signal cs_155_OBUF : STD_LOGIC; + signal cs_154_OBUF : STD_LOGIC; + signal cs_153_OBUF : STD_LOGIC; + signal cs_152_OBUF : STD_LOGIC; + signal cs_151_OBUF : STD_LOGIC; + signal cs_150_OBUF : STD_LOGIC; + signal cs_149_OBUF : STD_LOGIC; + signal cs_148_OBUF : STD_LOGIC; + signal cs_147_OBUF : STD_LOGIC; + signal cs_146_OBUF : STD_LOGIC; + signal cs_145_OBUF : STD_LOGIC; + signal cs_144_OBUF : STD_LOGIC; + signal cs_143_OBUF : STD_LOGIC; + signal cs_142_OBUF : STD_LOGIC; + signal cs_141_OBUF : STD_LOGIC; + signal cs_140_OBUF : STD_LOGIC; + signal cs_139_OBUF : STD_LOGIC; + signal cs_138_OBUF : STD_LOGIC; + signal cs_137_OBUF : STD_LOGIC; + signal cs_136_OBUF : STD_LOGIC; + signal cs_135_OBUF : STD_LOGIC; + signal cs_134_OBUF : STD_LOGIC; + signal cs_133_OBUF : STD_LOGIC; + signal cs_132_OBUF : STD_LOGIC; + signal cs_131_OBUF : STD_LOGIC; + signal cs_130_OBUF : STD_LOGIC; + signal cs_129_OBUF : STD_LOGIC; + signal cs_128_OBUF : STD_LOGIC; + signal cs_127_OBUF : STD_LOGIC; + signal cs_126_OBUF : STD_LOGIC; + signal cs_125_OBUF : STD_LOGIC; + signal cs_124_OBUF : STD_LOGIC; + signal cs_123_OBUF : STD_LOGIC; + signal cs_122_OBUF : STD_LOGIC; + signal cs_121_OBUF : STD_LOGIC; + signal cs_120_OBUF : STD_LOGIC; + signal cs_119_OBUF : STD_LOGIC; + signal cs_118_OBUF : STD_LOGIC; + signal cs_117_OBUF : STD_LOGIC; + signal cs_116_OBUF : STD_LOGIC; + signal cs_115_OBUF : STD_LOGIC; + signal cs_114_OBUF : STD_LOGIC; + signal cs_113_OBUF : STD_LOGIC; + signal cs_112_OBUF : STD_LOGIC; + signal cs_111_OBUF : STD_LOGIC; + signal cs_110_OBUF : STD_LOGIC; + signal cs_109_OBUF : STD_LOGIC; + signal cs_108_OBUF : STD_LOGIC; + signal cs_107_OBUF : STD_LOGIC; + signal cs_106_OBUF : STD_LOGIC; + signal cs_105_OBUF : STD_LOGIC; + signal cs_104_OBUF : STD_LOGIC; + signal cs_103_OBUF : STD_LOGIC; + signal cs_102_OBUF : STD_LOGIC; + signal cs_101_OBUF : STD_LOGIC; + signal cs_100_OBUF : STD_LOGIC; + signal cs_99_OBUF : STD_LOGIC; + signal cs_98_OBUF : STD_LOGIC; + signal cs_97_OBUF : STD_LOGIC; + signal cs_96_OBUF : STD_LOGIC; + signal cs_95_OBUF : STD_LOGIC; + signal cs_94_OBUF : STD_LOGIC; + signal cs_93_OBUF : STD_LOGIC; + signal cs_92_OBUF : STD_LOGIC; + signal cs_91_OBUF : STD_LOGIC; + signal cs_90_OBUF : STD_LOGIC; + signal cs_89_OBUF : STD_LOGIC; + signal cs_88_OBUF : STD_LOGIC; + signal cs_87_OBUF : STD_LOGIC; + signal cs_86_OBUF : STD_LOGIC; + signal cs_85_OBUF : STD_LOGIC; + signal cs_84_OBUF : STD_LOGIC; + signal cs_83_OBUF : STD_LOGIC; + signal cs_82_OBUF : STD_LOGIC; + signal cs_81_OBUF : STD_LOGIC; + signal cs_80_OBUF : STD_LOGIC; + signal cs_79_OBUF : STD_LOGIC; + signal cs_78_OBUF : STD_LOGIC; + signal cs_77_OBUF : STD_LOGIC; + signal cs_76_OBUF : STD_LOGIC; + signal cs_75_OBUF : STD_LOGIC; + signal cs_74_OBUF : STD_LOGIC; + signal cs_73_OBUF : STD_LOGIC; + signal cs_72_OBUF : STD_LOGIC; + signal cs_71_OBUF : STD_LOGIC; + signal cs_70_OBUF : STD_LOGIC; + signal cs_69_OBUF : STD_LOGIC; + signal cs_68_OBUF : STD_LOGIC; + signal cs_67_OBUF : STD_LOGIC; + signal cs_66_OBUF : STD_LOGIC; + signal cs_65_OBUF : STD_LOGIC; + signal cs_64_OBUF : STD_LOGIC; + signal cs_63_OBUF : STD_LOGIC; + signal cs_62_OBUF : STD_LOGIC; + signal cs_61_OBUF : STD_LOGIC; + signal cs_60_OBUF : STD_LOGIC; + signal cs_59_OBUF : STD_LOGIC; + signal cs_58_OBUF : STD_LOGIC; + signal cs_57_OBUF : STD_LOGIC; + signal cs_56_OBUF : STD_LOGIC; + signal cs_55_OBUF : STD_LOGIC; + signal cs_54_OBUF : STD_LOGIC; + signal cs_53_OBUF : STD_LOGIC; + signal cs_52_OBUF : STD_LOGIC; + signal cs_51_OBUF : STD_LOGIC; + signal cs_50_OBUF : STD_LOGIC; + signal cs_49_OBUF : STD_LOGIC; + signal cs_48_OBUF : STD_LOGIC; + signal cs_47_OBUF : STD_LOGIC; + signal cs_46_OBUF : STD_LOGIC; + signal cs_45_OBUF : STD_LOGIC; + signal cs_44_OBUF : STD_LOGIC; + signal cs_43_OBUF : STD_LOGIC; + signal cs_42_OBUF : STD_LOGIC; + signal cs_41_OBUF : STD_LOGIC; + signal cs_40_OBUF : STD_LOGIC; + signal cs_39_OBUF : STD_LOGIC; + signal cs_38_OBUF : STD_LOGIC; + signal cs_37_OBUF : STD_LOGIC; + signal cs_36_OBUF : STD_LOGIC; + signal cs_35_OBUF : STD_LOGIC; + signal cs_34_OBUF : STD_LOGIC; + signal cs_33_OBUF : STD_LOGIC; + signal cs_32_OBUF : STD_LOGIC; + signal cs_31_OBUF : STD_LOGIC; + signal cs_30_OBUF : STD_LOGIC; + signal cs_29_OBUF : STD_LOGIC; + signal cs_28_OBUF : STD_LOGIC; + signal cs_27_OBUF : STD_LOGIC; + signal cs_26_OBUF : STD_LOGIC; + signal cs_25_OBUF : STD_LOGIC; + signal cs_24_OBUF : STD_LOGIC; + signal cs_23_OBUF : STD_LOGIC; + signal cs_22_OBUF : STD_LOGIC; + signal cs_21_OBUF : STD_LOGIC; + signal cs_20_OBUF : STD_LOGIC; + signal cs_19_OBUF : STD_LOGIC; + signal cs_18_OBUF : STD_LOGIC; + signal cs_17_OBUF : STD_LOGIC; + signal cs_16_OBUF : STD_LOGIC; + signal cs_15_OBUF : STD_LOGIC; + signal cs_14_OBUF : STD_LOGIC; + signal cs_13_OBUF : STD_LOGIC; + signal cs_12_OBUF : STD_LOGIC; + signal cs_11_OBUF : STD_LOGIC; + signal cs_10_OBUF : STD_LOGIC; + signal cs_9_OBUF : STD_LOGIC; + signal cs_8_OBUF : STD_LOGIC; + signal cs_7_OBUF : STD_LOGIC; + signal cs_6_OBUF : STD_LOGIC; + signal cs_5_OBUF : STD_LOGIC; + signal cs_4_OBUF : STD_LOGIC; + signal N5267 : STD_LOGIC; + signal CHOICE45 : STD_LOGIC; + signal dadrL_N18685 : STD_LOGIC; + signal dadrL_N18684 : STD_LOGIC; + signal dadrL_N18614 : STD_LOGIC; + signal dadrL_N18613 : STD_LOGIC; + signal dadrL_N18543 : STD_LOGIC; + signal dadrL_N18542 : STD_LOGIC; + signal dadrL_N18472 : STD_LOGIC; + signal dadrL_N18471 : STD_LOGIC; + signal dadrL_N18401 : STD_LOGIC; + signal dadrL_N18400 : STD_LOGIC; + signal dadrL_N18330 : STD_LOGIC; + signal dadrL_N18329 : STD_LOGIC; + signal dadrL_N18259 : STD_LOGIC; + signal dadrL_N18258 : STD_LOGIC; + signal dadrL_N18188 : STD_LOGIC; + signal dadrL_N18187 : STD_LOGIC; + signal dadrL_N18117 : STD_LOGIC; + signal dadrL_N18116 : STD_LOGIC; + signal dadrL_N18046 : STD_LOGIC; + signal dadrL_N18045 : STD_LOGIC; + signal dadrL_N17975 : STD_LOGIC; + signal dadrL_N17974 : STD_LOGIC; + signal dadrL_N17904 : STD_LOGIC; + signal dadrL_N17903 : STD_LOGIC; + signal dadrL_N17833 : STD_LOGIC; + signal dadrL_N17832 : STD_LOGIC; + signal dadrL_N17762 : STD_LOGIC; + signal dadrL_N17761 : STD_LOGIC; + signal dadrL_N17691 : STD_LOGIC; + signal dadrL_N17690 : STD_LOGIC; + signal dadrL_N17620 : STD_LOGIC; + signal dadrL_N17619 : STD_LOGIC; + signal dadrL_N17549 : STD_LOGIC; + signal dadrL_N17548 : STD_LOGIC; + signal dadrL_N17478 : STD_LOGIC; + signal dadrL_N17477 : STD_LOGIC; + signal dadrL_N17407 : STD_LOGIC; + signal dadrL_N17406 : STD_LOGIC; + signal dadrL_N17336 : STD_LOGIC; + signal dadrL_N17335 : STD_LOGIC; + signal dadrL_N17265 : STD_LOGIC; + signal dadrL_N17264 : STD_LOGIC; + signal dadrL_N17194 : STD_LOGIC; + signal dadrL_N17193 : STD_LOGIC; + signal dadrL_N17123 : STD_LOGIC; + signal dadrL_N17122 : STD_LOGIC; + signal dadrL_N17052 : STD_LOGIC; + signal dadrL_N17051 : STD_LOGIC; + signal dadrL_N16981 : STD_LOGIC; + signal dadrL_N16980 : STD_LOGIC; + signal dadrL_N16910 : STD_LOGIC; + signal dadrL_N16909 : STD_LOGIC; + signal dadrL_N16839 : STD_LOGIC; + signal dadrL_N16838 : STD_LOGIC; + signal dadrL_N16768 : STD_LOGIC; + signal dadrL_N16767 : STD_LOGIC; + signal dadrL_N16697 : STD_LOGIC; + signal dadrL_N16696 : STD_LOGIC; + signal dadrL_N16626 : STD_LOGIC; + signal dadrL_N16625 : STD_LOGIC; + signal dadrL_N16555 : STD_LOGIC; + signal dadrL_N16554 : STD_LOGIC; + signal dadrL_N16484 : STD_LOGIC; + signal dadrL_N16483 : STD_LOGIC; + signal dadrL_N16413 : STD_LOGIC; + signal dadrL_N16412 : STD_LOGIC; + signal dadrL_N16342 : STD_LOGIC; + signal dadrL_N16341 : STD_LOGIC; + signal dadrL_N16271 : STD_LOGIC; + signal dadrL_N16270 : STD_LOGIC; + signal dadrL_N16200 : STD_LOGIC; + signal dadrL_N16199 : STD_LOGIC; + signal dadrL_N16129 : STD_LOGIC; + signal dadrL_N16128 : STD_LOGIC; + signal dadrL_N16058 : STD_LOGIC; + signal dadrL_N16057 : STD_LOGIC; + signal dadrL_N15987 : STD_LOGIC; + signal dadrL_N15986 : STD_LOGIC; + signal dadrL_N15916 : STD_LOGIC; + signal dadrL_N15915 : STD_LOGIC; + signal dadrL_N15845 : STD_LOGIC; + signal dadrL_N15844 : STD_LOGIC; + signal dadrL_N15774 : STD_LOGIC; + signal dadrL_N15773 : STD_LOGIC; + signal dadrL_N15703 : STD_LOGIC; + signal dadrL_N15702 : STD_LOGIC; + signal dadrL_N15632 : STD_LOGIC; + signal dadrL_N15631 : STD_LOGIC; + signal dadrL_N15561 : STD_LOGIC; + signal dadrL_N15560 : STD_LOGIC; + signal dadrL_N15490 : STD_LOGIC; + signal dadrL_N15489 : STD_LOGIC; + signal dadrL_N15419 : STD_LOGIC; + signal dadrL_N15418 : STD_LOGIC; + signal dadrL_N15348 : STD_LOGIC; + signal dadrL_N15347 : STD_LOGIC; + signal dadrL_N15277 : STD_LOGIC; + signal dadrL_N15276 : STD_LOGIC; + signal dadrL_N15206 : STD_LOGIC; + signal dadrL_N15205 : STD_LOGIC; + signal dadrL_N15135 : STD_LOGIC; + signal dadrL_N15134 : STD_LOGIC; + signal dadrL_N15064 : STD_LOGIC; + signal dadrL_N15063 : STD_LOGIC; + signal dadrL_N14993 : STD_LOGIC; + signal dadrL_N14992 : STD_LOGIC; + signal dadrL_N14922 : STD_LOGIC; + signal dadrL_N14921 : STD_LOGIC; + signal dadrL_N14851 : STD_LOGIC; + signal dadrL_N14850 : STD_LOGIC; + signal dadrL_N14780 : STD_LOGIC; + signal dadrL_N14779 : STD_LOGIC; + signal dadrL_N14709 : STD_LOGIC; + signal dadrL_N14708 : STD_LOGIC; + signal dadrL_N14638 : STD_LOGIC; + signal dadrL_N14637 : STD_LOGIC; + signal dadrL_N14567 : STD_LOGIC; + signal dadrL_N14566 : STD_LOGIC; + signal dadrL_N14496 : STD_LOGIC; + signal dadrL_N14495 : STD_LOGIC; + signal dadrL_N14425 : STD_LOGIC; + signal dadrL_N14424 : STD_LOGIC; + signal dadrL_N14354 : STD_LOGIC; + signal dadrL_N14353 : STD_LOGIC; + signal dadrL_N14283 : STD_LOGIC; + signal dadrL_N14282 : STD_LOGIC; + signal dadrL_N14212 : STD_LOGIC; + signal dadrL_N14211 : STD_LOGIC; + signal dadrL_N14141 : STD_LOGIC; + signal dadrL_N14140 : STD_LOGIC; + signal dadrL_N14070 : STD_LOGIC; + signal dadrL_N14069 : STD_LOGIC; + signal dadrL_N13999 : STD_LOGIC; + signal dadrL_N13998 : STD_LOGIC; + signal dadrL_N13928 : STD_LOGIC; + signal dadrL_N13927 : STD_LOGIC; + signal dadrL_N13857 : STD_LOGIC; + signal dadrL_N13856 : STD_LOGIC; + signal dadrL_N13786 : STD_LOGIC; + signal dadrL_N13785 : STD_LOGIC; + signal dadrL_N13715 : STD_LOGIC; + signal dadrL_N13714 : STD_LOGIC; + signal dadrL_N13644 : STD_LOGIC; + signal dadrL_N13643 : STD_LOGIC; + signal dadrL_N13573 : STD_LOGIC; + signal dadrL_N13572 : STD_LOGIC; + signal dadrL_N13502 : STD_LOGIC; + signal dadrL_N13501 : STD_LOGIC; + signal dadrL_N13431 : STD_LOGIC; + signal dadrL_N13430 : STD_LOGIC; + signal dadrL_N13360 : STD_LOGIC; + signal dadrL_N13359 : STD_LOGIC; + signal dadrL_N13289 : STD_LOGIC; + signal dadrL_N13288 : STD_LOGIC; + signal dadrL_N13218 : STD_LOGIC; + signal dadrL_N13217 : STD_LOGIC; + signal dadrL_N13147 : STD_LOGIC; + signal dadrL_N13146 : STD_LOGIC; + signal dadrL_N13076 : STD_LOGIC; + signal dadrL_N13075 : STD_LOGIC; + signal dadrL_N13005 : STD_LOGIC; + signal dadrL_N13004 : STD_LOGIC; + signal dadrL_N12934 : STD_LOGIC; + signal dadrL_N12933 : STD_LOGIC; + signal dadrL_N12863 : STD_LOGIC; + signal dadrL_N12862 : STD_LOGIC; + signal dadrL_N12792 : STD_LOGIC; + signal dadrL_N12791 : STD_LOGIC; + signal dadrL_N12721 : STD_LOGIC; + signal dadrL_N12720 : STD_LOGIC; + signal dadrL_N12650 : STD_LOGIC; + signal dadrL_N12649 : STD_LOGIC; + signal dadrL_N12579 : STD_LOGIC; + signal dadrL_N12578 : STD_LOGIC; + signal dadrL_N12508 : STD_LOGIC; + signal dadrL_N12507 : STD_LOGIC; + signal dadrL_N12437 : STD_LOGIC; + signal dadrL_N12436 : STD_LOGIC; + signal dadrL_N12366 : STD_LOGIC; + signal dadrL_N12365 : STD_LOGIC; + signal dadrL_N12295 : STD_LOGIC; + signal dadrL_N12294 : STD_LOGIC; + signal dadrL_N12224 : STD_LOGIC; + signal dadrL_N12223 : STD_LOGIC; + signal dadrL_N12153 : STD_LOGIC; + signal dadrL_N12152 : STD_LOGIC; + signal dadrL_N12082 : STD_LOGIC; + signal dadrL_N12081 : STD_LOGIC; + signal dadrL_N12011 : STD_LOGIC; + signal dadrL_N12010 : STD_LOGIC; + signal dadrL_N11940 : STD_LOGIC; + signal dadrL_N11939 : STD_LOGIC; + signal dadrL_N11869 : STD_LOGIC; + signal dadrL_N11868 : STD_LOGIC; + signal dadrL_N11798 : STD_LOGIC; + signal dadrL_N11797 : STD_LOGIC; + signal dadrL_N11727 : STD_LOGIC; + signal dadrL_N11726 : STD_LOGIC; + signal dadrL_N11656 : STD_LOGIC; + signal dadrL_N11655 : STD_LOGIC; + signal dadrL_N11585 : STD_LOGIC; + signal dadrL_N11584 : STD_LOGIC; + signal dadrL_N11514 : STD_LOGIC; + signal dadrL_N11513 : STD_LOGIC; + signal dadrL_N11443 : STD_LOGIC; + signal dadrL_N11442 : STD_LOGIC; + signal dadrL_N11372 : STD_LOGIC; + signal dadrL_N11371 : STD_LOGIC; + signal dadrL_N11301 : STD_LOGIC; + signal dadrL_N11300 : STD_LOGIC; + signal dadrL_N11230 : STD_LOGIC; + signal dadrL_N11229 : STD_LOGIC; + signal dadrL_N11159 : STD_LOGIC; + signal dadrL_N11158 : STD_LOGIC; + signal dadrL_N11088 : STD_LOGIC; + signal dadrL_N11087 : STD_LOGIC; + signal dadrL_N11017 : STD_LOGIC; + signal dadrL_N11016 : STD_LOGIC; + signal dadrL_N10946 : STD_LOGIC; + signal dadrL_N10945 : STD_LOGIC; + signal dadrL_N10875 : STD_LOGIC; + signal dadrL_N10874 : STD_LOGIC; + signal dadrL_N10804 : STD_LOGIC; + signal dadrL_N10803 : STD_LOGIC; + signal dadrL_N10733 : STD_LOGIC; + signal dadrL_N10732 : STD_LOGIC; + signal dadrL_N10662 : STD_LOGIC; + signal dadrL_N10661 : STD_LOGIC; + signal dadrL_N10591 : STD_LOGIC; + signal dadrL_N10590 : STD_LOGIC; + signal dadrL_N10520 : STD_LOGIC; + signal dadrL_N10519 : STD_LOGIC; + signal dadrL_N10449 : STD_LOGIC; + signal dadrL_N10448 : STD_LOGIC; + signal dadrL_N10378 : STD_LOGIC; + signal dadrL_N10377 : STD_LOGIC; + signal dadrL_N10307 : STD_LOGIC; + signal dadrL_N10306 : STD_LOGIC; + signal dadrL_N10236 : STD_LOGIC; + signal dadrL_N10235 : STD_LOGIC; + signal dadrL_N10165 : STD_LOGIC; + signal dadrL_N10164 : STD_LOGIC; + signal dadrL_N10094 : STD_LOGIC; + signal dadrL_N10093 : STD_LOGIC; + signal dadrL_N10023 : STD_LOGIC; + signal dadrL_N10022 : STD_LOGIC; + signal dadrL_N9952 : STD_LOGIC; + signal dadrL_N9951 : STD_LOGIC; + signal dadrL_N9881 : STD_LOGIC; + signal dadrL_N9880 : STD_LOGIC; + signal dadrL_N9810 : STD_LOGIC; + signal dadrL_N9809 : STD_LOGIC; + signal dadrL_N9739 : STD_LOGIC; + signal dadrL_N9738 : STD_LOGIC; + signal dadrL_N9668 : STD_LOGIC; + signal dadrL_N9667 : STD_LOGIC; + signal dadrL_N9597 : STD_LOGIC; + signal dadrL_N9596 : STD_LOGIC; + signal dadrL_N9526 : STD_LOGIC; + signal dadrL_N9525 : STD_LOGIC; + signal dadrL_N9455 : STD_LOGIC; + signal dadrL_N9454 : STD_LOGIC; + signal dadrL_N9384 : STD_LOGIC; + signal dadrL_N9383 : STD_LOGIC; + signal dadrL_N9313 : STD_LOGIC; + signal dadrL_N9312 : STD_LOGIC; + signal dadrL_N9242 : STD_LOGIC; + signal dadrL_N9241 : STD_LOGIC; + signal dadrL_N9171 : STD_LOGIC; + signal dadrL_N9170 : STD_LOGIC; + signal dadrL_N9100 : STD_LOGIC; + signal dadrL_N9099 : STD_LOGIC; + signal dadrL_N9029 : STD_LOGIC; + signal dadrL_N9028 : STD_LOGIC; + signal dadrL_N8958 : STD_LOGIC; + signal dadrL_N8957 : STD_LOGIC; + signal dadrL_N8887 : STD_LOGIC; + signal dadrL_N8886 : STD_LOGIC; + signal dadrL_N8816 : STD_LOGIC; + signal dadrL_N8815 : STD_LOGIC; + signal dadrL_N8745 : STD_LOGIC; + signal dadrL_N8744 : STD_LOGIC; + signal dadrL_N8674 : STD_LOGIC; + signal dadrL_N8673 : STD_LOGIC; + signal dadrL_N8603 : STD_LOGIC; + signal dadrL_N8602 : STD_LOGIC; + signal dadrL_N8532 : STD_LOGIC; + signal dadrL_N8531 : STD_LOGIC; + signal dadrL_N8461 : STD_LOGIC; + signal dadrL_N8460 : STD_LOGIC; + signal dadrL_N8390 : STD_LOGIC; + signal dadrL_N8389 : STD_LOGIC; + signal dadrL_N8319 : STD_LOGIC; + signal dadrL_N8318 : STD_LOGIC; + signal dadrL_N8248 : STD_LOGIC; + signal dadrL_N8247 : STD_LOGIC; + signal dadrL_N8177 : STD_LOGIC; + signal dadrL_N8176 : STD_LOGIC; + signal dadrL_N8106 : STD_LOGIC; + signal dadrL_N8105 : STD_LOGIC; + signal dadrL_N8035 : STD_LOGIC; + signal dadrL_N8034 : STD_LOGIC; + signal dadrL_N7964 : STD_LOGIC; + signal dadrL_N7963 : STD_LOGIC; + signal dadrL_N7893 : STD_LOGIC; + signal dadrL_N7892 : STD_LOGIC; + signal dadrL_N7822 : STD_LOGIC; + signal dadrL_N7821 : STD_LOGIC; + signal dadrL_N7751 : STD_LOGIC; + signal dadrL_N7750 : STD_LOGIC; + signal dadrL_N7680 : STD_LOGIC; + signal dadrL_N7679 : STD_LOGIC; + signal dadrL_N7609 : STD_LOGIC; + signal dadrL_N7608 : STD_LOGIC; + signal dadrL_N7538 : STD_LOGIC; + signal dadrL_N7537 : STD_LOGIC; + signal dadrL_N7467 : STD_LOGIC; + signal dadrL_N7466 : STD_LOGIC; + signal dadrL_N7396 : STD_LOGIC; + signal dadrL_N7395 : STD_LOGIC; + signal dadrL_N7325 : STD_LOGIC; + signal dadrL_N7324 : STD_LOGIC; + signal dadrL_N7254 : STD_LOGIC; + signal dadrL_N7253 : STD_LOGIC; + signal dadrL_N7183 : STD_LOGIC; + signal dadrL_N7182 : STD_LOGIC; + signal dadrL_N7112 : STD_LOGIC; + signal dadrL_N7111 : STD_LOGIC; + signal dadrL_N7041 : STD_LOGIC; + signal dadrL_N7040 : STD_LOGIC; + signal dadrL_N6970 : STD_LOGIC; + signal dadrL_N6969 : STD_LOGIC; + signal dadrL_N6899 : STD_LOGIC; + signal dadrL_N6898 : STD_LOGIC; + signal dadrL_N6828 : STD_LOGIC; + signal dadrL_N6827 : STD_LOGIC; + signal dadrL_N6757 : STD_LOGIC; + signal dadrL_N6756 : STD_LOGIC; + signal dadrL_N6686 : STD_LOGIC; + signal dadrL_N6685 : STD_LOGIC; + signal dadrL_N6615 : STD_LOGIC; + signal dadrL_N6614 : STD_LOGIC; + signal dadrL_N6544 : STD_LOGIC; + signal dadrL_N6543 : STD_LOGIC; + signal dadrL_N6473 : STD_LOGIC; + signal dadrL_N6472 : STD_LOGIC; + signal dadrL_N6402 : STD_LOGIC; + signal dadrL_N6401 : STD_LOGIC; + signal dadrL_N6331 : STD_LOGIC; + signal dadrL_N6330 : STD_LOGIC; + signal dadrL_N6260 : STD_LOGIC; + signal dadrL_N6259 : STD_LOGIC; + signal dadrL_N6189 : STD_LOGIC; + signal dadrL_N6188 : STD_LOGIC; + signal dadrL_N6118 : STD_LOGIC; + signal dadrL_N6117 : STD_LOGIC; + signal dadrL_N6047 : STD_LOGIC; + signal dadrL_N6046 : STD_LOGIC; + signal dadrL_N5976 : STD_LOGIC; + signal dadrL_N5975 : STD_LOGIC; + signal dadrL_N5905 : STD_LOGIC; + signal dadrL_N5904 : STD_LOGIC; + signal dadrL_N5834 : STD_LOGIC; + signal dadrL_N5833 : STD_LOGIC; + signal dadrL_N5763 : STD_LOGIC; + signal dadrL_N5762 : STD_LOGIC; + signal dadrL_N5692 : STD_LOGIC; + signal dadrL_N5691 : STD_LOGIC; + signal dadrL_N5621 : STD_LOGIC; + signal dadrL_N5620 : STD_LOGIC; + signal dadrL_N5550 : STD_LOGIC; + signal dadrL_N5549 : STD_LOGIC; + signal dadrL_N5479 : STD_LOGIC; + signal dadrL_N5478 : STD_LOGIC; + signal dadrL_N5408 : STD_LOGIC; + signal dadrL_N5407 : STD_LOGIC; + signal dadrL_N5337 : STD_LOGIC; + signal dadrL_N5336 : STD_LOGIC; + signal dadrL_N5266 : STD_LOGIC; + signal dadrL_N5265 : STD_LOGIC; + signal dadrL_N5195 : STD_LOGIC; + signal dadrL_N5194 : STD_LOGIC; + signal dadrL_N5124 : STD_LOGIC; + signal dadrL_N5123 : STD_LOGIC; + signal dadrL_N5053 : STD_LOGIC; + signal dadrL_N5052 : STD_LOGIC; + signal dadrL_N4982 : STD_LOGIC; + signal dadrL_N4981 : STD_LOGIC; + signal dadrL_N4911 : STD_LOGIC; + signal dadrL_N4910 : STD_LOGIC; + signal dadrL_N4840 : STD_LOGIC; + signal dadrL_N4839 : STD_LOGIC; + signal dadrL_N4769 : STD_LOGIC; + signal dadrL_N4768 : STD_LOGIC; + signal dadrL_N4698 : STD_LOGIC; + signal dadrL_N4697 : STD_LOGIC; + signal dadrL_N4627 : STD_LOGIC; + signal dadrL_N4626 : STD_LOGIC; + signal dadrL_N4556 : STD_LOGIC; + signal dadrL_N4555 : STD_LOGIC; + signal dadrL_N4485 : STD_LOGIC; + signal dadrL_N4484 : STD_LOGIC; + signal dadrL_N4414 : STD_LOGIC; + signal dadrL_N4413 : STD_LOGIC; + signal dadrL_N4343 : STD_LOGIC; + signal dadrL_N4342 : STD_LOGIC; + signal dadrL_N4272 : STD_LOGIC; + signal dadrL_N4271 : STD_LOGIC; + signal dadrL_N4201 : STD_LOGIC; + signal dadrL_N4200 : STD_LOGIC; + signal dadrL_N4130 : STD_LOGIC; + signal dadrL_N4129 : STD_LOGIC; + signal dadrL_N4059 : STD_LOGIC; + signal dadrL_N4058 : STD_LOGIC; + signal dadrL_N3988 : STD_LOGIC; + signal dadrL_N3987 : STD_LOGIC; + signal dadrL_N3917 : STD_LOGIC; + signal dadrL_N3916 : STD_LOGIC; + signal dadrL_N3846 : STD_LOGIC; + signal dadrL_N3845 : STD_LOGIC; + signal dadrL_N3775 : STD_LOGIC; + signal dadrL_N3774 : STD_LOGIC; + signal dadrL_N3704 : STD_LOGIC; + signal dadrL_N3703 : STD_LOGIC; + signal dadrL_N3633 : STD_LOGIC; + signal dadrL_N3632 : STD_LOGIC; + signal dadrL_N3562 : STD_LOGIC; + signal dadrL_N3561 : STD_LOGIC; + signal dadrL_N3491 : STD_LOGIC; + signal dadrL_N3490 : STD_LOGIC; + signal dadrL_N3420 : STD_LOGIC; + signal dadrL_N3419 : STD_LOGIC; + signal dadrL_N3349 : STD_LOGIC; + signal dadrL_N3348 : STD_LOGIC; + signal dadrL_N3278 : STD_LOGIC; + signal dadrL_N3277 : STD_LOGIC; + signal dadrL_N3207 : STD_LOGIC; + signal dadrL_N3206 : STD_LOGIC; + signal dadrL_N3136 : STD_LOGIC; + signal dadrL_N3135 : STD_LOGIC; + signal dadrL_N3065 : STD_LOGIC; + signal dadrL_N3064 : STD_LOGIC; + signal dadrL_N2994 : STD_LOGIC; + signal dadrL_N2993 : STD_LOGIC; + signal dadrL_N2923 : STD_LOGIC; + signal dadrL_N2922 : STD_LOGIC; + signal dadrL_N2852 : STD_LOGIC; + signal dadrL_N2851 : STD_LOGIC; + signal dadrL_N2781 : STD_LOGIC; + signal dadrL_N2780 : STD_LOGIC; + signal dadrL_N2710 : STD_LOGIC; + signal dadrL_N2709 : STD_LOGIC; + signal dadrL_N2639 : STD_LOGIC; + signal dadrL_N2638 : STD_LOGIC; + signal dadrL_N2568 : STD_LOGIC; + signal dadrL_N2567 : STD_LOGIC; + signal dadrL_N2497 : STD_LOGIC; + signal dadrL_N2496 : STD_LOGIC; + signal dadrL_N2426 : STD_LOGIC; + signal dadrL_N2425 : STD_LOGIC; + signal dadrL_N2355 : STD_LOGIC; + signal dadrL_N2354 : STD_LOGIC; + signal dadrL_N2284 : STD_LOGIC; + signal dadrL_N2283 : STD_LOGIC; + signal dadrL_N2213 : STD_LOGIC; + signal dadrL_N2212 : STD_LOGIC; + signal dadrL_N2142 : STD_LOGIC; + signal dadrL_N2141 : STD_LOGIC; + signal dadrL_N2071 : STD_LOGIC; + signal dadrL_N2070 : STD_LOGIC; + signal dadrL_N2000 : STD_LOGIC; + signal dadrL_N1999 : STD_LOGIC; + signal dadrL_N1929 : STD_LOGIC; + signal dadrL_N1928 : STD_LOGIC; + signal dadrL_N1858 : STD_LOGIC; + signal dadrL_N1857 : STD_LOGIC; + signal dadrL_N1787 : STD_LOGIC; + signal dadrL_N1786 : STD_LOGIC; + signal dadrL_N1716 : STD_LOGIC; + signal dadrL_N1715 : STD_LOGIC; + signal dadrL_N1645 : STD_LOGIC; + signal dadrL_N1644 : STD_LOGIC; + signal dadrL_N1574 : STD_LOGIC; + signal dadrL_N1573 : STD_LOGIC; + signal dadrL_N1503 : STD_LOGIC; + signal dadrL_N1502 : STD_LOGIC; + signal dadrL_N1432 : STD_LOGIC; + signal dadrL_N1431 : STD_LOGIC; + signal dadrL_N1361 : STD_LOGIC; + signal dadrL_N1360 : STD_LOGIC; + signal dadrL_N1290 : STD_LOGIC; + signal dadrL_N1289 : STD_LOGIC; + signal dadrL_N1219 : STD_LOGIC; + signal dadrL_N1218 : STD_LOGIC; + signal dadrL_N1148 : STD_LOGIC; + signal dadrL_N1147 : STD_LOGIC; + signal dadrL_N1077 : STD_LOGIC; + signal dadrL_N1076 : STD_LOGIC; + signal dadrL_N1006 : STD_LOGIC; + signal dadrL_N1005 : STD_LOGIC; + signal dadrL_N935 : STD_LOGIC; + signal dadrL_N934 : STD_LOGIC; + signal dadrL_N864 : STD_LOGIC; + signal dadrL_N863 : STD_LOGIC; + signal dadrL_N793 : STD_LOGIC; + signal dadrL_N792 : STD_LOGIC; + signal dadrL_N722 : STD_LOGIC; + signal dadrL_N721 : STD_LOGIC; + signal dadrL_N651 : STD_LOGIC; + signal dadrL_N650 : STD_LOGIC; + signal dadrL_N580 : STD_LOGIC; + signal dadrL_N579 : STD_LOGIC; + signal dadrL_N0 : STD_LOGIC; + signal cs_0_OBUF_GTS_TRI : STD_LOGIC; + signal GTS : STD_LOGIC; + signal clk_OBUF_GTS_TRI : STD_LOGIC; + signal rw_OBUF_GTS_TRI : STD_LOGIC; + signal cs_255_OBUF_GTS_TRI : STD_LOGIC; + signal cs_254_OBUF_GTS_TRI : STD_LOGIC; + signal cs_253_OBUF_GTS_TRI : STD_LOGIC; + signal cs_252_OBUF_GTS_TRI : STD_LOGIC; + signal cs_251_OBUF_GTS_TRI : STD_LOGIC; + signal cs_250_OBUF_GTS_TRI : STD_LOGIC; + signal cs_249_OBUF_GTS_TRI : STD_LOGIC; + signal cs_248_OBUF_GTS_TRI : STD_LOGIC; + signal cs_247_OBUF_GTS_TRI : STD_LOGIC; + signal cs_246_OBUF_GTS_TRI : STD_LOGIC; + signal cs_245_OBUF_GTS_TRI : STD_LOGIC; + signal cs_244_OBUF_GTS_TRI : STD_LOGIC; + signal cs_243_OBUF_GTS_TRI : STD_LOGIC; + signal cs_242_OBUF_GTS_TRI : STD_LOGIC; + signal cs_241_OBUF_GTS_TRI : STD_LOGIC; + signal cs_240_OBUF_GTS_TRI : STD_LOGIC; + signal cs_239_OBUF_GTS_TRI : STD_LOGIC; + signal cs_238_OBUF_GTS_TRI : STD_LOGIC; + signal cs_237_OBUF_GTS_TRI : STD_LOGIC; + signal cs_236_OBUF_GTS_TRI : STD_LOGIC; + signal cs_235_OBUF_GTS_TRI : STD_LOGIC; + signal cs_234_OBUF_GTS_TRI : STD_LOGIC; + signal cs_233_OBUF_GTS_TRI : STD_LOGIC; + signal cs_232_OBUF_GTS_TRI : STD_LOGIC; + signal cs_231_OBUF_GTS_TRI : STD_LOGIC; + signal cs_230_OBUF_GTS_TRI : STD_LOGIC; + signal cs_229_OBUF_GTS_TRI : STD_LOGIC; + signal cs_228_OBUF_GTS_TRI : STD_LOGIC; + signal cs_227_OBUF_GTS_TRI : STD_LOGIC; + signal cs_226_OBUF_GTS_TRI : STD_LOGIC; + signal cs_225_OBUF_GTS_TRI : STD_LOGIC; + signal cs_224_OBUF_GTS_TRI : STD_LOGIC; + signal cs_223_OBUF_GTS_TRI : STD_LOGIC; + signal cs_222_OBUF_GTS_TRI : STD_LOGIC; + signal cs_221_OBUF_GTS_TRI : STD_LOGIC; + signal cs_220_OBUF_GTS_TRI : STD_LOGIC; + signal cs_219_OBUF_GTS_TRI : STD_LOGIC; + signal cs_218_OBUF_GTS_TRI : STD_LOGIC; + signal cs_217_OBUF_GTS_TRI : STD_LOGIC; + signal cs_216_OBUF_GTS_TRI : STD_LOGIC; + signal cs_215_OBUF_GTS_TRI : STD_LOGIC; + signal cs_214_OBUF_GTS_TRI : STD_LOGIC; + signal cs_213_OBUF_GTS_TRI : STD_LOGIC; + signal cs_212_OBUF_GTS_TRI : STD_LOGIC; + signal cs_211_OBUF_GTS_TRI : STD_LOGIC; + signal cs_210_OBUF_GTS_TRI : STD_LOGIC; + signal cs_209_OBUF_GTS_TRI : STD_LOGIC; + signal cs_208_OBUF_GTS_TRI : STD_LOGIC; + signal cs_207_OBUF_GTS_TRI : STD_LOGIC; + signal cs_206_OBUF_GTS_TRI : STD_LOGIC; + signal cs_205_OBUF_GTS_TRI : STD_LOGIC; + signal cs_204_OBUF_GTS_TRI : STD_LOGIC; + signal cs_203_OBUF_GTS_TRI : STD_LOGIC; + signal cs_202_OBUF_GTS_TRI : STD_LOGIC; + signal cs_201_OBUF_GTS_TRI : STD_LOGIC; + signal cs_200_OBUF_GTS_TRI : STD_LOGIC; + signal cs_199_OBUF_GTS_TRI : STD_LOGIC; + signal cs_198_OBUF_GTS_TRI : STD_LOGIC; + signal cs_197_OBUF_GTS_TRI : STD_LOGIC; + signal cs_196_OBUF_GTS_TRI : STD_LOGIC; + signal cs_195_OBUF_GTS_TRI : STD_LOGIC; + signal cs_194_OBUF_GTS_TRI : STD_LOGIC; + signal cs_193_OBUF_GTS_TRI : STD_LOGIC; + signal cs_192_OBUF_GTS_TRI : STD_LOGIC; + signal cs_191_OBUF_GTS_TRI : STD_LOGIC; + signal cs_190_OBUF_GTS_TRI : STD_LOGIC; + signal cs_189_OBUF_GTS_TRI : STD_LOGIC; + signal cs_188_OBUF_GTS_TRI : STD_LOGIC; + signal cs_187_OBUF_GTS_TRI : STD_LOGIC; + signal cs_186_OBUF_GTS_TRI : STD_LOGIC; + signal cs_185_OBUF_GTS_TRI : STD_LOGIC; + signal cs_184_OBUF_GTS_TRI : STD_LOGIC; + signal cs_183_OBUF_GTS_TRI : STD_LOGIC; + signal cs_182_OBUF_GTS_TRI : STD_LOGIC; + signal cs_181_OBUF_GTS_TRI : STD_LOGIC; + signal cs_180_OBUF_GTS_TRI : STD_LOGIC; + signal cs_179_OBUF_GTS_TRI : STD_LOGIC; + signal cs_178_OBUF_GTS_TRI : STD_LOGIC; + signal cs_177_OBUF_GTS_TRI : STD_LOGIC; + signal cs_176_OBUF_GTS_TRI : STD_LOGIC; + signal cs_175_OBUF_GTS_TRI : STD_LOGIC; + signal cs_174_OBUF_GTS_TRI : STD_LOGIC; + signal cs_173_OBUF_GTS_TRI : STD_LOGIC; + signal cs_172_OBUF_GTS_TRI : STD_LOGIC; + signal cs_171_OBUF_GTS_TRI : STD_LOGIC; + signal cs_170_OBUF_GTS_TRI : STD_LOGIC; + signal cs_169_OBUF_GTS_TRI : STD_LOGIC; + signal cs_168_OBUF_GTS_TRI : STD_LOGIC; + signal cs_167_OBUF_GTS_TRI : STD_LOGIC; + signal cs_166_OBUF_GTS_TRI : STD_LOGIC; + signal cs_165_OBUF_GTS_TRI : STD_LOGIC; + signal cs_164_OBUF_GTS_TRI : STD_LOGIC; + signal cs_163_OBUF_GTS_TRI : STD_LOGIC; + signal cs_162_OBUF_GTS_TRI : STD_LOGIC; + signal cs_161_OBUF_GTS_TRI : STD_LOGIC; + signal cs_160_OBUF_GTS_TRI : STD_LOGIC; + signal cs_159_OBUF_GTS_TRI : STD_LOGIC; + signal cs_158_OBUF_GTS_TRI : STD_LOGIC; + signal cs_157_OBUF_GTS_TRI : STD_LOGIC; + signal cs_156_OBUF_GTS_TRI : STD_LOGIC; + signal cs_155_OBUF_GTS_TRI : STD_LOGIC; + signal cs_154_OBUF_GTS_TRI : STD_LOGIC; + signal cs_153_OBUF_GTS_TRI : STD_LOGIC; + signal cs_152_OBUF_GTS_TRI : STD_LOGIC; + signal cs_151_OBUF_GTS_TRI : STD_LOGIC; + signal cs_150_OBUF_GTS_TRI : STD_LOGIC; + signal cs_149_OBUF_GTS_TRI : STD_LOGIC; + signal cs_148_OBUF_GTS_TRI : STD_LOGIC; + signal cs_147_OBUF_GTS_TRI : STD_LOGIC; + signal cs_146_OBUF_GTS_TRI : STD_LOGIC; + signal cs_145_OBUF_GTS_TRI : STD_LOGIC; + signal cs_144_OBUF_GTS_TRI : STD_LOGIC; + signal cs_143_OBUF_GTS_TRI : STD_LOGIC; + signal cs_142_OBUF_GTS_TRI : STD_LOGIC; + signal cs_141_OBUF_GTS_TRI : STD_LOGIC; + signal cs_140_OBUF_GTS_TRI : STD_LOGIC; + signal cs_139_OBUF_GTS_TRI : STD_LOGIC; + signal cs_138_OBUF_GTS_TRI : STD_LOGIC; + signal cs_137_OBUF_GTS_TRI : STD_LOGIC; + signal cs_136_OBUF_GTS_TRI : STD_LOGIC; + signal cs_135_OBUF_GTS_TRI : STD_LOGIC; + signal cs_134_OBUF_GTS_TRI : STD_LOGIC; + signal cs_133_OBUF_GTS_TRI : STD_LOGIC; + signal cs_132_OBUF_GTS_TRI : STD_LOGIC; + signal cs_131_OBUF_GTS_TRI : STD_LOGIC; + signal cs_130_OBUF_GTS_TRI : STD_LOGIC; + signal cs_129_OBUF_GTS_TRI : STD_LOGIC; + signal cs_128_OBUF_GTS_TRI : STD_LOGIC; + signal cs_127_OBUF_GTS_TRI : STD_LOGIC; + signal cs_126_OBUF_GTS_TRI : STD_LOGIC; + signal cs_125_OBUF_GTS_TRI : STD_LOGIC; + signal cs_124_OBUF_GTS_TRI : STD_LOGIC; + signal cs_123_OBUF_GTS_TRI : STD_LOGIC; + signal cs_122_OBUF_GTS_TRI : STD_LOGIC; + signal cs_121_OBUF_GTS_TRI : STD_LOGIC; + signal cs_120_OBUF_GTS_TRI : STD_LOGIC; + signal cs_119_OBUF_GTS_TRI : STD_LOGIC; + signal cs_118_OBUF_GTS_TRI : STD_LOGIC; + signal cs_117_OBUF_GTS_TRI : STD_LOGIC; + signal cs_116_OBUF_GTS_TRI : STD_LOGIC; + signal cs_115_OBUF_GTS_TRI : STD_LOGIC; + signal cs_114_OBUF_GTS_TRI : STD_LOGIC; + signal cs_113_OBUF_GTS_TRI : STD_LOGIC; + signal cs_112_OBUF_GTS_TRI : STD_LOGIC; + signal cs_111_OBUF_GTS_TRI : STD_LOGIC; + signal cs_110_OBUF_GTS_TRI : STD_LOGIC; + signal cs_109_OBUF_GTS_TRI : STD_LOGIC; + signal cs_108_OBUF_GTS_TRI : STD_LOGIC; + signal cs_107_OBUF_GTS_TRI : STD_LOGIC; + signal cs_106_OBUF_GTS_TRI : STD_LOGIC; + signal cs_105_OBUF_GTS_TRI : STD_LOGIC; + signal cs_104_OBUF_GTS_TRI : STD_LOGIC; + signal cs_103_OBUF_GTS_TRI : STD_LOGIC; + signal cs_102_OBUF_GTS_TRI : STD_LOGIC; + signal cs_101_OBUF_GTS_TRI : STD_LOGIC; + signal cs_100_OBUF_GTS_TRI : STD_LOGIC; + signal cs_99_OBUF_GTS_TRI : STD_LOGIC; + signal cs_98_OBUF_GTS_TRI : STD_LOGIC; + signal cs_97_OBUF_GTS_TRI : STD_LOGIC; + signal cs_96_OBUF_GTS_TRI : STD_LOGIC; + signal cs_95_OBUF_GTS_TRI : STD_LOGIC; + signal cs_94_OBUF_GTS_TRI : STD_LOGIC; + signal cs_93_OBUF_GTS_TRI : STD_LOGIC; + signal cs_92_OBUF_GTS_TRI : STD_LOGIC; + signal cs_91_OBUF_GTS_TRI : STD_LOGIC; + signal cs_90_OBUF_GTS_TRI : STD_LOGIC; + signal cs_89_OBUF_GTS_TRI : STD_LOGIC; + signal cs_88_OBUF_GTS_TRI : STD_LOGIC; + signal cs_87_OBUF_GTS_TRI : STD_LOGIC; + signal cs_86_OBUF_GTS_TRI : STD_LOGIC; + signal cs_85_OBUF_GTS_TRI : STD_LOGIC; + signal cs_84_OBUF_GTS_TRI : STD_LOGIC; + signal cs_83_OBUF_GTS_TRI : STD_LOGIC; + signal cs_82_OBUF_GTS_TRI : STD_LOGIC; + signal cs_81_OBUF_GTS_TRI : STD_LOGIC; + signal cs_80_OBUF_GTS_TRI : STD_LOGIC; + signal cs_79_OBUF_GTS_TRI : STD_LOGIC; + signal cs_78_OBUF_GTS_TRI : STD_LOGIC; + signal cs_77_OBUF_GTS_TRI : STD_LOGIC; + signal cs_76_OBUF_GTS_TRI : STD_LOGIC; + signal cs_75_OBUF_GTS_TRI : STD_LOGIC; + signal cs_74_OBUF_GTS_TRI : STD_LOGIC; + signal cs_73_OBUF_GTS_TRI : STD_LOGIC; + signal cs_72_OBUF_GTS_TRI : STD_LOGIC; + signal cs_71_OBUF_GTS_TRI : STD_LOGIC; + signal cs_70_OBUF_GTS_TRI : STD_LOGIC; + signal cs_69_OBUF_GTS_TRI : STD_LOGIC; + signal cs_68_OBUF_GTS_TRI : STD_LOGIC; + signal cs_67_OBUF_GTS_TRI : STD_LOGIC; + signal cs_66_OBUF_GTS_TRI : STD_LOGIC; + signal cs_65_OBUF_GTS_TRI : STD_LOGIC; + signal cs_64_OBUF_GTS_TRI : STD_LOGIC; + signal cs_63_OBUF_GTS_TRI : STD_LOGIC; + signal cs_62_OBUF_GTS_TRI : STD_LOGIC; + signal cs_61_OBUF_GTS_TRI : STD_LOGIC; + signal cs_60_OBUF_GTS_TRI : STD_LOGIC; + signal cs_59_OBUF_GTS_TRI : STD_LOGIC; + signal cs_58_OBUF_GTS_TRI : STD_LOGIC; + signal cs_57_OBUF_GTS_TRI : STD_LOGIC; + signal cs_56_OBUF_GTS_TRI : STD_LOGIC; + signal cs_55_OBUF_GTS_TRI : STD_LOGIC; + signal cs_54_OBUF_GTS_TRI : STD_LOGIC; + signal cs_53_OBUF_GTS_TRI : STD_LOGIC; + signal cs_52_OBUF_GTS_TRI : STD_LOGIC; + signal cs_51_OBUF_GTS_TRI : STD_LOGIC; + signal cs_50_OBUF_GTS_TRI : STD_LOGIC; + signal cs_49_OBUF_GTS_TRI : STD_LOGIC; + signal cs_48_OBUF_GTS_TRI : STD_LOGIC; + signal cs_47_OBUF_GTS_TRI : STD_LOGIC; + signal cs_46_OBUF_GTS_TRI : STD_LOGIC; + signal cs_45_OBUF_GTS_TRI : STD_LOGIC; + signal cs_44_OBUF_GTS_TRI : STD_LOGIC; + signal cs_43_OBUF_GTS_TRI : STD_LOGIC; + signal cs_42_OBUF_GTS_TRI : STD_LOGIC; + signal cs_41_OBUF_GTS_TRI : STD_LOGIC; + signal cs_40_OBUF_GTS_TRI : STD_LOGIC; + signal cs_39_OBUF_GTS_TRI : STD_LOGIC; + signal cs_38_OBUF_GTS_TRI : STD_LOGIC; + signal cs_37_OBUF_GTS_TRI : STD_LOGIC; + signal cs_36_OBUF_GTS_TRI : STD_LOGIC; + signal cs_35_OBUF_GTS_TRI : STD_LOGIC; + signal cs_34_OBUF_GTS_TRI : STD_LOGIC; + signal cs_33_OBUF_GTS_TRI : STD_LOGIC; + signal cs_32_OBUF_GTS_TRI : STD_LOGIC; + signal cs_31_OBUF_GTS_TRI : STD_LOGIC; + signal cs_30_OBUF_GTS_TRI : STD_LOGIC; + signal cs_29_OBUF_GTS_TRI : STD_LOGIC; + signal cs_28_OBUF_GTS_TRI : STD_LOGIC; + signal cs_27_OBUF_GTS_TRI : STD_LOGIC; + signal cs_26_OBUF_GTS_TRI : STD_LOGIC; + signal cs_25_OBUF_GTS_TRI : STD_LOGIC; + signal cs_24_OBUF_GTS_TRI : STD_LOGIC; + signal cs_23_OBUF_GTS_TRI : STD_LOGIC; + signal cs_22_OBUF_GTS_TRI : STD_LOGIC; + signal cs_21_OBUF_GTS_TRI : STD_LOGIC; + signal cs_20_OBUF_GTS_TRI : STD_LOGIC; + signal cs_19_OBUF_GTS_TRI : STD_LOGIC; + signal cs_18_OBUF_GTS_TRI : STD_LOGIC; + signal cs_17_OBUF_GTS_TRI : STD_LOGIC; + signal cs_16_OBUF_GTS_TRI : STD_LOGIC; + signal cs_15_OBUF_GTS_TRI : STD_LOGIC; + signal cs_14_OBUF_GTS_TRI : STD_LOGIC; + signal cs_13_OBUF_GTS_TRI : STD_LOGIC; + signal cs_12_OBUF_GTS_TRI : STD_LOGIC; + signal cs_11_OBUF_GTS_TRI : STD_LOGIC; + signal cs_10_OBUF_GTS_TRI : STD_LOGIC; + signal cs_9_OBUF_GTS_TRI : STD_LOGIC; + signal cs_8_OBUF_GTS_TRI : STD_LOGIC; + signal cs_7_OBUF_GTS_TRI : STD_LOGIC; + signal cs_6_OBUF_GTS_TRI : STD_LOGIC; + signal cs_5_OBUF_GTS_TRI : STD_LOGIC; + signal cs_4_OBUF_GTS_TRI : STD_LOGIC; + signal cs_3_OBUF_GTS_TRI : STD_LOGIC; + signal cs_2_OBUF_GTS_TRI : STD_LOGIC; + signal cs_1_OBUF_GTS_TRI : STD_LOGIC; + signal NLW_dadrL_VCC_O_UNCONNECTED : STD_LOGIC; + signal NlwInverterSignal_cs_0_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_clk_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_rw_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_255_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_254_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_253_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_252_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_251_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_250_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_249_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_248_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_247_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_246_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_245_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_244_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_243_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_242_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_241_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_240_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_239_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_238_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_237_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_236_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_235_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_234_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_233_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_232_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_231_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_230_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_229_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_228_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_227_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_226_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_225_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_224_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_223_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_222_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_221_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_220_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_219_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_218_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_217_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_216_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_215_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_214_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_213_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_212_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_211_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_210_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_209_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_208_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_207_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_206_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_205_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_204_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_203_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_202_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_201_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_200_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_199_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_198_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_197_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_196_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_195_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_194_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_193_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_192_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_191_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_190_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_189_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_188_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_187_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_186_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_185_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_184_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_183_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_182_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_181_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_180_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_179_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_178_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_177_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_176_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_175_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_174_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_173_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_172_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_171_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_170_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_169_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_168_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_167_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_166_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_165_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_164_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_163_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_162_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_161_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_160_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_159_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_158_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_157_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_156_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_155_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_154_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_153_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_152_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_151_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_150_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_149_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_148_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_147_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_146_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_145_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_144_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_143_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_142_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_141_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_140_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_139_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_138_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_137_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_136_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_135_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_134_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_133_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_132_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_131_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_130_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_129_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_128_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_127_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_126_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_125_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_124_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_123_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_122_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_121_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_120_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_119_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_118_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_117_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_116_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_115_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_114_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_113_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_112_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_111_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_110_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_109_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_108_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_107_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_106_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_105_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_104_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_103_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_102_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_101_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_100_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_99_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_98_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_97_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_96_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_95_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_94_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_93_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_92_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_91_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_90_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_89_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_88_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_87_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_86_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_85_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_84_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_83_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_82_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_81_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_80_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_79_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_78_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_77_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_76_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_75_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_74_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_73_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_72_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_71_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_70_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_69_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_68_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_67_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_66_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_65_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_64_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_63_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_62_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_61_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_60_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_59_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_58_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_57_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_56_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_55_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_54_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_53_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_52_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_51_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_50_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_49_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_48_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_47_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_46_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_45_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_44_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_43_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_42_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_41_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_40_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_39_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_38_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_37_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_36_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_35_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_34_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_33_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_32_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_31_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_30_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_29_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_28_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_27_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_26_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_25_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_24_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_23_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_22_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_21_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_20_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_19_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_18_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_17_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_16_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_15_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_14_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_13_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_12_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_11_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_10_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_9_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_8_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_7_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_6_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_5_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_4_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_3_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_2_OBUF_GTS_TRI_CTL : STD_LOGIC; + signal NlwInverterSignal_cs_1_OBUF_GTS_TRI_CTL : STD_LOGIC; +begin + cs_0_OBUF_0 : X_BUF + port map ( + I => cs_0_OBUF, + O => cs_0_OBUF_GTS_TRI + ); + Q_n00031 : X_LUT3 + generic map( + INIT => X"04" + ) + port map ( + ADR0 => IOR_IBUF, + ADR1 => IOW_IBUF, + ADR2 => AEN_IBUF, + O => rw_OBUF + ); + Q_n00021 : X_LUT3 + generic map( + INIT => X"F8" + ) + port map ( + ADR0 => IOW_IBUF, + ADR1 => IOR_IBUF, + ADR2 => AEN_IBUF, + O => clk_OBUF + ); + reg_select24 : X_LUT3 + generic map( + INIT => X"04" + ) + port map ( + ADR0 => adr_bus_15_IBUF, + ADR1 => adr_bus_8_IBUF, + ADR2 => AEN_IBUF, + O => CHOICE45 + ); + reg_select32 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_9_IBUF, + ADR1 => adr_bus_10_IBUF, + ADR2 => adr_bus_11_IBUF, + ADR3 => N5267, + O => reg_select + ); + reg_select32_SW0 : X_LUT4 + generic map( + INIT => X"FFEF" + ) + port map ( + ADR0 => adr_bus_12_IBUF, + ADR1 => adr_bus_13_IBUF, + ADR2 => CHOICE45, + ADR3 => adr_bus_14_IBUF, + O => N5267 + ); + AEN_IBUF_1 : X_BUF + port map ( + I => AEN, + O => AEN_IBUF + ); + IOR_IBUF_2 : X_BUF + port map ( + I => IOR, + O => IOR_IBUF + ); + IOW_IBUF_3 : X_BUF + port map ( + I => IOW, + O => IOW_IBUF + ); + adr_bus_15_IBUF_4 : X_BUF + port map ( + I => adr_bus(15), + O => adr_bus_15_IBUF + ); + adr_bus_14_IBUF_5 : X_BUF + port map ( + I => adr_bus(14), + O => adr_bus_14_IBUF + ); + adr_bus_13_IBUF_6 : X_BUF + port map ( + I => adr_bus(13), + O => adr_bus_13_IBUF + ); + adr_bus_12_IBUF_7 : X_BUF + port map ( + I => adr_bus(12), + O => adr_bus_12_IBUF + ); + adr_bus_11_IBUF_8 : X_BUF + port map ( + I => adr_bus(11), + O => adr_bus_11_IBUF + ); + adr_bus_10_IBUF_9 : X_BUF + port map ( + I => adr_bus(10), + O => adr_bus_10_IBUF + ); + adr_bus_9_IBUF_10 : X_BUF + port map ( + I => adr_bus(9), + O => adr_bus_9_IBUF + ); + adr_bus_8_IBUF_11 : X_BUF + port map ( + I => adr_bus(8), + O => adr_bus_8_IBUF + ); + adr_bus_7_IBUF_12 : X_BUF + port map ( + I => adr_bus(7), + O => adr_bus_7_IBUF + ); + adr_bus_6_IBUF_13 : X_BUF + port map ( + I => adr_bus(6), + O => adr_bus_6_IBUF + ); + adr_bus_5_IBUF_14 : X_BUF + port map ( + I => adr_bus(5), + O => adr_bus_5_IBUF + ); + adr_bus_4_IBUF_15 : X_BUF + port map ( + I => adr_bus(4), + O => adr_bus_4_IBUF + ); + adr_bus_3_IBUF_16 : X_BUF + port map ( + I => adr_bus(3), + O => adr_bus_3_IBUF + ); + adr_bus_2_IBUF_17 : X_BUF + port map ( + I => adr_bus(2), + O => adr_bus_2_IBUF + ); + adr_bus_1_IBUF_18 : X_BUF + port map ( + I => adr_bus(1), + O => adr_bus_1_IBUF + ); + adr_bus_0_IBUF_19 : X_BUF + port map ( + I => adr_bus(0), + O => adr_bus_0_IBUF + ); + clk_OBUF_20 : X_BUF + port map ( + I => clk_OBUF, + O => clk_OBUF_GTS_TRI + ); + rw_OBUF_21 : X_BUF + port map ( + I => rw_OBUF, + O => rw_OBUF_GTS_TRI + ); + cs_255_OBUF_22 : X_BUF + port map ( + I => cs_255_OBUF, + O => cs_255_OBUF_GTS_TRI + ); + cs_254_OBUF_23 : X_BUF + port map ( + I => cs_254_OBUF, + O => cs_254_OBUF_GTS_TRI + ); + cs_253_OBUF_24 : X_BUF + port map ( + I => cs_253_OBUF, + O => cs_253_OBUF_GTS_TRI + ); + cs_252_OBUF_25 : X_BUF + port map ( + I => cs_252_OBUF, + O => cs_252_OBUF_GTS_TRI + ); + cs_251_OBUF_26 : X_BUF + port map ( + I => cs_251_OBUF, + O => cs_251_OBUF_GTS_TRI + ); + cs_250_OBUF_27 : X_BUF + port map ( + I => cs_250_OBUF, + O => cs_250_OBUF_GTS_TRI + ); + cs_249_OBUF_28 : X_BUF + port map ( + I => cs_249_OBUF, + O => cs_249_OBUF_GTS_TRI + ); + cs_248_OBUF_29 : X_BUF + port map ( + I => cs_248_OBUF, + O => cs_248_OBUF_GTS_TRI + ); + cs_247_OBUF_30 : X_BUF + port map ( + I => cs_247_OBUF, + O => cs_247_OBUF_GTS_TRI + ); + cs_246_OBUF_31 : X_BUF + port map ( + I => cs_246_OBUF, + O => cs_246_OBUF_GTS_TRI + ); + cs_245_OBUF_32 : X_BUF + port map ( + I => cs_245_OBUF, + O => cs_245_OBUF_GTS_TRI + ); + cs_244_OBUF_33 : X_BUF + port map ( + I => cs_244_OBUF, + O => cs_244_OBUF_GTS_TRI + ); + cs_243_OBUF_34 : X_BUF + port map ( + I => cs_243_OBUF, + O => cs_243_OBUF_GTS_TRI + ); + cs_242_OBUF_35 : X_BUF + port map ( + I => cs_242_OBUF, + O => cs_242_OBUF_GTS_TRI + ); + cs_241_OBUF_36 : X_BUF + port map ( + I => cs_241_OBUF, + O => cs_241_OBUF_GTS_TRI + ); + cs_240_OBUF_37 : X_BUF + port map ( + I => cs_240_OBUF, + O => cs_240_OBUF_GTS_TRI + ); + cs_239_OBUF_38 : X_BUF + port map ( + I => cs_239_OBUF, + O => cs_239_OBUF_GTS_TRI + ); + cs_238_OBUF_39 : X_BUF + port map ( + I => cs_238_OBUF, + O => cs_238_OBUF_GTS_TRI + ); + cs_237_OBUF_40 : X_BUF + port map ( + I => cs_237_OBUF, + O => cs_237_OBUF_GTS_TRI + ); + cs_236_OBUF_41 : X_BUF + port map ( + I => cs_236_OBUF, + O => cs_236_OBUF_GTS_TRI + ); + cs_235_OBUF_42 : X_BUF + port map ( + I => cs_235_OBUF, + O => cs_235_OBUF_GTS_TRI + ); + cs_234_OBUF_43 : X_BUF + port map ( + I => cs_234_OBUF, + O => cs_234_OBUF_GTS_TRI + ); + cs_233_OBUF_44 : X_BUF + port map ( + I => cs_233_OBUF, + O => cs_233_OBUF_GTS_TRI + ); + cs_232_OBUF_45 : X_BUF + port map ( + I => cs_232_OBUF, + O => cs_232_OBUF_GTS_TRI + ); + cs_231_OBUF_46 : X_BUF + port map ( + I => cs_231_OBUF, + O => cs_231_OBUF_GTS_TRI + ); + cs_230_OBUF_47 : X_BUF + port map ( + I => cs_230_OBUF, + O => cs_230_OBUF_GTS_TRI + ); + cs_229_OBUF_48 : X_BUF + port map ( + I => cs_229_OBUF, + O => cs_229_OBUF_GTS_TRI + ); + cs_228_OBUF_49 : X_BUF + port map ( + I => cs_228_OBUF, + O => cs_228_OBUF_GTS_TRI + ); + cs_227_OBUF_50 : X_BUF + port map ( + I => cs_227_OBUF, + O => cs_227_OBUF_GTS_TRI + ); + cs_226_OBUF_51 : X_BUF + port map ( + I => cs_226_OBUF, + O => cs_226_OBUF_GTS_TRI + ); + cs_225_OBUF_52 : X_BUF + port map ( + I => cs_225_OBUF, + O => cs_225_OBUF_GTS_TRI + ); + cs_224_OBUF_53 : X_BUF + port map ( + I => cs_224_OBUF, + O => cs_224_OBUF_GTS_TRI + ); + cs_223_OBUF_54 : X_BUF + port map ( + I => cs_223_OBUF, + O => cs_223_OBUF_GTS_TRI + ); + cs_222_OBUF_55 : X_BUF + port map ( + I => cs_222_OBUF, + O => cs_222_OBUF_GTS_TRI + ); + cs_221_OBUF_56 : X_BUF + port map ( + I => cs_221_OBUF, + O => cs_221_OBUF_GTS_TRI + ); + cs_220_OBUF_57 : X_BUF + port map ( + I => cs_220_OBUF, + O => cs_220_OBUF_GTS_TRI + ); + cs_219_OBUF_58 : X_BUF + port map ( + I => cs_219_OBUF, + O => cs_219_OBUF_GTS_TRI + ); + cs_218_OBUF_59 : X_BUF + port map ( + I => cs_218_OBUF, + O => cs_218_OBUF_GTS_TRI + ); + cs_217_OBUF_60 : X_BUF + port map ( + I => cs_217_OBUF, + O => cs_217_OBUF_GTS_TRI + ); + cs_216_OBUF_61 : X_BUF + port map ( + I => cs_216_OBUF, + O => cs_216_OBUF_GTS_TRI + ); + cs_215_OBUF_62 : X_BUF + port map ( + I => cs_215_OBUF, + O => cs_215_OBUF_GTS_TRI + ); + cs_214_OBUF_63 : X_BUF + port map ( + I => cs_214_OBUF, + O => cs_214_OBUF_GTS_TRI + ); + cs_213_OBUF_64 : X_BUF + port map ( + I => cs_213_OBUF, + O => cs_213_OBUF_GTS_TRI + ); + cs_212_OBUF_65 : X_BUF + port map ( + I => cs_212_OBUF, + O => cs_212_OBUF_GTS_TRI + ); + cs_211_OBUF_66 : X_BUF + port map ( + I => cs_211_OBUF, + O => cs_211_OBUF_GTS_TRI + ); + cs_210_OBUF_67 : X_BUF + port map ( + I => cs_210_OBUF, + O => cs_210_OBUF_GTS_TRI + ); + cs_209_OBUF_68 : X_BUF + port map ( + I => cs_209_OBUF, + O => cs_209_OBUF_GTS_TRI + ); + cs_208_OBUF_69 : X_BUF + port map ( + I => cs_208_OBUF, + O => cs_208_OBUF_GTS_TRI + ); + cs_207_OBUF_70 : X_BUF + port map ( + I => cs_207_OBUF, + O => cs_207_OBUF_GTS_TRI + ); + cs_206_OBUF_71 : X_BUF + port map ( + I => cs_206_OBUF, + O => cs_206_OBUF_GTS_TRI + ); + cs_205_OBUF_72 : X_BUF + port map ( + I => cs_205_OBUF, + O => cs_205_OBUF_GTS_TRI + ); + cs_204_OBUF_73 : X_BUF + port map ( + I => cs_204_OBUF, + O => cs_204_OBUF_GTS_TRI + ); + cs_203_OBUF_74 : X_BUF + port map ( + I => cs_203_OBUF, + O => cs_203_OBUF_GTS_TRI + ); + cs_202_OBUF_75 : X_BUF + port map ( + I => cs_202_OBUF, + O => cs_202_OBUF_GTS_TRI + ); + cs_201_OBUF_76 : X_BUF + port map ( + I => cs_201_OBUF, + O => cs_201_OBUF_GTS_TRI + ); + cs_200_OBUF_77 : X_BUF + port map ( + I => cs_200_OBUF, + O => cs_200_OBUF_GTS_TRI + ); + cs_199_OBUF_78 : X_BUF + port map ( + I => cs_199_OBUF, + O => cs_199_OBUF_GTS_TRI + ); + cs_198_OBUF_79 : X_BUF + port map ( + I => cs_198_OBUF, + O => cs_198_OBUF_GTS_TRI + ); + cs_197_OBUF_80 : X_BUF + port map ( + I => cs_197_OBUF, + O => cs_197_OBUF_GTS_TRI + ); + cs_196_OBUF_81 : X_BUF + port map ( + I => cs_196_OBUF, + O => cs_196_OBUF_GTS_TRI + ); + cs_195_OBUF_82 : X_BUF + port map ( + I => cs_195_OBUF, + O => cs_195_OBUF_GTS_TRI + ); + cs_194_OBUF_83 : X_BUF + port map ( + I => cs_194_OBUF, + O => cs_194_OBUF_GTS_TRI + ); + cs_193_OBUF_84 : X_BUF + port map ( + I => cs_193_OBUF, + O => cs_193_OBUF_GTS_TRI + ); + cs_192_OBUF_85 : X_BUF + port map ( + I => cs_192_OBUF, + O => cs_192_OBUF_GTS_TRI + ); + cs_191_OBUF_86 : X_BUF + port map ( + I => cs_191_OBUF, + O => cs_191_OBUF_GTS_TRI + ); + cs_190_OBUF_87 : X_BUF + port map ( + I => cs_190_OBUF, + O => cs_190_OBUF_GTS_TRI + ); + cs_189_OBUF_88 : X_BUF + port map ( + I => cs_189_OBUF, + O => cs_189_OBUF_GTS_TRI + ); + cs_188_OBUF_89 : X_BUF + port map ( + I => cs_188_OBUF, + O => cs_188_OBUF_GTS_TRI + ); + cs_187_OBUF_90 : X_BUF + port map ( + I => cs_187_OBUF, + O => cs_187_OBUF_GTS_TRI + ); + cs_186_OBUF_91 : X_BUF + port map ( + I => cs_186_OBUF, + O => cs_186_OBUF_GTS_TRI + ); + cs_185_OBUF_92 : X_BUF + port map ( + I => cs_185_OBUF, + O => cs_185_OBUF_GTS_TRI + ); + cs_184_OBUF_93 : X_BUF + port map ( + I => cs_184_OBUF, + O => cs_184_OBUF_GTS_TRI + ); + cs_183_OBUF_94 : X_BUF + port map ( + I => cs_183_OBUF, + O => cs_183_OBUF_GTS_TRI + ); + cs_182_OBUF_95 : X_BUF + port map ( + I => cs_182_OBUF, + O => cs_182_OBUF_GTS_TRI + ); + cs_181_OBUF_96 : X_BUF + port map ( + I => cs_181_OBUF, + O => cs_181_OBUF_GTS_TRI + ); + cs_180_OBUF_97 : X_BUF + port map ( + I => cs_180_OBUF, + O => cs_180_OBUF_GTS_TRI + ); + cs_179_OBUF_98 : X_BUF + port map ( + I => cs_179_OBUF, + O => cs_179_OBUF_GTS_TRI + ); + cs_178_OBUF_99 : X_BUF + port map ( + I => cs_178_OBUF, + O => cs_178_OBUF_GTS_TRI + ); + cs_177_OBUF_100 : X_BUF + port map ( + I => cs_177_OBUF, + O => cs_177_OBUF_GTS_TRI + ); + cs_176_OBUF_101 : X_BUF + port map ( + I => cs_176_OBUF, + O => cs_176_OBUF_GTS_TRI + ); + cs_175_OBUF_102 : X_BUF + port map ( + I => cs_175_OBUF, + O => cs_175_OBUF_GTS_TRI + ); + cs_174_OBUF_103 : X_BUF + port map ( + I => cs_174_OBUF, + O => cs_174_OBUF_GTS_TRI + ); + cs_173_OBUF_104 : X_BUF + port map ( + I => cs_173_OBUF, + O => cs_173_OBUF_GTS_TRI + ); + cs_172_OBUF_105 : X_BUF + port map ( + I => cs_172_OBUF, + O => cs_172_OBUF_GTS_TRI + ); + cs_171_OBUF_106 : X_BUF + port map ( + I => cs_171_OBUF, + O => cs_171_OBUF_GTS_TRI + ); + cs_170_OBUF_107 : X_BUF + port map ( + I => cs_170_OBUF, + O => cs_170_OBUF_GTS_TRI + ); + cs_169_OBUF_108 : X_BUF + port map ( + I => cs_169_OBUF, + O => cs_169_OBUF_GTS_TRI + ); + cs_168_OBUF_109 : X_BUF + port map ( + I => cs_168_OBUF, + O => cs_168_OBUF_GTS_TRI + ); + cs_167_OBUF_110 : X_BUF + port map ( + I => cs_167_OBUF, + O => cs_167_OBUF_GTS_TRI + ); + cs_166_OBUF_111 : X_BUF + port map ( + I => cs_166_OBUF, + O => cs_166_OBUF_GTS_TRI + ); + cs_165_OBUF_112 : X_BUF + port map ( + I => cs_165_OBUF, + O => cs_165_OBUF_GTS_TRI + ); + cs_164_OBUF_113 : X_BUF + port map ( + I => cs_164_OBUF, + O => cs_164_OBUF_GTS_TRI + ); + cs_163_OBUF_114 : X_BUF + port map ( + I => cs_163_OBUF, + O => cs_163_OBUF_GTS_TRI + ); + cs_162_OBUF_115 : X_BUF + port map ( + I => cs_162_OBUF, + O => cs_162_OBUF_GTS_TRI + ); + cs_161_OBUF_116 : X_BUF + port map ( + I => cs_161_OBUF, + O => cs_161_OBUF_GTS_TRI + ); + cs_160_OBUF_117 : X_BUF + port map ( + I => cs_160_OBUF, + O => cs_160_OBUF_GTS_TRI + ); + cs_159_OBUF_118 : X_BUF + port map ( + I => cs_159_OBUF, + O => cs_159_OBUF_GTS_TRI + ); + cs_158_OBUF_119 : X_BUF + port map ( + I => cs_158_OBUF, + O => cs_158_OBUF_GTS_TRI + ); + cs_157_OBUF_120 : X_BUF + port map ( + I => cs_157_OBUF, + O => cs_157_OBUF_GTS_TRI + ); + cs_156_OBUF_121 : X_BUF + port map ( + I => cs_156_OBUF, + O => cs_156_OBUF_GTS_TRI + ); + cs_155_OBUF_122 : X_BUF + port map ( + I => cs_155_OBUF, + O => cs_155_OBUF_GTS_TRI + ); + cs_154_OBUF_123 : X_BUF + port map ( + I => cs_154_OBUF, + O => cs_154_OBUF_GTS_TRI + ); + cs_153_OBUF_124 : X_BUF + port map ( + I => cs_153_OBUF, + O => cs_153_OBUF_GTS_TRI + ); + cs_152_OBUF_125 : X_BUF + port map ( + I => cs_152_OBUF, + O => cs_152_OBUF_GTS_TRI + ); + cs_151_OBUF_126 : X_BUF + port map ( + I => cs_151_OBUF, + O => cs_151_OBUF_GTS_TRI + ); + cs_150_OBUF_127 : X_BUF + port map ( + I => cs_150_OBUF, + O => cs_150_OBUF_GTS_TRI + ); + cs_149_OBUF_128 : X_BUF + port map ( + I => cs_149_OBUF, + O => cs_149_OBUF_GTS_TRI + ); + cs_148_OBUF_129 : X_BUF + port map ( + I => cs_148_OBUF, + O => cs_148_OBUF_GTS_TRI + ); + cs_147_OBUF_130 : X_BUF + port map ( + I => cs_147_OBUF, + O => cs_147_OBUF_GTS_TRI + ); + cs_146_OBUF_131 : X_BUF + port map ( + I => cs_146_OBUF, + O => cs_146_OBUF_GTS_TRI + ); + cs_145_OBUF_132 : X_BUF + port map ( + I => cs_145_OBUF, + O => cs_145_OBUF_GTS_TRI + ); + cs_144_OBUF_133 : X_BUF + port map ( + I => cs_144_OBUF, + O => cs_144_OBUF_GTS_TRI + ); + cs_143_OBUF_134 : X_BUF + port map ( + I => cs_143_OBUF, + O => cs_143_OBUF_GTS_TRI + ); + cs_142_OBUF_135 : X_BUF + port map ( + I => cs_142_OBUF, + O => cs_142_OBUF_GTS_TRI + ); + cs_141_OBUF_136 : X_BUF + port map ( + I => cs_141_OBUF, + O => cs_141_OBUF_GTS_TRI + ); + cs_140_OBUF_137 : X_BUF + port map ( + I => cs_140_OBUF, + O => cs_140_OBUF_GTS_TRI + ); + cs_139_OBUF_138 : X_BUF + port map ( + I => cs_139_OBUF, + O => cs_139_OBUF_GTS_TRI + ); + cs_138_OBUF_139 : X_BUF + port map ( + I => cs_138_OBUF, + O => cs_138_OBUF_GTS_TRI + ); + cs_137_OBUF_140 : X_BUF + port map ( + I => cs_137_OBUF, + O => cs_137_OBUF_GTS_TRI + ); + cs_136_OBUF_141 : X_BUF + port map ( + I => cs_136_OBUF, + O => cs_136_OBUF_GTS_TRI + ); + cs_135_OBUF_142 : X_BUF + port map ( + I => cs_135_OBUF, + O => cs_135_OBUF_GTS_TRI + ); + cs_134_OBUF_143 : X_BUF + port map ( + I => cs_134_OBUF, + O => cs_134_OBUF_GTS_TRI + ); + cs_133_OBUF_144 : X_BUF + port map ( + I => cs_133_OBUF, + O => cs_133_OBUF_GTS_TRI + ); + cs_132_OBUF_145 : X_BUF + port map ( + I => cs_132_OBUF, + O => cs_132_OBUF_GTS_TRI + ); + cs_131_OBUF_146 : X_BUF + port map ( + I => cs_131_OBUF, + O => cs_131_OBUF_GTS_TRI + ); + cs_130_OBUF_147 : X_BUF + port map ( + I => cs_130_OBUF, + O => cs_130_OBUF_GTS_TRI + ); + cs_129_OBUF_148 : X_BUF + port map ( + I => cs_129_OBUF, + O => cs_129_OBUF_GTS_TRI + ); + cs_128_OBUF_149 : X_BUF + port map ( + I => cs_128_OBUF, + O => cs_128_OBUF_GTS_TRI + ); + cs_127_OBUF_150 : X_BUF + port map ( + I => cs_127_OBUF, + O => cs_127_OBUF_GTS_TRI + ); + cs_126_OBUF_151 : X_BUF + port map ( + I => cs_126_OBUF, + O => cs_126_OBUF_GTS_TRI + ); + cs_125_OBUF_152 : X_BUF + port map ( + I => cs_125_OBUF, + O => cs_125_OBUF_GTS_TRI + ); + cs_124_OBUF_153 : X_BUF + port map ( + I => cs_124_OBUF, + O => cs_124_OBUF_GTS_TRI + ); + cs_123_OBUF_154 : X_BUF + port map ( + I => cs_123_OBUF, + O => cs_123_OBUF_GTS_TRI + ); + cs_122_OBUF_155 : X_BUF + port map ( + I => cs_122_OBUF, + O => cs_122_OBUF_GTS_TRI + ); + cs_121_OBUF_156 : X_BUF + port map ( + I => cs_121_OBUF, + O => cs_121_OBUF_GTS_TRI + ); + cs_120_OBUF_157 : X_BUF + port map ( + I => cs_120_OBUF, + O => cs_120_OBUF_GTS_TRI + ); + cs_119_OBUF_158 : X_BUF + port map ( + I => cs_119_OBUF, + O => cs_119_OBUF_GTS_TRI + ); + cs_118_OBUF_159 : X_BUF + port map ( + I => cs_118_OBUF, + O => cs_118_OBUF_GTS_TRI + ); + cs_117_OBUF_160 : X_BUF + port map ( + I => cs_117_OBUF, + O => cs_117_OBUF_GTS_TRI + ); + cs_116_OBUF_161 : X_BUF + port map ( + I => cs_116_OBUF, + O => cs_116_OBUF_GTS_TRI + ); + cs_115_OBUF_162 : X_BUF + port map ( + I => cs_115_OBUF, + O => cs_115_OBUF_GTS_TRI + ); + cs_114_OBUF_163 : X_BUF + port map ( + I => cs_114_OBUF, + O => cs_114_OBUF_GTS_TRI + ); + cs_113_OBUF_164 : X_BUF + port map ( + I => cs_113_OBUF, + O => cs_113_OBUF_GTS_TRI + ); + cs_112_OBUF_165 : X_BUF + port map ( + I => cs_112_OBUF, + O => cs_112_OBUF_GTS_TRI + ); + cs_111_OBUF_166 : X_BUF + port map ( + I => cs_111_OBUF, + O => cs_111_OBUF_GTS_TRI + ); + cs_110_OBUF_167 : X_BUF + port map ( + I => cs_110_OBUF, + O => cs_110_OBUF_GTS_TRI + ); + cs_109_OBUF_168 : X_BUF + port map ( + I => cs_109_OBUF, + O => cs_109_OBUF_GTS_TRI + ); + cs_108_OBUF_169 : X_BUF + port map ( + I => cs_108_OBUF, + O => cs_108_OBUF_GTS_TRI + ); + cs_107_OBUF_170 : X_BUF + port map ( + I => cs_107_OBUF, + O => cs_107_OBUF_GTS_TRI + ); + cs_106_OBUF_171 : X_BUF + port map ( + I => cs_106_OBUF, + O => cs_106_OBUF_GTS_TRI + ); + cs_105_OBUF_172 : X_BUF + port map ( + I => cs_105_OBUF, + O => cs_105_OBUF_GTS_TRI + ); + cs_104_OBUF_173 : X_BUF + port map ( + I => cs_104_OBUF, + O => cs_104_OBUF_GTS_TRI + ); + cs_103_OBUF_174 : X_BUF + port map ( + I => cs_103_OBUF, + O => cs_103_OBUF_GTS_TRI + ); + cs_102_OBUF_175 : X_BUF + port map ( + I => cs_102_OBUF, + O => cs_102_OBUF_GTS_TRI + ); + cs_101_OBUF_176 : X_BUF + port map ( + I => cs_101_OBUF, + O => cs_101_OBUF_GTS_TRI + ); + cs_100_OBUF_177 : X_BUF + port map ( + I => cs_100_OBUF, + O => cs_100_OBUF_GTS_TRI + ); + cs_99_OBUF_178 : X_BUF + port map ( + I => cs_99_OBUF, + O => cs_99_OBUF_GTS_TRI + ); + cs_98_OBUF_179 : X_BUF + port map ( + I => cs_98_OBUF, + O => cs_98_OBUF_GTS_TRI + ); + cs_97_OBUF_180 : X_BUF + port map ( + I => cs_97_OBUF, + O => cs_97_OBUF_GTS_TRI + ); + cs_96_OBUF_181 : X_BUF + port map ( + I => cs_96_OBUF, + O => cs_96_OBUF_GTS_TRI + ); + cs_95_OBUF_182 : X_BUF + port map ( + I => cs_95_OBUF, + O => cs_95_OBUF_GTS_TRI + ); + cs_94_OBUF_183 : X_BUF + port map ( + I => cs_94_OBUF, + O => cs_94_OBUF_GTS_TRI + ); + cs_93_OBUF_184 : X_BUF + port map ( + I => cs_93_OBUF, + O => cs_93_OBUF_GTS_TRI + ); + cs_92_OBUF_185 : X_BUF + port map ( + I => cs_92_OBUF, + O => cs_92_OBUF_GTS_TRI + ); + cs_91_OBUF_186 : X_BUF + port map ( + I => cs_91_OBUF, + O => cs_91_OBUF_GTS_TRI + ); + cs_90_OBUF_187 : X_BUF + port map ( + I => cs_90_OBUF, + O => cs_90_OBUF_GTS_TRI + ); + cs_89_OBUF_188 : X_BUF + port map ( + I => cs_89_OBUF, + O => cs_89_OBUF_GTS_TRI + ); + cs_88_OBUF_189 : X_BUF + port map ( + I => cs_88_OBUF, + O => cs_88_OBUF_GTS_TRI + ); + cs_87_OBUF_190 : X_BUF + port map ( + I => cs_87_OBUF, + O => cs_87_OBUF_GTS_TRI + ); + cs_86_OBUF_191 : X_BUF + port map ( + I => cs_86_OBUF, + O => cs_86_OBUF_GTS_TRI + ); + cs_85_OBUF_192 : X_BUF + port map ( + I => cs_85_OBUF, + O => cs_85_OBUF_GTS_TRI + ); + cs_84_OBUF_193 : X_BUF + port map ( + I => cs_84_OBUF, + O => cs_84_OBUF_GTS_TRI + ); + cs_83_OBUF_194 : X_BUF + port map ( + I => cs_83_OBUF, + O => cs_83_OBUF_GTS_TRI + ); + cs_82_OBUF_195 : X_BUF + port map ( + I => cs_82_OBUF, + O => cs_82_OBUF_GTS_TRI + ); + cs_81_OBUF_196 : X_BUF + port map ( + I => cs_81_OBUF, + O => cs_81_OBUF_GTS_TRI + ); + cs_80_OBUF_197 : X_BUF + port map ( + I => cs_80_OBUF, + O => cs_80_OBUF_GTS_TRI + ); + cs_79_OBUF_198 : X_BUF + port map ( + I => cs_79_OBUF, + O => cs_79_OBUF_GTS_TRI + ); + cs_78_OBUF_199 : X_BUF + port map ( + I => cs_78_OBUF, + O => cs_78_OBUF_GTS_TRI + ); + cs_77_OBUF_200 : X_BUF + port map ( + I => cs_77_OBUF, + O => cs_77_OBUF_GTS_TRI + ); + cs_76_OBUF_201 : X_BUF + port map ( + I => cs_76_OBUF, + O => cs_76_OBUF_GTS_TRI + ); + cs_75_OBUF_202 : X_BUF + port map ( + I => cs_75_OBUF, + O => cs_75_OBUF_GTS_TRI + ); + cs_74_OBUF_203 : X_BUF + port map ( + I => cs_74_OBUF, + O => cs_74_OBUF_GTS_TRI + ); + cs_73_OBUF_204 : X_BUF + port map ( + I => cs_73_OBUF, + O => cs_73_OBUF_GTS_TRI + ); + cs_72_OBUF_205 : X_BUF + port map ( + I => cs_72_OBUF, + O => cs_72_OBUF_GTS_TRI + ); + cs_71_OBUF_206 : X_BUF + port map ( + I => cs_71_OBUF, + O => cs_71_OBUF_GTS_TRI + ); + cs_70_OBUF_207 : X_BUF + port map ( + I => cs_70_OBUF, + O => cs_70_OBUF_GTS_TRI + ); + cs_69_OBUF_208 : X_BUF + port map ( + I => cs_69_OBUF, + O => cs_69_OBUF_GTS_TRI + ); + cs_68_OBUF_209 : X_BUF + port map ( + I => cs_68_OBUF, + O => cs_68_OBUF_GTS_TRI + ); + cs_67_OBUF_210 : X_BUF + port map ( + I => cs_67_OBUF, + O => cs_67_OBUF_GTS_TRI + ); + cs_66_OBUF_211 : X_BUF + port map ( + I => cs_66_OBUF, + O => cs_66_OBUF_GTS_TRI + ); + cs_65_OBUF_212 : X_BUF + port map ( + I => cs_65_OBUF, + O => cs_65_OBUF_GTS_TRI + ); + cs_64_OBUF_213 : X_BUF + port map ( + I => cs_64_OBUF, + O => cs_64_OBUF_GTS_TRI + ); + cs_63_OBUF_214 : X_BUF + port map ( + I => cs_63_OBUF, + O => cs_63_OBUF_GTS_TRI + ); + cs_62_OBUF_215 : X_BUF + port map ( + I => cs_62_OBUF, + O => cs_62_OBUF_GTS_TRI + ); + cs_61_OBUF_216 : X_BUF + port map ( + I => cs_61_OBUF, + O => cs_61_OBUF_GTS_TRI + ); + cs_60_OBUF_217 : X_BUF + port map ( + I => cs_60_OBUF, + O => cs_60_OBUF_GTS_TRI + ); + cs_59_OBUF_218 : X_BUF + port map ( + I => cs_59_OBUF, + O => cs_59_OBUF_GTS_TRI + ); + cs_58_OBUF_219 : X_BUF + port map ( + I => cs_58_OBUF, + O => cs_58_OBUF_GTS_TRI + ); + cs_57_OBUF_220 : X_BUF + port map ( + I => cs_57_OBUF, + O => cs_57_OBUF_GTS_TRI + ); + cs_56_OBUF_221 : X_BUF + port map ( + I => cs_56_OBUF, + O => cs_56_OBUF_GTS_TRI + ); + cs_55_OBUF_222 : X_BUF + port map ( + I => cs_55_OBUF, + O => cs_55_OBUF_GTS_TRI + ); + cs_54_OBUF_223 : X_BUF + port map ( + I => cs_54_OBUF, + O => cs_54_OBUF_GTS_TRI + ); + cs_53_OBUF_224 : X_BUF + port map ( + I => cs_53_OBUF, + O => cs_53_OBUF_GTS_TRI + ); + cs_52_OBUF_225 : X_BUF + port map ( + I => cs_52_OBUF, + O => cs_52_OBUF_GTS_TRI + ); + cs_51_OBUF_226 : X_BUF + port map ( + I => cs_51_OBUF, + O => cs_51_OBUF_GTS_TRI + ); + cs_50_OBUF_227 : X_BUF + port map ( + I => cs_50_OBUF, + O => cs_50_OBUF_GTS_TRI + ); + cs_49_OBUF_228 : X_BUF + port map ( + I => cs_49_OBUF, + O => cs_49_OBUF_GTS_TRI + ); + cs_48_OBUF_229 : X_BUF + port map ( + I => cs_48_OBUF, + O => cs_48_OBUF_GTS_TRI + ); + cs_47_OBUF_230 : X_BUF + port map ( + I => cs_47_OBUF, + O => cs_47_OBUF_GTS_TRI + ); + cs_46_OBUF_231 : X_BUF + port map ( + I => cs_46_OBUF, + O => cs_46_OBUF_GTS_TRI + ); + cs_45_OBUF_232 : X_BUF + port map ( + I => cs_45_OBUF, + O => cs_45_OBUF_GTS_TRI + ); + cs_44_OBUF_233 : X_BUF + port map ( + I => cs_44_OBUF, + O => cs_44_OBUF_GTS_TRI + ); + cs_43_OBUF_234 : X_BUF + port map ( + I => cs_43_OBUF, + O => cs_43_OBUF_GTS_TRI + ); + cs_42_OBUF_235 : X_BUF + port map ( + I => cs_42_OBUF, + O => cs_42_OBUF_GTS_TRI + ); + cs_41_OBUF_236 : X_BUF + port map ( + I => cs_41_OBUF, + O => cs_41_OBUF_GTS_TRI + ); + cs_40_OBUF_237 : X_BUF + port map ( + I => cs_40_OBUF, + O => cs_40_OBUF_GTS_TRI + ); + cs_39_OBUF_238 : X_BUF + port map ( + I => cs_39_OBUF, + O => cs_39_OBUF_GTS_TRI + ); + cs_38_OBUF_239 : X_BUF + port map ( + I => cs_38_OBUF, + O => cs_38_OBUF_GTS_TRI + ); + cs_37_OBUF_240 : X_BUF + port map ( + I => cs_37_OBUF, + O => cs_37_OBUF_GTS_TRI + ); + cs_36_OBUF_241 : X_BUF + port map ( + I => cs_36_OBUF, + O => cs_36_OBUF_GTS_TRI + ); + cs_35_OBUF_242 : X_BUF + port map ( + I => cs_35_OBUF, + O => cs_35_OBUF_GTS_TRI + ); + cs_34_OBUF_243 : X_BUF + port map ( + I => cs_34_OBUF, + O => cs_34_OBUF_GTS_TRI + ); + cs_33_OBUF_244 : X_BUF + port map ( + I => cs_33_OBUF, + O => cs_33_OBUF_GTS_TRI + ); + cs_32_OBUF_245 : X_BUF + port map ( + I => cs_32_OBUF, + O => cs_32_OBUF_GTS_TRI + ); + cs_31_OBUF_246 : X_BUF + port map ( + I => cs_31_OBUF, + O => cs_31_OBUF_GTS_TRI + ); + cs_30_OBUF_247 : X_BUF + port map ( + I => cs_30_OBUF, + O => cs_30_OBUF_GTS_TRI + ); + cs_29_OBUF_248 : X_BUF + port map ( + I => cs_29_OBUF, + O => cs_29_OBUF_GTS_TRI + ); + cs_28_OBUF_249 : X_BUF + port map ( + I => cs_28_OBUF, + O => cs_28_OBUF_GTS_TRI + ); + cs_27_OBUF_250 : X_BUF + port map ( + I => cs_27_OBUF, + O => cs_27_OBUF_GTS_TRI + ); + cs_26_OBUF_251 : X_BUF + port map ( + I => cs_26_OBUF, + O => cs_26_OBUF_GTS_TRI + ); + cs_25_OBUF_252 : X_BUF + port map ( + I => cs_25_OBUF, + O => cs_25_OBUF_GTS_TRI + ); + cs_24_OBUF_253 : X_BUF + port map ( + I => cs_24_OBUF, + O => cs_24_OBUF_GTS_TRI + ); + cs_23_OBUF_254 : X_BUF + port map ( + I => cs_23_OBUF, + O => cs_23_OBUF_GTS_TRI + ); + cs_22_OBUF_255 : X_BUF + port map ( + I => cs_22_OBUF, + O => cs_22_OBUF_GTS_TRI + ); + cs_21_OBUF_256 : X_BUF + port map ( + I => cs_21_OBUF, + O => cs_21_OBUF_GTS_TRI + ); + cs_20_OBUF_257 : X_BUF + port map ( + I => cs_20_OBUF, + O => cs_20_OBUF_GTS_TRI + ); + cs_19_OBUF_258 : X_BUF + port map ( + I => cs_19_OBUF, + O => cs_19_OBUF_GTS_TRI + ); + cs_18_OBUF_259 : X_BUF + port map ( + I => cs_18_OBUF, + O => cs_18_OBUF_GTS_TRI + ); + cs_17_OBUF_260 : X_BUF + port map ( + I => cs_17_OBUF, + O => cs_17_OBUF_GTS_TRI + ); + cs_16_OBUF_261 : X_BUF + port map ( + I => cs_16_OBUF, + O => cs_16_OBUF_GTS_TRI + ); + cs_15_OBUF_262 : X_BUF + port map ( + I => cs_15_OBUF, + O => cs_15_OBUF_GTS_TRI + ); + cs_14_OBUF_263 : X_BUF + port map ( + I => cs_14_OBUF, + O => cs_14_OBUF_GTS_TRI + ); + cs_13_OBUF_264 : X_BUF + port map ( + I => cs_13_OBUF, + O => cs_13_OBUF_GTS_TRI + ); + cs_12_OBUF_265 : X_BUF + port map ( + I => cs_12_OBUF, + O => cs_12_OBUF_GTS_TRI + ); + cs_11_OBUF_266 : X_BUF + port map ( + I => cs_11_OBUF, + O => cs_11_OBUF_GTS_TRI + ); + cs_10_OBUF_267 : X_BUF + port map ( + I => cs_10_OBUF, + O => cs_10_OBUF_GTS_TRI + ); + cs_9_OBUF_268 : X_BUF + port map ( + I => cs_9_OBUF, + O => cs_9_OBUF_GTS_TRI + ); + cs_8_OBUF_269 : X_BUF + port map ( + I => cs_8_OBUF, + O => cs_8_OBUF_GTS_TRI + ); + cs_7_OBUF_270 : X_BUF + port map ( + I => cs_7_OBUF, + O => cs_7_OBUF_GTS_TRI + ); + cs_6_OBUF_271 : X_BUF + port map ( + I => cs_6_OBUF, + O => cs_6_OBUF_GTS_TRI + ); + cs_5_OBUF_272 : X_BUF + port map ( + I => cs_5_OBUF, + O => cs_5_OBUF_GTS_TRI + ); + cs_4_OBUF_273 : X_BUF + port map ( + I => cs_4_OBUF, + O => cs_4_OBUF_GTS_TRI + ); + cs_3_OBUF_274 : X_BUF + port map ( + I => cs_3_OBUF, + O => cs_3_OBUF_GTS_TRI + ); + cs_2_OBUF_275 : X_BUF + port map ( + I => cs_2_OBUF, + O => cs_2_OBUF_GTS_TRI + ); + cs_1_OBUF_276 : X_BUF + port map ( + I => cs_1_OBUF, + O => cs_1_OBUF_GTS_TRI + ); + dadrL_BU2826 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N18684, + ADR2 => dadrL_N18685, + ADR3 => dadrL_N0, + O => cs_255_OBUF + ); + dadrL_BU2823 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N18685 + ); + dadrL_BU2820 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N18684 + ); + dadrL_BU2815 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N18613, + ADR2 => dadrL_N18614, + ADR3 => dadrL_N0, + O => cs_254_OBUF + ); + dadrL_BU2812 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N18614 + ); + dadrL_BU2809 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N18613 + ); + dadrL_BU2804 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N18542, + ADR2 => dadrL_N18543, + ADR3 => dadrL_N0, + O => cs_253_OBUF + ); + dadrL_BU2801 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N18543 + ); + dadrL_BU2798 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N18542 + ); + dadrL_BU2793 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N18471, + ADR2 => dadrL_N18472, + ADR3 => dadrL_N0, + O => cs_252_OBUF + ); + dadrL_BU2790 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N18472 + ); + dadrL_BU2787 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N18471 + ); + dadrL_BU2782 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N18400, + ADR2 => dadrL_N18401, + ADR3 => dadrL_N0, + O => cs_251_OBUF + ); + dadrL_BU2779 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N18401 + ); + dadrL_BU2776 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N18400 + ); + dadrL_BU2771 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N18329, + ADR2 => dadrL_N18330, + ADR3 => dadrL_N0, + O => cs_250_OBUF + ); + dadrL_BU2768 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N18330 + ); + dadrL_BU2765 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N18329 + ); + dadrL_BU2760 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N18258, + ADR2 => dadrL_N18259, + ADR3 => dadrL_N0, + O => cs_249_OBUF + ); + dadrL_BU2757 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N18259 + ); + dadrL_BU2754 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N18258 + ); + dadrL_BU2749 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N18187, + ADR2 => dadrL_N18188, + ADR3 => dadrL_N0, + O => cs_248_OBUF + ); + dadrL_BU2746 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N18188 + ); + dadrL_BU2743 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N18187 + ); + dadrL_BU2738 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N18116, + ADR2 => dadrL_N18117, + ADR3 => dadrL_N0, + O => cs_247_OBUF + ); + dadrL_BU2735 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N18117 + ); + dadrL_BU2732 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N18116 + ); + dadrL_BU2727 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N18045, + ADR2 => dadrL_N18046, + ADR3 => dadrL_N0, + O => cs_246_OBUF + ); + dadrL_BU2724 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N18046 + ); + dadrL_BU2721 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N18045 + ); + dadrL_BU2716 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17974, + ADR2 => dadrL_N17975, + ADR3 => dadrL_N0, + O => cs_245_OBUF + ); + dadrL_BU2713 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17975 + ); + dadrL_BU2710 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17974 + ); + dadrL_BU2705 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17903, + ADR2 => dadrL_N17904, + ADR3 => dadrL_N0, + O => cs_244_OBUF + ); + dadrL_BU2702 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17904 + ); + dadrL_BU2699 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17903 + ); + dadrL_BU2694 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17832, + ADR2 => dadrL_N17833, + ADR3 => dadrL_N0, + O => cs_243_OBUF + ); + dadrL_BU2691 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17833 + ); + dadrL_BU2688 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17832 + ); + dadrL_BU2683 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17761, + ADR2 => dadrL_N17762, + ADR3 => dadrL_N0, + O => cs_242_OBUF + ); + dadrL_BU2680 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17762 + ); + dadrL_BU2677 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17761 + ); + dadrL_BU2672 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17690, + ADR2 => dadrL_N17691, + ADR3 => dadrL_N0, + O => cs_241_OBUF + ); + dadrL_BU2669 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17691 + ); + dadrL_BU2666 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17690 + ); + dadrL_BU2661 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17619, + ADR2 => dadrL_N17620, + ADR3 => dadrL_N0, + O => cs_240_OBUF + ); + dadrL_BU2658 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17620 + ); + dadrL_BU2655 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17619 + ); + dadrL_BU2650 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17548, + ADR2 => dadrL_N17549, + ADR3 => dadrL_N0, + O => cs_239_OBUF + ); + dadrL_BU2647 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17549 + ); + dadrL_BU2644 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17548 + ); + dadrL_BU2639 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17477, + ADR2 => dadrL_N17478, + ADR3 => dadrL_N0, + O => cs_238_OBUF + ); + dadrL_BU2636 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17478 + ); + dadrL_BU2633 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17477 + ); + dadrL_BU2628 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17406, + ADR2 => dadrL_N17407, + ADR3 => dadrL_N0, + O => cs_237_OBUF + ); + dadrL_BU2625 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17407 + ); + dadrL_BU2622 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17406 + ); + dadrL_BU2617 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17335, + ADR2 => dadrL_N17336, + ADR3 => dadrL_N0, + O => cs_236_OBUF + ); + dadrL_BU2614 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17336 + ); + dadrL_BU2611 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17335 + ); + dadrL_BU2606 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17264, + ADR2 => dadrL_N17265, + ADR3 => dadrL_N0, + O => cs_235_OBUF + ); + dadrL_BU2603 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17265 + ); + dadrL_BU2600 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17264 + ); + dadrL_BU2595 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17193, + ADR2 => dadrL_N17194, + ADR3 => dadrL_N0, + O => cs_234_OBUF + ); + dadrL_BU2592 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17194 + ); + dadrL_BU2589 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17193 + ); + dadrL_BU2584 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17122, + ADR2 => dadrL_N17123, + ADR3 => dadrL_N0, + O => cs_233_OBUF + ); + dadrL_BU2581 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17123 + ); + dadrL_BU2578 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17122 + ); + dadrL_BU2573 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N17051, + ADR2 => dadrL_N17052, + ADR3 => dadrL_N0, + O => cs_232_OBUF + ); + dadrL_BU2570 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N17052 + ); + dadrL_BU2567 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N17051 + ); + dadrL_BU2562 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16980, + ADR2 => dadrL_N16981, + ADR3 => dadrL_N0, + O => cs_231_OBUF + ); + dadrL_BU2559 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16981 + ); + dadrL_BU2556 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16980 + ); + dadrL_BU2551 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16909, + ADR2 => dadrL_N16910, + ADR3 => dadrL_N0, + O => cs_230_OBUF + ); + dadrL_BU2548 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16910 + ); + dadrL_BU2545 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16909 + ); + dadrL_BU2540 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16838, + ADR2 => dadrL_N16839, + ADR3 => dadrL_N0, + O => cs_229_OBUF + ); + dadrL_BU2537 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16839 + ); + dadrL_BU2534 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16838 + ); + dadrL_BU2529 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16767, + ADR2 => dadrL_N16768, + ADR3 => dadrL_N0, + O => cs_228_OBUF + ); + dadrL_BU2526 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16768 + ); + dadrL_BU2523 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16767 + ); + dadrL_BU2518 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16696, + ADR2 => dadrL_N16697, + ADR3 => dadrL_N0, + O => cs_227_OBUF + ); + dadrL_BU2515 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16697 + ); + dadrL_BU2512 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16696 + ); + dadrL_BU2507 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16625, + ADR2 => dadrL_N16626, + ADR3 => dadrL_N0, + O => cs_226_OBUF + ); + dadrL_BU2504 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16626 + ); + dadrL_BU2501 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16625 + ); + dadrL_BU2496 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16554, + ADR2 => dadrL_N16555, + ADR3 => dadrL_N0, + O => cs_225_OBUF + ); + dadrL_BU2493 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16555 + ); + dadrL_BU2490 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16554 + ); + dadrL_BU2485 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16483, + ADR2 => dadrL_N16484, + ADR3 => dadrL_N0, + O => cs_224_OBUF + ); + dadrL_BU2482 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16484 + ); + dadrL_BU2479 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16483 + ); + dadrL_BU2474 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16412, + ADR2 => dadrL_N16413, + ADR3 => dadrL_N0, + O => cs_223_OBUF + ); + dadrL_BU2471 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16413 + ); + dadrL_BU2468 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16412 + ); + dadrL_BU2463 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16341, + ADR2 => dadrL_N16342, + ADR3 => dadrL_N0, + O => cs_222_OBUF + ); + dadrL_BU2460 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16342 + ); + dadrL_BU2457 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16341 + ); + dadrL_BU2452 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16270, + ADR2 => dadrL_N16271, + ADR3 => dadrL_N0, + O => cs_221_OBUF + ); + dadrL_BU2449 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16271 + ); + dadrL_BU2446 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16270 + ); + dadrL_BU2441 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16199, + ADR2 => dadrL_N16200, + ADR3 => dadrL_N0, + O => cs_220_OBUF + ); + dadrL_BU2438 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16200 + ); + dadrL_BU2435 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16199 + ); + dadrL_BU2430 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16128, + ADR2 => dadrL_N16129, + ADR3 => dadrL_N0, + O => cs_219_OBUF + ); + dadrL_BU2427 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16129 + ); + dadrL_BU2424 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16128 + ); + dadrL_BU2419 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N16057, + ADR2 => dadrL_N16058, + ADR3 => dadrL_N0, + O => cs_218_OBUF + ); + dadrL_BU2416 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N16058 + ); + dadrL_BU2413 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N16057 + ); + dadrL_BU2408 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15986, + ADR2 => dadrL_N15987, + ADR3 => dadrL_N0, + O => cs_217_OBUF + ); + dadrL_BU2405 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15987 + ); + dadrL_BU2402 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15986 + ); + dadrL_BU2397 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15915, + ADR2 => dadrL_N15916, + ADR3 => dadrL_N0, + O => cs_216_OBUF + ); + dadrL_BU2394 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15916 + ); + dadrL_BU2391 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15915 + ); + dadrL_BU2386 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15844, + ADR2 => dadrL_N15845, + ADR3 => dadrL_N0, + O => cs_215_OBUF + ); + dadrL_BU2383 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15845 + ); + dadrL_BU2380 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15844 + ); + dadrL_BU2375 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15773, + ADR2 => dadrL_N15774, + ADR3 => dadrL_N0, + O => cs_214_OBUF + ); + dadrL_BU2372 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15774 + ); + dadrL_BU2369 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15773 + ); + dadrL_BU2364 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15702, + ADR2 => dadrL_N15703, + ADR3 => dadrL_N0, + O => cs_213_OBUF + ); + dadrL_BU2361 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15703 + ); + dadrL_BU2358 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15702 + ); + dadrL_BU2353 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15631, + ADR2 => dadrL_N15632, + ADR3 => dadrL_N0, + O => cs_212_OBUF + ); + dadrL_BU2350 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15632 + ); + dadrL_BU2347 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15631 + ); + dadrL_BU2342 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15560, + ADR2 => dadrL_N15561, + ADR3 => dadrL_N0, + O => cs_211_OBUF + ); + dadrL_BU2339 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15561 + ); + dadrL_BU2336 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15560 + ); + dadrL_BU2331 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15489, + ADR2 => dadrL_N15490, + ADR3 => dadrL_N0, + O => cs_210_OBUF + ); + dadrL_BU2328 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15490 + ); + dadrL_BU2325 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15489 + ); + dadrL_BU2320 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15418, + ADR2 => dadrL_N15419, + ADR3 => dadrL_N0, + O => cs_209_OBUF + ); + dadrL_BU2317 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15419 + ); + dadrL_BU2314 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15418 + ); + dadrL_BU2309 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15347, + ADR2 => dadrL_N15348, + ADR3 => dadrL_N0, + O => cs_208_OBUF + ); + dadrL_BU2306 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15348 + ); + dadrL_BU2303 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15347 + ); + dadrL_BU2298 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15276, + ADR2 => dadrL_N15277, + ADR3 => dadrL_N0, + O => cs_207_OBUF + ); + dadrL_BU2295 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15277 + ); + dadrL_BU2292 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15276 + ); + dadrL_BU2287 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15205, + ADR2 => dadrL_N15206, + ADR3 => dadrL_N0, + O => cs_206_OBUF + ); + dadrL_BU2284 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15206 + ); + dadrL_BU2281 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15205 + ); + dadrL_BU2276 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15134, + ADR2 => dadrL_N15135, + ADR3 => dadrL_N0, + O => cs_205_OBUF + ); + dadrL_BU2273 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15135 + ); + dadrL_BU2270 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15134 + ); + dadrL_BU2265 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N15063, + ADR2 => dadrL_N15064, + ADR3 => dadrL_N0, + O => cs_204_OBUF + ); + dadrL_BU2262 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N15064 + ); + dadrL_BU2259 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N15063 + ); + dadrL_BU2254 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14992, + ADR2 => dadrL_N14993, + ADR3 => dadrL_N0, + O => cs_203_OBUF + ); + dadrL_BU2251 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14993 + ); + dadrL_BU2248 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14992 + ); + dadrL_BU2243 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14921, + ADR2 => dadrL_N14922, + ADR3 => dadrL_N0, + O => cs_202_OBUF + ); + dadrL_BU2240 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14922 + ); + dadrL_BU2237 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14921 + ); + dadrL_BU2232 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14850, + ADR2 => dadrL_N14851, + ADR3 => dadrL_N0, + O => cs_201_OBUF + ); + dadrL_BU2229 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14851 + ); + dadrL_BU2226 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14850 + ); + dadrL_BU2221 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14779, + ADR2 => dadrL_N14780, + ADR3 => dadrL_N0, + O => cs_200_OBUF + ); + dadrL_BU2218 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14780 + ); + dadrL_BU2215 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14779 + ); + dadrL_BU2210 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14708, + ADR2 => dadrL_N14709, + ADR3 => dadrL_N0, + O => cs_199_OBUF + ); + dadrL_BU2207 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14709 + ); + dadrL_BU2204 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14708 + ); + dadrL_BU2199 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14637, + ADR2 => dadrL_N14638, + ADR3 => dadrL_N0, + O => cs_198_OBUF + ); + dadrL_BU2196 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14638 + ); + dadrL_BU2193 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14637 + ); + dadrL_BU2188 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14566, + ADR2 => dadrL_N14567, + ADR3 => dadrL_N0, + O => cs_197_OBUF + ); + dadrL_BU2185 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14567 + ); + dadrL_BU2182 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14566 + ); + dadrL_BU2177 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14495, + ADR2 => dadrL_N14496, + ADR3 => dadrL_N0, + O => cs_196_OBUF + ); + dadrL_BU2174 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14496 + ); + dadrL_BU2171 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14495 + ); + dadrL_BU2166 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14424, + ADR2 => dadrL_N14425, + ADR3 => dadrL_N0, + O => cs_195_OBUF + ); + dadrL_BU2163 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14425 + ); + dadrL_BU2160 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14424 + ); + dadrL_BU2155 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14353, + ADR2 => dadrL_N14354, + ADR3 => dadrL_N0, + O => cs_194_OBUF + ); + dadrL_BU2152 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14354 + ); + dadrL_BU2149 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14353 + ); + dadrL_BU2144 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14282, + ADR2 => dadrL_N14283, + ADR3 => dadrL_N0, + O => cs_193_OBUF + ); + dadrL_BU2141 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14283 + ); + dadrL_BU2138 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14282 + ); + dadrL_BU2133 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14211, + ADR2 => dadrL_N14212, + ADR3 => dadrL_N0, + O => cs_192_OBUF + ); + dadrL_BU2130 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14212 + ); + dadrL_BU2127 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14211 + ); + dadrL_BU2122 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14140, + ADR2 => dadrL_N14141, + ADR3 => dadrL_N0, + O => cs_191_OBUF + ); + dadrL_BU2119 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14141 + ); + dadrL_BU2116 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14140 + ); + dadrL_BU2111 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N14069, + ADR2 => dadrL_N14070, + ADR3 => dadrL_N0, + O => cs_190_OBUF + ); + dadrL_BU2108 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N14070 + ); + dadrL_BU2105 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N14069 + ); + dadrL_BU2100 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13998, + ADR2 => dadrL_N13999, + ADR3 => dadrL_N0, + O => cs_189_OBUF + ); + dadrL_BU2097 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13999 + ); + dadrL_BU2094 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13998 + ); + dadrL_BU2089 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13927, + ADR2 => dadrL_N13928, + ADR3 => dadrL_N0, + O => cs_188_OBUF + ); + dadrL_BU2086 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13928 + ); + dadrL_BU2083 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13927 + ); + dadrL_BU2078 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13856, + ADR2 => dadrL_N13857, + ADR3 => dadrL_N0, + O => cs_187_OBUF + ); + dadrL_BU2075 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13857 + ); + dadrL_BU2072 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13856 + ); + dadrL_BU2067 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13785, + ADR2 => dadrL_N13786, + ADR3 => dadrL_N0, + O => cs_186_OBUF + ); + dadrL_BU2064 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13786 + ); + dadrL_BU2061 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13785 + ); + dadrL_BU2056 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13714, + ADR2 => dadrL_N13715, + ADR3 => dadrL_N0, + O => cs_185_OBUF + ); + dadrL_BU2053 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13715 + ); + dadrL_BU2050 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13714 + ); + dadrL_BU2045 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13643, + ADR2 => dadrL_N13644, + ADR3 => dadrL_N0, + O => cs_184_OBUF + ); + dadrL_BU2042 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13644 + ); + dadrL_BU2039 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13643 + ); + dadrL_BU2034 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13572, + ADR2 => dadrL_N13573, + ADR3 => dadrL_N0, + O => cs_183_OBUF + ); + dadrL_BU2031 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13573 + ); + dadrL_BU2028 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13572 + ); + dadrL_BU2023 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13501, + ADR2 => dadrL_N13502, + ADR3 => dadrL_N0, + O => cs_182_OBUF + ); + dadrL_BU2020 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13502 + ); + dadrL_BU2017 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13501 + ); + dadrL_BU2012 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13430, + ADR2 => dadrL_N13431, + ADR3 => dadrL_N0, + O => cs_181_OBUF + ); + dadrL_BU2009 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13431 + ); + dadrL_BU2006 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13430 + ); + dadrL_BU2001 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13359, + ADR2 => dadrL_N13360, + ADR3 => dadrL_N0, + O => cs_180_OBUF + ); + dadrL_BU1998 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13360 + ); + dadrL_BU1995 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13359 + ); + dadrL_BU1990 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13288, + ADR2 => dadrL_N13289, + ADR3 => dadrL_N0, + O => cs_179_OBUF + ); + dadrL_BU1987 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13289 + ); + dadrL_BU1984 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13288 + ); + dadrL_BU1979 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13217, + ADR2 => dadrL_N13218, + ADR3 => dadrL_N0, + O => cs_178_OBUF + ); + dadrL_BU1976 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13218 + ); + dadrL_BU1973 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13217 + ); + dadrL_BU1968 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13146, + ADR2 => dadrL_N13147, + ADR3 => dadrL_N0, + O => cs_177_OBUF + ); + dadrL_BU1965 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13147 + ); + dadrL_BU1962 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13146 + ); + dadrL_BU1957 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13075, + ADR2 => dadrL_N13076, + ADR3 => dadrL_N0, + O => cs_176_OBUF + ); + dadrL_BU1954 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13076 + ); + dadrL_BU1951 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13075 + ); + dadrL_BU1946 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N13004, + ADR2 => dadrL_N13005, + ADR3 => dadrL_N0, + O => cs_175_OBUF + ); + dadrL_BU1943 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N13005 + ); + dadrL_BU1940 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N13004 + ); + dadrL_BU1935 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12933, + ADR2 => dadrL_N12934, + ADR3 => dadrL_N0, + O => cs_174_OBUF + ); + dadrL_BU1932 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12934 + ); + dadrL_BU1929 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12933 + ); + dadrL_BU1924 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12862, + ADR2 => dadrL_N12863, + ADR3 => dadrL_N0, + O => cs_173_OBUF + ); + dadrL_BU1921 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12863 + ); + dadrL_BU1918 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12862 + ); + dadrL_BU1913 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12791, + ADR2 => dadrL_N12792, + ADR3 => dadrL_N0, + O => cs_172_OBUF + ); + dadrL_BU1910 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12792 + ); + dadrL_BU1907 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12791 + ); + dadrL_BU1902 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12720, + ADR2 => dadrL_N12721, + ADR3 => dadrL_N0, + O => cs_171_OBUF + ); + dadrL_BU1899 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12721 + ); + dadrL_BU1896 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12720 + ); + dadrL_BU1891 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12649, + ADR2 => dadrL_N12650, + ADR3 => dadrL_N0, + O => cs_170_OBUF + ); + dadrL_BU1888 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12650 + ); + dadrL_BU1885 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12649 + ); + dadrL_BU1880 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12578, + ADR2 => dadrL_N12579, + ADR3 => dadrL_N0, + O => cs_169_OBUF + ); + dadrL_BU1877 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12579 + ); + dadrL_BU1874 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12578 + ); + dadrL_BU1869 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12507, + ADR2 => dadrL_N12508, + ADR3 => dadrL_N0, + O => cs_168_OBUF + ); + dadrL_BU1866 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12508 + ); + dadrL_BU1863 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12507 + ); + dadrL_BU1858 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12436, + ADR2 => dadrL_N12437, + ADR3 => dadrL_N0, + O => cs_167_OBUF + ); + dadrL_BU1855 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12437 + ); + dadrL_BU1852 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12436 + ); + dadrL_BU1847 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12365, + ADR2 => dadrL_N12366, + ADR3 => dadrL_N0, + O => cs_166_OBUF + ); + dadrL_BU1844 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12366 + ); + dadrL_BU1841 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12365 + ); + dadrL_BU1836 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12294, + ADR2 => dadrL_N12295, + ADR3 => dadrL_N0, + O => cs_165_OBUF + ); + dadrL_BU1833 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12295 + ); + dadrL_BU1830 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12294 + ); + dadrL_BU1825 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12223, + ADR2 => dadrL_N12224, + ADR3 => dadrL_N0, + O => cs_164_OBUF + ); + dadrL_BU1822 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12224 + ); + dadrL_BU1819 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12223 + ); + dadrL_BU1814 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12152, + ADR2 => dadrL_N12153, + ADR3 => dadrL_N0, + O => cs_163_OBUF + ); + dadrL_BU1811 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12153 + ); + dadrL_BU1808 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12152 + ); + dadrL_BU1803 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12081, + ADR2 => dadrL_N12082, + ADR3 => dadrL_N0, + O => cs_162_OBUF + ); + dadrL_BU1800 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12082 + ); + dadrL_BU1797 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12081 + ); + dadrL_BU1792 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N12010, + ADR2 => dadrL_N12011, + ADR3 => dadrL_N0, + O => cs_161_OBUF + ); + dadrL_BU1789 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N12011 + ); + dadrL_BU1786 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N12010 + ); + dadrL_BU1781 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11939, + ADR2 => dadrL_N11940, + ADR3 => dadrL_N0, + O => cs_160_OBUF + ); + dadrL_BU1778 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11940 + ); + dadrL_BU1775 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11939 + ); + dadrL_BU1770 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11868, + ADR2 => dadrL_N11869, + ADR3 => dadrL_N0, + O => cs_159_OBUF + ); + dadrL_BU1767 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11869 + ); + dadrL_BU1764 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11868 + ); + dadrL_BU1759 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11797, + ADR2 => dadrL_N11798, + ADR3 => dadrL_N0, + O => cs_158_OBUF + ); + dadrL_BU1756 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11798 + ); + dadrL_BU1753 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11797 + ); + dadrL_BU1748 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11726, + ADR2 => dadrL_N11727, + ADR3 => dadrL_N0, + O => cs_157_OBUF + ); + dadrL_BU1745 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11727 + ); + dadrL_BU1742 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11726 + ); + dadrL_BU1737 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11655, + ADR2 => dadrL_N11656, + ADR3 => dadrL_N0, + O => cs_156_OBUF + ); + dadrL_BU1734 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11656 + ); + dadrL_BU1731 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11655 + ); + dadrL_BU1726 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11584, + ADR2 => dadrL_N11585, + ADR3 => dadrL_N0, + O => cs_155_OBUF + ); + dadrL_BU1723 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11585 + ); + dadrL_BU1720 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11584 + ); + dadrL_BU1715 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11513, + ADR2 => dadrL_N11514, + ADR3 => dadrL_N0, + O => cs_154_OBUF + ); + dadrL_BU1712 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11514 + ); + dadrL_BU1709 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11513 + ); + dadrL_BU1704 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11442, + ADR2 => dadrL_N11443, + ADR3 => dadrL_N0, + O => cs_153_OBUF + ); + dadrL_BU1701 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11443 + ); + dadrL_BU1698 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11442 + ); + dadrL_BU1693 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11371, + ADR2 => dadrL_N11372, + ADR3 => dadrL_N0, + O => cs_152_OBUF + ); + dadrL_BU1690 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11372 + ); + dadrL_BU1687 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11371 + ); + dadrL_BU1682 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11300, + ADR2 => dadrL_N11301, + ADR3 => dadrL_N0, + O => cs_151_OBUF + ); + dadrL_BU1679 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11301 + ); + dadrL_BU1676 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11300 + ); + dadrL_BU1671 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11229, + ADR2 => dadrL_N11230, + ADR3 => dadrL_N0, + O => cs_150_OBUF + ); + dadrL_BU1668 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11230 + ); + dadrL_BU1665 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11229 + ); + dadrL_BU1660 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11158, + ADR2 => dadrL_N11159, + ADR3 => dadrL_N0, + O => cs_149_OBUF + ); + dadrL_BU1657 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11159 + ); + dadrL_BU1654 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11158 + ); + dadrL_BU1649 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11087, + ADR2 => dadrL_N11088, + ADR3 => dadrL_N0, + O => cs_148_OBUF + ); + dadrL_BU1646 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11088 + ); + dadrL_BU1643 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11087 + ); + dadrL_BU1638 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N11016, + ADR2 => dadrL_N11017, + ADR3 => dadrL_N0, + O => cs_147_OBUF + ); + dadrL_BU1635 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N11017 + ); + dadrL_BU1632 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N11016 + ); + dadrL_BU1627 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10945, + ADR2 => dadrL_N10946, + ADR3 => dadrL_N0, + O => cs_146_OBUF + ); + dadrL_BU1624 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10946 + ); + dadrL_BU1621 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10945 + ); + dadrL_BU1616 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10874, + ADR2 => dadrL_N10875, + ADR3 => dadrL_N0, + O => cs_145_OBUF + ); + dadrL_BU1613 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10875 + ); + dadrL_BU1610 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10874 + ); + dadrL_BU1605 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10803, + ADR2 => dadrL_N10804, + ADR3 => dadrL_N0, + O => cs_144_OBUF + ); + dadrL_BU1602 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10804 + ); + dadrL_BU1599 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10803 + ); + dadrL_BU1594 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10732, + ADR2 => dadrL_N10733, + ADR3 => dadrL_N0, + O => cs_143_OBUF + ); + dadrL_BU1591 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10733 + ); + dadrL_BU1588 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10732 + ); + dadrL_BU1583 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10661, + ADR2 => dadrL_N10662, + ADR3 => dadrL_N0, + O => cs_142_OBUF + ); + dadrL_BU1580 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10662 + ); + dadrL_BU1577 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10661 + ); + dadrL_BU1572 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10590, + ADR2 => dadrL_N10591, + ADR3 => dadrL_N0, + O => cs_141_OBUF + ); + dadrL_BU1569 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10591 + ); + dadrL_BU1566 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10590 + ); + dadrL_BU1561 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10519, + ADR2 => dadrL_N10520, + ADR3 => dadrL_N0, + O => cs_140_OBUF + ); + dadrL_BU1558 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10520 + ); + dadrL_BU1555 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10519 + ); + dadrL_BU1550 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10448, + ADR2 => dadrL_N10449, + ADR3 => dadrL_N0, + O => cs_139_OBUF + ); + dadrL_BU1547 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10449 + ); + dadrL_BU1544 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10448 + ); + dadrL_BU1539 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10377, + ADR2 => dadrL_N10378, + ADR3 => dadrL_N0, + O => cs_138_OBUF + ); + dadrL_BU1536 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10378 + ); + dadrL_BU1533 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10377 + ); + dadrL_BU1528 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10306, + ADR2 => dadrL_N10307, + ADR3 => dadrL_N0, + O => cs_137_OBUF + ); + dadrL_BU1525 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10307 + ); + dadrL_BU1522 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10306 + ); + dadrL_BU1517 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10235, + ADR2 => dadrL_N10236, + ADR3 => dadrL_N0, + O => cs_136_OBUF + ); + dadrL_BU1514 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10236 + ); + dadrL_BU1511 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10235 + ); + dadrL_BU1506 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10164, + ADR2 => dadrL_N10165, + ADR3 => dadrL_N0, + O => cs_135_OBUF + ); + dadrL_BU1503 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10165 + ); + dadrL_BU1500 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10164 + ); + dadrL_BU1495 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10093, + ADR2 => dadrL_N10094, + ADR3 => dadrL_N0, + O => cs_134_OBUF + ); + dadrL_BU1492 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10094 + ); + dadrL_BU1489 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10093 + ); + dadrL_BU1484 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N10022, + ADR2 => dadrL_N10023, + ADR3 => dadrL_N0, + O => cs_133_OBUF + ); + dadrL_BU1481 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N10023 + ); + dadrL_BU1478 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N10022 + ); + dadrL_BU1473 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9951, + ADR2 => dadrL_N9952, + ADR3 => dadrL_N0, + O => cs_132_OBUF + ); + dadrL_BU1470 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9952 + ); + dadrL_BU1467 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9951 + ); + dadrL_BU1462 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9880, + ADR2 => dadrL_N9881, + ADR3 => dadrL_N0, + O => cs_131_OBUF + ); + dadrL_BU1459 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9881 + ); + dadrL_BU1456 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9880 + ); + dadrL_BU1451 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9809, + ADR2 => dadrL_N9810, + ADR3 => dadrL_N0, + O => cs_130_OBUF + ); + dadrL_BU1448 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9810 + ); + dadrL_BU1445 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9809 + ); + dadrL_BU1440 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9738, + ADR2 => dadrL_N9739, + ADR3 => dadrL_N0, + O => cs_129_OBUF + ); + dadrL_BU1437 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9739 + ); + dadrL_BU1434 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9738 + ); + dadrL_BU1429 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9667, + ADR2 => dadrL_N9668, + ADR3 => dadrL_N0, + O => cs_128_OBUF + ); + dadrL_BU1426 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9668 + ); + dadrL_BU1423 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9667 + ); + dadrL_BU1418 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9596, + ADR2 => dadrL_N9597, + ADR3 => dadrL_N0, + O => cs_127_OBUF + ); + dadrL_BU1415 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9597 + ); + dadrL_BU1412 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9596 + ); + dadrL_BU1407 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9525, + ADR2 => dadrL_N9526, + ADR3 => dadrL_N0, + O => cs_126_OBUF + ); + dadrL_BU1404 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9526 + ); + dadrL_BU1401 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9525 + ); + dadrL_BU1396 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9454, + ADR2 => dadrL_N9455, + ADR3 => dadrL_N0, + O => cs_125_OBUF + ); + dadrL_BU1393 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9455 + ); + dadrL_BU1390 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9454 + ); + dadrL_BU1385 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9383, + ADR2 => dadrL_N9384, + ADR3 => dadrL_N0, + O => cs_124_OBUF + ); + dadrL_BU1382 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9384 + ); + dadrL_BU1379 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9383 + ); + dadrL_BU1374 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9312, + ADR2 => dadrL_N9313, + ADR3 => dadrL_N0, + O => cs_123_OBUF + ); + dadrL_BU1371 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9313 + ); + dadrL_BU1368 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9312 + ); + dadrL_BU1363 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9241, + ADR2 => dadrL_N9242, + ADR3 => dadrL_N0, + O => cs_122_OBUF + ); + dadrL_BU1360 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9242 + ); + dadrL_BU1357 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9241 + ); + dadrL_BU1352 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9170, + ADR2 => dadrL_N9171, + ADR3 => dadrL_N0, + O => cs_121_OBUF + ); + dadrL_BU1349 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9171 + ); + dadrL_BU1346 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9170 + ); + dadrL_BU1341 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9099, + ADR2 => dadrL_N9100, + ADR3 => dadrL_N0, + O => cs_120_OBUF + ); + dadrL_BU1338 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9100 + ); + dadrL_BU1335 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9099 + ); + dadrL_BU1330 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N9028, + ADR2 => dadrL_N9029, + ADR3 => dadrL_N0, + O => cs_119_OBUF + ); + dadrL_BU1327 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N9029 + ); + dadrL_BU1324 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N9028 + ); + dadrL_BU1319 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8957, + ADR2 => dadrL_N8958, + ADR3 => dadrL_N0, + O => cs_118_OBUF + ); + dadrL_BU1316 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8958 + ); + dadrL_BU1313 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8957 + ); + dadrL_BU1308 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8886, + ADR2 => dadrL_N8887, + ADR3 => dadrL_N0, + O => cs_117_OBUF + ); + dadrL_BU1305 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8887 + ); + dadrL_BU1302 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8886 + ); + dadrL_BU1297 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8815, + ADR2 => dadrL_N8816, + ADR3 => dadrL_N0, + O => cs_116_OBUF + ); + dadrL_BU1294 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8816 + ); + dadrL_BU1291 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8815 + ); + dadrL_BU1286 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8744, + ADR2 => dadrL_N8745, + ADR3 => dadrL_N0, + O => cs_115_OBUF + ); + dadrL_BU1283 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8745 + ); + dadrL_BU1280 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8744 + ); + dadrL_BU1275 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8673, + ADR2 => dadrL_N8674, + ADR3 => dadrL_N0, + O => cs_114_OBUF + ); + dadrL_BU1272 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8674 + ); + dadrL_BU1269 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8673 + ); + dadrL_BU1264 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8602, + ADR2 => dadrL_N8603, + ADR3 => dadrL_N0, + O => cs_113_OBUF + ); + dadrL_BU1261 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8603 + ); + dadrL_BU1258 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8602 + ); + dadrL_BU1253 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8531, + ADR2 => dadrL_N8532, + ADR3 => dadrL_N0, + O => cs_112_OBUF + ); + dadrL_BU1250 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8532 + ); + dadrL_BU1247 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8531 + ); + dadrL_BU1242 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8460, + ADR2 => dadrL_N8461, + ADR3 => dadrL_N0, + O => cs_111_OBUF + ); + dadrL_BU1239 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8461 + ); + dadrL_BU1236 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8460 + ); + dadrL_BU1231 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8389, + ADR2 => dadrL_N8390, + ADR3 => dadrL_N0, + O => cs_110_OBUF + ); + dadrL_BU1228 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8390 + ); + dadrL_BU1225 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8389 + ); + dadrL_BU1220 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8318, + ADR2 => dadrL_N8319, + ADR3 => dadrL_N0, + O => cs_109_OBUF + ); + dadrL_BU1217 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8319 + ); + dadrL_BU1214 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8318 + ); + dadrL_BU1209 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8247, + ADR2 => dadrL_N8248, + ADR3 => dadrL_N0, + O => cs_108_OBUF + ); + dadrL_BU1206 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8248 + ); + dadrL_BU1203 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8247 + ); + dadrL_BU1198 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8176, + ADR2 => dadrL_N8177, + ADR3 => dadrL_N0, + O => cs_107_OBUF + ); + dadrL_BU1195 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8177 + ); + dadrL_BU1192 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8176 + ); + dadrL_BU1187 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8105, + ADR2 => dadrL_N8106, + ADR3 => dadrL_N0, + O => cs_106_OBUF + ); + dadrL_BU1184 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8106 + ); + dadrL_BU1181 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8105 + ); + dadrL_BU1176 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N8034, + ADR2 => dadrL_N8035, + ADR3 => dadrL_N0, + O => cs_105_OBUF + ); + dadrL_BU1173 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N8035 + ); + dadrL_BU1170 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N8034 + ); + dadrL_BU1165 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7963, + ADR2 => dadrL_N7964, + ADR3 => dadrL_N0, + O => cs_104_OBUF + ); + dadrL_BU1162 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7964 + ); + dadrL_BU1159 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7963 + ); + dadrL_BU1154 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7892, + ADR2 => dadrL_N7893, + ADR3 => dadrL_N0, + O => cs_103_OBUF + ); + dadrL_BU1151 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7893 + ); + dadrL_BU1148 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7892 + ); + dadrL_BU1143 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7821, + ADR2 => dadrL_N7822, + ADR3 => dadrL_N0, + O => cs_102_OBUF + ); + dadrL_BU1140 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7822 + ); + dadrL_BU1137 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7821 + ); + dadrL_BU1132 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7750, + ADR2 => dadrL_N7751, + ADR3 => dadrL_N0, + O => cs_101_OBUF + ); + dadrL_BU1129 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7751 + ); + dadrL_BU1126 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7750 + ); + dadrL_BU1121 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7679, + ADR2 => dadrL_N7680, + ADR3 => dadrL_N0, + O => cs_100_OBUF + ); + dadrL_BU1118 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7680 + ); + dadrL_BU1115 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7679 + ); + dadrL_BU1110 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7608, + ADR2 => dadrL_N7609, + ADR3 => dadrL_N0, + O => cs_99_OBUF + ); + dadrL_BU1107 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7609 + ); + dadrL_BU1104 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7608 + ); + dadrL_BU1099 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7537, + ADR2 => dadrL_N7538, + ADR3 => dadrL_N0, + O => cs_98_OBUF + ); + dadrL_BU1096 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7538 + ); + dadrL_BU1093 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7537 + ); + dadrL_BU1088 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7466, + ADR2 => dadrL_N7467, + ADR3 => dadrL_N0, + O => cs_97_OBUF + ); + dadrL_BU1085 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7467 + ); + dadrL_BU1082 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7466 + ); + dadrL_BU1077 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7395, + ADR2 => dadrL_N7396, + ADR3 => dadrL_N0, + O => cs_96_OBUF + ); + dadrL_BU1074 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7396 + ); + dadrL_BU1071 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7395 + ); + dadrL_BU1066 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7324, + ADR2 => dadrL_N7325, + ADR3 => dadrL_N0, + O => cs_95_OBUF + ); + dadrL_BU1063 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7325 + ); + dadrL_BU1060 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7324 + ); + dadrL_BU1055 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7253, + ADR2 => dadrL_N7254, + ADR3 => dadrL_N0, + O => cs_94_OBUF + ); + dadrL_BU1052 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7254 + ); + dadrL_BU1049 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7253 + ); + dadrL_BU1044 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7182, + ADR2 => dadrL_N7183, + ADR3 => dadrL_N0, + O => cs_93_OBUF + ); + dadrL_BU1041 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7183 + ); + dadrL_BU1038 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7182 + ); + dadrL_BU1033 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7111, + ADR2 => dadrL_N7112, + ADR3 => dadrL_N0, + O => cs_92_OBUF + ); + dadrL_BU1030 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7112 + ); + dadrL_BU1027 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7111 + ); + dadrL_BU1022 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N7040, + ADR2 => dadrL_N7041, + ADR3 => dadrL_N0, + O => cs_91_OBUF + ); + dadrL_BU1019 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N7041 + ); + dadrL_BU1016 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N7040 + ); + dadrL_BU1011 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6969, + ADR2 => dadrL_N6970, + ADR3 => dadrL_N0, + O => cs_90_OBUF + ); + dadrL_BU1008 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6970 + ); + dadrL_BU1005 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6969 + ); + dadrL_BU1000 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6898, + ADR2 => dadrL_N6899, + ADR3 => dadrL_N0, + O => cs_89_OBUF + ); + dadrL_BU997 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6899 + ); + dadrL_BU994 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6898 + ); + dadrL_BU989 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6827, + ADR2 => dadrL_N6828, + ADR3 => dadrL_N0, + O => cs_88_OBUF + ); + dadrL_BU986 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6828 + ); + dadrL_BU983 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6827 + ); + dadrL_BU978 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6756, + ADR2 => dadrL_N6757, + ADR3 => dadrL_N0, + O => cs_87_OBUF + ); + dadrL_BU975 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6757 + ); + dadrL_BU972 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6756 + ); + dadrL_BU967 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6685, + ADR2 => dadrL_N6686, + ADR3 => dadrL_N0, + O => cs_86_OBUF + ); + dadrL_BU964 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6686 + ); + dadrL_BU961 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6685 + ); + dadrL_BU956 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6614, + ADR2 => dadrL_N6615, + ADR3 => dadrL_N0, + O => cs_85_OBUF + ); + dadrL_BU953 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6615 + ); + dadrL_BU950 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6614 + ); + dadrL_BU945 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6543, + ADR2 => dadrL_N6544, + ADR3 => dadrL_N0, + O => cs_84_OBUF + ); + dadrL_BU942 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6544 + ); + dadrL_BU939 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6543 + ); + dadrL_BU934 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6472, + ADR2 => dadrL_N6473, + ADR3 => dadrL_N0, + O => cs_83_OBUF + ); + dadrL_BU931 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6473 + ); + dadrL_BU928 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6472 + ); + dadrL_BU923 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6401, + ADR2 => dadrL_N6402, + ADR3 => dadrL_N0, + O => cs_82_OBUF + ); + dadrL_BU920 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6402 + ); + dadrL_BU917 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6401 + ); + dadrL_BU912 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6330, + ADR2 => dadrL_N6331, + ADR3 => dadrL_N0, + O => cs_81_OBUF + ); + dadrL_BU909 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6331 + ); + dadrL_BU906 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6330 + ); + dadrL_BU901 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6259, + ADR2 => dadrL_N6260, + ADR3 => dadrL_N0, + O => cs_80_OBUF + ); + dadrL_BU898 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6260 + ); + dadrL_BU895 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6259 + ); + dadrL_BU890 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6188, + ADR2 => dadrL_N6189, + ADR3 => dadrL_N0, + O => cs_79_OBUF + ); + dadrL_BU887 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6189 + ); + dadrL_BU884 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6188 + ); + dadrL_BU879 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6117, + ADR2 => dadrL_N6118, + ADR3 => dadrL_N0, + O => cs_78_OBUF + ); + dadrL_BU876 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6118 + ); + dadrL_BU873 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6117 + ); + dadrL_BU868 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N6046, + ADR2 => dadrL_N6047, + ADR3 => dadrL_N0, + O => cs_77_OBUF + ); + dadrL_BU865 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N6047 + ); + dadrL_BU862 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N6046 + ); + dadrL_BU857 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5975, + ADR2 => dadrL_N5976, + ADR3 => dadrL_N0, + O => cs_76_OBUF + ); + dadrL_BU854 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5976 + ); + dadrL_BU851 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5975 + ); + dadrL_BU846 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5904, + ADR2 => dadrL_N5905, + ADR3 => dadrL_N0, + O => cs_75_OBUF + ); + dadrL_BU843 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5905 + ); + dadrL_BU840 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5904 + ); + dadrL_BU835 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5833, + ADR2 => dadrL_N5834, + ADR3 => dadrL_N0, + O => cs_74_OBUF + ); + dadrL_BU832 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5834 + ); + dadrL_BU829 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5833 + ); + dadrL_BU824 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5762, + ADR2 => dadrL_N5763, + ADR3 => dadrL_N0, + O => cs_73_OBUF + ); + dadrL_BU821 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5763 + ); + dadrL_BU818 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5762 + ); + dadrL_BU813 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5691, + ADR2 => dadrL_N5692, + ADR3 => dadrL_N0, + O => cs_72_OBUF + ); + dadrL_BU810 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5692 + ); + dadrL_BU807 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5691 + ); + dadrL_BU802 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5620, + ADR2 => dadrL_N5621, + ADR3 => dadrL_N0, + O => cs_71_OBUF + ); + dadrL_BU799 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5621 + ); + dadrL_BU796 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5620 + ); + dadrL_BU791 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5549, + ADR2 => dadrL_N5550, + ADR3 => dadrL_N0, + O => cs_70_OBUF + ); + dadrL_BU788 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5550 + ); + dadrL_BU785 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5549 + ); + dadrL_BU780 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5478, + ADR2 => dadrL_N5479, + ADR3 => dadrL_N0, + O => cs_69_OBUF + ); + dadrL_BU777 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5479 + ); + dadrL_BU774 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5478 + ); + dadrL_BU769 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5407, + ADR2 => dadrL_N5408, + ADR3 => dadrL_N0, + O => cs_68_OBUF + ); + dadrL_BU766 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5408 + ); + dadrL_BU763 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5407 + ); + dadrL_BU758 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5336, + ADR2 => dadrL_N5337, + ADR3 => dadrL_N0, + O => cs_67_OBUF + ); + dadrL_BU755 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5337 + ); + dadrL_BU752 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5336 + ); + dadrL_BU747 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5265, + ADR2 => dadrL_N5266, + ADR3 => dadrL_N0, + O => cs_66_OBUF + ); + dadrL_BU744 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5266 + ); + dadrL_BU741 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5265 + ); + dadrL_BU736 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5194, + ADR2 => dadrL_N5195, + ADR3 => dadrL_N0, + O => cs_65_OBUF + ); + dadrL_BU733 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5195 + ); + dadrL_BU730 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5194 + ); + dadrL_BU725 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5123, + ADR2 => dadrL_N5124, + ADR3 => dadrL_N0, + O => cs_64_OBUF + ); + dadrL_BU722 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5124 + ); + dadrL_BU719 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5123 + ); + dadrL_BU714 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N5052, + ADR2 => dadrL_N5053, + ADR3 => dadrL_N0, + O => cs_63_OBUF + ); + dadrL_BU711 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N5053 + ); + dadrL_BU708 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N5052 + ); + dadrL_BU703 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4981, + ADR2 => dadrL_N4982, + ADR3 => dadrL_N0, + O => cs_62_OBUF + ); + dadrL_BU700 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4982 + ); + dadrL_BU697 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4981 + ); + dadrL_BU692 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4910, + ADR2 => dadrL_N4911, + ADR3 => dadrL_N0, + O => cs_61_OBUF + ); + dadrL_BU689 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4911 + ); + dadrL_BU686 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4910 + ); + dadrL_BU681 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4839, + ADR2 => dadrL_N4840, + ADR3 => dadrL_N0, + O => cs_60_OBUF + ); + dadrL_BU678 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4840 + ); + dadrL_BU675 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4839 + ); + dadrL_BU670 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4768, + ADR2 => dadrL_N4769, + ADR3 => dadrL_N0, + O => cs_59_OBUF + ); + dadrL_BU667 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4769 + ); + dadrL_BU664 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4768 + ); + dadrL_BU659 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4697, + ADR2 => dadrL_N4698, + ADR3 => dadrL_N0, + O => cs_58_OBUF + ); + dadrL_BU656 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4698 + ); + dadrL_BU653 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4697 + ); + dadrL_BU648 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4626, + ADR2 => dadrL_N4627, + ADR3 => dadrL_N0, + O => cs_57_OBUF + ); + dadrL_BU645 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4627 + ); + dadrL_BU642 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4626 + ); + dadrL_BU637 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4555, + ADR2 => dadrL_N4556, + ADR3 => dadrL_N0, + O => cs_56_OBUF + ); + dadrL_BU634 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4556 + ); + dadrL_BU631 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4555 + ); + dadrL_BU626 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4484, + ADR2 => dadrL_N4485, + ADR3 => dadrL_N0, + O => cs_55_OBUF + ); + dadrL_BU623 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4485 + ); + dadrL_BU620 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4484 + ); + dadrL_BU615 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4413, + ADR2 => dadrL_N4414, + ADR3 => dadrL_N0, + O => cs_54_OBUF + ); + dadrL_BU612 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4414 + ); + dadrL_BU609 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4413 + ); + dadrL_BU604 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4342, + ADR2 => dadrL_N4343, + ADR3 => dadrL_N0, + O => cs_53_OBUF + ); + dadrL_BU601 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4343 + ); + dadrL_BU598 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4342 + ); + dadrL_BU593 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4271, + ADR2 => dadrL_N4272, + ADR3 => dadrL_N0, + O => cs_52_OBUF + ); + dadrL_BU590 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4272 + ); + dadrL_BU587 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4271 + ); + dadrL_BU582 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4200, + ADR2 => dadrL_N4201, + ADR3 => dadrL_N0, + O => cs_51_OBUF + ); + dadrL_BU579 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4201 + ); + dadrL_BU576 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4200 + ); + dadrL_BU571 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4129, + ADR2 => dadrL_N4130, + ADR3 => dadrL_N0, + O => cs_50_OBUF + ); + dadrL_BU568 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4130 + ); + dadrL_BU565 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4129 + ); + dadrL_BU560 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N4058, + ADR2 => dadrL_N4059, + ADR3 => dadrL_N0, + O => cs_49_OBUF + ); + dadrL_BU557 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N4059 + ); + dadrL_BU554 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N4058 + ); + dadrL_BU549 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3987, + ADR2 => dadrL_N3988, + ADR3 => dadrL_N0, + O => cs_48_OBUF + ); + dadrL_BU546 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3988 + ); + dadrL_BU543 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3987 + ); + dadrL_BU538 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3916, + ADR2 => dadrL_N3917, + ADR3 => dadrL_N0, + O => cs_47_OBUF + ); + dadrL_BU535 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3917 + ); + dadrL_BU532 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3916 + ); + dadrL_BU527 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3845, + ADR2 => dadrL_N3846, + ADR3 => dadrL_N0, + O => cs_46_OBUF + ); + dadrL_BU524 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3846 + ); + dadrL_BU521 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3845 + ); + dadrL_BU516 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3774, + ADR2 => dadrL_N3775, + ADR3 => dadrL_N0, + O => cs_45_OBUF + ); + dadrL_BU513 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3775 + ); + dadrL_BU510 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3774 + ); + dadrL_BU505 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3703, + ADR2 => dadrL_N3704, + ADR3 => dadrL_N0, + O => cs_44_OBUF + ); + dadrL_BU502 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3704 + ); + dadrL_BU499 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3703 + ); + dadrL_BU494 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3632, + ADR2 => dadrL_N3633, + ADR3 => dadrL_N0, + O => cs_43_OBUF + ); + dadrL_BU491 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3633 + ); + dadrL_BU488 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3632 + ); + dadrL_BU483 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3561, + ADR2 => dadrL_N3562, + ADR3 => dadrL_N0, + O => cs_42_OBUF + ); + dadrL_BU480 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3562 + ); + dadrL_BU477 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3561 + ); + dadrL_BU472 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3490, + ADR2 => dadrL_N3491, + ADR3 => dadrL_N0, + O => cs_41_OBUF + ); + dadrL_BU469 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3491 + ); + dadrL_BU466 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3490 + ); + dadrL_BU461 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3419, + ADR2 => dadrL_N3420, + ADR3 => dadrL_N0, + O => cs_40_OBUF + ); + dadrL_BU458 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3420 + ); + dadrL_BU455 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3419 + ); + dadrL_BU450 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3348, + ADR2 => dadrL_N3349, + ADR3 => dadrL_N0, + O => cs_39_OBUF + ); + dadrL_BU447 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3349 + ); + dadrL_BU444 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3348 + ); + dadrL_BU439 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3277, + ADR2 => dadrL_N3278, + ADR3 => dadrL_N0, + O => cs_38_OBUF + ); + dadrL_BU436 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3278 + ); + dadrL_BU433 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3277 + ); + dadrL_BU428 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3206, + ADR2 => dadrL_N3207, + ADR3 => dadrL_N0, + O => cs_37_OBUF + ); + dadrL_BU425 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3207 + ); + dadrL_BU422 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3206 + ); + dadrL_BU417 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3135, + ADR2 => dadrL_N3136, + ADR3 => dadrL_N0, + O => cs_36_OBUF + ); + dadrL_BU414 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3136 + ); + dadrL_BU411 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3135 + ); + dadrL_BU406 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N3064, + ADR2 => dadrL_N3065, + ADR3 => dadrL_N0, + O => cs_35_OBUF + ); + dadrL_BU403 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N3065 + ); + dadrL_BU400 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N3064 + ); + dadrL_BU395 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2993, + ADR2 => dadrL_N2994, + ADR3 => dadrL_N0, + O => cs_34_OBUF + ); + dadrL_BU392 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2994 + ); + dadrL_BU389 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2993 + ); + dadrL_BU384 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2922, + ADR2 => dadrL_N2923, + ADR3 => dadrL_N0, + O => cs_33_OBUF + ); + dadrL_BU381 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2923 + ); + dadrL_BU378 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2922 + ); + dadrL_BU373 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2851, + ADR2 => dadrL_N2852, + ADR3 => dadrL_N0, + O => cs_32_OBUF + ); + dadrL_BU370 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2852 + ); + dadrL_BU367 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2851 + ); + dadrL_BU362 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2780, + ADR2 => dadrL_N2781, + ADR3 => dadrL_N0, + O => cs_31_OBUF + ); + dadrL_BU359 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2781 + ); + dadrL_BU356 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2780 + ); + dadrL_BU351 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2709, + ADR2 => dadrL_N2710, + ADR3 => dadrL_N0, + O => cs_30_OBUF + ); + dadrL_BU348 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2710 + ); + dadrL_BU345 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2709 + ); + dadrL_BU340 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2638, + ADR2 => dadrL_N2639, + ADR3 => dadrL_N0, + O => cs_29_OBUF + ); + dadrL_BU337 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2639 + ); + dadrL_BU334 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2638 + ); + dadrL_BU329 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2567, + ADR2 => dadrL_N2568, + ADR3 => dadrL_N0, + O => cs_28_OBUF + ); + dadrL_BU326 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2568 + ); + dadrL_BU323 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2567 + ); + dadrL_BU318 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2496, + ADR2 => dadrL_N2497, + ADR3 => dadrL_N0, + O => cs_27_OBUF + ); + dadrL_BU315 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2497 + ); + dadrL_BU312 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2496 + ); + dadrL_BU307 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2425, + ADR2 => dadrL_N2426, + ADR3 => dadrL_N0, + O => cs_26_OBUF + ); + dadrL_BU304 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2426 + ); + dadrL_BU301 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2425 + ); + dadrL_BU296 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2354, + ADR2 => dadrL_N2355, + ADR3 => dadrL_N0, + O => cs_25_OBUF + ); + dadrL_BU293 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2355 + ); + dadrL_BU290 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2354 + ); + dadrL_BU285 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2283, + ADR2 => dadrL_N2284, + ADR3 => dadrL_N0, + O => cs_24_OBUF + ); + dadrL_BU282 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2284 + ); + dadrL_BU279 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2283 + ); + dadrL_BU274 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2212, + ADR2 => dadrL_N2213, + ADR3 => dadrL_N0, + O => cs_23_OBUF + ); + dadrL_BU271 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2213 + ); + dadrL_BU268 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2212 + ); + dadrL_BU263 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2141, + ADR2 => dadrL_N2142, + ADR3 => dadrL_N0, + O => cs_22_OBUF + ); + dadrL_BU260 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2142 + ); + dadrL_BU257 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2141 + ); + dadrL_BU252 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N2070, + ADR2 => dadrL_N2071, + ADR3 => dadrL_N0, + O => cs_21_OBUF + ); + dadrL_BU249 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2071 + ); + dadrL_BU246 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N2070 + ); + dadrL_BU241 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1999, + ADR2 => dadrL_N2000, + ADR3 => dadrL_N0, + O => cs_20_OBUF + ); + dadrL_BU238 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N2000 + ); + dadrL_BU235 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1999 + ); + dadrL_BU230 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1928, + ADR2 => dadrL_N1929, + ADR3 => dadrL_N0, + O => cs_19_OBUF + ); + dadrL_BU227 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1929 + ); + dadrL_BU224 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1928 + ); + dadrL_BU219 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1857, + ADR2 => dadrL_N1858, + ADR3 => dadrL_N0, + O => cs_18_OBUF + ); + dadrL_BU216 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1858 + ); + dadrL_BU213 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1857 + ); + dadrL_BU208 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1786, + ADR2 => dadrL_N1787, + ADR3 => dadrL_N0, + O => cs_17_OBUF + ); + dadrL_BU205 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1787 + ); + dadrL_BU202 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1786 + ); + dadrL_BU197 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1715, + ADR2 => dadrL_N1716, + ADR3 => dadrL_N0, + O => cs_16_OBUF + ); + dadrL_BU194 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1716 + ); + dadrL_BU191 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1715 + ); + dadrL_BU186 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1644, + ADR2 => dadrL_N1645, + ADR3 => dadrL_N0, + O => cs_15_OBUF + ); + dadrL_BU183 : X_LUT4 + generic map( + INIT => X"8000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1645 + ); + dadrL_BU180 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1644 + ); + dadrL_BU175 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1573, + ADR2 => dadrL_N1574, + ADR3 => dadrL_N0, + O => cs_14_OBUF + ); + dadrL_BU172 : X_LUT4 + generic map( + INIT => X"0080" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1574 + ); + dadrL_BU169 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1573 + ); + dadrL_BU164 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1502, + ADR2 => dadrL_N1503, + ADR3 => dadrL_N0, + O => cs_13_OBUF + ); + dadrL_BU161 : X_LUT4 + generic map( + INIT => X"0800" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1503 + ); + dadrL_BU158 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1502 + ); + dadrL_BU153 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1431, + ADR2 => dadrL_N1432, + ADR3 => dadrL_N0, + O => cs_12_OBUF + ); + dadrL_BU150 : X_LUT4 + generic map( + INIT => X"0008" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1432 + ); + dadrL_BU147 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1431 + ); + dadrL_BU142 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1360, + ADR2 => dadrL_N1361, + ADR3 => dadrL_N0, + O => cs_11_OBUF + ); + dadrL_BU139 : X_LUT4 + generic map( + INIT => X"2000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1361 + ); + dadrL_BU136 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1360 + ); + dadrL_BU131 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1289, + ADR2 => dadrL_N1290, + ADR3 => dadrL_N0, + O => cs_10_OBUF + ); + dadrL_BU128 : X_LUT4 + generic map( + INIT => X"0020" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1290 + ); + dadrL_BU125 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1289 + ); + dadrL_BU120 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1218, + ADR2 => dadrL_N1219, + ADR3 => dadrL_N0, + O => cs_9_OBUF + ); + dadrL_BU117 : X_LUT4 + generic map( + INIT => X"0200" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1219 + ); + dadrL_BU114 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1218 + ); + dadrL_BU109 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1147, + ADR2 => dadrL_N1148, + ADR3 => dadrL_N0, + O => cs_8_OBUF + ); + dadrL_BU106 : X_LUT4 + generic map( + INIT => X"0002" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1148 + ); + dadrL_BU103 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1147 + ); + dadrL_BU98 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1076, + ADR2 => dadrL_N1077, + ADR3 => dadrL_N0, + O => cs_7_OBUF + ); + dadrL_BU95 : X_LUT4 + generic map( + INIT => X"4000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1077 + ); + dadrL_BU92 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1076 + ); + dadrL_BU87 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N1005, + ADR2 => dadrL_N1006, + ADR3 => dadrL_N0, + O => cs_6_OBUF + ); + dadrL_BU84 : X_LUT4 + generic map( + INIT => X"0040" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N1006 + ); + dadrL_BU81 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N1005 + ); + dadrL_BU76 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N934, + ADR2 => dadrL_N935, + ADR3 => dadrL_N0, + O => cs_5_OBUF + ); + dadrL_BU73 : X_LUT4 + generic map( + INIT => X"0400" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N935 + ); + dadrL_BU70 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N934 + ); + dadrL_BU65 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N863, + ADR2 => dadrL_N864, + ADR3 => dadrL_N0, + O => cs_4_OBUF + ); + dadrL_BU62 : X_LUT4 + generic map( + INIT => X"0004" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N864 + ); + dadrL_BU59 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N863 + ); + dadrL_BU54 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N792, + ADR2 => dadrL_N793, + ADR3 => dadrL_N0, + O => cs_3_OBUF + ); + dadrL_BU51 : X_LUT4 + generic map( + INIT => X"1000" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N793 + ); + dadrL_BU48 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N792 + ); + dadrL_BU43 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N721, + ADR2 => dadrL_N722, + ADR3 => dadrL_N0, + O => cs_2_OBUF + ); + dadrL_BU40 : X_LUT4 + generic map( + INIT => X"0010" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N722 + ); + dadrL_BU37 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N721 + ); + dadrL_BU32 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N650, + ADR2 => dadrL_N651, + ADR3 => dadrL_N0, + O => cs_1_OBUF + ); + dadrL_BU29 : X_LUT4 + generic map( + INIT => X"0100" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N651 + ); + dadrL_BU26 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N650 + ); + dadrL_BU21 : X_LUT4 + generic map( + INIT => X"8080" + ) + port map ( + ADR0 => reg_select, + ADR1 => dadrL_N579, + ADR2 => dadrL_N580, + ADR3 => dadrL_N0, + O => cs_0_OBUF + ); + dadrL_BU18 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_3_IBUF, + ADR1 => adr_bus_2_IBUF, + ADR2 => adr_bus_1_IBUF, + ADR3 => adr_bus_0_IBUF, + O => dadrL_N580 + ); + dadrL_BU15 : X_LUT4 + generic map( + INIT => X"0001" + ) + port map ( + ADR0 => adr_bus_7_IBUF, + ADR1 => adr_bus_6_IBUF, + ADR2 => adr_bus_5_IBUF, + ADR3 => adr_bus_4_IBUF, + O => dadrL_N579 + ); + dadrL_GND : X_ZERO + port map ( + O => dadrL_N0 + ); + dadrL_VCC : X_ONE + port map ( + O => NLW_dadrL_VCC_O_UNCONNECTED + ); + cs_0_OBUF_GTS_TRI_282 : X_TRI + port map ( + I => cs_0_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_0_OBUF_GTS_TRI_CTL, + O => cs(0) + ); + clk_OBUF_GTS_TRI_283 : X_TRI + port map ( + I => clk_OBUF_GTS_TRI, + CTL => NlwInverterSignal_clk_OBUF_GTS_TRI_CTL, + O => clk + ); + rw_OBUF_GTS_TRI_284 : X_TRI + port map ( + I => rw_OBUF_GTS_TRI, + CTL => NlwInverterSignal_rw_OBUF_GTS_TRI_CTL, + O => rw + ); + cs_255_OBUF_GTS_TRI_285 : X_TRI + port map ( + I => cs_255_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_255_OBUF_GTS_TRI_CTL, + O => cs(255) + ); + cs_254_OBUF_GTS_TRI_286 : X_TRI + port map ( + I => cs_254_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_254_OBUF_GTS_TRI_CTL, + O => cs(254) + ); + cs_253_OBUF_GTS_TRI_287 : X_TRI + port map ( + I => cs_253_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_253_OBUF_GTS_TRI_CTL, + O => cs(253) + ); + cs_252_OBUF_GTS_TRI_288 : X_TRI + port map ( + I => cs_252_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_252_OBUF_GTS_TRI_CTL, + O => cs(252) + ); + cs_251_OBUF_GTS_TRI_289 : X_TRI + port map ( + I => cs_251_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_251_OBUF_GTS_TRI_CTL, + O => cs(251) + ); + cs_250_OBUF_GTS_TRI_290 : X_TRI + port map ( + I => cs_250_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_250_OBUF_GTS_TRI_CTL, + O => cs(250) + ); + cs_249_OBUF_GTS_TRI_291 : X_TRI + port map ( + I => cs_249_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_249_OBUF_GTS_TRI_CTL, + O => cs(249) + ); + cs_248_OBUF_GTS_TRI_292 : X_TRI + port map ( + I => cs_248_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_248_OBUF_GTS_TRI_CTL, + O => cs(248) + ); + cs_247_OBUF_GTS_TRI_293 : X_TRI + port map ( + I => cs_247_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_247_OBUF_GTS_TRI_CTL, + O => cs(247) + ); + cs_246_OBUF_GTS_TRI_294 : X_TRI + port map ( + I => cs_246_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_246_OBUF_GTS_TRI_CTL, + O => cs(246) + ); + cs_245_OBUF_GTS_TRI_295 : X_TRI + port map ( + I => cs_245_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_245_OBUF_GTS_TRI_CTL, + O => cs(245) + ); + cs_244_OBUF_GTS_TRI_296 : X_TRI + port map ( + I => cs_244_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_244_OBUF_GTS_TRI_CTL, + O => cs(244) + ); + cs_243_OBUF_GTS_TRI_297 : X_TRI + port map ( + I => cs_243_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_243_OBUF_GTS_TRI_CTL, + O => cs(243) + ); + cs_242_OBUF_GTS_TRI_298 : X_TRI + port map ( + I => cs_242_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_242_OBUF_GTS_TRI_CTL, + O => cs(242) + ); + cs_241_OBUF_GTS_TRI_299 : X_TRI + port map ( + I => cs_241_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_241_OBUF_GTS_TRI_CTL, + O => cs(241) + ); + cs_240_OBUF_GTS_TRI_300 : X_TRI + port map ( + I => cs_240_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_240_OBUF_GTS_TRI_CTL, + O => cs(240) + ); + cs_239_OBUF_GTS_TRI_301 : X_TRI + port map ( + I => cs_239_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_239_OBUF_GTS_TRI_CTL, + O => cs(239) + ); + cs_238_OBUF_GTS_TRI_302 : X_TRI + port map ( + I => cs_238_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_238_OBUF_GTS_TRI_CTL, + O => cs(238) + ); + cs_237_OBUF_GTS_TRI_303 : X_TRI + port map ( + I => cs_237_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_237_OBUF_GTS_TRI_CTL, + O => cs(237) + ); + cs_236_OBUF_GTS_TRI_304 : X_TRI + port map ( + I => cs_236_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_236_OBUF_GTS_TRI_CTL, + O => cs(236) + ); + cs_235_OBUF_GTS_TRI_305 : X_TRI + port map ( + I => cs_235_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_235_OBUF_GTS_TRI_CTL, + O => cs(235) + ); + cs_234_OBUF_GTS_TRI_306 : X_TRI + port map ( + I => cs_234_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_234_OBUF_GTS_TRI_CTL, + O => cs(234) + ); + cs_233_OBUF_GTS_TRI_307 : X_TRI + port map ( + I => cs_233_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_233_OBUF_GTS_TRI_CTL, + O => cs(233) + ); + cs_232_OBUF_GTS_TRI_308 : X_TRI + port map ( + I => cs_232_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_232_OBUF_GTS_TRI_CTL, + O => cs(232) + ); + cs_231_OBUF_GTS_TRI_309 : X_TRI + port map ( + I => cs_231_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_231_OBUF_GTS_TRI_CTL, + O => cs(231) + ); + cs_230_OBUF_GTS_TRI_310 : X_TRI + port map ( + I => cs_230_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_230_OBUF_GTS_TRI_CTL, + O => cs(230) + ); + cs_229_OBUF_GTS_TRI_311 : X_TRI + port map ( + I => cs_229_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_229_OBUF_GTS_TRI_CTL, + O => cs(229) + ); + cs_228_OBUF_GTS_TRI_312 : X_TRI + port map ( + I => cs_228_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_228_OBUF_GTS_TRI_CTL, + O => cs(228) + ); + cs_227_OBUF_GTS_TRI_313 : X_TRI + port map ( + I => cs_227_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_227_OBUF_GTS_TRI_CTL, + O => cs(227) + ); + cs_226_OBUF_GTS_TRI_314 : X_TRI + port map ( + I => cs_226_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_226_OBUF_GTS_TRI_CTL, + O => cs(226) + ); + cs_225_OBUF_GTS_TRI_315 : X_TRI + port map ( + I => cs_225_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_225_OBUF_GTS_TRI_CTL, + O => cs(225) + ); + cs_224_OBUF_GTS_TRI_316 : X_TRI + port map ( + I => cs_224_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_224_OBUF_GTS_TRI_CTL, + O => cs(224) + ); + cs_223_OBUF_GTS_TRI_317 : X_TRI + port map ( + I => cs_223_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_223_OBUF_GTS_TRI_CTL, + O => cs(223) + ); + cs_222_OBUF_GTS_TRI_318 : X_TRI + port map ( + I => cs_222_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_222_OBUF_GTS_TRI_CTL, + O => cs(222) + ); + cs_221_OBUF_GTS_TRI_319 : X_TRI + port map ( + I => cs_221_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_221_OBUF_GTS_TRI_CTL, + O => cs(221) + ); + cs_220_OBUF_GTS_TRI_320 : X_TRI + port map ( + I => cs_220_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_220_OBUF_GTS_TRI_CTL, + O => cs(220) + ); + cs_219_OBUF_GTS_TRI_321 : X_TRI + port map ( + I => cs_219_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_219_OBUF_GTS_TRI_CTL, + O => cs(219) + ); + cs_218_OBUF_GTS_TRI_322 : X_TRI + port map ( + I => cs_218_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_218_OBUF_GTS_TRI_CTL, + O => cs(218) + ); + cs_217_OBUF_GTS_TRI_323 : X_TRI + port map ( + I => cs_217_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_217_OBUF_GTS_TRI_CTL, + O => cs(217) + ); + cs_216_OBUF_GTS_TRI_324 : X_TRI + port map ( + I => cs_216_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_216_OBUF_GTS_TRI_CTL, + O => cs(216) + ); + cs_215_OBUF_GTS_TRI_325 : X_TRI + port map ( + I => cs_215_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_215_OBUF_GTS_TRI_CTL, + O => cs(215) + ); + cs_214_OBUF_GTS_TRI_326 : X_TRI + port map ( + I => cs_214_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_214_OBUF_GTS_TRI_CTL, + O => cs(214) + ); + cs_213_OBUF_GTS_TRI_327 : X_TRI + port map ( + I => cs_213_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_213_OBUF_GTS_TRI_CTL, + O => cs(213) + ); + cs_212_OBUF_GTS_TRI_328 : X_TRI + port map ( + I => cs_212_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_212_OBUF_GTS_TRI_CTL, + O => cs(212) + ); + cs_211_OBUF_GTS_TRI_329 : X_TRI + port map ( + I => cs_211_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_211_OBUF_GTS_TRI_CTL, + O => cs(211) + ); + cs_210_OBUF_GTS_TRI_330 : X_TRI + port map ( + I => cs_210_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_210_OBUF_GTS_TRI_CTL, + O => cs(210) + ); + cs_209_OBUF_GTS_TRI_331 : X_TRI + port map ( + I => cs_209_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_209_OBUF_GTS_TRI_CTL, + O => cs(209) + ); + cs_208_OBUF_GTS_TRI_332 : X_TRI + port map ( + I => cs_208_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_208_OBUF_GTS_TRI_CTL, + O => cs(208) + ); + cs_207_OBUF_GTS_TRI_333 : X_TRI + port map ( + I => cs_207_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_207_OBUF_GTS_TRI_CTL, + O => cs(207) + ); + cs_206_OBUF_GTS_TRI_334 : X_TRI + port map ( + I => cs_206_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_206_OBUF_GTS_TRI_CTL, + O => cs(206) + ); + cs_205_OBUF_GTS_TRI_335 : X_TRI + port map ( + I => cs_205_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_205_OBUF_GTS_TRI_CTL, + O => cs(205) + ); + cs_204_OBUF_GTS_TRI_336 : X_TRI + port map ( + I => cs_204_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_204_OBUF_GTS_TRI_CTL, + O => cs(204) + ); + cs_203_OBUF_GTS_TRI_337 : X_TRI + port map ( + I => cs_203_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_203_OBUF_GTS_TRI_CTL, + O => cs(203) + ); + cs_202_OBUF_GTS_TRI_338 : X_TRI + port map ( + I => cs_202_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_202_OBUF_GTS_TRI_CTL, + O => cs(202) + ); + cs_201_OBUF_GTS_TRI_339 : X_TRI + port map ( + I => cs_201_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_201_OBUF_GTS_TRI_CTL, + O => cs(201) + ); + cs_200_OBUF_GTS_TRI_340 : X_TRI + port map ( + I => cs_200_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_200_OBUF_GTS_TRI_CTL, + O => cs(200) + ); + cs_199_OBUF_GTS_TRI_341 : X_TRI + port map ( + I => cs_199_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_199_OBUF_GTS_TRI_CTL, + O => cs(199) + ); + cs_198_OBUF_GTS_TRI_342 : X_TRI + port map ( + I => cs_198_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_198_OBUF_GTS_TRI_CTL, + O => cs(198) + ); + cs_197_OBUF_GTS_TRI_343 : X_TRI + port map ( + I => cs_197_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_197_OBUF_GTS_TRI_CTL, + O => cs(197) + ); + cs_196_OBUF_GTS_TRI_344 : X_TRI + port map ( + I => cs_196_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_196_OBUF_GTS_TRI_CTL, + O => cs(196) + ); + cs_195_OBUF_GTS_TRI_345 : X_TRI + port map ( + I => cs_195_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_195_OBUF_GTS_TRI_CTL, + O => cs(195) + ); + cs_194_OBUF_GTS_TRI_346 : X_TRI + port map ( + I => cs_194_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_194_OBUF_GTS_TRI_CTL, + O => cs(194) + ); + cs_193_OBUF_GTS_TRI_347 : X_TRI + port map ( + I => cs_193_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_193_OBUF_GTS_TRI_CTL, + O => cs(193) + ); + cs_192_OBUF_GTS_TRI_348 : X_TRI + port map ( + I => cs_192_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_192_OBUF_GTS_TRI_CTL, + O => cs(192) + ); + cs_191_OBUF_GTS_TRI_349 : X_TRI + port map ( + I => cs_191_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_191_OBUF_GTS_TRI_CTL, + O => cs(191) + ); + cs_190_OBUF_GTS_TRI_350 : X_TRI + port map ( + I => cs_190_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_190_OBUF_GTS_TRI_CTL, + O => cs(190) + ); + cs_189_OBUF_GTS_TRI_351 : X_TRI + port map ( + I => cs_189_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_189_OBUF_GTS_TRI_CTL, + O => cs(189) + ); + cs_188_OBUF_GTS_TRI_352 : X_TRI + port map ( + I => cs_188_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_188_OBUF_GTS_TRI_CTL, + O => cs(188) + ); + cs_187_OBUF_GTS_TRI_353 : X_TRI + port map ( + I => cs_187_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_187_OBUF_GTS_TRI_CTL, + O => cs(187) + ); + cs_186_OBUF_GTS_TRI_354 : X_TRI + port map ( + I => cs_186_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_186_OBUF_GTS_TRI_CTL, + O => cs(186) + ); + cs_185_OBUF_GTS_TRI_355 : X_TRI + port map ( + I => cs_185_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_185_OBUF_GTS_TRI_CTL, + O => cs(185) + ); + cs_184_OBUF_GTS_TRI_356 : X_TRI + port map ( + I => cs_184_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_184_OBUF_GTS_TRI_CTL, + O => cs(184) + ); + cs_183_OBUF_GTS_TRI_357 : X_TRI + port map ( + I => cs_183_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_183_OBUF_GTS_TRI_CTL, + O => cs(183) + ); + cs_182_OBUF_GTS_TRI_358 : X_TRI + port map ( + I => cs_182_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_182_OBUF_GTS_TRI_CTL, + O => cs(182) + ); + cs_181_OBUF_GTS_TRI_359 : X_TRI + port map ( + I => cs_181_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_181_OBUF_GTS_TRI_CTL, + O => cs(181) + ); + cs_180_OBUF_GTS_TRI_360 : X_TRI + port map ( + I => cs_180_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_180_OBUF_GTS_TRI_CTL, + O => cs(180) + ); + cs_179_OBUF_GTS_TRI_361 : X_TRI + port map ( + I => cs_179_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_179_OBUF_GTS_TRI_CTL, + O => cs(179) + ); + cs_178_OBUF_GTS_TRI_362 : X_TRI + port map ( + I => cs_178_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_178_OBUF_GTS_TRI_CTL, + O => cs(178) + ); + cs_177_OBUF_GTS_TRI_363 : X_TRI + port map ( + I => cs_177_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_177_OBUF_GTS_TRI_CTL, + O => cs(177) + ); + cs_176_OBUF_GTS_TRI_364 : X_TRI + port map ( + I => cs_176_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_176_OBUF_GTS_TRI_CTL, + O => cs(176) + ); + cs_175_OBUF_GTS_TRI_365 : X_TRI + port map ( + I => cs_175_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_175_OBUF_GTS_TRI_CTL, + O => cs(175) + ); + cs_174_OBUF_GTS_TRI_366 : X_TRI + port map ( + I => cs_174_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_174_OBUF_GTS_TRI_CTL, + O => cs(174) + ); + cs_173_OBUF_GTS_TRI_367 : X_TRI + port map ( + I => cs_173_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_173_OBUF_GTS_TRI_CTL, + O => cs(173) + ); + cs_172_OBUF_GTS_TRI_368 : X_TRI + port map ( + I => cs_172_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_172_OBUF_GTS_TRI_CTL, + O => cs(172) + ); + cs_171_OBUF_GTS_TRI_369 : X_TRI + port map ( + I => cs_171_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_171_OBUF_GTS_TRI_CTL, + O => cs(171) + ); + cs_170_OBUF_GTS_TRI_370 : X_TRI + port map ( + I => cs_170_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_170_OBUF_GTS_TRI_CTL, + O => cs(170) + ); + cs_169_OBUF_GTS_TRI_371 : X_TRI + port map ( + I => cs_169_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_169_OBUF_GTS_TRI_CTL, + O => cs(169) + ); + cs_168_OBUF_GTS_TRI_372 : X_TRI + port map ( + I => cs_168_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_168_OBUF_GTS_TRI_CTL, + O => cs(168) + ); + cs_167_OBUF_GTS_TRI_373 : X_TRI + port map ( + I => cs_167_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_167_OBUF_GTS_TRI_CTL, + O => cs(167) + ); + cs_166_OBUF_GTS_TRI_374 : X_TRI + port map ( + I => cs_166_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_166_OBUF_GTS_TRI_CTL, + O => cs(166) + ); + cs_165_OBUF_GTS_TRI_375 : X_TRI + port map ( + I => cs_165_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_165_OBUF_GTS_TRI_CTL, + O => cs(165) + ); + cs_164_OBUF_GTS_TRI_376 : X_TRI + port map ( + I => cs_164_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_164_OBUF_GTS_TRI_CTL, + O => cs(164) + ); + cs_163_OBUF_GTS_TRI_377 : X_TRI + port map ( + I => cs_163_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_163_OBUF_GTS_TRI_CTL, + O => cs(163) + ); + cs_162_OBUF_GTS_TRI_378 : X_TRI + port map ( + I => cs_162_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_162_OBUF_GTS_TRI_CTL, + O => cs(162) + ); + cs_161_OBUF_GTS_TRI_379 : X_TRI + port map ( + I => cs_161_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_161_OBUF_GTS_TRI_CTL, + O => cs(161) + ); + cs_160_OBUF_GTS_TRI_380 : X_TRI + port map ( + I => cs_160_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_160_OBUF_GTS_TRI_CTL, + O => cs(160) + ); + cs_159_OBUF_GTS_TRI_381 : X_TRI + port map ( + I => cs_159_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_159_OBUF_GTS_TRI_CTL, + O => cs(159) + ); + cs_158_OBUF_GTS_TRI_382 : X_TRI + port map ( + I => cs_158_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_158_OBUF_GTS_TRI_CTL, + O => cs(158) + ); + cs_157_OBUF_GTS_TRI_383 : X_TRI + port map ( + I => cs_157_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_157_OBUF_GTS_TRI_CTL, + O => cs(157) + ); + cs_156_OBUF_GTS_TRI_384 : X_TRI + port map ( + I => cs_156_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_156_OBUF_GTS_TRI_CTL, + O => cs(156) + ); + cs_155_OBUF_GTS_TRI_385 : X_TRI + port map ( + I => cs_155_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_155_OBUF_GTS_TRI_CTL, + O => cs(155) + ); + cs_154_OBUF_GTS_TRI_386 : X_TRI + port map ( + I => cs_154_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_154_OBUF_GTS_TRI_CTL, + O => cs(154) + ); + cs_153_OBUF_GTS_TRI_387 : X_TRI + port map ( + I => cs_153_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_153_OBUF_GTS_TRI_CTL, + O => cs(153) + ); + cs_152_OBUF_GTS_TRI_388 : X_TRI + port map ( + I => cs_152_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_152_OBUF_GTS_TRI_CTL, + O => cs(152) + ); + cs_151_OBUF_GTS_TRI_389 : X_TRI + port map ( + I => cs_151_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_151_OBUF_GTS_TRI_CTL, + O => cs(151) + ); + cs_150_OBUF_GTS_TRI_390 : X_TRI + port map ( + I => cs_150_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_150_OBUF_GTS_TRI_CTL, + O => cs(150) + ); + cs_149_OBUF_GTS_TRI_391 : X_TRI + port map ( + I => cs_149_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_149_OBUF_GTS_TRI_CTL, + O => cs(149) + ); + cs_148_OBUF_GTS_TRI_392 : X_TRI + port map ( + I => cs_148_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_148_OBUF_GTS_TRI_CTL, + O => cs(148) + ); + cs_147_OBUF_GTS_TRI_393 : X_TRI + port map ( + I => cs_147_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_147_OBUF_GTS_TRI_CTL, + O => cs(147) + ); + cs_146_OBUF_GTS_TRI_394 : X_TRI + port map ( + I => cs_146_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_146_OBUF_GTS_TRI_CTL, + O => cs(146) + ); + cs_145_OBUF_GTS_TRI_395 : X_TRI + port map ( + I => cs_145_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_145_OBUF_GTS_TRI_CTL, + O => cs(145) + ); + cs_144_OBUF_GTS_TRI_396 : X_TRI + port map ( + I => cs_144_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_144_OBUF_GTS_TRI_CTL, + O => cs(144) + ); + cs_143_OBUF_GTS_TRI_397 : X_TRI + port map ( + I => cs_143_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_143_OBUF_GTS_TRI_CTL, + O => cs(143) + ); + cs_142_OBUF_GTS_TRI_398 : X_TRI + port map ( + I => cs_142_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_142_OBUF_GTS_TRI_CTL, + O => cs(142) + ); + cs_141_OBUF_GTS_TRI_399 : X_TRI + port map ( + I => cs_141_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_141_OBUF_GTS_TRI_CTL, + O => cs(141) + ); + cs_140_OBUF_GTS_TRI_400 : X_TRI + port map ( + I => cs_140_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_140_OBUF_GTS_TRI_CTL, + O => cs(140) + ); + cs_139_OBUF_GTS_TRI_401 : X_TRI + port map ( + I => cs_139_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_139_OBUF_GTS_TRI_CTL, + O => cs(139) + ); + cs_138_OBUF_GTS_TRI_402 : X_TRI + port map ( + I => cs_138_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_138_OBUF_GTS_TRI_CTL, + O => cs(138) + ); + cs_137_OBUF_GTS_TRI_403 : X_TRI + port map ( + I => cs_137_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_137_OBUF_GTS_TRI_CTL, + O => cs(137) + ); + cs_136_OBUF_GTS_TRI_404 : X_TRI + port map ( + I => cs_136_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_136_OBUF_GTS_TRI_CTL, + O => cs(136) + ); + cs_135_OBUF_GTS_TRI_405 : X_TRI + port map ( + I => cs_135_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_135_OBUF_GTS_TRI_CTL, + O => cs(135) + ); + cs_134_OBUF_GTS_TRI_406 : X_TRI + port map ( + I => cs_134_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_134_OBUF_GTS_TRI_CTL, + O => cs(134) + ); + cs_133_OBUF_GTS_TRI_407 : X_TRI + port map ( + I => cs_133_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_133_OBUF_GTS_TRI_CTL, + O => cs(133) + ); + cs_132_OBUF_GTS_TRI_408 : X_TRI + port map ( + I => cs_132_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_132_OBUF_GTS_TRI_CTL, + O => cs(132) + ); + cs_131_OBUF_GTS_TRI_409 : X_TRI + port map ( + I => cs_131_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_131_OBUF_GTS_TRI_CTL, + O => cs(131) + ); + cs_130_OBUF_GTS_TRI_410 : X_TRI + port map ( + I => cs_130_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_130_OBUF_GTS_TRI_CTL, + O => cs(130) + ); + cs_129_OBUF_GTS_TRI_411 : X_TRI + port map ( + I => cs_129_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_129_OBUF_GTS_TRI_CTL, + O => cs(129) + ); + cs_128_OBUF_GTS_TRI_412 : X_TRI + port map ( + I => cs_128_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_128_OBUF_GTS_TRI_CTL, + O => cs(128) + ); + cs_127_OBUF_GTS_TRI_413 : X_TRI + port map ( + I => cs_127_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_127_OBUF_GTS_TRI_CTL, + O => cs(127) + ); + cs_126_OBUF_GTS_TRI_414 : X_TRI + port map ( + I => cs_126_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_126_OBUF_GTS_TRI_CTL, + O => cs(126) + ); + cs_125_OBUF_GTS_TRI_415 : X_TRI + port map ( + I => cs_125_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_125_OBUF_GTS_TRI_CTL, + O => cs(125) + ); + cs_124_OBUF_GTS_TRI_416 : X_TRI + port map ( + I => cs_124_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_124_OBUF_GTS_TRI_CTL, + O => cs(124) + ); + cs_123_OBUF_GTS_TRI_417 : X_TRI + port map ( + I => cs_123_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_123_OBUF_GTS_TRI_CTL, + O => cs(123) + ); + cs_122_OBUF_GTS_TRI_418 : X_TRI + port map ( + I => cs_122_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_122_OBUF_GTS_TRI_CTL, + O => cs(122) + ); + cs_121_OBUF_GTS_TRI_419 : X_TRI + port map ( + I => cs_121_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_121_OBUF_GTS_TRI_CTL, + O => cs(121) + ); + cs_120_OBUF_GTS_TRI_420 : X_TRI + port map ( + I => cs_120_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_120_OBUF_GTS_TRI_CTL, + O => cs(120) + ); + cs_119_OBUF_GTS_TRI_421 : X_TRI + port map ( + I => cs_119_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_119_OBUF_GTS_TRI_CTL, + O => cs(119) + ); + cs_118_OBUF_GTS_TRI_422 : X_TRI + port map ( + I => cs_118_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_118_OBUF_GTS_TRI_CTL, + O => cs(118) + ); + cs_117_OBUF_GTS_TRI_423 : X_TRI + port map ( + I => cs_117_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_117_OBUF_GTS_TRI_CTL, + O => cs(117) + ); + cs_116_OBUF_GTS_TRI_424 : X_TRI + port map ( + I => cs_116_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_116_OBUF_GTS_TRI_CTL, + O => cs(116) + ); + cs_115_OBUF_GTS_TRI_425 : X_TRI + port map ( + I => cs_115_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_115_OBUF_GTS_TRI_CTL, + O => cs(115) + ); + cs_114_OBUF_GTS_TRI_426 : X_TRI + port map ( + I => cs_114_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_114_OBUF_GTS_TRI_CTL, + O => cs(114) + ); + cs_113_OBUF_GTS_TRI_427 : X_TRI + port map ( + I => cs_113_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_113_OBUF_GTS_TRI_CTL, + O => cs(113) + ); + cs_112_OBUF_GTS_TRI_428 : X_TRI + port map ( + I => cs_112_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_112_OBUF_GTS_TRI_CTL, + O => cs(112) + ); + cs_111_OBUF_GTS_TRI_429 : X_TRI + port map ( + I => cs_111_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_111_OBUF_GTS_TRI_CTL, + O => cs(111) + ); + cs_110_OBUF_GTS_TRI_430 : X_TRI + port map ( + I => cs_110_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_110_OBUF_GTS_TRI_CTL, + O => cs(110) + ); + cs_109_OBUF_GTS_TRI_431 : X_TRI + port map ( + I => cs_109_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_109_OBUF_GTS_TRI_CTL, + O => cs(109) + ); + cs_108_OBUF_GTS_TRI_432 : X_TRI + port map ( + I => cs_108_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_108_OBUF_GTS_TRI_CTL, + O => cs(108) + ); + cs_107_OBUF_GTS_TRI_433 : X_TRI + port map ( + I => cs_107_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_107_OBUF_GTS_TRI_CTL, + O => cs(107) + ); + cs_106_OBUF_GTS_TRI_434 : X_TRI + port map ( + I => cs_106_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_106_OBUF_GTS_TRI_CTL, + O => cs(106) + ); + cs_105_OBUF_GTS_TRI_435 : X_TRI + port map ( + I => cs_105_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_105_OBUF_GTS_TRI_CTL, + O => cs(105) + ); + cs_104_OBUF_GTS_TRI_436 : X_TRI + port map ( + I => cs_104_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_104_OBUF_GTS_TRI_CTL, + O => cs(104) + ); + cs_103_OBUF_GTS_TRI_437 : X_TRI + port map ( + I => cs_103_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_103_OBUF_GTS_TRI_CTL, + O => cs(103) + ); + cs_102_OBUF_GTS_TRI_438 : X_TRI + port map ( + I => cs_102_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_102_OBUF_GTS_TRI_CTL, + O => cs(102) + ); + cs_101_OBUF_GTS_TRI_439 : X_TRI + port map ( + I => cs_101_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_101_OBUF_GTS_TRI_CTL, + O => cs(101) + ); + cs_100_OBUF_GTS_TRI_440 : X_TRI + port map ( + I => cs_100_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_100_OBUF_GTS_TRI_CTL, + O => cs(100) + ); + cs_99_OBUF_GTS_TRI_441 : X_TRI + port map ( + I => cs_99_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_99_OBUF_GTS_TRI_CTL, + O => cs(99) + ); + cs_98_OBUF_GTS_TRI_442 : X_TRI + port map ( + I => cs_98_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_98_OBUF_GTS_TRI_CTL, + O => cs(98) + ); + cs_97_OBUF_GTS_TRI_443 : X_TRI + port map ( + I => cs_97_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_97_OBUF_GTS_TRI_CTL, + O => cs(97) + ); + cs_96_OBUF_GTS_TRI_444 : X_TRI + port map ( + I => cs_96_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_96_OBUF_GTS_TRI_CTL, + O => cs(96) + ); + cs_95_OBUF_GTS_TRI_445 : X_TRI + port map ( + I => cs_95_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_95_OBUF_GTS_TRI_CTL, + O => cs(95) + ); + cs_94_OBUF_GTS_TRI_446 : X_TRI + port map ( + I => cs_94_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_94_OBUF_GTS_TRI_CTL, + O => cs(94) + ); + cs_93_OBUF_GTS_TRI_447 : X_TRI + port map ( + I => cs_93_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_93_OBUF_GTS_TRI_CTL, + O => cs(93) + ); + cs_92_OBUF_GTS_TRI_448 : X_TRI + port map ( + I => cs_92_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_92_OBUF_GTS_TRI_CTL, + O => cs(92) + ); + cs_91_OBUF_GTS_TRI_449 : X_TRI + port map ( + I => cs_91_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_91_OBUF_GTS_TRI_CTL, + O => cs(91) + ); + cs_90_OBUF_GTS_TRI_450 : X_TRI + port map ( + I => cs_90_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_90_OBUF_GTS_TRI_CTL, + O => cs(90) + ); + cs_89_OBUF_GTS_TRI_451 : X_TRI + port map ( + I => cs_89_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_89_OBUF_GTS_TRI_CTL, + O => cs(89) + ); + cs_88_OBUF_GTS_TRI_452 : X_TRI + port map ( + I => cs_88_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_88_OBUF_GTS_TRI_CTL, + O => cs(88) + ); + cs_87_OBUF_GTS_TRI_453 : X_TRI + port map ( + I => cs_87_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_87_OBUF_GTS_TRI_CTL, + O => cs(87) + ); + cs_86_OBUF_GTS_TRI_454 : X_TRI + port map ( + I => cs_86_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_86_OBUF_GTS_TRI_CTL, + O => cs(86) + ); + cs_85_OBUF_GTS_TRI_455 : X_TRI + port map ( + I => cs_85_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_85_OBUF_GTS_TRI_CTL, + O => cs(85) + ); + cs_84_OBUF_GTS_TRI_456 : X_TRI + port map ( + I => cs_84_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_84_OBUF_GTS_TRI_CTL, + O => cs(84) + ); + cs_83_OBUF_GTS_TRI_457 : X_TRI + port map ( + I => cs_83_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_83_OBUF_GTS_TRI_CTL, + O => cs(83) + ); + cs_82_OBUF_GTS_TRI_458 : X_TRI + port map ( + I => cs_82_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_82_OBUF_GTS_TRI_CTL, + O => cs(82) + ); + cs_81_OBUF_GTS_TRI_459 : X_TRI + port map ( + I => cs_81_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_81_OBUF_GTS_TRI_CTL, + O => cs(81) + ); + cs_80_OBUF_GTS_TRI_460 : X_TRI + port map ( + I => cs_80_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_80_OBUF_GTS_TRI_CTL, + O => cs(80) + ); + cs_79_OBUF_GTS_TRI_461 : X_TRI + port map ( + I => cs_79_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_79_OBUF_GTS_TRI_CTL, + O => cs(79) + ); + cs_78_OBUF_GTS_TRI_462 : X_TRI + port map ( + I => cs_78_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_78_OBUF_GTS_TRI_CTL, + O => cs(78) + ); + cs_77_OBUF_GTS_TRI_463 : X_TRI + port map ( + I => cs_77_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_77_OBUF_GTS_TRI_CTL, + O => cs(77) + ); + cs_76_OBUF_GTS_TRI_464 : X_TRI + port map ( + I => cs_76_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_76_OBUF_GTS_TRI_CTL, + O => cs(76) + ); + cs_75_OBUF_GTS_TRI_465 : X_TRI + port map ( + I => cs_75_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_75_OBUF_GTS_TRI_CTL, + O => cs(75) + ); + cs_74_OBUF_GTS_TRI_466 : X_TRI + port map ( + I => cs_74_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_74_OBUF_GTS_TRI_CTL, + O => cs(74) + ); + cs_73_OBUF_GTS_TRI_467 : X_TRI + port map ( + I => cs_73_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_73_OBUF_GTS_TRI_CTL, + O => cs(73) + ); + cs_72_OBUF_GTS_TRI_468 : X_TRI + port map ( + I => cs_72_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_72_OBUF_GTS_TRI_CTL, + O => cs(72) + ); + cs_71_OBUF_GTS_TRI_469 : X_TRI + port map ( + I => cs_71_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_71_OBUF_GTS_TRI_CTL, + O => cs(71) + ); + cs_70_OBUF_GTS_TRI_470 : X_TRI + port map ( + I => cs_70_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_70_OBUF_GTS_TRI_CTL, + O => cs(70) + ); + cs_69_OBUF_GTS_TRI_471 : X_TRI + port map ( + I => cs_69_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_69_OBUF_GTS_TRI_CTL, + O => cs(69) + ); + cs_68_OBUF_GTS_TRI_472 : X_TRI + port map ( + I => cs_68_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_68_OBUF_GTS_TRI_CTL, + O => cs(68) + ); + cs_67_OBUF_GTS_TRI_473 : X_TRI + port map ( + I => cs_67_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_67_OBUF_GTS_TRI_CTL, + O => cs(67) + ); + cs_66_OBUF_GTS_TRI_474 : X_TRI + port map ( + I => cs_66_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_66_OBUF_GTS_TRI_CTL, + O => cs(66) + ); + cs_65_OBUF_GTS_TRI_475 : X_TRI + port map ( + I => cs_65_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_65_OBUF_GTS_TRI_CTL, + O => cs(65) + ); + cs_64_OBUF_GTS_TRI_476 : X_TRI + port map ( + I => cs_64_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_64_OBUF_GTS_TRI_CTL, + O => cs(64) + ); + cs_63_OBUF_GTS_TRI_477 : X_TRI + port map ( + I => cs_63_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_63_OBUF_GTS_TRI_CTL, + O => cs(63) + ); + cs_62_OBUF_GTS_TRI_478 : X_TRI + port map ( + I => cs_62_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_62_OBUF_GTS_TRI_CTL, + O => cs(62) + ); + cs_61_OBUF_GTS_TRI_479 : X_TRI + port map ( + I => cs_61_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_61_OBUF_GTS_TRI_CTL, + O => cs(61) + ); + cs_60_OBUF_GTS_TRI_480 : X_TRI + port map ( + I => cs_60_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_60_OBUF_GTS_TRI_CTL, + O => cs(60) + ); + cs_59_OBUF_GTS_TRI_481 : X_TRI + port map ( + I => cs_59_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_59_OBUF_GTS_TRI_CTL, + O => cs(59) + ); + cs_58_OBUF_GTS_TRI_482 : X_TRI + port map ( + I => cs_58_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_58_OBUF_GTS_TRI_CTL, + O => cs(58) + ); + cs_57_OBUF_GTS_TRI_483 : X_TRI + port map ( + I => cs_57_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_57_OBUF_GTS_TRI_CTL, + O => cs(57) + ); + cs_56_OBUF_GTS_TRI_484 : X_TRI + port map ( + I => cs_56_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_56_OBUF_GTS_TRI_CTL, + O => cs(56) + ); + cs_55_OBUF_GTS_TRI_485 : X_TRI + port map ( + I => cs_55_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_55_OBUF_GTS_TRI_CTL, + O => cs(55) + ); + cs_54_OBUF_GTS_TRI_486 : X_TRI + port map ( + I => cs_54_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_54_OBUF_GTS_TRI_CTL, + O => cs(54) + ); + cs_53_OBUF_GTS_TRI_487 : X_TRI + port map ( + I => cs_53_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_53_OBUF_GTS_TRI_CTL, + O => cs(53) + ); + cs_52_OBUF_GTS_TRI_488 : X_TRI + port map ( + I => cs_52_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_52_OBUF_GTS_TRI_CTL, + O => cs(52) + ); + cs_51_OBUF_GTS_TRI_489 : X_TRI + port map ( + I => cs_51_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_51_OBUF_GTS_TRI_CTL, + O => cs(51) + ); + cs_50_OBUF_GTS_TRI_490 : X_TRI + port map ( + I => cs_50_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_50_OBUF_GTS_TRI_CTL, + O => cs(50) + ); + cs_49_OBUF_GTS_TRI_491 : X_TRI + port map ( + I => cs_49_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_49_OBUF_GTS_TRI_CTL, + O => cs(49) + ); + cs_48_OBUF_GTS_TRI_492 : X_TRI + port map ( + I => cs_48_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_48_OBUF_GTS_TRI_CTL, + O => cs(48) + ); + cs_47_OBUF_GTS_TRI_493 : X_TRI + port map ( + I => cs_47_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_47_OBUF_GTS_TRI_CTL, + O => cs(47) + ); + cs_46_OBUF_GTS_TRI_494 : X_TRI + port map ( + I => cs_46_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_46_OBUF_GTS_TRI_CTL, + O => cs(46) + ); + cs_45_OBUF_GTS_TRI_495 : X_TRI + port map ( + I => cs_45_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_45_OBUF_GTS_TRI_CTL, + O => cs(45) + ); + cs_44_OBUF_GTS_TRI_496 : X_TRI + port map ( + I => cs_44_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_44_OBUF_GTS_TRI_CTL, + O => cs(44) + ); + cs_43_OBUF_GTS_TRI_497 : X_TRI + port map ( + I => cs_43_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_43_OBUF_GTS_TRI_CTL, + O => cs(43) + ); + cs_42_OBUF_GTS_TRI_498 : X_TRI + port map ( + I => cs_42_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_42_OBUF_GTS_TRI_CTL, + O => cs(42) + ); + cs_41_OBUF_GTS_TRI_499 : X_TRI + port map ( + I => cs_41_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_41_OBUF_GTS_TRI_CTL, + O => cs(41) + ); + cs_40_OBUF_GTS_TRI_500 : X_TRI + port map ( + I => cs_40_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_40_OBUF_GTS_TRI_CTL, + O => cs(40) + ); + cs_39_OBUF_GTS_TRI_501 : X_TRI + port map ( + I => cs_39_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_39_OBUF_GTS_TRI_CTL, + O => cs(39) + ); + cs_38_OBUF_GTS_TRI_502 : X_TRI + port map ( + I => cs_38_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_38_OBUF_GTS_TRI_CTL, + O => cs(38) + ); + cs_37_OBUF_GTS_TRI_503 : X_TRI + port map ( + I => cs_37_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_37_OBUF_GTS_TRI_CTL, + O => cs(37) + ); + cs_36_OBUF_GTS_TRI_504 : X_TRI + port map ( + I => cs_36_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_36_OBUF_GTS_TRI_CTL, + O => cs(36) + ); + cs_35_OBUF_GTS_TRI_505 : X_TRI + port map ( + I => cs_35_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_35_OBUF_GTS_TRI_CTL, + O => cs(35) + ); + cs_34_OBUF_GTS_TRI_506 : X_TRI + port map ( + I => cs_34_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_34_OBUF_GTS_TRI_CTL, + O => cs(34) + ); + cs_33_OBUF_GTS_TRI_507 : X_TRI + port map ( + I => cs_33_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_33_OBUF_GTS_TRI_CTL, + O => cs(33) + ); + cs_32_OBUF_GTS_TRI_508 : X_TRI + port map ( + I => cs_32_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_32_OBUF_GTS_TRI_CTL, + O => cs(32) + ); + cs_31_OBUF_GTS_TRI_509 : X_TRI + port map ( + I => cs_31_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_31_OBUF_GTS_TRI_CTL, + O => cs(31) + ); + cs_30_OBUF_GTS_TRI_510 : X_TRI + port map ( + I => cs_30_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_30_OBUF_GTS_TRI_CTL, + O => cs(30) + ); + cs_29_OBUF_GTS_TRI_511 : X_TRI + port map ( + I => cs_29_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_29_OBUF_GTS_TRI_CTL, + O => cs(29) + ); + cs_28_OBUF_GTS_TRI_512 : X_TRI + port map ( + I => cs_28_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_28_OBUF_GTS_TRI_CTL, + O => cs(28) + ); + cs_27_OBUF_GTS_TRI_513 : X_TRI + port map ( + I => cs_27_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_27_OBUF_GTS_TRI_CTL, + O => cs(27) + ); + cs_26_OBUF_GTS_TRI_514 : X_TRI + port map ( + I => cs_26_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_26_OBUF_GTS_TRI_CTL, + O => cs(26) + ); + cs_25_OBUF_GTS_TRI_515 : X_TRI + port map ( + I => cs_25_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_25_OBUF_GTS_TRI_CTL, + O => cs(25) + ); + cs_24_OBUF_GTS_TRI_516 : X_TRI + port map ( + I => cs_24_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_24_OBUF_GTS_TRI_CTL, + O => cs(24) + ); + cs_23_OBUF_GTS_TRI_517 : X_TRI + port map ( + I => cs_23_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_23_OBUF_GTS_TRI_CTL, + O => cs(23) + ); + cs_22_OBUF_GTS_TRI_518 : X_TRI + port map ( + I => cs_22_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_22_OBUF_GTS_TRI_CTL, + O => cs(22) + ); + cs_21_OBUF_GTS_TRI_519 : X_TRI + port map ( + I => cs_21_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_21_OBUF_GTS_TRI_CTL, + O => cs(21) + ); + cs_20_OBUF_GTS_TRI_520 : X_TRI + port map ( + I => cs_20_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_20_OBUF_GTS_TRI_CTL, + O => cs(20) + ); + cs_19_OBUF_GTS_TRI_521 : X_TRI + port map ( + I => cs_19_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_19_OBUF_GTS_TRI_CTL, + O => cs(19) + ); + cs_18_OBUF_GTS_TRI_522 : X_TRI + port map ( + I => cs_18_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_18_OBUF_GTS_TRI_CTL, + O => cs(18) + ); + cs_17_OBUF_GTS_TRI_523 : X_TRI + port map ( + I => cs_17_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_17_OBUF_GTS_TRI_CTL, + O => cs(17) + ); + cs_16_OBUF_GTS_TRI_524 : X_TRI + port map ( + I => cs_16_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_16_OBUF_GTS_TRI_CTL, + O => cs(16) + ); + cs_15_OBUF_GTS_TRI_525 : X_TRI + port map ( + I => cs_15_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_15_OBUF_GTS_TRI_CTL, + O => cs(15) + ); + cs_14_OBUF_GTS_TRI_526 : X_TRI + port map ( + I => cs_14_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_14_OBUF_GTS_TRI_CTL, + O => cs(14) + ); + cs_13_OBUF_GTS_TRI_527 : X_TRI + port map ( + I => cs_13_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_13_OBUF_GTS_TRI_CTL, + O => cs(13) + ); + cs_12_OBUF_GTS_TRI_528 : X_TRI + port map ( + I => cs_12_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_12_OBUF_GTS_TRI_CTL, + O => cs(12) + ); + cs_11_OBUF_GTS_TRI_529 : X_TRI + port map ( + I => cs_11_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_11_OBUF_GTS_TRI_CTL, + O => cs(11) + ); + cs_10_OBUF_GTS_TRI_530 : X_TRI + port map ( + I => cs_10_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_10_OBUF_GTS_TRI_CTL, + O => cs(10) + ); + cs_9_OBUF_GTS_TRI_531 : X_TRI + port map ( + I => cs_9_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_9_OBUF_GTS_TRI_CTL, + O => cs(9) + ); + cs_8_OBUF_GTS_TRI_532 : X_TRI + port map ( + I => cs_8_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_8_OBUF_GTS_TRI_CTL, + O => cs(8) + ); + cs_7_OBUF_GTS_TRI_533 : X_TRI + port map ( + I => cs_7_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_7_OBUF_GTS_TRI_CTL, + O => cs(7) + ); + cs_6_OBUF_GTS_TRI_534 : X_TRI + port map ( + I => cs_6_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_6_OBUF_GTS_TRI_CTL, + O => cs(6) + ); + cs_5_OBUF_GTS_TRI_535 : X_TRI + port map ( + I => cs_5_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_5_OBUF_GTS_TRI_CTL, + O => cs(5) + ); + cs_4_OBUF_GTS_TRI_536 : X_TRI + port map ( + I => cs_4_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_4_OBUF_GTS_TRI_CTL, + O => cs(4) + ); + cs_3_OBUF_GTS_TRI_537 : X_TRI + port map ( + I => cs_3_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_3_OBUF_GTS_TRI_CTL, + O => cs(3) + ); + cs_2_OBUF_GTS_TRI_538 : X_TRI + port map ( + I => cs_2_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_2_OBUF_GTS_TRI_CTL, + O => cs(2) + ); + cs_1_OBUF_GTS_TRI_539 : X_TRI + port map ( + I => cs_1_OBUF_GTS_TRI, + CTL => NlwInverterSignal_cs_1_OBUF_GTS_TRI_CTL, + O => cs(1) + ); + NlwInverterBlock_cs_0_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_0_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_clk_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_clk_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_rw_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_rw_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_255_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_255_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_254_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_254_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_253_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_253_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_252_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_252_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_251_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_251_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_250_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_250_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_249_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_249_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_248_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_248_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_247_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_247_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_246_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_246_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_245_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_245_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_244_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_244_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_243_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_243_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_242_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_242_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_241_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_241_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_240_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_240_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_239_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_239_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_238_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_238_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_237_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_237_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_236_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_236_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_235_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_235_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_234_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_234_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_233_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_233_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_232_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_232_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_231_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_231_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_230_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_230_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_229_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_229_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_228_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_228_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_227_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_227_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_226_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_226_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_225_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_225_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_224_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_224_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_223_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_223_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_222_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_222_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_221_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_221_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_220_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_220_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_219_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_219_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_218_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_218_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_217_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_217_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_216_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_216_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_215_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_215_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_214_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_214_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_213_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_213_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_212_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_212_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_211_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_211_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_210_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_210_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_209_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_209_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_208_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_208_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_207_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_207_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_206_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_206_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_205_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_205_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_204_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_204_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_203_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_203_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_202_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_202_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_201_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_201_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_200_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_200_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_199_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_199_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_198_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_198_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_197_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_197_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_196_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_196_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_195_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_195_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_194_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_194_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_193_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_193_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_192_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_192_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_191_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_191_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_190_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_190_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_189_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_189_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_188_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_188_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_187_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_187_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_186_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_186_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_185_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_185_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_184_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_184_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_183_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_183_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_182_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_182_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_181_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_181_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_180_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_180_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_179_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_179_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_178_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_178_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_177_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_177_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_176_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_176_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_175_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_175_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_174_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_174_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_173_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_173_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_172_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_172_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_171_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_171_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_170_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_170_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_169_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_169_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_168_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_168_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_167_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_167_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_166_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_166_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_165_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_165_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_164_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_164_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_163_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_163_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_162_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_162_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_161_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_161_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_160_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_160_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_159_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_159_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_158_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_158_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_157_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_157_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_156_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_156_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_155_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_155_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_154_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_154_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_153_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_153_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_152_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_152_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_151_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_151_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_150_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_150_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_149_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_149_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_148_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_148_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_147_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_147_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_146_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_146_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_145_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_145_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_144_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_144_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_143_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_143_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_142_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_142_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_141_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_141_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_140_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_140_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_139_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_139_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_138_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_138_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_137_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_137_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_136_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_136_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_135_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_135_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_134_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_134_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_133_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_133_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_132_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_132_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_131_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_131_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_130_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_130_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_129_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_129_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_128_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_128_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_127_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_127_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_126_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_126_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_125_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_125_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_124_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_124_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_123_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_123_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_122_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_122_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_121_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_121_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_120_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_120_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_119_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_119_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_118_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_118_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_117_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_117_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_116_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_116_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_115_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_115_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_114_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_114_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_113_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_113_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_112_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_112_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_111_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_111_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_110_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_110_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_109_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_109_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_108_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_108_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_107_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_107_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_106_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_106_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_105_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_105_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_104_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_104_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_103_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_103_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_102_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_102_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_101_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_101_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_100_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_100_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_99_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_99_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_98_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_98_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_97_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_97_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_96_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_96_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_95_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_95_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_94_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_94_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_93_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_93_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_92_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_92_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_91_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_91_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_90_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_90_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_89_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_89_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_88_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_88_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_87_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_87_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_86_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_86_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_85_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_85_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_84_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_84_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_83_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_83_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_82_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_82_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_81_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_81_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_80_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_80_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_79_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_79_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_78_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_78_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_77_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_77_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_76_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_76_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_75_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_75_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_74_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_74_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_73_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_73_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_72_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_72_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_71_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_71_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_70_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_70_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_69_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_69_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_68_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_68_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_67_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_67_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_66_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_66_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_65_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_65_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_64_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_64_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_63_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_63_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_62_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_62_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_61_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_61_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_60_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_60_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_59_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_59_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_58_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_58_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_57_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_57_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_56_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_56_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_55_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_55_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_54_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_54_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_53_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_53_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_52_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_52_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_51_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_51_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_50_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_50_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_49_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_49_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_48_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_48_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_47_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_47_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_46_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_46_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_45_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_45_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_44_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_44_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_43_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_43_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_42_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_42_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_41_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_41_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_40_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_40_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_39_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_39_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_38_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_38_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_37_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_37_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_36_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_36_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_35_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_35_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_34_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_34_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_33_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_33_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_32_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_32_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_31_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_31_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_30_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_30_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_29_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_29_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_28_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_28_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_27_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_27_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_26_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_26_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_25_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_25_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_24_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_24_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_23_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_23_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_22_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_22_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_21_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_21_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_20_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_20_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_19_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_19_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_18_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_18_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_17_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_17_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_16_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_16_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_15_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_15_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_14_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_14_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_13_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_13_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_12_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_12_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_11_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_11_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_10_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_10_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_9_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_9_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_8_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_8_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_7_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_7_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_6_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_6_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_5_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_5_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_4_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_4_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_3_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_3_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_2_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_2_OBUF_GTS_TRI_CTL + ); + NlwInverterBlock_cs_1_OBUF_GTS_TRI_CTL : X_INV + port map ( + I => GTS, + O => NlwInverterSignal_cs_1_OBUF_GTS_TRI_CTL + ); + NlwBlockTOC : X_TOC + port map (O => GTS); + +end Structure; + -- cgit v1.2.3