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Diffstat (limited to 'n/line-follower/src/pwm.c')
-rw-r--r--n/line-follower/src/pwm.c41
1 files changed, 34 insertions, 7 deletions
diff --git a/n/line-follower/src/pwm.c b/n/line-follower/src/pwm.c
index 883201f..9c5d15e 100644
--- a/n/line-follower/src/pwm.c
+++ b/n/line-follower/src/pwm.c
@@ -30,7 +30,7 @@ int16_t pwm_left, pwm_right;
/** Initialise PWM generator. */
static inline void
-pwm_init (void);
+pwm_init (uint8_t n);
/** Preprocess a PWM value before sending it to hardware. */
static inline uint8_t
@@ -44,16 +44,43 @@ pwm_update (void);
/** Initialise PWM generator. */
static inline void
-pwm_init (void)
+pwm_init (uint8_t n)
{
/* Phase correct PWM, TOP = 0xff, OC1B & OC1C with positive logic.
f_IO without prescaler.
Fpwm = f_IO / (2 * prescaler * TOP) = 28912 Hz. */
- TCCR1A =
- regv (COM1A1, COM1A0, COM1B1, COM1B0, COM1C1, COM1C0, WGM11, WGM10,
- 0, 0, 1, 0, 1, 0, 0, 1);
- TCCR1B = regv (ICNC1, ICES1, 5, WGM13, WGM12, CS12, CS11, CS10,
- 0, 0, 0, 0, 0, 0, 0, 1);
+ switch (n)
+ {
+ case 0:
+ default:
+ TCCR1A =
+ regv (COM1A1, COM1A0, COM1B1, COM1B0, COM1C1, COM1C0, WGM11, WGM10,
+ 0, 0, 1, 0, 1, 0, 0, 1);
+ TCCR1B = regv (ICNC1, ICES1, 5, WGM13, WGM12, CS12, CS11, CS10,
+ 0, 0, 0, 0, 0, 0, 0, 1);
+ break;
+ case 1:
+ TCCR1A =
+ regv (COM1A1, COM1A0, COM1B1, COM1B0, COM1C1, COM1C0, WGM11, WGM10,
+ 0, 0, 1, 0, 1, 0, 1, 0);
+ TCCR1B = regv (ICNC1, ICES1, 5, WGM13, WGM12, CS12, CS11, CS10,
+ 0, 0, 0, 0, 0, 0, 0, 1);
+ break;
+ case 2:
+ TCCR1A =
+ regv (COM1A1, COM1A0, COM1B1, COM1B0, COM1C1, COM1C0, WGM11, WGM10,
+ 0, 0, 1, 0, 1, 0, 1, 1);
+ TCCR1B = regv (ICNC1, ICES1, 5, WGM13, WGM12, CS12, CS11, CS10,
+ 0, 0, 0, 0, 0, 0, 0, 1);
+ break;
+ case 3:
+ TCCR1A =
+ regv (COM1A1, COM1A0, COM1B1, COM1B0, COM1C1, COM1C0, WGM11, WGM10,
+ 0, 0, 1, 0, 1, 0, 0, 1);
+ TCCR1B = regv (ICNC1, ICES1, 5, WGM13, WGM12, CS12, CS11, CS10,
+ 0, 0, 0, 0, 0, 0, 1, 0);
+ break;
+ }
/* Enable pwm and direction outputs in DDRB. */
DDRB |= _BV (7) | _BV (6) | _BV (3) | _BV (2);
}