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--- seq_interrupt.vhd
--- Eurobot 2004 : APB Team
--- Auteur : Pierre-André Galmes
--- Séquenceur du gestionnaire d'interruptions.
-
-
-library IEEE;
-use IEEE.STD_LOGIC_1164.all;
--- use IEEE.std_logic_arith.all;
--- use IEEE.std_logic_unsigned.all;
-
-entity seq_interrupt is
- port (
- rst : in std_logic;
- clk : in std_logic;
- irq : in std_logic; -- On a une interruption.
- rst_bas : out std_logic; -- raz des bascules.
- rst_irq : out std_logic; -- raz de l'IRQ.
- en_reg : out std_logic;
- -- Chip select
- cs0 : in std_logic;
- cs1 : in std_logic;
- cs2 : in std_logic
- );
-end seq_interrupt;
-
-
-architecture RTL of seq_interrupt is
--- déclaration d'un nouveau type.
-type state_seq is (
- s_idle,
- s_mem_reg,
- s_rst_bas,
- s_wait_read,
- s_rst_irq
-);
-signal statec, statef : state_seq;
-signal read_reg0, read_reg1, read_reg2 : std_logic;
-
-begin
- -- Partie synchrone
- p_synch : process (rst, clk)
- begin
- if (rst = '1') then
- statec <= s_idle;
- rst_bas <= '1';
- rst_irq <= '1';
- elsif (clk'event and clk = '1') then
- statec <= statef;
- end if;
- end process p_synch;
-
- -- Partie combinatoire
- p_combi : process (irq, cs0, cs1, cs2)
- begin
- -- valeurs par defaut
- en_reg <= '0'; rst_bas <= '0'; rst_irq <= '0';
- statef <= statec;
-
- case statec is
- when s_idle =>
- read_reg0 <= '0';
- read_reg1 <= '0';
- read_reg2 <= '0';
- if (irq = '1') then
- statef <= s_mem_reg;
- end if;
-
- when s_mem_reg =>
- en_reg <= '1';
- statef <= s_rst_bas;
-
- when s_rst_bas =>
- rst_bas <= '1';
- statef <= s_wait_read;
-
- -- on attend la lecture des trois registres.
- when s_wait_read =>
- if (cs0 = '1') then
- read_reg0 <= '1';
- end if;
- if (cs0 = '1') then
- read_reg0 <= '1';
- end if;
- if (cs0 = '1') then
- read_reg0 <= '1';
- end if;
- -- TODO : ici, la condition pour arrêter le signal
- -- d'interruption. Pour l'instant, j'attend qu'il ai fini de
- -- faire les 3 lectures (remis tous les CS à 0).
- if (read_reg0 = '1' and read_reg1 = '1' and
- read_reg2 = '1' and cs0 = '0' and cs1 = '0' and cs2 = '0') then
- statef <= s_rst_irq;
- else
- statef <= statec;
- end if;
-
- when s_rst_irq =>
- rst_irq <= '1';
- statef <= s_idle;
-
- when others => NULL;
-
- end case;
- end process;
-end RTL;