From cba9561e89c833b8151bf0439400ed5a9fd14ff8 Mon Sep 17 00:00:00 2001 From: Ken Sarkies Date: Mon, 9 Jul 2012 16:54:01 +0930 Subject: NVIC_Set_Interrupt_Priority: change to use 4-bit fields. (viz STM32F10xxx Cortex-M3 programming manual PM0056 and Cortex-M3-Generic-User-Guide.pdf) Doxygen commentary added --- lib/stm32/nvic.c | 101 +++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 99 insertions(+), 2 deletions(-) (limited to 'lib') diff --git a/lib/stm32/nvic.c b/lib/stm32/nvic.c index c9cf48b..ae91bff 100644 --- a/lib/stm32/nvic.c +++ b/lib/stm32/nvic.c @@ -1,3 +1,25 @@ +/** @file + +@ingroup STM32F + +@brief libopencm3 STM32F Nested Vectored Interrupt Controller + +@version 1.0.0 + +@author @htmlonly © @endhtmlonly 2010 Thomas Otto +@author @htmlonly © @endhtmlonly 2012 Fergus Noble + +@date 7 July 2012 + +The STM32F series provides up to 68 maskable user interrupts for the STM32F10x +series, and 87 for the STM32F2xx and STM32F4xx series. + +The NVIC registers are defined by the ARM standards +@see Cortex-M3 Devices Generic User Guide + + +LGPL License Terms @ref lgpl_license +*/ /* * This file is part of the libopencm3 project. * @@ -20,47 +42,122 @@ #include +/*-----------------------------------------------------------------------------*/ +/** @brief NVIC Enable Interrupt + +Enables a user interrupt. + +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +*/ + void nvic_enable_irq(u8 irqn) { NVIC_ISER(irqn / 32) = (1 << (irqn % 32)); } +/*-----------------------------------------------------------------------------*/ +/** @brief NVIC Disable Interrupt + +Disables a user interrupt. + +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +*/ + void nvic_disable_irq(u8 irqn) { NVIC_ICER(irqn / 32) = (1 << (irqn % 32)); } +/*-----------------------------------------------------------------------------*/ +/** @brief NVIC Return Pending Interrupt + +True if the interrupt has occurred and is waiting for service. + +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +@return Boolean. Interrupt pending. +*/ + u8 nvic_get_pending_irq(u8 irqn) { return NVIC_ISPR(irqn / 32) & (1 << (irqn % 32)) ? 1 : 0; } +/*-----------------------------------------------------------------------------*/ +/** @brief NVIC Set Pending Interrupt + +Force a user interrupt to a pending state. No effect if the interrupt is already +pending. + +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +*/ + void nvic_set_pending_irq(u8 irqn) { NVIC_ISPR(irqn / 32) = (1 << (irqn % 32)); } +/*-----------------------------------------------------------------------------*/ +/** @brief NVIC Clear Pending Interrupt + +Force remove a user interrupt from a pending state. No effect if the interrupt is +actively being serviced. + +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +*/ + void nvic_clear_pending_irq(u8 irqn) { NVIC_ICPR(irqn / 32) = (1 << (irqn % 32)); } +/*-----------------------------------------------------------------------------*/ +/** @brief NVIC Return Active Interrupt + +Interrupt has occurred and is currently being serviced. + +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +@return Boolean. Interrupt active. +*/ + u8 nvic_get_active_irq(u8 irqn) { return NVIC_IABR(irqn / 32) & (1 << (irqn % 32)) ? 1 : 0; } +/*-----------------------------------------------------------------------------*/ +/** @brief NVIC Return Enabled Interrupt + +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +@return Boolean. Interrupt enabled. +*/ + u8 nvic_get_irq_enabled(u8 irqn) { return NVIC_ISER(irqn / 32) & (1 << (irqn % 32)) ? 1 : 0; } +/*-----------------------------------------------------------------------------*/ +/** @brief NVIC Set Interrupt Priority + +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +@param[in] priority Unsigned int8. Interrupt priority (0 ... 255) +*/ + void nvic_set_priority(u8 irqn, u8 priority) { - NVIC_IPR(irqn) = priority; + NVIC_IPR(irqn / 4) = ((priority << ((irqn % 4) * 8)); } -void nvic_generate_software_interrupt(u8 irqn) +/*-----------------------------------------------------------------------------*/ +/** @brief NVIC Software Trigger Interrupt + +Generate an interrupt from software. This has no effect for unprivileged access +unless the privilege level has been elevated through the System Control Registers. + +@param[in] sgin Unsigned int16. Interrupt number (0 ... 239) +*/ + +void nvic_generate_software_interrupt(u16 irqn) { if (irqn <= 239) NVIC_STIR |= irqn; -- cgit v1.2.3 From 9cff0c962b3bbfcde697100ac851d43be560b3d6 Mon Sep 17 00:00:00 2001 From: Ken Sarkies Date: Mon, 9 Jul 2012 17:12:27 +0930 Subject: Fix compile error --- lib/stm32/nvic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'lib') diff --git a/lib/stm32/nvic.c b/lib/stm32/nvic.c index ae91bff..ea502b3 100644 --- a/lib/stm32/nvic.c +++ b/lib/stm32/nvic.c @@ -145,7 +145,7 @@ u8 nvic_get_irq_enabled(u8 irqn) void nvic_set_priority(u8 irqn, u8 priority) { - NVIC_IPR(irqn / 4) = ((priority << ((irqn % 4) * 8)); + NVIC_IPR(irqn / 4) = (priority << ((irqn % 4) * 8)); } /*-----------------------------------------------------------------------------*/ -- cgit v1.2.3 From 0e5e451e2287c61e4ca046561b8daedd412a6bc8 Mon Sep 17 00:00:00 2001 From: Ken Sarkies Date: Tue, 14 Aug 2012 18:25:19 +0930 Subject: Revert nvic_set_priority to original form. Minor doxygen markup changes. --- include/libopencm3/stm32/f1/nvic_f1.h | 2 +- lib/stm32/nvic.c | 41 ++++++++++++++++++++--------------- 2 files changed, 25 insertions(+), 18 deletions(-) (limited to 'lib') diff --git a/include/libopencm3/stm32/f1/nvic_f1.h b/include/libopencm3/stm32/f1/nvic_f1.h index ce9a99e..99594ee 100644 --- a/include/libopencm3/stm32/f1/nvic_f1.h +++ b/include/libopencm3/stm32/f1/nvic_f1.h @@ -27,7 +27,7 @@ */ /* User Interrupts */ -/** @defgroup nvic_stn32f1_userint STM32F1xx User Interrupts +/** @defgroup nvic_stm32f1_userint STM32F1xx User Interrupts @ingroup STM32F_nvic_defines @{*/ diff --git a/lib/stm32/nvic.c b/lib/stm32/nvic.c index ea502b3..9fda91c 100644 --- a/lib/stm32/nvic.c +++ b/lib/stm32/nvic.c @@ -9,13 +9,15 @@ @author @htmlonly © @endhtmlonly 2010 Thomas Otto @author @htmlonly © @endhtmlonly 2012 Fergus Noble -@date 7 July 2012 +@date 14 August 2012 The STM32F series provides up to 68 maskable user interrupts for the STM32F10x series, and 87 for the STM32F2xx and STM32F4xx series. -The NVIC registers are defined by the ARM standards +The NVIC registers are defined by the ARM standards but the STM32F series have some +additional limitations @see Cortex-M3 Devices Generic User Guide +@see STM32F10xxx Cortex-M3 programming manual LGPL License Terms @ref lgpl_license @@ -47,7 +49,7 @@ LGPL License Terms @ref lgpl_license Enables a user interrupt. -@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stm32f1_userint */ void nvic_enable_irq(u8 irqn) @@ -60,7 +62,7 @@ void nvic_enable_irq(u8 irqn) Disables a user interrupt. -@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stm32f1_userint */ void nvic_disable_irq(u8 irqn) @@ -73,7 +75,7 @@ void nvic_disable_irq(u8 irqn) True if the interrupt has occurred and is waiting for service. -@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stm32f1_userint @return Boolean. Interrupt pending. */ @@ -85,10 +87,10 @@ u8 nvic_get_pending_irq(u8 irqn) /*-----------------------------------------------------------------------------*/ /** @brief NVIC Set Pending Interrupt -Force a user interrupt to a pending state. No effect if the interrupt is already -pending. +Force a user interrupt to a pending state. This has no effect if the interrupt +is already pending. -@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stm32f1_userint */ void nvic_set_pending_irq(u8 irqn) @@ -99,10 +101,10 @@ void nvic_set_pending_irq(u8 irqn) /*-----------------------------------------------------------------------------*/ /** @brief NVIC Clear Pending Interrupt -Force remove a user interrupt from a pending state. No effect if the interrupt is -actively being serviced. +Force remove a user interrupt from a pending state. This has no effect if the +interrupt is actively being serviced. -@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stm32f1_userint */ void nvic_clear_pending_irq(u8 irqn) @@ -115,7 +117,7 @@ void nvic_clear_pending_irq(u8 irqn) Interrupt has occurred and is currently being serviced. -@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stm32f1_userint @return Boolean. Interrupt active. */ @@ -127,7 +129,7 @@ u8 nvic_get_active_irq(u8 irqn) /*-----------------------------------------------------------------------------*/ /** @brief NVIC Return Enabled Interrupt -@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stm32f1_userint @return Boolean. Interrupt enabled. */ @@ -139,13 +141,18 @@ u8 nvic_get_irq_enabled(u8 irqn) /*-----------------------------------------------------------------------------*/ /** @brief NVIC Set Interrupt Priority -@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stn32f1_userint -@param[in] priority Unsigned int8. Interrupt priority (0 ... 255) +There are 16 priority levels only, given by the upper four bits of the priority +byte, as required by ARM standards. The priority levels are interpreted according +to the pre-emptive priority grouping set in the SCB Application Interrupt and Reset +Control Register (SCB_AIRCR), as done in @ref scb_set_priority_grouping. + +@param[in] irqn Unsigned int8. Interrupt number @ref nvic_stm32f1_userint +@param[in] priority Unsigned int8. Interrupt priority (0 ... 255 in steps of 16) */ void nvic_set_priority(u8 irqn, u8 priority) { - NVIC_IPR(irqn / 4) = (priority << ((irqn % 4) * 8)); + NVIC_IPR(irqn) = priority; } /*-----------------------------------------------------------------------------*/ @@ -154,7 +161,7 @@ void nvic_set_priority(u8 irqn, u8 priority) Generate an interrupt from software. This has no effect for unprivileged access unless the privilege level has been elevated through the System Control Registers. -@param[in] sgin Unsigned int16. Interrupt number (0 ... 239) +@param[in] irqn Unsigned int16. Interrupt number (0 ... 239) */ void nvic_generate_software_interrupt(u16 irqn) -- cgit v1.2.3 From 70b2376c9f8e008f7e5e8967206b73a2fe7926f9 Mon Sep 17 00:00:00 2001 From: Ken Sarkies Date: Sat, 18 Aug 2012 13:32:48 +0930 Subject: Update to doxygen comments to fix promiscuity problem (see later) --- include/libopencm3/stm32/f1/nvic_f1.h | 14 ++++++++++++++ include/libopencm3/stm32/nvic.h | 6 +++--- lib/stm32/nvic.c | 11 +++++++---- 3 files changed, 24 insertions(+), 7 deletions(-) (limited to 'lib') diff --git a/include/libopencm3/stm32/f1/nvic_f1.h b/include/libopencm3/stm32/f1/nvic_f1.h index 99594ee..bb0e03d 100644 --- a/include/libopencm3/stm32/f1/nvic_f1.h +++ b/include/libopencm3/stm32/f1/nvic_f1.h @@ -1,3 +1,17 @@ +/** @defgroup STM32F_nvic_f1_defines STM32F NVIC Defines + +@brief Defined Constants and Types for the STM32F1xx Nested Vectored Interrupt Controller + +@ingroup STM32F_defines + +@version 1.0.0 + +@author @htmlonly © @endhtmlonly 2010 Thomas Otto + +@date 18 August 2012 + +LGPL License Terms @ref lgpl_license + */ /* * This file is part of the libopencm3 project. * diff --git a/include/libopencm3/stm32/nvic.h b/include/libopencm3/stm32/nvic.h index f974483..f6a6075 100644 --- a/include/libopencm3/stm32/nvic.h +++ b/include/libopencm3/stm32/nvic.h @@ -1,9 +1,9 @@ -/** @file - -@ingroup STM32F +/** @defgroup STM32F_nvic_defines STM32F NVIC Defines @brief libopencm3 STM32F Nested Vectored Interrupt Controller +@ingroup STM32F_defines + @version 1.0.0 @author @htmlonly © @endhtmlonly 2010 Piotr Esden-Tempski diff --git a/lib/stm32/nvic.c b/lib/stm32/nvic.c index 9fda91c..e17e78c 100644 --- a/lib/stm32/nvic.c +++ b/lib/stm32/nvic.c @@ -1,6 +1,6 @@ -/** @file +/** @defgroup STM32F-nvic-file NVIC -@ingroup STM32F +@ingroup STM32F-files @brief libopencm3 STM32F Nested Vectored Interrupt Controller @@ -9,7 +9,7 @@ @author @htmlonly © @endhtmlonly 2010 Thomas Otto @author @htmlonly © @endhtmlonly 2012 Fergus Noble -@date 14 August 2012 +@date 18 August 2012 The STM32F series provides up to 68 maskable user interrupts for the STM32F10x series, and 87 for the STM32F2xx and STM32F4xx series. @@ -19,7 +19,6 @@ additional limitations @see Cortex-M3 Devices Generic User Guide @see STM32F10xxx Cortex-M3 programming manual - LGPL License Terms @ref lgpl_license */ /* @@ -42,6 +41,8 @@ LGPL License Terms @ref lgpl_license * along with this library. If not, see . */ +/**@{*/ + #include /*-----------------------------------------------------------------------------*/ @@ -169,3 +170,5 @@ void nvic_generate_software_interrupt(u16 irqn) if (irqn <= 239) NVIC_STIR |= irqn; } +/**@}*/ + -- cgit v1.2.3