From 4d02d36d6b16e96eda731c9adbbbadd694371700 Mon Sep 17 00:00:00 2001 From: Fergus Noble Date: Thu, 15 Sep 2011 16:26:39 -0700 Subject: Moving nvic code to common, adding F1 and F2 specific user interrupt definition headers. --- lib/stm32_common/nvic.c | 106 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 lib/stm32_common/nvic.c (limited to 'lib/stm32_common') diff --git a/lib/stm32_common/nvic.c b/lib/stm32_common/nvic.c new file mode 100644 index 0000000..cf77cc3 --- /dev/null +++ b/lib/stm32_common/nvic.c @@ -0,0 +1,106 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Thomas Otto + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see . + */ + +#include + +void nvic_enable_irq(u8 irqn) +{ + if (irqn < 32) + NVIC_ISER(0) |= (1 << irqn); + if ((irqn >= 32) & (irqn < 64)) + NVIC_ISER(1) |= (1 << (irqn - 32)); + if ((irqn >= 64) & (irqn < 68)) + NVIC_ISER(2) |= (1 << (irqn - 64)); +} + +void nvic_disable_irq(u8 irqn) +{ + if (irqn < 32) + NVIC_ICER(0) |= (1 << irqn); + if ((irqn >= 32) & (irqn < 64)) + NVIC_ICER(1) |= (1 << (irqn - 32)); + if ((irqn >= 64) & (irqn < 68)) + NVIC_ICER(2) |= (1 << (irqn - 64)); +} + +u8 nvic_get_pending_irq(u8 irqn) +{ + if (irqn < 32) + return (NVIC_ISPR(0) & (1 << irqn)); + if ((irqn >= 32) & (irqn < 64)) + return (NVIC_ISPR(1) & (1 << (irqn - 32))); + if ((irqn >= 64) & (irqn < 68)) + return (NVIC_ISPR(2) & (1 << (irqn - 64))); + return 0; +} + +void nvic_set_pending_irq(u8 irqn) +{ + if (irqn < 32) + NVIC_ISPR(0) |= (1 << irqn); + if ((irqn >= 32) & (irqn < 64)) + NVIC_ISPR(1) |= (1 << (irqn - 32)); + if ((irqn >= 64) & (irqn < 68)) + NVIC_ISPR(2) |= (1 << (irqn - 64)); +} + +void nvic_clear_pending_irq(u8 irqn) +{ + if (irqn < 32) + NVIC_ICPR(0) |= (1 << irqn); + if ((irqn >= 32) & (irqn < 64)) + NVIC_ICPR(1) |= (1 << (irqn - 32)); + if ((irqn >= 64) & (irqn < 68)) + NVIC_ICPR(2) |= (1 << (irqn - 64)); +} + +u8 nvic_get_active_irq(u8 irqn) +{ + if (irqn < 32) + return (NVIC_IABR(0) & (1 << irqn)); + if ((irqn >= 32) & (irqn < 64)) + return (NVIC_IABR(1) & (1 << (irqn - 32))); + if ((irqn >= 64) & (irqn < 68)) + return (NVIC_IABR(2) & (1 << (irqn - 64))); + return 0; +} + +u8 nvic_get_irq_enabled(u8 irqn) +{ + if (irqn < 32) + return (NVIC_ISER(0) & (1 << irqn)); + if ((irqn >= 32) & (irqn < 64)) + return (NVIC_ISER(1) & (1 << (irqn - 32))); + if ((irqn >= 64) & (irqn < 68)) + return (NVIC_ISER(2) & (1 << (irqn - 64))); + return 0; +} + +void nvic_set_priority(u8 irqn, u8 priority) +{ + NVIC_IPR(irqn/4) |= (priority << ((irqn % 4) * 8)); +} + +void nvic_generate_software_interrupt(u8 irqn) +{ + if (irqn <= 239) + NVIC_STIR |= irqn; +} + + -- cgit v1.2.3