From 5b8953124e8c00cdf05169de6e304834cefacf63 Mon Sep 17 00:00:00 2001 From: Ken Sarkies Date: Sat, 9 Mar 2013 14:39:01 +1030 Subject: This mainly moves the STM32 timers' code to the common area. F2 and F4 have a common section to deal with the options register (TIM2 and TIM5 only) L1 has been made common with timer_common_all as its options register has very different settings to F2/F4. Code is in the L1/timer.c L1/timer.h files Note that F3 and F05 timers should fit into this scheme, with F3 having additional features. Bundled with this is L1/pwr.h to change a documentation setting Also all the Doxyfiles have added "ENABLE_PREPROCESSING = NO" to fix a problem introduced by commit 118. --- lib/stm32/l1/Makefile | 10 ++++----- lib/stm32/l1/timer.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 64 insertions(+), 5 deletions(-) create mode 100644 lib/stm32/l1/timer.c (limited to 'lib/stm32/l1') diff --git a/lib/stm32/l1/Makefile b/lib/stm32/l1/Makefile index e081daf..8633016 100644 --- a/lib/stm32/l1/Makefile +++ b/lib/stm32/l1/Makefile @@ -32,11 +32,11 @@ CFLAGS = -Os -g \ -ffunction-sections -fdata-sections -MD -DSTM32L1 # ARFLAGS = rcsv ARFLAGS = rcs -OBJS = rcc.o desig.o crc.o usart.o exti2.o flash.o timer.o -OBJS += gpio_common_all.o gpio_common_f24.o spi_common_all.o crc_common_all.o -OBJS += dac_common_all.o usart_common_all.o iwdg_common_all.o i2c_common_all.o -OBJS += pwr_common_all.o pwr.o -OBJS += rtc_common_bcd.o +OBJS = crc.o desig.o exti2.o flash.o rcc.o usart.o +OBJS += crc_common_all.o dac_common_all.o gpio_common_all.o +OBJS += gpio_common_f24.o i2c_common_all.o iwdg_common_all.o +OBJS += pwr_common_all.o pwr.o rtc_common_bcd.o +OBJS += spi_common_all.o timer_common_all.o usart_common_all.o VPATH += ../../usb:../:../../cm3:../common diff --git a/lib/stm32/l1/timer.c b/lib/stm32/l1/timer.c new file mode 100644 index 0000000..053c501 --- /dev/null +++ b/lib/stm32/l1/timer.c @@ -0,0 +1,59 @@ +/** @defgroup timer_file Timers + +@ingroup STM32L1xx + +@brief libopencm3 STM32L1xx Timers + +@version 1.0.0 + +@date 18 August 2012 + +*/ + +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Edward Cheeseman + * Copyright (C) 2011 Stephen Caudle + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +/**@{*/ + +#include +#include + +/*---------------------------------------------------------------------------*/ +/** @brief Set Timer Option + +Set timer options register on TIM2 or TIM3, used for trigger remapping. + +@param[in] timer_peripheral Unsigned int32. Timer register address base +@returns Unsigned int32. Option flags TIM2: @ref tim2_opt_trigger_remap, TIM3: @ref tim3_opt_trigger_remap. +*/ + +void timer_set_option(u32 timer_peripheral, u32 option) +{ + if (timer_peripheral == TIM2) { + TIM_OR(timer_peripheral) &= ~TIM2_OR_ITR1_RMP_MASK; + TIM_OR(timer_peripheral) |= option; + } else if (timer_peripheral == TIM3) { + TIM_OR(timer_peripheral) &= ~TIM3_OR_ITR2_RMP_MASK; + TIM_OR(timer_peripheral) |= option; + } +} + +/**@}*/ + -- cgit v1.2.3