From d7a7fd9d3037a5e490be3e73027a11f779d7d35c Mon Sep 17 00:00:00 2001 From: TitanMKD Date: Tue, 5 Jun 2012 01:41:54 +0200 Subject: * Added SSP Driver (Not Tested). * Replaced leading space by tabulations. --- lib/lpc43xx/Makefile | 2 +- lib/lpc43xx/scu.c | 36 +++++++------- lib/lpc43xx/ssp.c | 132 +++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 151 insertions(+), 19 deletions(-) create mode 100644 lib/lpc43xx/ssp.c (limited to 'lib/lpc43xx') diff --git a/lib/lpc43xx/Makefile b/lib/lpc43xx/Makefile index 041e3bc..54c788b 100644 --- a/lib/lpc43xx/Makefile +++ b/lib/lpc43xx/Makefile @@ -31,7 +31,7 @@ CFLAGS = -O2 -g -Wall -Wextra -I../../include -fno-common \ -mfloat-abi=hard -mfpu=fpv4-sp-d16 # ARFLAGS = rcsv ARFLAGS = rcs -OBJS = gpio.o vector.o scu.o +OBJS = gpio.o vector.o scu.o ssp.o # VPATH += ../usb diff --git a/lib/lpc43xx/scu.c b/lib/lpc43xx/scu.c index bc495cd..addf5e2 100644 --- a/lib/lpc43xx/scu.c +++ b/lib/lpc43xx/scu.c @@ -1,28 +1,28 @@ /* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2012 Benjamin Vernoux - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ +* This file is part of the libopencm3 project. +* +* Copyright (C) 2012 Benjamin Vernoux +* +* This library is free software: you can redistribute it and/or modify +* it under the terms of the GNU Lesser General Public License as published by +* the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* This library is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU Lesser General Public License for more details. +* +* You should have received a copy of the GNU Lesser General Public License +* along with this library. If not, see . +*/ #include /* For pin_conf_normal value see scu.h define SCU_CONF_XXX or Configuration for different I/O pins types */ void scu_pinmux(scu_grp_pin_t group_pin, u32 scu_conf) { - MMIO32(group_pin) = scu_conf; + MMIO32(group_pin) = scu_conf; } /* For other special SCU register USB1, I2C0, ADC0/1, DAC, EMC clock delay See scu.h */ diff --git a/lib/lpc43xx/ssp.c b/lib/lpc43xx/ssp.c new file mode 100644 index 0000000..ba7026e --- /dev/null +++ b/lib/lpc43xx/ssp.c @@ -0,0 +1,132 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2012 Benjamin Vernoux + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include +#include + +#define CGU_SRC_32K 0x00 +#define CGU_SRC_IRC 0x01 +#define CGU_SRC_ENET_RX 0x02 +#define CGU_SRC_ENET_TX 0x03 +#define CGU_SRC_GP_CLKIN 0x04 +#define CGU_SRC_XTAL 0x06 +#define CGU_SRC_PLL0USB 0x07 +#define CGU_SRC_PLL0AUDIO 0x08 +#define CGU_SRC_PLL1 0x09 +#define CGU_SRC_IDIVA 0x0C +#define CGU_SRC_IDIVB 0x0D +#define CGU_SRC_IDIVC 0x0E +#define CGU_SRC_IDIVD 0x0F +#define CGU_SRC_IDIVE 0x10 + +#define CGU_AUTOBLOCK_CLOCK_BIT 11 +#define CGU_BASE_CLK_SEL_SHIFT 24 /* clock source selection (5 bits) */ + +/* Disable SSP */ +void ssp_disable(ssp_num_t ssp_num) +{ + u32 ssp_port; + + if(ssp_num == SSP0_NUM) + { + ssp_port = SSP0; + }else + { + ssp_port = SSP1; + } + /* Disable SSP */ + SSP_CR1(ssp_port) = 0x0; +} + +/* +* SSP Init function +*/ +void ssp_init(ssp_num_t ssp_num, + ssp_datasize_t data_size, + ssp_frame_format_t frame_format, + ssp_cpol_cpha_t cpol_cpha_format, + u8 serial_clock_rate, + ssp_mode_t mode, + ssp_master_slave_t master_slave, + ssp_slave_option_t slave_option) +{ + u32 ssp_port; + u32 clock; + + if(ssp_num == SSP0_NUM) + { + ssp_port = SSP0; + }else + { + ssp_port = SSP1; + } + + /* use PLL1 as clock source for SSP1 */ + CGU_BASE_SSP1_CLK = (CGU_SRC_PLL1<