From fbb05e1536f4df842781327002eb74aec62a7ba1 Mon Sep 17 00:00:00 2001 From: Thomas Otto Date: Mon, 3 May 2010 19:23:56 +0200 Subject: Changed defs POWER->PWR to be in sync with datasheet. --- include/libopenstm32/power.h | 54 ++++++++++++++++++++++---------------------- 1 file changed, 27 insertions(+), 27 deletions(-) (limited to 'include') diff --git a/include/libopenstm32/power.h b/include/libopenstm32/power.h index 811c6ba..1a489d3 100644 --- a/include/libopenstm32/power.h +++ b/include/libopenstm32/power.h @@ -17,67 +17,67 @@ * along with this program. If not, see . */ -#ifndef LIBOPENSTM32_POWER_H -#define LIBOPENSTM32_POWER_H +#ifndef LIBOPENSTM32_PWR_H +#define LIBOPENSTM32_PWR_H #include #include -/* --- POWER registers ----------------------------------------------------- */ +/* --- PWR registers ------------------------------------------------------- */ /* Power control register (PWR_CR) */ -#define POWER_CR MMIO32(POWER_CONTROL_BASE + 0x00) +#define PWR_CR MMIO32(POWER_CONTROL_BASE + 0x00) /* Power control/status register (PWR_CSR) */ -#define POWER_CSR MMIO32(POWER_CONTROL_BASE + 0x04) +#define PWR_CSR MMIO32(POWER_CONTROL_BASE + 0x04) -/* --- POWER_CR values ----------------------------------------------------- */ +/* --- PWR_CR values ------------------------------------------------------- */ /* DBP: Disable backup domain write protection */ -#define POWER_CR_DBP (1 << 8) +#define PWR_CR_DBP (1 << 8) /* PLS[7:5]: PVD level selection */ -#define POWER_CR_PLS_LSB 5 -#define POWER_CR_PLS_2V2 0x0 -#define POWER_CR_PLS_2V3 0x1 -#define POWER_CR_PLS_2V4 0x2 -#define POWER_CR_PLS_2V5 0x3 -#define POWER_CR_PLS_2V6 0x4 -#define POWER_CR_PLS_2V7 0x5 -#define POWER_CR_PLS_2V8 0x6 -#define POWER_CR_PLS_2V9 0x7 +#define PWR_CR_PLS_LSB 5 +#define PWR_CR_PLS_2V2 0x0 +#define PWR_CR_PLS_2V3 0x1 +#define PWR_CR_PLS_2V4 0x2 +#define PWR_CR_PLS_2V5 0x3 +#define PWR_CR_PLS_2V6 0x4 +#define PWR_CR_PLS_2V7 0x5 +#define PWR_CR_PLS_2V8 0x6 +#define PWR_CR_PLS_2V9 0x7 /* PVDE: Power voltage detector enable */ -#define POWER_CR_PVDE (1 << 4) +#define PWR_CR_PVDE (1 << 4) /* CSBF: Clear standby flag */ -#define POWER_CR_CSBF (1 << 3) +#define PWR_CR_CSBF (1 << 3) /* CWUF: Clear wakeup flag */ -#define POWER_CR_CWUF (1 << 2) +#define PWR_CR_CWUF (1 << 2) /* PDDS: Power down deepsleep */ -#define POWER_CR_PDDS (1 << 1) +#define PWR_CR_PDDS (1 << 1) /* LPDS: Low-power deepsleep */ -#define POWER_CR_LPDS (1 << 0) +#define PWR_CR_LPDS (1 << 0) -/* --- POWER_CSR values ---------------------------------------------------- */ +/* --- PWR_CSR values ------------------------------------------------------ */ /* EWUP: Enable WKUP pin */ -#define POWER_CSR_EWUP (1 << 8) +#define PWR_CSR_EWUP (1 << 8) /* PVDO: PVD output */ -#define POWER_CSR_PVDO (1 << 2) +#define PWR_CSR_PVDO (1 << 2) /* SBF: Standby flag */ -#define POWER_CSR_SBF (1 << 1) +#define PWR_CSR_SBF (1 << 1) /* WUF: Wakeup flag */ -#define POWER_CSR_WUF (1 << 0) +#define PWR_CSR_WUF (1 << 0) -/* --- POWER function prototypes ------------------------------------------- */ +/* --- PWR function prototypes ------------------------------------------- */ #endif -- cgit v1.2.3