From 8f251e8a9d46634be4741f7f1aef3d52fb1b7dba Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Fri, 31 Dec 2010 18:18:39 +0100 Subject: Some more file/path restructuring. All #includes now explicitly use the "" format. If you want to get rid of the "libopencm3" prefix in your local project you can add a respective -I entry in your Makefile (not recommended though). All .ld files and .a libs are installed in $(TOOLCHAIN_DIR)/lib directly (as before), but are now renamed to avoid potential conflicts now or in the future. Examples: libopencm3_lpc13xx.a libopencm3_lpc13xx.ld libopencm3_stm32.a libopencm3_stm32.ld --- include/lpc13xx/gpio.h | 100 -------------------------------------------- include/lpc13xx/memorymap.h | 58 ------------------------- 2 files changed, 158 deletions(-) delete mode 100644 include/lpc13xx/gpio.h delete mode 100644 include/lpc13xx/memorymap.h (limited to 'include/lpc13xx') diff --git a/include/lpc13xx/gpio.h b/include/lpc13xx/gpio.h deleted file mode 100644 index 9dca1bd..0000000 --- a/include/lpc13xx/gpio.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Uwe Hermann - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef LPC13XX_GPIO_H -#define LPC13XX_GPIO_H - -#include -#include - -/* --- Convenience macros -------------------------------------------------- */ - -/* GPIO port base addresses (for convenience) */ -#define GPIO0 GPIO_PIO0_BASE -#define GPIO1 GPIO_PIO1_BASE -#define GPIO2 GPIO_PIO2_BASE -#define GPIO3 GPIO_PIO3_BASE - -/* --- GPIO registers ------------------------------------------------------ */ - -/* GPIO data register (GPIOn_DATA) */ -#define GPIO_DATA(port) MMIO32(port + 0x3ffc) -#define GPIO0_DATA GPIO_DATA(GPIO0) -#define GPIO1_DATA GPIO_DATA(GPIO1) -#define GPIO2_DATA GPIO_DATA(GPIO2) -#define GPIO3_DATA GPIO_DATA(GPIO3) - -/* GPIO data direction register (GPIOn_DIR) */ -#define GPIO_DIR(port) MMIO32(port + 0x00) -#define GPIO0_DIR GPIO_DIR(GPIO0) -#define GPIO1_DIR GPIO_DIR(GPIO1) -#define GPIO2_DIR GPIO_DIR(GPIO2) -#define GPIO3_DIR GPIO_DIR(GPIO3) - -/* GPIO interrupt sense register (GPIOn_IS) */ -#define GPIO_IS(port) MMIO32(port + 0x04) -#define GPIO0_IS GPIO_IS(GPIO0) -#define GPIO1_IS GPIO_IS(GPIO1) -#define GPIO2_IS GPIO_IS(GPIO2) -#define GPIO3_IS GPIO_IS(GPIO3) - -/* GPIO interrupt both edges sense register (GPIOn_IBE) */ -#define GPIO_IBE(port) MMIO32(port + 0x08) -#define GPIO0_IBE GPIO_IBE(GPIO0) -#define GPIO1_IBE GPIO_IBE(GPIO1) -#define GPIO2_IBE GPIO_IBE(GPIO2) -#define GPIO3_IBE GPIO_IBE(GPIO3) - -/* GPIO interrupt event register (GPIOn_IEV) */ -#define GPIO_IEV(port) MMIO32(port + 0x0c) -#define GPIO0_IEV GPIO_IEV(GPIO0) -#define GPIO1_IEV GPIO_IEV(GPIO1) -#define GPIO2_IEV GPIO_IEV(GPIO2) -#define GPIO3_IEV GPIO_IEV(GPIO3) - -/* GPIO interrupt mask register (GPIOn_IE) */ -#define GPIO_IE(port) MMIO16(port + 0x10) -#define GPIO0_IE GPIO_IE(GPIO0) -#define GPIO1_IE GPIO_IE(GPIO1) -#define GPIO2_IE GPIO_IE(GPIO2) -#define GPIO3_IE GPIO_IE(GPIO3) - -/* FIXME: IRS or RIS? Datasheet is not consistent here. */ -/* GPIO raw interrupt status register (GPIOn_IRS) */ -#define GPIO_IRS(port) MMIO16(port + 0x14) -#define GPIO0_IRS GPIO_IRS(GPIO0) -#define GPIO1_IRS GPIO_IRS(GPIO1) -#define GPIO2_IRS GPIO_IRS(GPIO2) -#define GPIO3_IRS GPIO_IRS(GPIO3) - -/* GPIO masked interrupt status register (GPIOn_MIS) */ -#define GPIO_MIS(port) MMIO16(port + 0x18) -#define GPIO0_MIS GPIO_MIS(GPIO0) -#define GPIO1_MIS GPIO_MIS(GPIO1) -#define GPIO2_MIS GPIO_MIS(GPIO2) -#define GPIO3_MIS GPIO_MIS(GPIO3) - -/* GPIO interrupt clear register (GPIOn_IC) */ -#define GPIO_IC(port) MMIO16(port + 0x1c) -#define GPIO0_IC GPIO_IC(GPIO0) -#define GPIO1_IC GPIO_IC(GPIO1) -#define GPIO2_IC GPIO_IC(GPIO2) -#define GPIO3_IC GPIO_IC(GPIO3) - -#endif diff --git a/include/lpc13xx/memorymap.h b/include/lpc13xx/memorymap.h deleted file mode 100644 index d4e1390..0000000 --- a/include/lpc13xx/memorymap.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Uwe Hermann - * - * This program is free software: you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - */ - -#ifndef LPC13XX_MEMORYMAP_H -#define LPC13XX_MEMORYMAP_H - -#include - -/* --- LPC13XX specific peripheral definitions ----------------------------- */ - -/* Memory map for all busses */ -#define PERIPH_BASE_APB 0x40000000 -#define PERIPH_BASE_AHB 0x50000000 - -/* Register boundary addresses */ - -/* APB */ -#define I2C_BASE (PERIPH_BASE_APB + 0x00000) -#define WDT_BASE (PERIPH_BASE_APB + 0x04000) -#define UART_BASE (PERIPH_BASE_APB + 0x08000) -#define TIMER0_16BIT_BASE (PERIPH_BASE_APB + 0x0c000) -#define TIMER1_16BIT_BASE (PERIPH_BASE_APB + 0x10000) -#define TIMER0_32BIT_BASE (PERIPH_BASE_APB + 0x14000) -#define TIMER1_32BIT_BASE (PERIPH_BASE_APB + 0x18000) -#define ADC_BASE (PERIPH_BASE_APB + 0x1c000) -#define USB_BASE (PERIPH_BASE_APB + 0x20000) -/* PERIPH_BASE_APB + 0x28000 (0x4002 8000 - 0x4003 7FFF): Reserved */ -#define PMU_BASE (PERIPH_BASE_APB + 0x38000) -#define FLASH_BASE (PERIPH_BASE_APB + 0x3c000) -#define SSP_BASE (PERIPH_BASE_APB + 0x40000) -#define IOCONFIG_BASE (PERIPH_BASE_APB + 0x44000) -#define SYSCTRL_BASE (PERIPH_BASE_APB + 0x48000) -/* PERIPH_BASE_APB + 0x4c000 (0x4004 c000 - 0x4007 FFFF): Reserved */ - -/* AHB */ -#define GPIO_PIO0_BASE (PERIPH_BASE_AHB + 0x00000) -#define GPIO_PIO1_BASE (PERIPH_BASE_AHB + 0x10000) -#define GPIO_PIO2_BASE (PERIPH_BASE_AHB + 0x20000) -#define GPIO_PIO3_BASE (PERIPH_BASE_AHB + 0x30000) -/* PERIPH_BASE_AHB + 0x40000 (0x5004 0000 - 0x501F FFFF): Reserved */ - -#endif -- cgit v1.2.3