From 07b6ca3a90dd5e4c75cd24b79454a96a0510583d Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Mon, 20 Jul 2009 15:28:41 +0200 Subject: Add RCC_CSR bit definitions and a osc_t enum. --- include/libopenstm32/rcc.h | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) (limited to 'include/libopenstm32') diff --git a/include/libopenstm32/rcc.h b/include/libopenstm32/rcc.h index d65f9f3..5674824 100644 --- a/include/libopenstm32/rcc.h +++ b/include/libopenstm32/rcc.h @@ -57,9 +57,9 @@ /* --- RCC_CFGR values ----------------------------------------------------- */ /* SW: System clock switch */ -#define SW_SYSCLKSEL_HSICLK 0x0 -#define SW_SYSCLKSEL_HSECLK 0x1 -#define SW_SYSCLKSEL_PLLCLK 0x2 +#define SW_SYSCLKSEL_HSICLK 0x0 +#define SW_SYSCLKSEL_HSECLK 0x1 +#define SW_SYSCLKSEL_PLLCLK 0x2 /* SWS: System clock switch status: Uses same bit definitions as SW. */ @@ -118,7 +118,7 @@ #define PLLMUL_PLLCLK_MUL14 0xc #define PLLMUL_PLLCLK_MUL15 0xd #define PLLMUL_PLLCLK_MUL16 0xe -// #define PLLMUL_PLLCLK_MUL16 0xf /* Errata? 17? */ +// #define PLLMUL_PLLCLK_MUL16 0xf /* Errata? 17? */ /* USBPRE: USB prescaler */ #define USBPRE_PLLCLK_DIV1_5 0x0 @@ -223,4 +223,20 @@ #define RTCEN (1 << 15) #define BDRST (1 << 16) +/* --- RCC_CSR values -------------------------------------------------- */ + +#define LSION (1 << 0) +#define LSIRDY (1 << 1) +#define RMVF (1 << 24) +#define PINRSTF (1 << 26) +#define PORRSTF (1 << 27) +#define SFTRSTF (1 << 28) +#define IWDGRSTF (1 << 29) +#define WWDGRSTF (1 << 30) +#define LPWRRSTF (1 << 31) + +typedef enum { + PLL, HSE, HSI, LSE, LSI +} osc_t; + #endif -- cgit v1.2.3