From 2306c907abc5d7e0f54318a6c14bf198706cee0b Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Tue, 22 Jan 2013 22:43:48 +0000 Subject: [l1] Update to newest ref man definitions Support for the Medium+ and High density parts, mostly by way of extra irqs and register definitions. --- include/libopencm3/stm32/l1/irq.yaml | 19 ++++++++++++++++--- include/libopencm3/stm32/l1/memorymap.h | 7 +++++-- 2 files changed, 21 insertions(+), 5 deletions(-) (limited to 'include/libopencm3') diff --git a/include/libopencm3/stm32/l1/irq.yaml b/include/libopencm3/stm32/l1/irq.yaml index c2f118f..a10e96c 100644 --- a/include/libopencm3/stm32/l1/irq.yaml +++ b/include/libopencm3/stm32/l1/irq.yaml @@ -4,8 +4,8 @@ partname_doxygen: STM32L1 irqs: - wwdg - pvd - - tamper - - rtc + - tamper_stamp + - rtc_wkup - flash - rcc - exti0 @@ -44,6 +44,19 @@ irqs: - usart3 - exti15_10 - rtc_alarm - - usb_wakeup + - usb_fs_wakeup - tim6 - tim7 + # below here is medium+/high density + - sdio + - tim5 + - spi3 + - uart4 + - uart5 + - dma2_ch1 + - dma2_ch2 + - dma2_ch3 + - dma2_ch4 + - dma2_ch5 + - aes + - comp_acq \ No newline at end of file diff --git a/include/libopencm3/stm32/l1/memorymap.h b/include/libopencm3/stm32/l1/memorymap.h index d89dbd6..60f1c57 100644 --- a/include/libopencm3/stm32/l1/memorymap.h +++ b/include/libopencm3/stm32/l1/memorymap.h @@ -47,7 +47,6 @@ #define IWDG_BASE (PERIPH_BASE_APB1 + 0x3000) /* PERIPH_BASE_APB1 + 0x3400 (0x4000 3400 - 0x4000 37FF): Reserved */ #define SPI2_BASE (PERIPH_BASE_APB1 + 0x3800) -// datasheet has an error? here #define SPI3_BASE (PERIPH_BASE_APB1 + 0x3c00) /* PERIPH_BASE_APB1 + 0x4000 (0x4000 4000 - 0x4000 3FFF): Reserved */ #define USART2_BASE (PERIPH_BASE_APB1 + 0x4400) @@ -61,6 +60,7 @@ /* gap */ #define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000) #define DAC_BASE (PERIPH_BASE_APB1 + 0x7400) +#define OPAMP_BASE (PERIPH_BASE_APB1 + 0x7c5c) #define COMP_BASE (PERIPH_BASE_APB1 + 0x7c00) #define ROUTING_BASE (PERIPH_BASE_APB1 + 0x7c04) @@ -85,13 +85,16 @@ #define GPIO_PORT_D_BASE (PERIPH_BASE_AHB + 0x00c00) #define GPIO_PORT_E_BASE (PERIPH_BASE_AHB + 0x01000) #define GPIO_PORT_H_BASE (PERIPH_BASE_AHB + 0x01400) +#define GPIO_PORT_F_BASE (PERIPH_BASE_AHB + 0x01800) +#define GPIO_PORT_G_BASE (PERIPH_BASE_AHB + 0x01c00) /* gap */ #define CRC_BASE (PERIPH_BASE_AHB + 0x03000) /* gap */ #define RCC_BASE (PERIPH_BASE_AHB + 0x03800) #define FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB + 0x03c00) /* gap */ -#define DMA_BASE (PERIPH_BASE_AHB + 0x06000) +#define DMA1_BASE (PERIPH_BASE_AHB + 0x06000) +#define DMA2_BASE (PERIPH_BASE_AHB + 0x04000) /* PPIB */ #define DBGMCU_BASE (PPBI_BASE + 0x00042000) -- cgit v1.2.3