From 06620040aacdc0e88ee2fcc3cfa379ceea2032a9 Mon Sep 17 00:00:00 2001 From: Ken Sarkies Date: Mon, 28 May 2012 21:38:55 +0930 Subject: Header files for Doxygen group structure, layout changes to headings, example markup in stm32f1/ rcc --- include/libopencm3/stm32/f1/doc-stm32f1.h | 13 +++++++++++ include/libopencm3/stm32/f1/rcc.h | 39 +++++++++++++++++++++++++++++++ 2 files changed, 52 insertions(+) create mode 100644 include/libopencm3/stm32/f1/doc-stm32f1.h (limited to 'include/libopencm3/stm32') diff --git a/include/libopencm3/stm32/f1/doc-stm32f1.h b/include/libopencm3/stm32/f1/doc-stm32f1.h new file mode 100644 index 0000000..33bae3a --- /dev/null +++ b/include/libopencm3/stm32/f1/doc-stm32f1.h @@ -0,0 +1,13 @@ +/** @defgroup STM32F1xx_defines + +@brief Defined Constants and Types for the STM32F1xx series + +@ingroup STM32F1xx + +@version 1.0.0 + +@date 24 May 2012 + +LGPL License Terms @ref lgpl_license + */ + diff --git a/include/libopencm3/stm32/f1/rcc.h b/include/libopencm3/stm32/f1/rcc.h index 9cbe1e7..3d199a3 100644 --- a/include/libopencm3/stm32/f1/rcc.h +++ b/include/libopencm3/stm32/f1/rcc.h @@ -1,3 +1,27 @@ +/** @file + +@ingroup STM32F1xx + +@brief libopencm3 STM32F1xx Reset and Clock Control + +@version 1.0.0 + +@author @htmlonly © @endhtmlonly 2009 Federico Ruiz-Ugalde \ +@author @htmlonly © @endhtmlonly 2009 Uwe Hermann + +@date 18 May 2012 + +LGPL License Terms @ref lgpl_license + */ +/** @defgroup STM32F1xx_rcc_defines + +@brief Defined Constants and Types for the STM32F1xx Reset and Clock Control + +@ingroup STM32F1xx_defines + +LGPL License Terms @ref lgpl_license + + */ /* * This file is part of the libopencm3 project. * @@ -230,6 +254,10 @@ /* --- RCC_AHBENR values --------------------------------------------------- */ +/** @defgroup rcc_ahbenr_en RCC_AHBENR enable values +@ingroup STM32F1xx_rcc_defines + +@{*/ #define RCC_AHBENR_ETHMACENRX (1 << 16) #define RCC_AHBENR_ETHMACENTX (1 << 15) #define RCC_AHBENR_ETHMACEN (1 << 14) @@ -241,9 +269,14 @@ #define RCC_AHBENR_SRAMEN (1 << 2) #define RCC_AHBENR_DMA2EN (1 << 1) #define RCC_AHBENR_DMA1EN (1 << 0) +/*@}*/ /* --- RCC_APB2ENR values -------------------------------------------------- */ +/** @defgroup rcc_apb2enr_en RCC_APB2ENR enable values +@ingroup STM32F1xx_rcc_defines + +@{*/ #define RCC_APB2ENR_ADC3EN (1 << 15) /* (XX) */ #define RCC_APB2ENR_USART1EN (1 << 14) #define RCC_APB2ENR_TIM8EN (1 << 13) /* (XX) */ @@ -259,9 +292,14 @@ #define RCC_APB2ENR_IOPBEN (1 << 3) #define RCC_APB2ENR_IOPAEN (1 << 2) #define RCC_APB2ENR_AFIOEN (1 << 0) +/*@}*/ /* --- RCC_APB1ENR values -------------------------------------------------- */ +/** @defgroup rcc_apb1enr_en RCC_APB1ENR enable values +@ingroup STM32F1xx_rcc_defines + +@{*/ #define RCC_APB1ENR_DACEN (1 << 29) #define RCC_APB1ENR_PWREN (1 << 28) #define RCC_APB1ENR_BKPEN (1 << 27) @@ -284,6 +322,7 @@ #define RCC_APB1ENR_TIM4EN (1 << 2) #define RCC_APB1ENR_TIM3EN (1 << 1) #define RCC_APB1ENR_TIM2EN (1 << 0) +/*@}*/ /* --- RCC_BDCR values ----------------------------------------------------- */ -- cgit v1.2.3