From 60788fd9d2bfc8741190cb11c96251fb2f056ea0 Mon Sep 17 00:00:00 2001 From: Taylor Vesely Date: Wed, 21 Mar 2012 15:51:26 -0600 Subject: Started porting to LPC17xx. Created file stubs and started conversion. --- include/libopencm3/lpc17xx/gpio.h | 0 include/libopencm3/lpc17xx/memorymap.h | 68 ++++++++++++++++++++++++++++++++++ 2 files changed, 68 insertions(+) create mode 100644 include/libopencm3/lpc17xx/gpio.h create mode 100644 include/libopencm3/lpc17xx/memorymap.h (limited to 'include/libopencm3/lpc17xx') diff --git a/include/libopencm3/lpc17xx/gpio.h b/include/libopencm3/lpc17xx/gpio.h new file mode 100644 index 0000000..e69de29 diff --git a/include/libopencm3/lpc17xx/memorymap.h b/include/libopencm3/lpc17xx/memorymap.h new file mode 100644 index 0000000..879a97d --- /dev/null +++ b/include/libopencm3/lpc17xx/memorymap.h @@ -0,0 +1,68 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Uwe Hermann + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#ifndef LPC17XX_MEMORYMAP_H +#define LPC17XX_MEMORYMAP_H + +#include + +/* --- LPC17XX specific peripheral definitions ----------------------------- */ + +/* Memory map for all busses */ +#define PERIPH_BASE_APB 0x40000000 +#define PERIPH_BASE_AHB 0x20000000 + +/* Register boundary addresses */ + +/* APB */ +#define WDT_BASE (PERIPH_BASE_APB + 0x00000) +#define TIMER0_BASE (PERIPH_BASE_APB + 0x04000) +#define TIMER1_BASE (PERIPH_BASE_APB + 0x08000) +#define TIMER0_16BIT_BASE (PERIPH_BASE_APB + 0x0c000) +#define TIMER1_16BIT_BASE (PERIPH_BASE_APB + 0x10000) +#define TIMER0_32BIT_BASE (PERIPH_BASE_APB + 0x14000) +#define TIMER1_32BIT_BASE (PERIPH_BASE_APB + 0x18000) +#define ADC_BASE (PERIPH_BASE_APB + 0x1c000) +#define USB_BASE (PERIPH_BASE_APB + 0x20000) + +#define I2C_BASE (PERIPH_BASE_APB + 0x00000) +#define WDT_BASE (PERIPH_BASE_APB + 0x04000) +#define UART_BASE (PERIPH_BASE_APB + 0x08000) +#define TIMER0_16BIT_BASE (PERIPH_BASE_APB + 0x0c000) +#define TIMER1_16BIT_BASE (PERIPH_BASE_APB + 0x10000) +#define TIMER0_32BIT_BASE (PERIPH_BASE_APB + 0x14000) +#define TIMER1_32BIT_BASE (PERIPH_BASE_APB + 0x18000) +#define ADC_BASE (PERIPH_BASE_APB + 0x1c000) +#define USB_BASE (PERIPH_BASE_APB + 0x20000) +/* PERIPH_BASE_APB + 0x28000 (0x4002 8000 - 0x4003 7FFF): Reserved */ +#define PMU_BASE (PERIPH_BASE_APB + 0x38000) +#define FLASH_BASE (PERIPH_BASE_APB + 0x3c000) +#define SSP_BASE (PERIPH_BASE_APB + 0x40000) +#define IOCONFIG_BASE (PERIPH_BASE_APB + 0x44000) +#define SYSCTRL_BASE (PERIPH_BASE_APB + 0x48000) +/* PERIPH_BASE_APB + 0x4c000 (0x4004 c000 - 0x4007 FFFF): Reserved */ + +/* AHB */ +#define GPIO_PIO0_BASE (PERIPH_BASE_AHB + 0x00000) +#define GPIO_PIO1_BASE (PERIPH_BASE_AHB + 0x10000) +#define GPIO_PIO2_BASE (PERIPH_BASE_AHB + 0x20000) +#define GPIO_PIO3_BASE (PERIPH_BASE_AHB + 0x30000) +/* PERIPH_BASE_AHB + 0x40000 (0x5004 0000 - 0x501F FFFF): Reserved */ + +#endif -- cgit v1.2.3