From 34beeae925798dc49ad79f2f8c47aeaee7d8262a Mon Sep 17 00:00:00 2001 From: Jason Kotzin Date: Thu, 16 Aug 2012 18:50:38 -0700 Subject: USB core updated for reentrance based on Christian Cier-Zniewski's branch --- examples/stm32/f1/lisa-m-1/usb_cdcacm/cdcacm.c | 28 +++++++++-------- examples/stm32/f1/lisa-m-1/usb_dfu/usbdfu.c | 18 +++++++---- examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c | 29 ++++++++++------- examples/stm32/f1/other/usb_cdcacm/cdcacm.c | 28 +++++++++-------- examples/stm32/f1/other/usb_dfu/usbdfu.c | 18 +++++++---- examples/stm32/f1/other/usb_hid/usbhid.c | 30 +++++++++++------- examples/stm32/f1/stm32-h103/usb_cdcacm/cdcacm.c | 36 +++++++++++++--------- examples/stm32/f1/stm32-h103/usb_dfu/usbdfu.c | 22 ++++++++----- examples/stm32/f1/stm32-h103/usb_hid/usbhid.c | 32 ++++++++++++------- examples/stm32/f1/stm32-h103/usb_iap/usbiap.c | 22 ++++++++----- .../stm32/f1/stm32-h107/usb_simple/usb_simple.c | 14 ++++++--- .../stm32/f4/stm32f4-discovery/usb_cdcacm/cdcacm.c | 32 ++++++++++--------- 12 files changed, 190 insertions(+), 119 deletions(-) (limited to 'examples') diff --git a/examples/stm32/f1/lisa-m-1/usb_cdcacm/cdcacm.c b/examples/stm32/f1/lisa-m-1/usb_cdcacm/cdcacm.c index 7ef9b62..08efa46 100644 --- a/examples/stm32/f1/lisa-m-1/usb_cdcacm/cdcacm.c +++ b/examples/stm32/f1/lisa-m-1/usb_cdcacm/cdcacm.c @@ -164,11 +164,12 @@ static const char *usb_strings[] = { "DEMO", }; -static int cdcacm_control_request(struct usb_setup_data *req, u8 **buf, - u16 *len, void (**complete)(struct usb_setup_data *req)) +static int cdcacm_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, + u16 *len, void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { (void)complete; (void)buf; + (void)usbd_dev; switch (req->bRequest) { case USB_CDC_REQ_SET_CONTROL_LINE_STATE: { @@ -200,15 +201,15 @@ static int cdcacm_control_request(struct usb_setup_data *req, u8 **buf, return 0; } -static void cdcacm_data_rx_cb(u8 ep) +static void cdcacm_data_rx_cb(usbd_device *usbd_dev, u8 ep) { (void)ep; char buf[64]; - int len = usbd_ep_read_packet(0x01, buf, 64); + int len = usbd_ep_read_packet(usbd_dev, 0x01, buf, 64); if (len) { - while (usbd_ep_write_packet(0x82, buf, len) == 0) + while (usbd_ep_write_packet(usbd_dev, 0x82, buf, len) == 0) ; buf[len] = 0; } @@ -216,15 +217,16 @@ static void cdcacm_data_rx_cb(u8 ep) gpio_toggle(GPIOC, GPIO5); } -static void cdcacm_set_config(u16 wValue) +static void cdcacm_set_config(usbd_device *usbd_dev, u16 wValue) { (void)wValue; - usbd_ep_setup(0x01, USB_ENDPOINT_ATTR_BULK, 64, cdcacm_data_rx_cb); - usbd_ep_setup(0x82, USB_ENDPOINT_ATTR_BULK, 64, NULL); - usbd_ep_setup(0x83, USB_ENDPOINT_ATTR_INTERRUPT, 16, NULL); + usbd_ep_setup(usbd_dev, 0x01, USB_ENDPOINT_ATTR_BULK, 64, cdcacm_data_rx_cb); + usbd_ep_setup(usbd_dev, 0x82, USB_ENDPOINT_ATTR_BULK, 64, NULL); + usbd_ep_setup(usbd_dev, 0x83, USB_ENDPOINT_ATTR_INTERRUPT, 16, NULL); usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_CLASS | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, cdcacm_control_request); @@ -234,6 +236,8 @@ int main(void) { int i; + usbd_device *usbd_dev; + rcc_clock_setup_in_hsi_out_48mhz(); rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN); @@ -246,13 +250,13 @@ int main(void) gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO5); - usbd_init(&stm32f107_usb_driver, &dev, &config, usb_strings); - usbd_register_set_config_callback(cdcacm_set_config); + usbd_dev = usbd_init(&stm32f107_usb_driver, &dev, &config, usb_strings); + usbd_register_set_config_callback(usbd_dev, cdcacm_set_config); for (i = 0; i < 0x800000; i++) __asm__("nop"); gpio_clear(GPIOC, GPIO2); while (1) - usbd_poll(); + usbd_poll(usbd_dev); } diff --git a/examples/stm32/f1/lisa-m-1/usb_dfu/usbdfu.c b/examples/stm32/f1/lisa-m-1/usb_dfu/usbdfu.c index 4ffc0a1..71a9ac5 100644 --- a/examples/stm32/f1/lisa-m-1/usb_dfu/usbdfu.c +++ b/examples/stm32/f1/lisa-m-1/usb_dfu/usbdfu.c @@ -130,10 +130,11 @@ static u8 usbdfu_getstatus(u32 *bwPollTimeout) } } -static void usbdfu_getstatus_complete(struct usb_setup_data *req) +static void usbdfu_getstatus_complete(usbd_device *usbd_dev, struct usb_setup_data *req) { int i; (void)req; + (void)usbd_dev; switch (usbdfu_state) { case STATE_DFU_DNBUSY: @@ -166,9 +167,11 @@ static void usbdfu_getstatus_complete(struct usb_setup_data *req) } } -static int usbdfu_control_request(struct usb_setup_data *req, u8 **buf, - u16 *len, void (**complete)(struct usb_setup_data *req)) +static int usbdfu_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, + u16 *len, void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { + (void)usbd_dev; + if ((req->bmRequestType & 0x7F) != 0x21) return 0; /* Only accept class request. */ @@ -221,6 +224,8 @@ static int usbdfu_control_request(struct usb_setup_data *req, u8 **buf, int main(void) { + usbd_device *usbd_dev; + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); if (!gpio_get(GPIOA, GPIO10)) { @@ -245,9 +250,10 @@ int main(void) gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO2); - usbd_init(&stm32f107_usb_driver, &dev, &config, usb_strings); - usbd_set_control_buffer_size(sizeof(usbd_control_buffer)); + usbd_dev = usbd_init(&stm32f107_usb_driver, &dev, &config, usb_strings); + usbd_set_control_buffer_size(usbd_dev, sizeof(usbd_control_buffer)); usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_CLASS | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, usbdfu_control_request); @@ -255,5 +261,5 @@ int main(void) gpio_clear(GPIOC, GPIO2); while (1) - usbd_poll(); + usbd_poll(usbd_dev); } diff --git a/examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c b/examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c index 8d83896..9ef3f56 100644 --- a/examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c +++ b/examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c @@ -36,6 +36,8 @@ #include #endif +static usbd_device *usbd_dev; + const struct usb_device_descriptor dev = { .bLength = USB_DT_DEVICE_SIZE, .bDescriptorType = USB_DT_DEVICE, @@ -173,10 +175,11 @@ static const char *usb_strings[] = { "DEMO", }; -static int hid_control_request(struct usb_setup_data *req, u8 **buf, u16 *len, - void (**complete)(struct usb_setup_data *req)) +static int hid_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, u16 *len, + void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { (void)complete; + (void)usbd_dev; if((req->bmRequestType != 0x81) || (req->bRequest != USB_REQ_GET_DESCRIPTOR) || @@ -191,9 +194,10 @@ static int hid_control_request(struct usb_setup_data *req, u8 **buf, u16 *len, } #ifdef INCLUDE_DFU_INTERFACE -static void dfu_detach_complete(struct usb_setup_data *req) +static void dfu_detach_complete(usbd_device *usbd_dev, struct usb_setup_data *req) { (void)req; + (void)usbd_dev; gpio_set_mode(GPIOA, GPIO_MODE_INPUT, 0, GPIO15); gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, @@ -202,11 +206,12 @@ static void dfu_detach_complete(struct usb_setup_data *req) scb_reset_core(); } -static int dfu_control_request(struct usb_setup_data *req, u8 **buf, u16 *len, - void (**complete)(struct usb_setup_data *req)) +static int dfu_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, u16 *len, + void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { (void)buf; (void)len; + (void)usbd_dev; if ((req->bmRequestType != 0x21) || (req->bRequest != DFU_DETACH)) return 0; /* Only accept class request. */ @@ -217,18 +222,20 @@ static int dfu_control_request(struct usb_setup_data *req, u8 **buf, u16 *len, } #endif -static void hid_set_config(u16 wValue) +static void hid_set_config(usbd_device *usbd_dev, u16 wValue) { (void)wValue; - usbd_ep_setup(0x81, USB_ENDPOINT_ATTR_INTERRUPT, 4, NULL); + usbd_ep_setup(usbd_dev, 0x81, USB_ENDPOINT_ATTR_INTERRUPT, 4, NULL); usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_STANDARD | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, hid_control_request); #ifdef INCLUDE_DFU_INTERFACE usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_CLASS | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, dfu_control_request); @@ -329,8 +336,8 @@ int main(void) gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO2); - usbd_init(&stm32f107_usb_driver, &dev, &config, usb_strings); - usbd_register_set_config_callback(hid_set_config); + usbd_dev = usbd_init(&stm32f107_usb_driver, &dev, &config, usb_strings); + usbd_register_set_config_callback(usbd_dev, hid_set_config); /* Delay some seconds to show that pull-up switch works. */ for (i = 0; i < 0x800000; i++) @@ -345,7 +352,7 @@ int main(void) // OTG_FS_GCCFG &= ~OTG_FS_GCCFG_VBUSBSEN; while (1) - usbd_poll(); + usbd_poll(usbd_dev); } void sys_tick_handler(void) @@ -357,5 +364,5 @@ void sys_tick_handler(void) buf[1] = x >> 9; buf[2] = y >> 9; - usbd_ep_write_packet(0x81, buf, 4); + usbd_ep_write_packet(usbd_dev, 0x81, buf, 4); } diff --git a/examples/stm32/f1/other/usb_cdcacm/cdcacm.c b/examples/stm32/f1/other/usb_cdcacm/cdcacm.c index 2038664..81250b5 100644 --- a/examples/stm32/f1/other/usb_cdcacm/cdcacm.c +++ b/examples/stm32/f1/other/usb_cdcacm/cdcacm.c @@ -164,11 +164,12 @@ static const char *usb_strings[] = { "DEMO", }; -static int cdcacm_control_request(struct usb_setup_data *req, u8 **buf, - u16 *len, void (**complete)(struct usb_setup_data *req)) +static int cdcacm_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, + u16 *len, void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { (void)complete; (void)buf; + (void)usbd_dev; switch(req->bRequest) { case USB_CDC_REQ_SET_CONTROL_LINE_STATE: { @@ -200,28 +201,29 @@ static int cdcacm_control_request(struct usb_setup_data *req, u8 **buf, return 0; } -static void cdcacm_data_rx_cb(u8 ep) +static void cdcacm_data_rx_cb(usbd_device *usbd_dev, u8 ep) { (void)ep; char buf[64]; - int len = usbd_ep_read_packet(0x01, buf, 64); + int len = usbd_ep_read_packet(usbd_dev, 0x01, buf, 64); if (len) { - usbd_ep_write_packet(0x82, buf, len); + usbd_ep_write_packet(usbd_dev, 0x82, buf, len); buf[len] = 0; } } -static void cdcacm_set_config(u16 wValue) +static void cdcacm_set_config(usbd_device *usbd_dev, u16 wValue) { (void)wValue; - usbd_ep_setup(0x01, USB_ENDPOINT_ATTR_BULK, 64, cdcacm_data_rx_cb); - usbd_ep_setup(0x82, USB_ENDPOINT_ATTR_BULK, 64, NULL); - usbd_ep_setup(0x83, USB_ENDPOINT_ATTR_INTERRUPT, 16, NULL); + usbd_ep_setup(usbd_dev, 0x01, USB_ENDPOINT_ATTR_BULK, 64, cdcacm_data_rx_cb); + usbd_ep_setup(usbd_dev, 0x82, USB_ENDPOINT_ATTR_BULK, 64, NULL); + usbd_ep_setup(usbd_dev, 0x83, USB_ENDPOINT_ATTR_INTERRUPT, 16, NULL); usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_CLASS | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, cdcacm_control_request); @@ -229,6 +231,8 @@ static void cdcacm_set_config(u16 wValue) int main(void) { + usbd_device *usbd_dev; + rcc_clock_setup_in_hsi_out_48mhz(); rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); @@ -238,13 +242,13 @@ int main(void) gpio_set_mode(GPIOA, GPIO_MODE_INPUT, 0, GPIO15); - usbd_init(&stm32f103_usb_driver, &dev, &config, usb_strings); - usbd_register_set_config_callback(cdcacm_set_config); + usbd_dev = usbd_init(&stm32f103_usb_driver, &dev, &config, usb_strings); + usbd_register_set_config_callback(usbd_dev, cdcacm_set_config); gpio_set(GPIOA, GPIO15); gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO15); while (1) - usbd_poll(); + usbd_poll(usbd_dev); } diff --git a/examples/stm32/f1/other/usb_dfu/usbdfu.c b/examples/stm32/f1/other/usb_dfu/usbdfu.c index 0211a47..5347c9d 100644 --- a/examples/stm32/f1/other/usb_dfu/usbdfu.c +++ b/examples/stm32/f1/other/usb_dfu/usbdfu.c @@ -130,10 +130,11 @@ static u8 usbdfu_getstatus(u32 *bwPollTimeout) } } -static void usbdfu_getstatus_complete(struct usb_setup_data *req) +static void usbdfu_getstatus_complete(usbd_device *usbd_dev, struct usb_setup_data *req) { int i; (void)req; + (void)usbd_dev; switch (usbdfu_state) { case STATE_DFU_DNBUSY: @@ -166,9 +167,11 @@ static void usbdfu_getstatus_complete(struct usb_setup_data *req) } } -static int usbdfu_control_request(struct usb_setup_data *req, u8 **buf, - u16 *len, void (**complete)(struct usb_setup_data *req)) +static int usbdfu_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, + u16 *len, void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { + (void)usbd_dev; + if ((req->bmRequestType & 0x7F) != 0x21) return 0; /* Only accept class request. */ @@ -221,6 +224,8 @@ static int usbdfu_control_request(struct usb_setup_data *req, u8 **buf, int main(void) { + usbd_device *usbd_dev; + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); if (!gpio_get(GPIOA, GPIO10)) { @@ -244,9 +249,10 @@ int main(void) AFIO_MAPR |= AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON; gpio_set_mode(GPIOA, GPIO_MODE_INPUT, 0, GPIO15); - usbd_init(&stm32f107_usb_driver, &dev, &config, usb_strings); - usbd_set_control_buffer_size(sizeof(usbd_control_buffer)); + usbd_dev = usbd_init(&stm32f107_usb_driver, &dev, &config, usb_strings); + usbd_set_control_buffer_size(usbd_dev, sizeof(usbd_control_buffer)); usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_CLASS | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, usbdfu_control_request); @@ -256,5 +262,5 @@ int main(void) GPIO_CNF_OUTPUT_PUSHPULL, GPIO15); while (1) - usbd_poll(); + usbd_poll(usbd_dev); } diff --git a/examples/stm32/f1/other/usb_hid/usbhid.c b/examples/stm32/f1/other/usb_hid/usbhid.c index dd3c57a..d681da4 100644 --- a/examples/stm32/f1/other/usb_hid/usbhid.c +++ b/examples/stm32/f1/other/usb_hid/usbhid.c @@ -32,6 +32,8 @@ #include #endif +static usbd_device *usbd_dev; + const struct usb_device_descriptor dev = { .bLength = USB_DT_DEVICE_SIZE, .bDescriptorType = USB_DT_DEVICE, @@ -169,10 +171,11 @@ static const char *usb_strings[] = { "DEMO", }; -static int hid_control_request(struct usb_setup_data *req, u8 **buf, u16 *len, - void (**complete)(struct usb_setup_data *req)) +static int hid_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, u16 *len, + void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { (void)complete; + (void)usbd_dev; if((req->bmRequestType != 0x81) || (req->bRequest != USB_REQ_GET_DESCRIPTOR) || @@ -187,9 +190,10 @@ static int hid_control_request(struct usb_setup_data *req, u8 **buf, u16 *len, } #ifdef INCLUDE_DFU_INTERFACE -static void dfu_detach_complete(struct usb_setup_data *req) +static void dfu_detach_complete(usbd_device *usbd_dev, struct usb_setup_data *req) { (void)req; + (void)usbd_dev; gpio_set_mode(GPIOA, GPIO_MODE_INPUT, 0, GPIO15); gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, @@ -198,11 +202,12 @@ static void dfu_detach_complete(struct usb_setup_data *req) scb_reset_core(); } -static int dfu_control_request(struct usb_setup_data *req, u8 **buf, u16 *len, - void (**complete)(struct usb_setup_data *req)) +static int dfu_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, u16 *len, + void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { (void)buf; (void)len; + (void)usbd_dev; if ((req->bmRequestType != 0x21) || (req->bRequest != DFU_DETACH)) return 0; /* Only accept class request. */ @@ -213,18 +218,21 @@ static int dfu_control_request(struct usb_setup_data *req, u8 **buf, u16 *len, } #endif -static void hid_set_config(u16 wValue) +static void hid_set_config(usbd_device *usbd_dev, u16 wValue) { (void)wValue; + (void)usbd_dev; - usbd_ep_setup(0x81, USB_ENDPOINT_ATTR_INTERRUPT, 4, NULL); + usbd_ep_setup(usbd_dev, 0x81, USB_ENDPOINT_ATTR_INTERRUPT, 4, NULL); usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_STANDARD | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, hid_control_request); #ifdef INCLUDE_DFU_INTERFACE usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_CLASS | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, dfu_control_request); @@ -246,15 +254,15 @@ int main(void) AFIO_MAPR |= AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON; gpio_set_mode(GPIOA, GPIO_MODE_INPUT, 0, GPIO15); - usbd_init(&stm32f103_usb_driver, &dev, &config, usb_strings); - usbd_register_set_config_callback(hid_set_config); + usbd_dev = usbd_init(&stm32f103_usb_driver, &dev, &config, usb_strings); + usbd_register_set_config_callback(usbd_dev, hid_set_config); gpio_set(GPIOA, GPIO15); gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO15); while (1) - usbd_poll(); + usbd_poll(usbd_dev); } void sys_tick_handler(void) @@ -270,5 +278,5 @@ void sys_tick_handler(void) if (x < -30) dir = -dir; - usbd_ep_write_packet(0x81, buf, 4); + usbd_ep_write_packet(usbd_dev, 0x81, buf, 4); } diff --git a/examples/stm32/f1/stm32-h103/usb_cdcacm/cdcacm.c b/examples/stm32/f1/stm32-h103/usb_cdcacm/cdcacm.c index 779f659..3d25c29 100644 --- a/examples/stm32/f1/stm32-h103/usb_cdcacm/cdcacm.c +++ b/examples/stm32/f1/stm32-h103/usb_cdcacm/cdcacm.c @@ -41,7 +41,7 @@ static const struct usb_device_descriptor dev = { }; /* - * This notification endpoint isn't implemented. According to CDC spec its + * This notification endpoint isn't implemented. According to CDC spec its * optional, but its absence causes a NULL pointer dereference in Linux * cdc_acm driver. */ @@ -83,7 +83,7 @@ static const struct { .bcdCDC = 0x0110, }, .call_mgmt = { - .bFunctionLength = + .bFunctionLength = sizeof(struct usb_cdc_call_management_descriptor), .bDescriptorType = CS_INTERFACE, .bDescriptorSubtype = USB_CDC_TYPE_CALL_MANAGEMENT, @@ -101,7 +101,7 @@ static const struct { .bDescriptorType = CS_INTERFACE, .bDescriptorSubtype = USB_CDC_TYPE_UNION, .bControlInterface = 0, - .bSubordinateInterface0 = 1, + .bSubordinateInterface0 = 1, }, }; @@ -164,11 +164,12 @@ static const char *usb_strings[] = { "DEMO", }; -static int cdcacm_control_request(struct usb_setup_data *req, u8 **buf, - u16 *len, void (**complete)(struct usb_setup_data *req)) +static int cdcacm_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, + u16 *len, void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { (void)complete; (void)buf; + (void)usbd_dev; switch (req->bRequest) { case USB_CDC_REQ_SET_CONTROL_LINE_STATE: { @@ -199,28 +200,31 @@ static int cdcacm_control_request(struct usb_setup_data *req, u8 **buf, return 0; } -static void cdcacm_data_rx_cb(u8 ep) +static void cdcacm_data_rx_cb(usbd_device *usbd_dev, u8 ep) { (void)ep; + (void)usbd_dev; char buf[64]; - int len = usbd_ep_read_packet(0x01, buf, 64); + int len = usbd_ep_read_packet(usbd_dev, 0x01, buf, 64); if (len) { - usbd_ep_write_packet(0x82, buf, len); + usbd_ep_write_packet(usbd_dev, 0x82, buf, len); buf[len] = 0; } } -static void cdcacm_set_config(u16 wValue) +static void cdcacm_set_config(usbd_device *usbd_dev, u16 wValue) { (void)wValue; + (void)usbd_dev; - usbd_ep_setup(0x01, USB_ENDPOINT_ATTR_BULK, 64, cdcacm_data_rx_cb); - usbd_ep_setup(0x82, USB_ENDPOINT_ATTR_BULK, 64, NULL); - usbd_ep_setup(0x83, USB_ENDPOINT_ATTR_INTERRUPT, 16, NULL); + usbd_ep_setup(usbd_dev, 0x01, USB_ENDPOINT_ATTR_BULK, 64, cdcacm_data_rx_cb); + usbd_ep_setup(usbd_dev, 0x82, USB_ENDPOINT_ATTR_BULK, 64, NULL); + usbd_ep_setup(usbd_dev, 0x83, USB_ENDPOINT_ATTR_INTERRUPT, 16, NULL); usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_CLASS | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, cdcacm_control_request); @@ -230,6 +234,8 @@ int main(void) { int i; + usbd_device *usbd_dev; + rcc_clock_setup_in_hsi_out_48mhz(); rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN); @@ -238,13 +244,13 @@ int main(void) gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO11); - usbd_init(&stm32f103_usb_driver, &dev, &config, usb_strings); - usbd_register_set_config_callback(cdcacm_set_config); + usbd_dev = usbd_init(&stm32f103_usb_driver, &dev, &config, usb_strings); + usbd_register_set_config_callback(usbd_dev, cdcacm_set_config); for (i = 0; i < 0x800000; i++) __asm__("nop"); gpio_clear(GPIOC, GPIO11); while (1) - usbd_poll(); + usbd_poll(usbd_dev); } diff --git a/examples/stm32/f1/stm32-h103/usb_dfu/usbdfu.c b/examples/stm32/f1/stm32-h103/usb_dfu/usbdfu.c index 49f265b..6282c4b 100644 --- a/examples/stm32/f1/stm32-h103/usb_dfu/usbdfu.c +++ b/examples/stm32/f1/stm32-h103/usb_dfu/usbdfu.c @@ -114,8 +114,10 @@ static const char *usb_strings[] = { "@Internal Flash /0x08000000/8*001Ka,56*001Kg", }; -static u8 usbdfu_getstatus(u32 *bwPollTimeout) +static u8 usbdfu_getstatus(usbd_device *usbd_dev, u32 *bwPollTimeout) { + (void)usbd_dev; + switch (usbdfu_state) { case STATE_DFU_DNLOAD_SYNC: usbdfu_state = STATE_DFU_DNBUSY; @@ -130,10 +132,11 @@ static u8 usbdfu_getstatus(u32 *bwPollTimeout) } } -static void usbdfu_getstatus_complete(struct usb_setup_data *req) +static void usbdfu_getstatus_complete(usbd_device *usbd_dev, struct usb_setup_data *req) { int i; (void)req; + (void)usbd_dev; switch (usbdfu_state) { case STATE_DFU_DNBUSY: @@ -166,8 +169,8 @@ static void usbdfu_getstatus_complete(struct usb_setup_data *req) } } -static int usbdfu_control_request(struct usb_setup_data *req, u8 **buf, - u16 *len, void (**complete)(struct usb_setup_data *req)) +static int usbdfu_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, + u16 *len, void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { if ((req->bmRequestType & 0x7F) != 0x21) return 0; /* Only accept class request. */ @@ -199,7 +202,7 @@ static int usbdfu_control_request(struct usb_setup_data *req, u8 **buf, return 0; case DFU_GETSTATUS: { u32 bwPollTimeout = 0; /* 24-bit integer in DFU class spec */ - (*buf)[0] = usbdfu_getstatus(&bwPollTimeout); + (*buf)[0] = usbdfu_getstatus(usbd_dev, &bwPollTimeout); (*buf)[1] = bwPollTimeout & 0xFF; (*buf)[2] = (bwPollTimeout >> 8) & 0xFF; (*buf)[3] = (bwPollTimeout >> 16) & 0xFF; @@ -221,6 +224,8 @@ static int usbdfu_control_request(struct usb_setup_data *req, u8 **buf, int main(void) { + usbd_device *usbd_dev; + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); if (!gpio_get(GPIOA, GPIO10)) { @@ -244,9 +249,10 @@ int main(void) GPIO_CNF_OUTPUT_PUSHPULL, GPIO11); gpio_set(GPIOC, GPIO11); - usbd_init(&stm32f103_usb_driver, &dev, &config, usb_strings); - usbd_set_control_buffer_size(sizeof(usbd_control_buffer)); + usbd_dev = usbd_init(&stm32f103_usb_driver, &dev, &config, usb_strings); + usbd_set_control_buffer_size(usbd_dev, sizeof(usbd_control_buffer)); usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_CLASS | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, usbdfu_control_request); @@ -254,5 +260,5 @@ int main(void) gpio_clear(GPIOC, GPIO11); while (1) - usbd_poll(); + usbd_poll(usbd_dev); } diff --git a/examples/stm32/f1/stm32-h103/usb_hid/usbhid.c b/examples/stm32/f1/stm32-h103/usb_hid/usbhid.c index 9ed40d1..558e68d 100644 --- a/examples/stm32/f1/stm32-h103/usb_hid/usbhid.c +++ b/examples/stm32/f1/stm32-h103/usb_hid/usbhid.c @@ -169,10 +169,11 @@ static const char *usb_strings[] = { "DEMO", }; -static int hid_control_request(struct usb_setup_data *req, u8 **buf, u16 *len, - void (**complete)(struct usb_setup_data *req)) +static int hid_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, u16 *len, + void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { (void)complete; + (void)usbd_dev; if ((req->bmRequestType != 0x81) || (req->bRequest != USB_REQ_GET_DESCRIPTOR) || @@ -187,9 +188,10 @@ static int hid_control_request(struct usb_setup_data *req, u8 **buf, u16 *len, } #ifdef INCLUDE_DFU_INTERFACE -static void dfu_detach_complete(struct usb_setup_data *req) +static void dfu_detach_complete(usbd_device *usbd_dev, struct usb_setup_data *req) { (void)req; + (void)usbd_dev; gpio_set_mode(GPIOA, GPIO_MODE_INPUT, 0, GPIO15); gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ, @@ -198,11 +200,12 @@ static void dfu_detach_complete(struct usb_setup_data *req) scb_reset_core(); } -static int dfu_control_request(struct usb_setup_data *req, u8 **buf, u16 *len, - void (**complete)(struct usb_setup_data *req)) +static int dfu_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, u16 *len, + void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { (void)buf; (void)len; + (void)usbd_dev; if ((req->bmRequestType != 0x21) || (req->bRequest != DFU_DETACH)) return 0; /* Only accept class request. */ @@ -213,18 +216,21 @@ static int dfu_control_request(struct usb_setup_data *req, u8 **buf, u16 *len, } #endif -static void hid_set_config(u16 wValue) +static void hid_set_config(usbd_device *usbd_dev, u16 wValue) { (void)wValue; + (void)usbd_dev; - usbd_ep_setup(0x81, USB_ENDPOINT_ATTR_INTERRUPT, 4, NULL); + usbd_ep_setup(usbd_dev, 0x81, USB_ENDPOINT_ATTR_INTERRUPT, 4, NULL); usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_STANDARD | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, hid_control_request); #ifdef INCLUDE_DFU_INTERFACE usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_CLASS | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, dfu_control_request); @@ -240,6 +246,8 @@ int main(void) { int i; + usbd_device *usbd_dev; + rcc_clock_setup_in_hsi_out_48mhz(); rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN); @@ -248,8 +256,8 @@ int main(void) gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO11); - usbd_init(&stm32f103_usb_driver, &dev, &config, usb_strings); - usbd_register_set_config_callback(hid_set_config); + usbd_dev = usbd_init(&stm32f103_usb_driver, &dev, &config, usb_strings); + usbd_register_set_config_callback(usbd_dev, hid_set_config); for (i = 0; i < 0x80000; i++) __asm__("nop"); @@ -257,9 +265,10 @@ int main(void) gpio_clear(GPIOC, GPIO11); while (1) - usbd_poll(); + usbd_poll(usbd_dev); } +#if 0 /* is this used? */ void sys_tick_handler(void) { static int x = 0; @@ -273,5 +282,6 @@ void sys_tick_handler(void) if (x < -30) dir = -dir; - usbd_ep_write_packet(0x81, buf, 4); + usbd_ep_write_packet(usbd_dev, 0x81, buf, 4); } +#endif diff --git a/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c b/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c index c5cc8ba..de3d6a3 100644 --- a/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c +++ b/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c @@ -114,8 +114,10 @@ static const char *usb_strings[] = { "@Internal Flash /0x08000000/8*001Ka,56*001Kg", }; -static u8 usbdfu_getstatus(u32 *bwPollTimeout) +static u8 usbdfu_getstatus(usbd_device *usbd_dev, u32 *bwPollTimeout) { + (void)usbd_dev; + switch (usbdfu_state) { case STATE_DFU_DNLOAD_SYNC: usbdfu_state = STATE_DFU_DNBUSY; @@ -130,10 +132,11 @@ static u8 usbdfu_getstatus(u32 *bwPollTimeout) } } -static void usbdfu_getstatus_complete(struct usb_setup_data *req) +static void usbdfu_getstatus_complete(usbd_device *usbd_dev, struct usb_setup_data *req) { int i; (void)req; + (void)usbd_dev; switch (usbdfu_state) { case STATE_DFU_DNBUSY: @@ -166,8 +169,8 @@ static void usbdfu_getstatus_complete(struct usb_setup_data *req) } } -static int usbdfu_control_request(struct usb_setup_data *req, u8 **buf, - u16 *len, void (**complete)(struct usb_setup_data *req)) +static int usbdfu_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, + u16 *len, void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { if ((req->bmRequestType & 0x7F) != 0x21) return 0; /* Only accept class request. */ @@ -199,7 +202,7 @@ static int usbdfu_control_request(struct usb_setup_data *req, u8 **buf, return 0; case DFU_GETSTATUS: { u32 bwPollTimeout = 0; /* 24-bit integer in DFU class spec */ - (*buf)[0] = usbdfu_getstatus(&bwPollTimeout); + (*buf)[0] = usbdfu_getstatus(usbd_dev, &bwPollTimeout); (*buf)[1] = bwPollTimeout & 0xFF; (*buf)[2] = (bwPollTimeout >> 8) & 0xFF; (*buf)[3] = (bwPollTimeout >> 16) & 0xFF; @@ -221,6 +224,8 @@ static int usbdfu_control_request(struct usb_setup_data *req, u8 **buf, int main(void) { + usbd_device *usbd_dev; + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); if (!gpio_get(GPIOA, GPIO10)) { @@ -244,9 +249,10 @@ int main(void) AFIO_MAPR |= AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON; gpio_set_mode(GPIOA, GPIO_MODE_INPUT, 0, GPIO15); - usbd_init(&stm32f103_usb_driver, &dev, &config, usb_strings); - usbd_set_control_buffer_size(sizeof(usbd_control_buffer)); + usbd_dev = usbd_init(&stm32f103_usb_driver, &dev, &config, usb_strings); + usbd_set_control_buffer_size(usbd_dev, sizeof(usbd_control_buffer)); usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_CLASS | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, usbdfu_control_request); @@ -256,5 +262,5 @@ int main(void) GPIO_CNF_OUTPUT_PUSHPULL, GPIO15); while (1) - usbd_poll(); + usbd_poll(usbd_dev); } diff --git a/examples/stm32/f1/stm32-h107/usb_simple/usb_simple.c b/examples/stm32/f1/stm32-h107/usb_simple/usb_simple.c index e9a52b2..fc0aecd 100644 --- a/examples/stm32/f1/stm32-h107/usb_simple/usb_simple.c +++ b/examples/stm32/f1/stm32-h107/usb_simple/usb_simple.c @@ -75,16 +75,17 @@ const char *usb_strings[] = { "1001", }; -static int simple_control_callback(struct usb_setup_data *req, u8 **buf, - u16 *len, void (**complete)(struct usb_setup_data *req)) +static int simple_control_callback(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, + u16 *len, void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { (void)buf; (void)len; (void)complete; + (void)usbd_dev; if (req->bmRequestType != 0x40) return 0; /* Only accept vendor request. */ - + if (req->wValue & 1) gpio_set(GPIOC, GPIO6); else @@ -95,6 +96,8 @@ static int simple_control_callback(struct usb_setup_data *req, u8 **buf, int main(void) { + usbd_device *usbd_dev; + rcc_clock_setup_in_hse_8mhz_out_72mhz(); rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); @@ -105,13 +108,14 @@ int main(void) gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO6); - usbd_init(&stm32f107_usb_driver, &dev, &config, usb_strings); + usbd_dev = usbd_init(&stm32f107_usb_driver, &dev, &config, usb_strings); usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_VENDOR, USB_REQ_TYPE_TYPE, simple_control_callback); while (1) - usbd_poll(); + usbd_poll(usbd_dev); } diff --git a/examples/stm32/f4/stm32f4-discovery/usb_cdcacm/cdcacm.c b/examples/stm32/f4/stm32f4-discovery/usb_cdcacm/cdcacm.c index 4af1039..1a12267 100644 --- a/examples/stm32/f4/stm32f4-discovery/usb_cdcacm/cdcacm.c +++ b/examples/stm32/f4/stm32f4-discovery/usb_cdcacm/cdcacm.c @@ -22,6 +22,7 @@ #include #include #include +#include static const struct usb_device_descriptor dev = { .bLength = USB_DT_DEVICE_SIZE, @@ -164,11 +165,12 @@ static const char *usb_strings[] = { "DEMO", }; -static int cdcacm_control_request(struct usb_setup_data *req, u8 **buf, - u16 *len, void (**complete)(struct usb_setup_data *req)) +static int cdcacm_control_request(usbd_device *usbd_dev, struct usb_setup_data *req, u8 **buf, + u16 *len, void (**complete)(usbd_device *usbd_dev, struct usb_setup_data *req)) { (void)complete; (void)buf; + (void)usbd_dev; switch (req->bRequest) { case USB_CDC_REQ_SET_CONTROL_LINE_STATE: { @@ -188,30 +190,31 @@ static int cdcacm_control_request(struct usb_setup_data *req, u8 **buf, return 0; } -static void cdcacm_data_rx_cb(u8 ep) +static void cdcacm_data_rx_cb(usbd_device *usbd_dev, u8 ep) { (void)ep; char buf[64]; - int len = usbd_ep_read_packet(0x01, buf, 64); + int len = usbd_ep_read_packet(usbd_dev, 0x01, buf, 64); if (len) { - while (usbd_ep_write_packet(0x82, buf, len) == 0) + while (usbd_ep_write_packet(usbd_dev, 0x82, buf, len) == 0) ; } gpio_toggle(GPIOC, GPIO5); } -static void cdcacm_set_config(u16 wValue) +static void cdcacm_set_config(usbd_device *usbd_dev, u16 wValue) { (void)wValue; - usbd_ep_setup(0x01, USB_ENDPOINT_ATTR_BULK, 64, cdcacm_data_rx_cb); - usbd_ep_setup(0x82, USB_ENDPOINT_ATTR_BULK, 64, NULL); - usbd_ep_setup(0x83, USB_ENDPOINT_ATTR_INTERRUPT, 16, NULL); + usbd_ep_setup(usbd_dev, 0x01, USB_ENDPOINT_ATTR_BULK, 64, cdcacm_data_rx_cb); + usbd_ep_setup(usbd_dev, 0x82, USB_ENDPOINT_ATTR_BULK, 64, NULL); + usbd_ep_setup(usbd_dev, 0x83, USB_ENDPOINT_ATTR_INTERRUPT, 16, NULL); usbd_register_control_callback( + usbd_dev, USB_REQ_TYPE_CLASS | USB_REQ_TYPE_INTERFACE, USB_REQ_TYPE_TYPE | USB_REQ_TYPE_RECIPIENT, cdcacm_control_request); @@ -219,19 +222,20 @@ static void cdcacm_set_config(u16 wValue) int main(void) { + usbd_device *usbd_dev; + rcc_clock_setup_hse_3v3(&hse_8mhz_3v3[CLOCK_3V3_120MHZ]); rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPAEN); rcc_peripheral_enable_clock(&RCC_AHB2ENR, RCC_AHB2ENR_OTGFSEN); - gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, + gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO9 | GPIO11 | GPIO12); gpio_set_af(GPIOA, GPIO_AF10, GPIO9 | GPIO11 | GPIO12); - usbd_init(&otgfs_usb_driver, &dev, &config, usb_strings); - usbd_register_set_config_callback(cdcacm_set_config); + usbd_dev = usbd_init(&otgfs_usb_driver, &dev, &config, usb_strings); + usbd_register_set_config_callback(usbd_dev, cdcacm_set_config); while (1) - usbd_poll(); + usbd_poll(usbd_dev); } - -- cgit v1.2.3 From 94ce82396bd69dfde8807dad27e23f30913247aa Mon Sep 17 00:00:00 2001 From: chrysn Date: Thu, 18 Oct 2012 13:28:03 +0200 Subject: modified examples to use libopencm3/cm3/nvic.h instead of /stm32/ --- examples/stm32/f1/lisa-m-1/can/can.c | 2 +- .../stm32/f1/lisa-m-2/adc_injec_timtrig_irq/adc_injec_timtrig_irq.c | 2 +- .../f1/lisa-m-2/adc_injec_timtrig_irq_4ch/adc_injec_timtrig_irq_4ch.c | 2 +- examples/stm32/f1/lisa-m-2/usart_dma/usart_dma.c | 2 +- examples/stm32/f1/lisa-m-2/usart_irq/usart_irq.c | 2 +- examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c | 2 +- examples/stm32/f1/lisa-m-2/usart_printf/usart_printf.c | 2 +- examples/stm32/f1/obldc/can/can.c | 2 +- examples/stm32/f1/obldc/systick/systick.c | 2 +- examples/stm32/f1/obldc/usart_irq/usart_irq.c | 2 +- examples/stm32/f1/other/dogm128/main.c | 2 +- examples/stm32/f1/other/rtc/rtc.c | 2 +- examples/stm32/f1/other/systick/systick.c | 2 +- examples/stm32/f1/other/timer_interrupt/timer.c | 2 +- examples/stm32/f1/stm32-h103/button/button.c | 2 +- examples/stm32/f1/stm32-h103/exti_both/exti_both.c | 2 +- examples/stm32/f1/stm32-h103/exti_rising_falling/exti_rising_falling.c | 2 +- examples/stm32/f1/stm32-h103/pwm_6step/pwm_6step.c | 2 +- examples/stm32/f1/stm32-h103/timer/timer.c | 2 +- examples/stm32/f1/stm32-h103/usart_irq/usart_irq.c | 2 +- examples/stm32/f1/stm32-h103/usart_irq_printf/usart_irq_printf.c | 2 +- examples/stm32/f1/stm32-h103/usart_printf/usart_printf.c | 2 +- examples/stm32/f1/stm32vl-discovery/rtc/rtc.c | 2 +- examples/stm32/f2/jobygps/spi_test/spi_test.c | 2 +- examples/stm32/f2/jobygps/usart_printf/usart_printf.c | 2 +- 25 files changed, 25 insertions(+), 25 deletions(-) (limited to 'examples') diff --git a/examples/stm32/f1/lisa-m-1/can/can.c b/examples/stm32/f1/lisa-m-1/can/can.c index 6201547..92ebd85 100644 --- a/examples/stm32/f1/lisa-m-1/can/can.c +++ b/examples/stm32/f1/lisa-m-1/can/can.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include diff --git a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/adc_injec_timtrig_irq.c b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/adc_injec_timtrig_irq.c index bda1d9d..674343d 100644 --- a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/adc_injec_timtrig_irq.c +++ b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/adc_injec_timtrig_irq.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include volatile u16 temperature = 0; diff --git a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/adc_injec_timtrig_irq_4ch.c b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/adc_injec_timtrig_irq_4ch.c index 1334184..cbff97d 100644 --- a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/adc_injec_timtrig_irq_4ch.c +++ b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/adc_injec_timtrig_irq_4ch.c @@ -25,7 +25,7 @@ #include #include #include -#include +#include volatile u16 temperature = 0; volatile u16 v_refint = 0; diff --git a/examples/stm32/f1/lisa-m-2/usart_dma/usart_dma.c b/examples/stm32/f1/lisa-m-2/usart_dma/usart_dma.c index ac3bb3c..369c539 100644 --- a/examples/stm32/f1/lisa-m-2/usart_dma/usart_dma.c +++ b/examples/stm32/f1/lisa-m-2/usart_dma/usart_dma.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include void clock_setup(void) { diff --git a/examples/stm32/f1/lisa-m-2/usart_irq/usart_irq.c b/examples/stm32/f1/lisa-m-2/usart_irq/usart_irq.c index dbe9140..e5d9e68 100644 --- a/examples/stm32/f1/lisa-m-2/usart_irq/usart_irq.c +++ b/examples/stm32/f1/lisa-m-2/usart_irq/usart_irq.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include void clock_setup(void) { diff --git a/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c b/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c index 6b1096e..e4e0127 100644 --- a/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c +++ b/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/examples/stm32/f1/lisa-m-2/usart_printf/usart_printf.c b/examples/stm32/f1/lisa-m-2/usart_printf/usart_printf.c index a66bcbc..bd245ff 100644 --- a/examples/stm32/f1/lisa-m-2/usart_printf/usart_printf.c +++ b/examples/stm32/f1/lisa-m-2/usart_printf/usart_printf.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include diff --git a/examples/stm32/f1/obldc/can/can.c b/examples/stm32/f1/obldc/can/can.c index d26be50..a29d8d7 100644 --- a/examples/stm32/f1/obldc/can/can.c +++ b/examples/stm32/f1/obldc/can/can.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include diff --git a/examples/stm32/f1/obldc/systick/systick.c b/examples/stm32/f1/obldc/systick/systick.c index e854f85..7abdd54 100644 --- a/examples/stm32/f1/obldc/systick/systick.c +++ b/examples/stm32/f1/obldc/systick/systick.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include u32 temp32; diff --git a/examples/stm32/f1/obldc/usart_irq/usart_irq.c b/examples/stm32/f1/obldc/usart_irq/usart_irq.c index 3925565..e13dd81 100644 --- a/examples/stm32/f1/obldc/usart_irq/usart_irq.c +++ b/examples/stm32/f1/obldc/usart_irq/usart_irq.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include void clock_setup(void) { diff --git a/examples/stm32/f1/other/dogm128/main.c b/examples/stm32/f1/other/dogm128/main.c index 5838af4..7889794 100644 --- a/examples/stm32/f1/other/dogm128/main.c +++ b/examples/stm32/f1/other/dogm128/main.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include "./dogm128.h" diff --git a/examples/stm32/f1/other/rtc/rtc.c b/examples/stm32/f1/other/rtc/rtc.c index ee2a427..41c5d89 100644 --- a/examples/stm32/f1/other/rtc/rtc.c +++ b/examples/stm32/f1/other/rtc/rtc.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include void clock_setup(void) { diff --git a/examples/stm32/f1/other/systick/systick.c b/examples/stm32/f1/other/systick/systick.c index b2df171..9aa2e94 100644 --- a/examples/stm32/f1/other/systick/systick.c +++ b/examples/stm32/f1/other/systick/systick.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include u32 temp32; diff --git a/examples/stm32/f1/other/timer_interrupt/timer.c b/examples/stm32/f1/other/timer_interrupt/timer.c index 21a0caa..9450548 100644 --- a/examples/stm32/f1/other/timer_interrupt/timer.c +++ b/examples/stm32/f1/other/timer_interrupt/timer.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include void gpio_setup(void) { diff --git a/examples/stm32/f1/stm32-h103/button/button.c b/examples/stm32/f1/stm32-h103/button/button.c index 814fbfb..9d9a5e9 100644 --- a/examples/stm32/f1/stm32-h103/button/button.c +++ b/examples/stm32/f1/stm32-h103/button/button.c @@ -20,7 +20,7 @@ #include #include -#include +#include #include u16 exti_line_state; diff --git a/examples/stm32/f1/stm32-h103/exti_both/exti_both.c b/examples/stm32/f1/stm32-h103/exti_both/exti_both.c index 3bafcc9..c871c35 100644 --- a/examples/stm32/f1/stm32-h103/exti_both/exti_both.c +++ b/examples/stm32/f1/stm32-h103/exti_both/exti_both.c @@ -20,7 +20,7 @@ #include #include -#include +#include #include u16 exti_line_state; diff --git a/examples/stm32/f1/stm32-h103/exti_rising_falling/exti_rising_falling.c b/examples/stm32/f1/stm32-h103/exti_rising_falling/exti_rising_falling.c index c5dfe3b..f847847 100644 --- a/examples/stm32/f1/stm32-h103/exti_rising_falling/exti_rising_falling.c +++ b/examples/stm32/f1/stm32-h103/exti_rising_falling/exti_rising_falling.c @@ -20,7 +20,7 @@ #include #include -#include +#include #include #define FALLING 0 diff --git a/examples/stm32/f1/stm32-h103/pwm_6step/pwm_6step.c b/examples/stm32/f1/stm32-h103/pwm_6step/pwm_6step.c index 65854ac..deb0ff0 100644 --- a/examples/stm32/f1/stm32-h103/pwm_6step/pwm_6step.c +++ b/examples/stm32/f1/stm32-h103/pwm_6step/pwm_6step.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #define FALLING 0 diff --git a/examples/stm32/f1/stm32-h103/timer/timer.c b/examples/stm32/f1/stm32-h103/timer/timer.c index 07f668b..210e592 100644 --- a/examples/stm32/f1/stm32-h103/timer/timer.c +++ b/examples/stm32/f1/stm32-h103/timer/timer.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include u16 frequency_sequence[18] = { diff --git a/examples/stm32/f1/stm32-h103/usart_irq/usart_irq.c b/examples/stm32/f1/stm32-h103/usart_irq/usart_irq.c index 009c6d7..ae95df8 100644 --- a/examples/stm32/f1/stm32-h103/usart_irq/usart_irq.c +++ b/examples/stm32/f1/stm32-h103/usart_irq/usart_irq.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include void clock_setup(void) { diff --git a/examples/stm32/f1/stm32-h103/usart_irq_printf/usart_irq_printf.c b/examples/stm32/f1/stm32-h103/usart_irq_printf/usart_irq_printf.c index 2143461..5effb28 100644 --- a/examples/stm32/f1/stm32-h103/usart_irq_printf/usart_irq_printf.c +++ b/examples/stm32/f1/stm32-h103/usart_irq_printf/usart_irq_printf.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/examples/stm32/f1/stm32-h103/usart_printf/usart_printf.c b/examples/stm32/f1/stm32-h103/usart_printf/usart_printf.c index bc9fbd3..a275d83 100644 --- a/examples/stm32/f1/stm32-h103/usart_printf/usart_printf.c +++ b/examples/stm32/f1/stm32-h103/usart_printf/usart_printf.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include diff --git a/examples/stm32/f1/stm32vl-discovery/rtc/rtc.c b/examples/stm32/f1/stm32vl-discovery/rtc/rtc.c index d447e9b..b3c698b 100644 --- a/examples/stm32/f1/stm32vl-discovery/rtc/rtc.c +++ b/examples/stm32/f1/stm32vl-discovery/rtc/rtc.c @@ -23,7 +23,7 @@ #include #include #include -#include +#include void clock_setup(void) { diff --git a/examples/stm32/f2/jobygps/spi_test/spi_test.c b/examples/stm32/f2/jobygps/spi_test/spi_test.c index 8775db8..95ba021 100644 --- a/examples/stm32/f2/jobygps/spi_test/spi_test.c +++ b/examples/stm32/f2/jobygps/spi_test/spi_test.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include diff --git a/examples/stm32/f2/jobygps/usart_printf/usart_printf.c b/examples/stm32/f2/jobygps/usart_printf/usart_printf.c index 67a7d7f..d490e39 100644 --- a/examples/stm32/f2/jobygps/usart_printf/usart_printf.c +++ b/examples/stm32/f2/jobygps/usart_printf/usart_printf.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include void clock_setup(void) -- cgit v1.2.3 From c39c5c147dbe9e307298372f80c63570f07e8cd7 Mon Sep 17 00:00:00 2001 From: chrysn Date: Thu, 18 Oct 2012 21:09:35 +0200 Subject: adapt lpc43xx example to generalizations --- examples/lpc43xx/hackrf-jellybean/systick/systickdemo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'examples') diff --git a/examples/lpc43xx/hackrf-jellybean/systick/systickdemo.c b/examples/lpc43xx/hackrf-jellybean/systick/systickdemo.c index 66c8e06..61792d1 100644 --- a/examples/lpc43xx/hackrf-jellybean/systick/systickdemo.c +++ b/examples/lpc43xx/hackrf-jellybean/systick/systickdemo.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include -- cgit v1.2.3 From e20f1c0d8fb6c75c434b93834a9d67262198d908 Mon Sep 17 00:00:00 2001 From: chrysn Date: Thu, 18 Oct 2012 21:42:12 +0200 Subject: unify scb (system control block) these register definitions are common to all cortex mcus. some of the registers might not be implemented everywhere (especially the floating point registers), but defining them does no harm. this modification does not result in any changes in the example binaries. --- examples/stm32/f1/lisa-m-1/usb_dfu/usbdfu.c | 2 +- examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c | 2 +- examples/stm32/f1/other/usb_dfu/usbdfu.c | 2 +- examples/stm32/f1/other/usb_hid/usbhid.c | 2 +- examples/stm32/f1/stm32-h103/usb_dfu/usbdfu.c | 2 +- examples/stm32/f1/stm32-h103/usb_hid/usbhid.c | 2 +- examples/stm32/f1/stm32-h103/usb_iap/usbiap.c | 2 +- include/libopencm3/cm3/scb.h | 376 ++++++++++++++++++++++++++ include/libopencm3/stm32/f1/scb.h | 307 --------------------- include/libopencm3/stm32/f2/scb.h | 307 --------------------- include/libopencm3/stm32/f4/scb.h | 376 -------------------------- lib/cm3/scb.c | 35 +++ lib/stm32/f1/scb.c | 35 --- lib/stm32/f2/scb.c | 35 --- lib/stm32/f4/scb.c | 35 --- lib/stm32/f4/vector_chipset.c | 2 +- 16 files changed, 419 insertions(+), 1103 deletions(-) create mode 100644 include/libopencm3/cm3/scb.h delete mode 100644 include/libopencm3/stm32/f1/scb.h delete mode 100644 include/libopencm3/stm32/f2/scb.h delete mode 100644 include/libopencm3/stm32/f4/scb.h create mode 100644 lib/cm3/scb.c delete mode 100644 lib/stm32/f1/scb.c delete mode 100644 lib/stm32/f2/scb.c delete mode 100644 lib/stm32/f4/scb.c (limited to 'examples') diff --git a/examples/stm32/f1/lisa-m-1/usb_dfu/usbdfu.c b/examples/stm32/f1/lisa-m-1/usb_dfu/usbdfu.c index 4ffc0a1..d8fcde4 100644 --- a/examples/stm32/f1/lisa-m-1/usb_dfu/usbdfu.c +++ b/examples/stm32/f1/lisa-m-1/usb_dfu/usbdfu.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include diff --git a/examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c b/examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c index 8d83896..a0a4d12 100644 --- a/examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c +++ b/examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c @@ -32,7 +32,7 @@ #define INCLUDE_DFU_INTERFACE #ifdef INCLUDE_DFU_INTERFACE -#include +#include #include #endif diff --git a/examples/stm32/f1/other/usb_dfu/usbdfu.c b/examples/stm32/f1/other/usb_dfu/usbdfu.c index 0211a47..84e1b36 100644 --- a/examples/stm32/f1/other/usb_dfu/usbdfu.c +++ b/examples/stm32/f1/other/usb_dfu/usbdfu.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include diff --git a/examples/stm32/f1/other/usb_hid/usbhid.c b/examples/stm32/f1/other/usb_hid/usbhid.c index dd3c57a..6329f0e 100644 --- a/examples/stm32/f1/other/usb_hid/usbhid.c +++ b/examples/stm32/f1/other/usb_hid/usbhid.c @@ -28,7 +28,7 @@ #define INCLUDE_DFU_INTERFACE #ifdef INCLUDE_DFU_INTERFACE -#include +#include #include #endif diff --git a/examples/stm32/f1/stm32-h103/usb_dfu/usbdfu.c b/examples/stm32/f1/stm32-h103/usb_dfu/usbdfu.c index 49f265b..9c0bab9 100644 --- a/examples/stm32/f1/stm32-h103/usb_dfu/usbdfu.c +++ b/examples/stm32/f1/stm32-h103/usb_dfu/usbdfu.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include diff --git a/examples/stm32/f1/stm32-h103/usb_hid/usbhid.c b/examples/stm32/f1/stm32-h103/usb_hid/usbhid.c index 9ed40d1..d0c2aff 100644 --- a/examples/stm32/f1/stm32-h103/usb_hid/usbhid.c +++ b/examples/stm32/f1/stm32-h103/usb_hid/usbhid.c @@ -28,7 +28,7 @@ #define INCLUDE_DFU_INTERFACE #ifdef INCLUDE_DFU_INTERFACE -#include +#include #include #endif diff --git a/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c b/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c index c5cc8ba..9091f36 100644 --- a/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c +++ b/examples/stm32/f1/stm32-h103/usb_iap/usbiap.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include diff --git a/include/libopencm3/cm3/scb.h b/include/libopencm3/cm3/scb.h new file mode 100644 index 0000000..8e9c757 --- /dev/null +++ b/include/libopencm3/cm3/scb.h @@ -0,0 +1,376 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Piotr Esden-Tempski + * Copyright (C) 2010 Thomas Otto + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#ifndef LIBOPENCM3_SCB_H +#define LIBOPENCM3_SCB_H + +#include +#include + +/* --- SCB: Registers ------------------------------------------------------ */ + +/* CPUID: CPUID base register */ +#define SCB_CPUID MMIO32(SCB_BASE + 0x00) + +/* ICSR: Interrupt Control State Register */ +#define SCB_ICSR MMIO32(SCB_BASE + 0x04) + +/* VTOR: Vector Table Offset Register */ +#define SCB_VTOR MMIO32(SCB_BASE + 0x08) + +/* AIRCR: Application Interrupt and Reset Control Register */ +#define SCB_AIRCR MMIO32(SCB_BASE + 0x0C) + +/* SCR: System Control Register */ +#define SCB_SCR MMIO32(SCB_BASE + 0x10) + +/* CCR: Configuration Control Register */ +#define SCB_CCR MMIO32(SCB_BASE + 0x14) + +/* SHP: System Handler Priority Registers */ +/* Note: 12 8bit registers */ +#define SCB_SHPR(shpr_id) MMIO8(SCB_BASE + 0x18 + shpr_id) +#define SCB_SHPR1 MMIO8(SCB_BASE + 0x18 + 1) +#define SCB_SHPR2 MMIO8(SCB_BASE + 0x18 + 2) +#define SCB_SHPR3 MMIO8(SCB_BASE + 0x18 + 3) + +/* SHCSR: System Handler Control and State Register */ +#define SCB_SHCSR MMIO32(SCB_BASE + 0x24) + +/* CFSR: Configurable Fault Status Registers */ +#define SCB_CFSR MMIO32(SCB_BASE + 0x28) + +/* HFSR: Hard Fault Status Register */ +#define SCB_HFSR MMIO32(SCB_BASE + 0x2C) + +/* DFSR: Debug Fault Status Register */ +#define SCB_DFSR MMIO32(SCB_BASE + 0x30) + +/* MMFAR: Memory Manage Fault Address Register */ +#define SCB_MMFAR MMIO32(SCB_BASE + 0x34) + +/* BFAR: Bus Fault Address Register */ +#define SCB_BFAR MMIO32(SCB_BASE + 0x38) + +/* AFSR: Auxiliary Fault Status Register */ +#define SCB_AFSR MMIO32(SCB_BASE + 0x3C) + +/* ID_PFR0: Processor Feature Register 0 */ +#define SCB_ID_PFR0 MMIO32(SCB_BASE + 0x40) + +/* ID_PFR1: Processor Feature Register 1 */ +#define SCB_ID_PFR1 MMIO32(SCB_BASE + 0x44) + +/* ID_DFR0: Debug Features Register 0 */ +#define SCB_ID_DFR0 MMIO32(SCB_BASE + 0x48) + +/* ID_AFR0: Auxiliary Features Register 0 */ +#define SCB_ID_AFR0 MMIO32(SCB_BASE + 0x4C) + +/* ID_MMFR0: Memory Model Feature Register 0 */ +#define SCB_ID_MMFR0 MMIO32(SCB_BASE + 0x50) + +/* ID_MMFR1: Memory Model Feature Register 1 */ +#define SCB_ID_MMFR1 MMIO32(SCB_BASE + 0x54) + +/* ID_MMFR2: Memory Model Feature Register 2 */ +#define SCB_ID_MMFR2 MMIO32(SCB_BASE + 0x58) + +/* ID_MMFR3: Memory Model Feature Register 3 */ +#define SCB_ID_MMFR3 MMIO32(SCB_BASE + 0x5C) + +/* ID_ISAR0: Instruction Set Attributes Register 0 */ +#define SCB_ID_ISAR0 MMIO32(SCB_BASE + 0x60) + +/* ID_ISAR1: Instruction Set Attributes Register 1 */ +#define SCB_ID_ISAR1 MMIO32(SCB_BASE + 0x64) + +/* ID_ISAR2: Instruction Set Attributes Register 2 */ +#define SCB_ID_ISAR2 MMIO32(SCB_BASE + 0x68) + +/* ID_ISAR3: Instruction Set Attributes Register 3 */ +#define SCB_ID_ISAR3 MMIO32(SCB_BASE + 0x6C) + +/* ID_ISAR4: Instruction Set Attributes Register 4 */ +#define SCB_ID_ISAR4 MMIO32(SCB_BASE + 0x70) + +/* CPACR: Coprocessor Access Control Register */ +#define SCB_CPACR MMIO32(SCB_BASE + 0x88) + +/* FPCCR: Floating-Point Context Control Register */ +#define SCB_FPCCR MMIO32(SCB_BASE + 0x234) + +/* FPCAR: Floating-Point Context Address Register */ +#define SCB_FPCAR MMIO32(SCB_BASE + 0x238) + +/* FPDSCR: Floating-Point Default Status Control Register */ +#define SCB_FPDSCR MMIO32(SCB_BASE + 0x23C) + +/* MVFR0: Media and Floating-Point Feature Register 0 */ +#define SCB_MVFR0 MMIO32(SCB_BASE + 0x240) + +/* MVFR1: Media and Floating-Point Feature Register 1 */ +#define SCB_MVFR1 MMIO32(SCB_BASE + 0x244) + +/* --- SCB values ---------------------------------------------------------- */ + +/* --- SCB_CPUID values ---------------------------------------------------- */ + +/* Implementer[31:24]: Implementer code */ +#define SCP_CPUID_IMPLEMENTER_LSB 24 +/* Variant[23:20]: Variant number */ +#define SCP_CPUID_VARIANT_LSB 20 +/* Constant[19:16]: Reads as 0xF */ +#define SCP_CPUID_CONSTANT_LSB 16 +/* PartNo[15:4]: Part number of the processor */ +#define SCP_CPUID_PARTNO_LSB 4 +/* Revision[3:0]: Revision number */ +#define SCP_CPUID_REVISION_LSB 0 + +/* --- SCB_ICSR values ----------------------------------------------------- */ + +/* NMIPENDSET: NMI set-pending bit */ +#define SCB_ICSR_NMIPENDSET (1 << 31) +/* Bits [30:29]: reserved - must be kept cleared */ +/* PENDSVSET: PendSV set-pending bit */ +#define SCB_ICSR_PENDSVSET (1 << 28) +/* PENDSVCLR: PendSV clear-pending bit */ +#define SCB_ICSR_PENDSVCLR (1 << 27) +/* PENDSTSET: SysTick exception set-pending bit */ +#define SCB_ICSR_PENDSTSET (1 << 26) +/* PENDSTCLR: SysTick exception clear-pending bit */ +#define SCB_ICSR_PENDSTCLR (1 << 25) +/* Bit 24: reserved - must be kept cleared */ +/* Bit 23: reserved for debug - reads as 0 when not in debug mode */ +/* ISRPENDING: Interrupt pending flag, excluding NMI and Faults */ +#define SCB_ICSR_ISRPENDING (1 << 22) +/* VECTPENDING[21:12] Pending vector */ +#define SCB_ICSR_VECTPENDING_LSB 12 +/* RETOBASE: Return to base level */ +#define SCB_ICSR_RETOBASE (1 << 11) +/* Bits [10:9]: reserved - must be kept cleared */ +/* VECTACTIVE[8:0] Active vector */ +#define SCB_ICSR_VECTACTIVE_LSB 0 + +/* --- SCB_VTOR values ----------------------------------------------------- */ + +/* Bits [31:30]: reserved - must be kept cleared */ +/* TBLOFF[29:9]: Vector table base offset field */ +#define SCB_VTOR_TBLOFF_LSB 9 /* inconsistent datasheet - LSB could be 11 */ + +/* --- SCB_AIRCR values ---------------------------------------------------- */ + +/* VECTKEYSTAT[31:16]/ VECTKEY[31:16] Register key */ +#define SCB_AIRCR_VECTKEYSTAT_LSB 16 +#define SCB_AIRCR_VECTKEY 0x05FA0000 +/* ENDIANESS Data endianness bit */ +#define SCB_AIRCR_ENDIANESS (1 << 15) +/* Bits [14:11]: reserved - must be kept cleared */ +/* PRIGROUP[10:8]: Interrupt priority grouping field */ +#define SCB_AIRCR_PRIGROUP_GROUP16_NOSUB (0x3 << 8) +#define SCB_AIRCR_PRIGROUP_GROUP8_SUB2 (0x4 << 8) +#define SCB_AIRCR_PRIGROUP_GROUP4_SUB4 (0x5 << 8) +#define SCB_AIRCR_PRIGROUP_GROUP2_SUB8 (0x6 << 8) +#define SCB_AIRCR_PRIGROUP_NOGROUP_SUB16 (0x7 << 8) +#define SCB_AIRCR_PRIGROUP_MASK (0x7 << 8) +#define SCB_AIRCR_PRIGROUP_SHIFT 8 +/* Bits [7:3]: reserved - must be kept cleared */ +/* SYSRESETREQ System reset request */ +#define SCB_AIRCR_SYSRESETREQ (1 << 2) +/* VECTCLRACTIVE */ +#define SCB_AIRCR_VECTCLRACTIVE (1 << 1) +/* VECTRESET */ +#define SCB_AIRCR_VECTRESET (1 << 0) + +/* --- SCB_SCR values ------------------------------------------------------ */ + +/* Bits [31:5]: reserved - must be kept cleared */ +/* SEVEONPEND Send Event on Pending bit */ +#define SCB_SCR_SEVEONPEND (1 << 4) +/* Bit 3: reserved - must be kept cleared */ +/* SLEEPDEEP */ +#define SCB_SCR_SLEEPDEEP (1 << 2) +/* SLEEPONEXIT */ +#define SCB_SCR_SLEEPONEXIT (1 << 1) +/* Bit 0: reserved - must be kept cleared */ + +/* --- SCB_CCR values ------------------------------------------------------ */ + +/* Bits [31:10]: reserved - must be kept cleared */ +/* STKALIGN */ +#define SCB_CCR_STKALIGN (1 << 9) +/* BFHFNMIGN */ +#define SCB_CCR_BFHFNMIGN (1 << 8) +/* Bits [7:5]: reserved - must be kept cleared */ +/* DIV_0_TRP */ +#define SCB_CCR_DIV_0_TRP (1 << 4) +/* UNALIGN_TRP */ +#define SCB_CCR_UNALIGN_TRP (1 << 3) +/* Bit 2: reserved - must be kept cleared */ +/* USERSETMPEND */ +#define SCB_CCR_USERSETMPEND (1 << 1) +/* NONBASETHRDENA */ +#define SCB_CCR_NONBASETHRDENA (1 << 0) + +/* --- SCB_SHPR1 values ---------------------------------------------------- */ + +/* Bits [31:24]: reserved - must be kept cleared */ +/* PRI_6[23:16]: Priority of system handler 6, usage fault */ +#define SCB_SHPR1_PRI_6_LSB 16 +/* PRI_5[15:8]: Priority of system handler 5, bus fault */ +#define SCB_SHPR1_PRI_5_LSB 8 +/* PRI_4[7:0]: Priority of system handler 4, memory management fault */ +#define SCB_SHPR1_PRI_4_LSB 0 + +/* --- SCB_SHPR2 values ---------------------------------------------------- */ + +/* PRI_11[31:24]: Priority of system handler 11, SVCall */ +#define SCB_SHPR2_PRI_11_LSB 24 +/* Bits [23:0]: reserved - must be kept cleared */ + +/* --- SCB_SHPR3 values ---------------------------------------------------- */ + +/* PRI_15[31:24]: Priority of system handler 15, SysTick exception */ +#define SCB_SHPR3_PRI_15_LSB 24 +/* PRI_14[23:16]: Priority of system handler 14, PendSV */ +#define SCB_SHPR3_PRI_14_LSB 16 +/* Bits [15:0]: reserved - must be kept cleared */ + +/* --- SCB_SHCSR values ---------------------------------------------------- */ + +/* Bits [31:19]: reserved - must be kept cleared */ +/* USGFAULTENA: Usage fault enable */ +#define SCB_SHCSR_USGFAULTENA (1 << 18) +/* BUSFAULTENA: Bus fault enable */ +#define SCB_SHCSR_BUSFAULTENA (1 << 17) +/* MEMFAULTENA: Memory management fault enable */ +#define SCB_SHCSR_MEMFAULTENA (1 << 16) +/* SVCALLPENDED: SVC call pending */ +#define SCB_SHCSR_SVCALLPENDED (1 << 15) +/* BUSFAULTPENDED: Bus fault exception pending */ +#define SCB_SHCSR_BUSFAULTPENDED (1 << 14) +/* MEMFAULTPENDED: Memory management fault exception pending */ +#define SCB_SHCSR_MEMFAULTPENDED (1 << 13) +/* USGFAULTPENDED: Usage fault exception pending */ +#define SCB_SHCSR_USGFAULTPENDED (1 << 12) +/* SYSTICKACT: SysTick exception active */ +#define SCB_SHCSR_SYSTICKACT (1 << 11) +/* PENDSVACT: PendSV exception active */ +#define SCB_SHCSR_PENDSVACT (1 << 10) +/* Bit 9: reserved - must be kept cleared */ +/* MONITORACT: Debug monitor active */ +#define SCB_SHCSR_MONITORACT (1 << 8) +/* SVCALLACT: SVC call active */ +#define SCB_SHCSR_SVCALLACT (1 << 7) +/* Bits [6:4]: reserved - must be kept cleared */ +/* USGFAULTACT: Usage fault exception active */ +#define SCB_SHCSR_USGFAULTACT (1 << 3) +/* Bit 2: reserved - must be kept cleared */ +/* BUSFAULTACT: Bus fault exception active */ +#define SCB_SHCSR_BUSFAULTACT (1 << 1) +/* MEMFAULTACT: Memory management fault exception active */ +#define SCB_SHCSR_MEMFAULTACT (1 << 0) + +/* --- SCB_CFSR values ----------------------------------------------------- */ + +/* Bits [31:26]: reserved - must be kept cleared */ +/* DIVBYZERO: Divide by zero usage fault */ +#define SCB_CFSR_DIVBYZERO (1 << 25) +/* UNALIGNED: Unaligned access usage fault */ +#define SCB_CFSR_UNALIGNED (1 << 24) +/* Bits [23:20]: reserved - must be kept cleared */ +/* NOCP: No coprocessor usage fault */ +#define SCB_CFSR_NOCP (1 << 19) +/* INVPC: Invalid PC load usage fault */ +#define SCB_CFSR_INVPC (1 << 18) +/* INVSTATE: Invalid state usage fault */ +#define SCB_CFSR_INVSTATE (1 << 17) +/* UNDEFINSTR: Undefined instruction usage fault */ +#define SCB_CFSR_UNDEFINSTR (1 << 16) +/* BFARVALID: Bus Fault Address Register (BFAR) valid flag */ +#define SCB_CFSR_BFARVALID (1 << 15) +/* Bits [14:13]: reserved - must be kept cleared */ +/* STKERR: Bus fault on stacking for exception entry */ +#define SCB_CFSR_STKERR (1 << 12) +/* UNSTKERR: Bus fault on unstacking for a return from exception */ +#define SCB_CFSR_UNSTKERR (1 << 11) +/* IMPRECISERR: Imprecise data bus error */ +#define SCB_CFSR_IMPRECISERR (1 << 10) +/* PRECISERR: Precise data bus error */ +#define SCB_CFSR_PRECISERR (1 << 9) +/* IBUSERR: Instruction bus error */ +#define SCB_CFSR_IBUSERR (1 << 8) +/* MMARVALID: Memory Management Fault Address Register (MMAR) valid flag */ +#define SCB_CFSR_MMARVALID (1 << 7) +/* Bits [6:5]: reserved - must be kept cleared */ +/* MSTKERR: Memory manager fault on stacking for exception entry */ +#define SCB_CFSR_MSTKERR (1 << 4) +/* MUNSTKERR: Memory manager fault on unstacking for a return from exception */ +#define SCB_CFSR_MUNSTKERR (1 << 3) +/* Bit 2: reserved - must be kept cleared */ +/* DACCVIOL: Data access violation flag */ +#define SCB_CFSR_DACCVIOL (1 << 1) +/* IACCVIOL: Instruction access violation flag */ +#define SCB_CFSR_IACCVIOL (1 << 0) + +/* --- SCB_HFSR values ----------------------------------------------------- */ + +/* DEBUG_VT: reserved for debug use */ +#define SCB_HFSR_DEBUG_VT (1 << 31) +/* FORCED: Forced hard fault */ +#define SCB_HFSR_FORCED (1 << 30) +/* Bits [29:2]: reserved - must be kept cleared */ +/* VECTTBL: Vector table hard fault */ +#define SCB_HFSR_VECTTBL (1 << 1) +/* Bit 0: reserved - must be kept cleared */ + +/* --- SCB_MMFAR values ---------------------------------------------------- */ + +/* MMFAR [31:0]: Memory management fault address */ + +/* --- SCB_BFAR values ----------------------------------------------------- */ + +/* BFAR [31:0]: Bus fault address */ + +/* --- SCB_CPACR values ---------------------------------------------------- */ + +/* CPACR CPn: Access privileges values */ +#define SCB_CPACR_NONE 0 /* Access denied */ +#define SCB_CPACR_PRIV 1 /* Privileged access only */ +#define SCB_CPACR_FULL 3 /* Full access */ + +/* CPACR [20:21]: Access privileges for coprocessor 10 */ +#define SCB_CPACR_CP10 (1 << 20) +/* CPACR [22:23]: Access privileges for coprocessor 11 */ +#define SCB_CPACR_CP11 (1 << 22) + +/* --- SCB functions ------------------------------------------------------- */ + +BEGIN_DECLS + +void scb_reset_core(void); +void scb_reset_system(void); +void scb_set_priority_grouping(u32 prigroup); + +/* TODO: */ + +END_DECLS + +#endif diff --git a/include/libopencm3/stm32/f1/scb.h b/include/libopencm3/stm32/f1/scb.h deleted file mode 100644 index 181aa7a..0000000 --- a/include/libopencm3/stm32/f1/scb.h +++ /dev/null @@ -1,307 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Piotr Esden-Tempski - * Copyright (C) 2010 Thomas Otto - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -#ifndef LIBOPENCM3_SCB_H -#define LIBOPENCM3_SCB_H - -#include -#include - -/* --- SCB: Registers ------------------------------------------------------ */ - -/* CPUID: CPUID base register */ -#define SCB_CPUID MMIO32(SCB_BASE + 0x00) - -/* ICSR: Interrupt Control State Register */ -#define SCB_ICSR MMIO32(SCB_BASE + 0x04) - -/* VTOR: Vector Table Offset Register */ -#define SCB_VTOR MMIO32(SCB_BASE + 0x08) - -/* AIRCR: Application Interrupt and Reset Control Register */ -#define SCB_AIRCR MMIO32(SCB_BASE + 0x0C) - -/* SCR: System Control Register */ -#define SCB_SCR MMIO32(SCB_BASE + 0x10) - -/* CCR: Configuration Control Register */ -#define SCB_CCR MMIO32(SCB_BASE + 0x14) - -/* SHP: System Handler Priority Registers */ -/* Note: 12 8bit registers */ -#define SCB_SHPR(shpr_id) MMIO8(SCB_BASE + 0x18 + shpr_id) -#define SCB_SHPR1 MMIO8(SCB_BASE + 0x18 + 1) -#define SCB_SHPR2 MMIO8(SCB_BASE + 0x18 + 2) -#define SCB_SHPR3 MMIO8(SCB_BASE + 0x18 + 3) - -/* SHCSR: System Handler Control and State Register */ -#define SCB_SHCSR MMIO32(SCB_BASE + 0x24) - -/* CFSR: Configurable Fault Status Registers */ -#define SCB_CFSR MMIO32(SCB_BASE + 0x28) - -/* HFSR: Hard Fault Status Register */ -#define SCB_HFSR MMIO32(SCB_BASE + 0x2C) - -/* DFSR: Debug Fault Status Register */ -#define SCB_DFSR MMIO32(SCB_BASE + 0x30) - -/* MMFAR: Memory Manage Fault Address Register */ -#define SCB_MMFAR MMIO32(SCB_BASE + 0x34) - -/* BFAR: Bus Fault Address Register */ -#define SCB_BFAR MMIO32(SCB_BASE + 0x38) - -/* AFSR: Auxiliary Fault Status Register */ -#define SCB_AFSR MMIO32(SCB_BASE + 0x3C) - -/* --- SCB values ---------------------------------------------------------- */ - -/* --- SCB_CPUID values ---------------------------------------------------- */ - -/* Implementer[31:24]: Implementer code */ -#define SCP_CPUID_IMPLEMENTER_LSB 24 -/* Variant[23:20]: Variant number */ -#define SCP_CPUID_VARIANT_LSB 20 -/* Constant[19:16]: Reads as 0xF */ -#define SCP_CPUID_CONSTANT_LSB 16 -/* PartNo[15:4]: Part number of the processor */ -#define SCP_CPUID_PARTNO_LSB 4 -/* Revision[3:0]: Revision number */ -#define SCP_CPUID_REVISION_LSB 0 - -/* --- SCB_ICSR values ----------------------------------------------------- */ - -/* NMIPENDSET: NMI set-pending bit */ -#define SCB_ICSR_NMIPENDSET (1 << 31) -/* Bits [30:29]: reserved - must be kept cleared */ -/* PENDSVSET: PendSV set-pending bit */ -#define SCB_ICSR_PENDSVSET (1 << 28) -/* PENDSVCLR: PendSV clear-pending bit */ -#define SCB_ICSR_PENDSVCLR (1 << 27) -/* PENDSTSET: SysTick exception set-pending bit */ -#define SCB_ICSR_PENDSTSET (1 << 26) -/* PENDSTCLR: SysTick exception clear-pending bit */ -#define SCB_ICSR_PENDSTCLR (1 << 25) -/* Bit 24: reserved - must be kept cleared */ -/* Bit 23: reserved for debug - reads as 0 when not in debug mode */ -/* ISRPENDING: Interrupt pending flag, excluding NMI and Faults */ -#define SCB_ICSR_ISRPENDING (1 << 22) -/* VECTPENDING[21:12] Pending vector */ -#define SCB_ICSR_VECTPENDING_LSB 12 -/* RETOBASE: Return to base level */ -#define SCB_ICSR_RETOBASE (1 << 11) -/* Bits [10:9]: reserved - must be kept cleared */ -/* VECTACTIVE[8:0] Active vector */ -#define SCB_ICSR_VECTACTIVE_LSB 0 - -/* --- SCB_VTOR values ----------------------------------------------------- */ - -/* Bits [31:30]: reserved - must be kept cleared */ -/* TBLOFF[29:9]: Vector table base offset field */ -#define SCB_VTOR_TBLOFF_LSB 9 /* inconsistent datasheet - LSB could be 11 */ - -/* --- SCB_AIRCR values ---------------------------------------------------- */ - -/* VECTKEYSTAT[31:16]/ VECTKEY[31:16] Register key */ -#define SCB_AIRCR_VECTKEYSTAT_LSB 16 -#define SCB_AIRCR_VECTKEY 0x05FA0000 -/* ENDIANESS Data endianness bit */ -#define SCB_AIRCR_ENDIANESS (1 << 15) -/* Bits [14:11]: reserved - must be kept cleared */ -/* PRIGROUP[10:8]: Interrupt priority grouping field */ -#define SCB_AIRCR_PRIGROUP_GROUP16_NOSUB (0x3 << 8) -#define SCB_AIRCR_PRIGROUP_GROUP8_SUB2 (0x4 << 8) -#define SCB_AIRCR_PRIGROUP_GROUP4_SUB4 (0x5 << 8) -#define SCB_AIRCR_PRIGROUP_GROUP2_SUB8 (0x6 << 8) -#define SCB_AIRCR_PRIGROUP_NOGROUP_SUB16 (0x7 << 8) -#define SCB_AIRCR_PRIGROUP_MASK (0x7 << 8) -#define SCB_AIRCR_PRIGROUP_SHIFT 8 -/* Bits [7:3]: reserved - must be kept cleared */ -/* SYSRESETREQ System reset request */ -#define SCB_AIRCR_SYSRESETREQ (1 << 2) -/* VECTCLRACTIVE */ -#define SCB_AIRCR_VECTCLRACTIVE (1 << 1) -/* VECTRESET */ -#define SCB_AIRCR_VECTRESET (1 << 0) - -/* --- SCB_SCR values ------------------------------------------------------ */ - -/* Bits [31:5]: reserved - must be kept cleared */ -/* SEVEONPEND Send Event on Pending bit */ -#define SCB_SCR_SEVEONPEND (1 << 4) -/* Bit 3: reserved - must be kept cleared */ -/* SLEEPDEEP */ -#define SCB_SCR_SLEEPDEEP (1 << 2) -/* SLEEPONEXIT */ -#define SCB_SCR_SLEEPONEXIT (1 << 1) -/* Bit 0: reserved - must be kept cleared */ - -/* --- SCB_CCR values ------------------------------------------------------ */ - -/* Bits [31:10]: reserved - must be kept cleared */ -/* STKALIGN */ -#define SCB_CCR_STKALIGN (1 << 9) -/* BFHFNMIGN */ -#define SCB_CCR_BFHFNMIGN (1 << 8) -/* Bits [7:5]: reserved - must be kept cleared */ -/* DIV_0_TRP */ -#define SCB_CCR_DIV_0_TRP (1 << 4) -/* UNALIGN_TRP */ -#define SCB_CCR_UNALIGN_TRP (1 << 3) -/* Bit 2: reserved - must be kept cleared */ -/* USERSETMPEND */ -#define SCB_CCR_USERSETMPEND (1 << 1) -/* NONBASETHRDENA */ -#define SCB_CCR_NONBASETHRDENA (1 << 0) - -/* --- SCB_SHPR1 values ---------------------------------------------------- */ - -/* Bits [31:24]: reserved - must be kept cleared */ -/* PRI_6[23:16]: Priority of system handler 6, usage fault */ -#define SCB_SHPR1_PRI_6_LSB 16 -/* PRI_5[15:8]: Priority of system handler 5, bus fault */ -#define SCB_SHPR1_PRI_5_LSB 8 -/* PRI_4[7:0]: Priority of system handler 4, memory management fault */ -#define SCB_SHPR1_PRI_4_LSB 0 - -/* --- SCB_SHPR2 values ---------------------------------------------------- */ - -/* PRI_11[31:24]: Priority of system handler 11, SVCall */ -#define SCB_SHPR2_PRI_11_LSB 24 -/* Bits [23:0]: reserved - must be kept cleared */ - -/* --- SCB_SHPR3 values ---------------------------------------------------- */ - -/* PRI_15[31:24]: Priority of system handler 15, SysTick exception */ -#define SCB_SHPR3_PRI_15_LSB 24 -/* PRI_14[23:16]: Priority of system handler 14, PendSV */ -#define SCB_SHPR3_PRI_14_LSB 16 -/* Bits [15:0]: reserved - must be kept cleared */ - -/* --- SCB_SHCSR values ---------------------------------------------------- */ - -/* Bits [31:19]: reserved - must be kept cleared */ -/* USGFAULTENA: Usage fault enable */ -#define SCB_SHCSR_USGFAULTENA (1 << 18) -/* BUSFAULTENA: Bus fault enable */ -#define SCB_SHCSR_BUSFAULTENA (1 << 17) -/* MEMFAULTENA: Memory management fault enable */ -#define SCB_SHCSR_MEMFAULTENA (1 << 16) -/* SVCALLPENDED: SVC call pending */ -#define SCB_SHCSR_SVCALLPENDED (1 << 15) -/* BUSFAULTPENDED: Bus fault exception pending */ -#define SCB_SHCSR_BUSFAULTPENDED (1 << 14) -/* MEMFAULTPENDED: Memory management fault exception pending */ -#define SCB_SHCSR_MEMFAULTPENDED (1 << 13) -/* USGFAULTPENDED: Usage fault exception pending */ -#define SCB_SHCSR_USGFAULTPENDED (1 << 12) -/* SYSTICKACT: SysTick exception active */ -#define SCB_SHCSR_SYSTICKACT (1 << 11) -/* PENDSVACT: PendSV exception active */ -#define SCB_SHCSR_PENDSVACT (1 << 10) -/* Bit 9: reserved - must be kept cleared */ -/* MONITORACT: Debug monitor active */ -#define SCB_SHCSR_MONITORACT (1 << 8) -/* SVCALLACT: SVC call active */ -#define SCB_SHCSR_SVCALLACT (1 << 7) -/* Bits [6:4]: reserved - must be kept cleared */ -/* USGFAULTACT: Usage fault exception active */ -#define SCB_SHCSR_USGFAULTACT (1 << 3) -/* Bit 2: reserved - must be kept cleared */ -/* BUSFAULTACT: Bus fault exception active */ -#define SCB_SHCSR_BUSFAULTACT (1 << 1) -/* MEMFAULTACT: Memory management fault exception active */ -#define SCB_SHCSR_MEMFAULTACT (1 << 0) - -/* --- SCB_CFSR values ----------------------------------------------------- */ - -/* Bits [31:26]: reserved - must be kept cleared */ -/* DIVBYZERO: Divide by zero usage fault */ -#define SCB_CFSR_DIVBYZERO (1 << 25) -/* UNALIGNED: Unaligned access usage fault */ -#define SCB_CFSR_UNALIGNED (1 << 24) -/* Bits [23:20]: reserved - must be kept cleared */ -/* NOCP: No coprocessor usage fault */ -#define SCB_CFSR_NOCP (1 << 19) -/* INVPC: Invalid PC load usage fault */ -#define SCB_CFSR_INVPC (1 << 18) -/* INVSTATE: Invalid state usage fault */ -#define SCB_CFSR_INVSTATE (1 << 17) -/* UNDEFINSTR: Undefined instruction usage fault */ -#define SCB_CFSR_UNDEFINSTR (1 << 16) -/* BFARVALID: Bus Fault Address Register (BFAR) valid flag */ -#define SCB_CFSR_BFARVALID (1 << 15) -/* Bits [14:13]: reserved - must be kept cleared */ -/* STKERR: Bus fault on stacking for exception entry */ -#define SCB_CFSR_STKERR (1 << 12) -/* UNSTKERR: Bus fault on unstacking for a return from exception */ -#define SCB_CFSR_UNSTKERR (1 << 11) -/* IMPRECISERR: Imprecise data bus error */ -#define SCB_CFSR_IMPRECISERR (1 << 10) -/* PRECISERR: Precise data bus error */ -#define SCB_CFSR_PRECISERR (1 << 9) -/* IBUSERR: Instruction bus error */ -#define SCB_CFSR_IBUSERR (1 << 8) -/* MMARVALID: Memory Management Fault Address Register (MMAR) valid flag */ -#define SCB_CFSR_MMARVALID (1 << 7) -/* Bits [6:5]: reserved - must be kept cleared */ -/* MSTKERR: Memory manager fault on stacking for exception entry */ -#define SCB_CFSR_MSTKERR (1 << 4) -/* MUNSTKERR: Memory manager fault on unstacking for a return from exception */ -#define SCB_CFSR_MUNSTKERR (1 << 3) -/* Bit 2: reserved - must be kept cleared */ -/* DACCVIOL: Data access violation flag */ -#define SCB_CFSR_DACCVIOL (1 << 1) -/* IACCVIOL: Instruction access violation flag */ -#define SCB_CFSR_IACCVIOL (1 << 0) - -/* --- SCB_HFSR values ----------------------------------------------------- */ - -/* DEBUG_VT: reserved for debug use */ -#define SCB_HFSR_DEBUG_VT (1 << 31) -/* FORCED: Forced hard fault */ -#define SCB_HFSR_FORCED (1 << 30) -/* Bits [29:2]: reserved - must be kept cleared */ -/* VECTTBL: Vector table hard fault */ -#define SCB_HFSR_VECTTBL (1 << 1) -/* Bit 0: reserved - must be kept cleared */ - -/* --- SCB_MMFAR values ---------------------------------------------------- */ - -/* MMFAR [31:0]: Memory management fault address */ - -/* --- SCB_BFAR values ----------------------------------------------------- */ - -/* BFAR [31:0]: Bus fault address */ - -/* --- SCB functions ------------------------------------------------------- */ - -BEGIN_DECLS - -void scb_reset_core(void); -void scb_reset_system(void); -void scb_set_priority_grouping(u32 prigroup); - -/* TODO: */ - -END_DECLS - -#endif diff --git a/include/libopencm3/stm32/f2/scb.h b/include/libopencm3/stm32/f2/scb.h deleted file mode 100644 index 181aa7a..0000000 --- a/include/libopencm3/stm32/f2/scb.h +++ /dev/null @@ -1,307 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Piotr Esden-Tempski - * Copyright (C) 2010 Thomas Otto - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -#ifndef LIBOPENCM3_SCB_H -#define LIBOPENCM3_SCB_H - -#include -#include - -/* --- SCB: Registers ------------------------------------------------------ */ - -/* CPUID: CPUID base register */ -#define SCB_CPUID MMIO32(SCB_BASE + 0x00) - -/* ICSR: Interrupt Control State Register */ -#define SCB_ICSR MMIO32(SCB_BASE + 0x04) - -/* VTOR: Vector Table Offset Register */ -#define SCB_VTOR MMIO32(SCB_BASE + 0x08) - -/* AIRCR: Application Interrupt and Reset Control Register */ -#define SCB_AIRCR MMIO32(SCB_BASE + 0x0C) - -/* SCR: System Control Register */ -#define SCB_SCR MMIO32(SCB_BASE + 0x10) - -/* CCR: Configuration Control Register */ -#define SCB_CCR MMIO32(SCB_BASE + 0x14) - -/* SHP: System Handler Priority Registers */ -/* Note: 12 8bit registers */ -#define SCB_SHPR(shpr_id) MMIO8(SCB_BASE + 0x18 + shpr_id) -#define SCB_SHPR1 MMIO8(SCB_BASE + 0x18 + 1) -#define SCB_SHPR2 MMIO8(SCB_BASE + 0x18 + 2) -#define SCB_SHPR3 MMIO8(SCB_BASE + 0x18 + 3) - -/* SHCSR: System Handler Control and State Register */ -#define SCB_SHCSR MMIO32(SCB_BASE + 0x24) - -/* CFSR: Configurable Fault Status Registers */ -#define SCB_CFSR MMIO32(SCB_BASE + 0x28) - -/* HFSR: Hard Fault Status Register */ -#define SCB_HFSR MMIO32(SCB_BASE + 0x2C) - -/* DFSR: Debug Fault Status Register */ -#define SCB_DFSR MMIO32(SCB_BASE + 0x30) - -/* MMFAR: Memory Manage Fault Address Register */ -#define SCB_MMFAR MMIO32(SCB_BASE + 0x34) - -/* BFAR: Bus Fault Address Register */ -#define SCB_BFAR MMIO32(SCB_BASE + 0x38) - -/* AFSR: Auxiliary Fault Status Register */ -#define SCB_AFSR MMIO32(SCB_BASE + 0x3C) - -/* --- SCB values ---------------------------------------------------------- */ - -/* --- SCB_CPUID values ---------------------------------------------------- */ - -/* Implementer[31:24]: Implementer code */ -#define SCP_CPUID_IMPLEMENTER_LSB 24 -/* Variant[23:20]: Variant number */ -#define SCP_CPUID_VARIANT_LSB 20 -/* Constant[19:16]: Reads as 0xF */ -#define SCP_CPUID_CONSTANT_LSB 16 -/* PartNo[15:4]: Part number of the processor */ -#define SCP_CPUID_PARTNO_LSB 4 -/* Revision[3:0]: Revision number */ -#define SCP_CPUID_REVISION_LSB 0 - -/* --- SCB_ICSR values ----------------------------------------------------- */ - -/* NMIPENDSET: NMI set-pending bit */ -#define SCB_ICSR_NMIPENDSET (1 << 31) -/* Bits [30:29]: reserved - must be kept cleared */ -/* PENDSVSET: PendSV set-pending bit */ -#define SCB_ICSR_PENDSVSET (1 << 28) -/* PENDSVCLR: PendSV clear-pending bit */ -#define SCB_ICSR_PENDSVCLR (1 << 27) -/* PENDSTSET: SysTick exception set-pending bit */ -#define SCB_ICSR_PENDSTSET (1 << 26) -/* PENDSTCLR: SysTick exception clear-pending bit */ -#define SCB_ICSR_PENDSTCLR (1 << 25) -/* Bit 24: reserved - must be kept cleared */ -/* Bit 23: reserved for debug - reads as 0 when not in debug mode */ -/* ISRPENDING: Interrupt pending flag, excluding NMI and Faults */ -#define SCB_ICSR_ISRPENDING (1 << 22) -/* VECTPENDING[21:12] Pending vector */ -#define SCB_ICSR_VECTPENDING_LSB 12 -/* RETOBASE: Return to base level */ -#define SCB_ICSR_RETOBASE (1 << 11) -/* Bits [10:9]: reserved - must be kept cleared */ -/* VECTACTIVE[8:0] Active vector */ -#define SCB_ICSR_VECTACTIVE_LSB 0 - -/* --- SCB_VTOR values ----------------------------------------------------- */ - -/* Bits [31:30]: reserved - must be kept cleared */ -/* TBLOFF[29:9]: Vector table base offset field */ -#define SCB_VTOR_TBLOFF_LSB 9 /* inconsistent datasheet - LSB could be 11 */ - -/* --- SCB_AIRCR values ---------------------------------------------------- */ - -/* VECTKEYSTAT[31:16]/ VECTKEY[31:16] Register key */ -#define SCB_AIRCR_VECTKEYSTAT_LSB 16 -#define SCB_AIRCR_VECTKEY 0x05FA0000 -/* ENDIANESS Data endianness bit */ -#define SCB_AIRCR_ENDIANESS (1 << 15) -/* Bits [14:11]: reserved - must be kept cleared */ -/* PRIGROUP[10:8]: Interrupt priority grouping field */ -#define SCB_AIRCR_PRIGROUP_GROUP16_NOSUB (0x3 << 8) -#define SCB_AIRCR_PRIGROUP_GROUP8_SUB2 (0x4 << 8) -#define SCB_AIRCR_PRIGROUP_GROUP4_SUB4 (0x5 << 8) -#define SCB_AIRCR_PRIGROUP_GROUP2_SUB8 (0x6 << 8) -#define SCB_AIRCR_PRIGROUP_NOGROUP_SUB16 (0x7 << 8) -#define SCB_AIRCR_PRIGROUP_MASK (0x7 << 8) -#define SCB_AIRCR_PRIGROUP_SHIFT 8 -/* Bits [7:3]: reserved - must be kept cleared */ -/* SYSRESETREQ System reset request */ -#define SCB_AIRCR_SYSRESETREQ (1 << 2) -/* VECTCLRACTIVE */ -#define SCB_AIRCR_VECTCLRACTIVE (1 << 1) -/* VECTRESET */ -#define SCB_AIRCR_VECTRESET (1 << 0) - -/* --- SCB_SCR values ------------------------------------------------------ */ - -/* Bits [31:5]: reserved - must be kept cleared */ -/* SEVEONPEND Send Event on Pending bit */ -#define SCB_SCR_SEVEONPEND (1 << 4) -/* Bit 3: reserved - must be kept cleared */ -/* SLEEPDEEP */ -#define SCB_SCR_SLEEPDEEP (1 << 2) -/* SLEEPONEXIT */ -#define SCB_SCR_SLEEPONEXIT (1 << 1) -/* Bit 0: reserved - must be kept cleared */ - -/* --- SCB_CCR values ------------------------------------------------------ */ - -/* Bits [31:10]: reserved - must be kept cleared */ -/* STKALIGN */ -#define SCB_CCR_STKALIGN (1 << 9) -/* BFHFNMIGN */ -#define SCB_CCR_BFHFNMIGN (1 << 8) -/* Bits [7:5]: reserved - must be kept cleared */ -/* DIV_0_TRP */ -#define SCB_CCR_DIV_0_TRP (1 << 4) -/* UNALIGN_TRP */ -#define SCB_CCR_UNALIGN_TRP (1 << 3) -/* Bit 2: reserved - must be kept cleared */ -/* USERSETMPEND */ -#define SCB_CCR_USERSETMPEND (1 << 1) -/* NONBASETHRDENA */ -#define SCB_CCR_NONBASETHRDENA (1 << 0) - -/* --- SCB_SHPR1 values ---------------------------------------------------- */ - -/* Bits [31:24]: reserved - must be kept cleared */ -/* PRI_6[23:16]: Priority of system handler 6, usage fault */ -#define SCB_SHPR1_PRI_6_LSB 16 -/* PRI_5[15:8]: Priority of system handler 5, bus fault */ -#define SCB_SHPR1_PRI_5_LSB 8 -/* PRI_4[7:0]: Priority of system handler 4, memory management fault */ -#define SCB_SHPR1_PRI_4_LSB 0 - -/* --- SCB_SHPR2 values ---------------------------------------------------- */ - -/* PRI_11[31:24]: Priority of system handler 11, SVCall */ -#define SCB_SHPR2_PRI_11_LSB 24 -/* Bits [23:0]: reserved - must be kept cleared */ - -/* --- SCB_SHPR3 values ---------------------------------------------------- */ - -/* PRI_15[31:24]: Priority of system handler 15, SysTick exception */ -#define SCB_SHPR3_PRI_15_LSB 24 -/* PRI_14[23:16]: Priority of system handler 14, PendSV */ -#define SCB_SHPR3_PRI_14_LSB 16 -/* Bits [15:0]: reserved - must be kept cleared */ - -/* --- SCB_SHCSR values ---------------------------------------------------- */ - -/* Bits [31:19]: reserved - must be kept cleared */ -/* USGFAULTENA: Usage fault enable */ -#define SCB_SHCSR_USGFAULTENA (1 << 18) -/* BUSFAULTENA: Bus fault enable */ -#define SCB_SHCSR_BUSFAULTENA (1 << 17) -/* MEMFAULTENA: Memory management fault enable */ -#define SCB_SHCSR_MEMFAULTENA (1 << 16) -/* SVCALLPENDED: SVC call pending */ -#define SCB_SHCSR_SVCALLPENDED (1 << 15) -/* BUSFAULTPENDED: Bus fault exception pending */ -#define SCB_SHCSR_BUSFAULTPENDED (1 << 14) -/* MEMFAULTPENDED: Memory management fault exception pending */ -#define SCB_SHCSR_MEMFAULTPENDED (1 << 13) -/* USGFAULTPENDED: Usage fault exception pending */ -#define SCB_SHCSR_USGFAULTPENDED (1 << 12) -/* SYSTICKACT: SysTick exception active */ -#define SCB_SHCSR_SYSTICKACT (1 << 11) -/* PENDSVACT: PendSV exception active */ -#define SCB_SHCSR_PENDSVACT (1 << 10) -/* Bit 9: reserved - must be kept cleared */ -/* MONITORACT: Debug monitor active */ -#define SCB_SHCSR_MONITORACT (1 << 8) -/* SVCALLACT: SVC call active */ -#define SCB_SHCSR_SVCALLACT (1 << 7) -/* Bits [6:4]: reserved - must be kept cleared */ -/* USGFAULTACT: Usage fault exception active */ -#define SCB_SHCSR_USGFAULTACT (1 << 3) -/* Bit 2: reserved - must be kept cleared */ -/* BUSFAULTACT: Bus fault exception active */ -#define SCB_SHCSR_BUSFAULTACT (1 << 1) -/* MEMFAULTACT: Memory management fault exception active */ -#define SCB_SHCSR_MEMFAULTACT (1 << 0) - -/* --- SCB_CFSR values ----------------------------------------------------- */ - -/* Bits [31:26]: reserved - must be kept cleared */ -/* DIVBYZERO: Divide by zero usage fault */ -#define SCB_CFSR_DIVBYZERO (1 << 25) -/* UNALIGNED: Unaligned access usage fault */ -#define SCB_CFSR_UNALIGNED (1 << 24) -/* Bits [23:20]: reserved - must be kept cleared */ -/* NOCP: No coprocessor usage fault */ -#define SCB_CFSR_NOCP (1 << 19) -/* INVPC: Invalid PC load usage fault */ -#define SCB_CFSR_INVPC (1 << 18) -/* INVSTATE: Invalid state usage fault */ -#define SCB_CFSR_INVSTATE (1 << 17) -/* UNDEFINSTR: Undefined instruction usage fault */ -#define SCB_CFSR_UNDEFINSTR (1 << 16) -/* BFARVALID: Bus Fault Address Register (BFAR) valid flag */ -#define SCB_CFSR_BFARVALID (1 << 15) -/* Bits [14:13]: reserved - must be kept cleared */ -/* STKERR: Bus fault on stacking for exception entry */ -#define SCB_CFSR_STKERR (1 << 12) -/* UNSTKERR: Bus fault on unstacking for a return from exception */ -#define SCB_CFSR_UNSTKERR (1 << 11) -/* IMPRECISERR: Imprecise data bus error */ -#define SCB_CFSR_IMPRECISERR (1 << 10) -/* PRECISERR: Precise data bus error */ -#define SCB_CFSR_PRECISERR (1 << 9) -/* IBUSERR: Instruction bus error */ -#define SCB_CFSR_IBUSERR (1 << 8) -/* MMARVALID: Memory Management Fault Address Register (MMAR) valid flag */ -#define SCB_CFSR_MMARVALID (1 << 7) -/* Bits [6:5]: reserved - must be kept cleared */ -/* MSTKERR: Memory manager fault on stacking for exception entry */ -#define SCB_CFSR_MSTKERR (1 << 4) -/* MUNSTKERR: Memory manager fault on unstacking for a return from exception */ -#define SCB_CFSR_MUNSTKERR (1 << 3) -/* Bit 2: reserved - must be kept cleared */ -/* DACCVIOL: Data access violation flag */ -#define SCB_CFSR_DACCVIOL (1 << 1) -/* IACCVIOL: Instruction access violation flag */ -#define SCB_CFSR_IACCVIOL (1 << 0) - -/* --- SCB_HFSR values ----------------------------------------------------- */ - -/* DEBUG_VT: reserved for debug use */ -#define SCB_HFSR_DEBUG_VT (1 << 31) -/* FORCED: Forced hard fault */ -#define SCB_HFSR_FORCED (1 << 30) -/* Bits [29:2]: reserved - must be kept cleared */ -/* VECTTBL: Vector table hard fault */ -#define SCB_HFSR_VECTTBL (1 << 1) -/* Bit 0: reserved - must be kept cleared */ - -/* --- SCB_MMFAR values ---------------------------------------------------- */ - -/* MMFAR [31:0]: Memory management fault address */ - -/* --- SCB_BFAR values ----------------------------------------------------- */ - -/* BFAR [31:0]: Bus fault address */ - -/* --- SCB functions ------------------------------------------------------- */ - -BEGIN_DECLS - -void scb_reset_core(void); -void scb_reset_system(void); -void scb_set_priority_grouping(u32 prigroup); - -/* TODO: */ - -END_DECLS - -#endif diff --git a/include/libopencm3/stm32/f4/scb.h b/include/libopencm3/stm32/f4/scb.h deleted file mode 100644 index 7187ca9..0000000 --- a/include/libopencm3/stm32/f4/scb.h +++ /dev/null @@ -1,376 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Piotr Esden-Tempski - * Copyright (C) 2010 Thomas Otto - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -#ifndef LIBOPENCM3_SCB_H -#define LIBOPENCM3_SCB_H - -#include -#include - -/* --- SCB: Registers ------------------------------------------------------ */ - -/* CPUID: CPUID base register */ -#define SCB_CPUID MMIO32(SCB_BASE + 0x00) - -/* ICSR: Interrupt Control State Register */ -#define SCB_ICSR MMIO32(SCB_BASE + 0x04) - -/* VTOR: Vector Table Offset Register */ -#define SCB_VTOR MMIO32(SCB_BASE + 0x08) - -/* AIRCR: Application Interrupt and Reset Control Register */ -#define SCB_AIRCR MMIO32(SCB_BASE + 0x0C) - -/* SCR: System Control Register */ -#define SCB_SCR MMIO32(SCB_BASE + 0x10) - -/* CCR: Configuration Control Register */ -#define SCB_CCR MMIO32(SCB_BASE + 0x14) - -/* SHP: System Handler Priority Registers */ -/* Note: 12 8bit registers */ -#define SCB_SHPR(shpr_id) MMIO8(SCB_BASE + 0x18 + shpr_id) -#define SCB_SHPR1 MMIO8(SCB_BASE + 0x18 + 1) -#define SCB_SHPR2 MMIO8(SCB_BASE + 0x18 + 2) -#define SCB_SHPR3 MMIO8(SCB_BASE + 0x18 + 3) - -/* SHCSR: System Handler Control and State Register */ -#define SCB_SHCSR MMIO32(SCB_BASE + 0x24) - -/* CFSR: Configurable Fault Status Registers */ -#define SCB_CFSR MMIO32(SCB_BASE + 0x28) - -/* HFSR: Hard Fault Status Register */ -#define SCB_HFSR MMIO32(SCB_BASE + 0x2C) - -/* DFSR: Debug Fault Status Register */ -#define SCB_DFSR MMIO32(SCB_BASE + 0x30) - -/* MMFAR: Memory Manage Fault Address Register */ -#define SCB_MMFAR MMIO32(SCB_BASE + 0x34) - -/* BFAR: Bus Fault Address Register */ -#define SCB_BFAR MMIO32(SCB_BASE + 0x38) - -/* AFSR: Auxiliary Fault Status Register */ -#define SCB_AFSR MMIO32(SCB_BASE + 0x3C) - -/* ID_PFR0: Processor Feature Register 0 */ -#define SCB_ID_PFR0 MMIO32(SCB_BASE + 0x40) - -/* ID_PFR1: Processor Feature Register 1 */ -#define SCB_ID_PFR1 MMIO32(SCB_BASE + 0x44) - -/* ID_DFR0: Debug Features Register 0 */ -#define SCB_ID_DFR0 MMIO32(SCB_BASE + 0x48) - -/* ID_AFR0: Auxiliary Features Register 0 */ -#define SCB_ID_AFR0 MMIO32(SCB_BASE + 0x4C) - -/* ID_MMFR0: Memory Model Feature Register 0 */ -#define SCB_ID_MMFR0 MMIO32(SCB_BASE + 0x50) - -/* ID_MMFR1: Memory Model Feature Register 1 */ -#define SCB_ID_MMFR1 MMIO32(SCB_BASE + 0x54) - -/* ID_MMFR2: Memory Model Feature Register 2 */ -#define SCB_ID_MMFR2 MMIO32(SCB_BASE + 0x58) - -/* ID_MMFR3: Memory Model Feature Register 3 */ -#define SCB_ID_MMFR3 MMIO32(SCB_BASE + 0x5C) - -/* ID_ISAR0: Instruction Set Attributes Register 0 */ -#define SCB_ID_ISAR0 MMIO32(SCB_BASE + 0x60) - -/* ID_ISAR1: Instruction Set Attributes Register 1 */ -#define SCB_ID_ISAR1 MMIO32(SCB_BASE + 0x64) - -/* ID_ISAR2: Instruction Set Attributes Register 2 */ -#define SCB_ID_ISAR2 MMIO32(SCB_BASE + 0x68) - -/* ID_ISAR3: Instruction Set Attributes Register 3 */ -#define SCB_ID_ISAR3 MMIO32(SCB_BASE + 0x6C) - -/* ID_ISAR4: Instruction Set Attributes Register 4 */ -#define SCB_ID_ISAR4 MMIO32(SCB_BASE + 0x70) - -/* CPACR: Coprocessor Access Control Register */ -#define SCB_CPACR MMIO32(SCB_BASE + 0x88) - -/* FPCCR: Floating-Point Context Control Register */ -#define SCB_FPCCR MMIO32(SCB_BASE + 0x234) - -/* FPCAR: Floating-Point Context Address Register */ -#define SCB_FPCAR MMIO32(SCB_BASE + 0x238) - -/* FPDSCR: Floating-Point Default Status Control Register */ -#define SCB_FPDSCR MMIO32(SCB_BASE + 0x23C) - -/* MVFR0: Media and Floating-Point Feature Register 0 */ -#define SCB_MVFR0 MMIO32(SCB_BASE + 0x240) - -/* MVFR1: Media and Floating-Point Feature Register 1 */ -#define SCB_MVFR1 MMIO32(SCB_BASE + 0x244) - -/* --- SCB values ---------------------------------------------------------- */ - -/* --- SCB_CPUID values ---------------------------------------------------- */ - -/* Implementer[31:24]: Implementer code */ -#define SCP_CPUID_IMPLEMENTER_LSB 24 -/* Variant[23:20]: Variant number */ -#define SCP_CPUID_VARIANT_LSB 20 -/* Constant[19:16]: Reads as 0xF */ -#define SCP_CPUID_CONSTANT_LSB 16 -/* PartNo[15:4]: Part number of the processor */ -#define SCP_CPUID_PARTNO_LSB 4 -/* Revision[3:0]: Revision number */ -#define SCP_CPUID_REVISION_LSB 0 - -/* --- SCB_ICSR values ----------------------------------------------------- */ - -/* NMIPENDSET: NMI set-pending bit */ -#define SCB_ICSR_NMIPENDSET (1 << 31) -/* Bits [30:29]: reserved - must be kept cleared */ -/* PENDSVSET: PendSV set-pending bit */ -#define SCB_ICSR_PENDSVSET (1 << 28) -/* PENDSVCLR: PendSV clear-pending bit */ -#define SCB_ICSR_PENDSVCLR (1 << 27) -/* PENDSTSET: SysTick exception set-pending bit */ -#define SCB_ICSR_PENDSTSET (1 << 26) -/* PENDSTCLR: SysTick exception clear-pending bit */ -#define SCB_ICSR_PENDSTCLR (1 << 25) -/* Bit 24: reserved - must be kept cleared */ -/* Bit 23: reserved for debug - reads as 0 when not in debug mode */ -/* ISRPENDING: Interrupt pending flag, excluding NMI and Faults */ -#define SCB_ICSR_ISRPENDING (1 << 22) -/* VECTPENDING[21:12] Pending vector */ -#define SCB_ICSR_VECTPENDING_LSB 12 -/* RETOBASE: Return to base level */ -#define SCB_ICSR_RETOBASE (1 << 11) -/* Bits [10:9]: reserved - must be kept cleared */ -/* VECTACTIVE[8:0] Active vector */ -#define SCB_ICSR_VECTACTIVE_LSB 0 - -/* --- SCB_VTOR values ----------------------------------------------------- */ - -/* Bits [31:30]: reserved - must be kept cleared */ -/* TBLOFF[29:9]: Vector table base offset field */ -#define SCB_VTOR_TBLOFF_LSB 9 /* inconsistent datasheet - LSB could be 11 */ - -/* --- SCB_AIRCR values ---------------------------------------------------- */ - -/* VECTKEYSTAT[31:16]/ VECTKEY[31:16] Register key */ -#define SCB_AIRCR_VECTKEYSTAT_LSB 16 -#define SCB_AIRCR_VECTKEY 0x05FA0000 -/* ENDIANESS Data endianness bit */ -#define SCB_AIRCR_ENDIANESS (1 << 15) -/* Bits [14:11]: reserved - must be kept cleared */ -/* PRIGROUP[10:8]: Interrupt priority grouping field */ -#define SCB_AIRCR_PRIGROUP_GROUP16_NOSUB (0x3 << 8) -#define SCB_AIRCR_PRIGROUP_GROUP8_SUB2 (0x4 << 8) -#define SCB_AIRCR_PRIGROUP_GROUP4_SUB4 (0x5 << 8) -#define SCB_AIRCR_PRIGROUP_GROUP2_SUB8 (0x6 << 8) -#define SCB_AIRCR_PRIGROUP_NOGROUP_SUB16 (0x7 << 8) -#define SCB_AIRCR_PRIGROUP_MASK (0x7 << 8) -#define SCB_AIRCR_PRIGROUP_SHIFT 8 -/* Bits [7:3]: reserved - must be kept cleared */ -/* SYSRESETREQ System reset request */ -#define SCB_AIRCR_SYSRESETREQ (1 << 2) -/* VECTCLRACTIVE */ -#define SCB_AIRCR_VECTCLRACTIVE (1 << 1) -/* VECTRESET */ -#define SCB_AIRCR_VECTRESET (1 << 0) - -/* --- SCB_SCR values ------------------------------------------------------ */ - -/* Bits [31:5]: reserved - must be kept cleared */ -/* SEVEONPEND Send Event on Pending bit */ -#define SCB_SCR_SEVEONPEND (1 << 4) -/* Bit 3: reserved - must be kept cleared */ -/* SLEEPDEEP */ -#define SCB_SCR_SLEEPDEEP (1 << 2) -/* SLEEPONEXIT */ -#define SCB_SCR_SLEEPONEXIT (1 << 1) -/* Bit 0: reserved - must be kept cleared */ - -/* --- SCB_CCR values ------------------------------------------------------ */ - -/* Bits [31:10]: reserved - must be kept cleared */ -/* STKALIGN */ -#define SCB_CCR_STKALIGN (1 << 9) -/* BFHFNMIGN */ -#define SCB_CCR_BFHFNMIGN (1 << 8) -/* Bits [7:5]: reserved - must be kept cleared */ -/* DIV_0_TRP */ -#define SCB_CCR_DIV_0_TRP (1 << 4) -/* UNALIGN_TRP */ -#define SCB_CCR_UNALIGN_TRP (1 << 3) -/* Bit 2: reserved - must be kept cleared */ -/* USERSETMPEND */ -#define SCB_CCR_USERSETMPEND (1 << 1) -/* NONBASETHRDENA */ -#define SCB_CCR_NONBASETHRDENA (1 << 0) - -/* --- SCB_SHPR1 values ---------------------------------------------------- */ - -/* Bits [31:24]: reserved - must be kept cleared */ -/* PRI_6[23:16]: Priority of system handler 6, usage fault */ -#define SCB_SHPR1_PRI_6_LSB 16 -/* PRI_5[15:8]: Priority of system handler 5, bus fault */ -#define SCB_SHPR1_PRI_5_LSB 8 -/* PRI_4[7:0]: Priority of system handler 4, memory management fault */ -#define SCB_SHPR1_PRI_4_LSB 0 - -/* --- SCB_SHPR2 values ---------------------------------------------------- */ - -/* PRI_11[31:24]: Priority of system handler 11, SVCall */ -#define SCB_SHPR2_PRI_11_LSB 24 -/* Bits [23:0]: reserved - must be kept cleared */ - -/* --- SCB_SHPR3 values ---------------------------------------------------- */ - -/* PRI_15[31:24]: Priority of system handler 15, SysTick exception */ -#define SCB_SHPR3_PRI_15_LSB 24 -/* PRI_14[23:16]: Priority of system handler 14, PendSV */ -#define SCB_SHPR3_PRI_14_LSB 16 -/* Bits [15:0]: reserved - must be kept cleared */ - -/* --- SCB_SHCSR values ---------------------------------------------------- */ - -/* Bits [31:19]: reserved - must be kept cleared */ -/* USGFAULTENA: Usage fault enable */ -#define SCB_SHCSR_USGFAULTENA (1 << 18) -/* BUSFAULTENA: Bus fault enable */ -#define SCB_SHCSR_BUSFAULTENA (1 << 17) -/* MEMFAULTENA: Memory management fault enable */ -#define SCB_SHCSR_MEMFAULTENA (1 << 16) -/* SVCALLPENDED: SVC call pending */ -#define SCB_SHCSR_SVCALLPENDED (1 << 15) -/* BUSFAULTPENDED: Bus fault exception pending */ -#define SCB_SHCSR_BUSFAULTPENDED (1 << 14) -/* MEMFAULTPENDED: Memory management fault exception pending */ -#define SCB_SHCSR_MEMFAULTPENDED (1 << 13) -/* USGFAULTPENDED: Usage fault exception pending */ -#define SCB_SHCSR_USGFAULTPENDED (1 << 12) -/* SYSTICKACT: SysTick exception active */ -#define SCB_SHCSR_SYSTICKACT (1 << 11) -/* PENDSVACT: PendSV exception active */ -#define SCB_SHCSR_PENDSVACT (1 << 10) -/* Bit 9: reserved - must be kept cleared */ -/* MONITORACT: Debug monitor active */ -#define SCB_SHCSR_MONITORACT (1 << 8) -/* SVCALLACT: SVC call active */ -#define SCB_SHCSR_SVCALLACT (1 << 7) -/* Bits [6:4]: reserved - must be kept cleared */ -/* USGFAULTACT: Usage fault exception active */ -#define SCB_SHCSR_USGFAULTACT (1 << 3) -/* Bit 2: reserved - must be kept cleared */ -/* BUSFAULTACT: Bus fault exception active */ -#define SCB_SHCSR_BUSFAULTACT (1 << 1) -/* MEMFAULTACT: Memory management fault exception active */ -#define SCB_SHCSR_MEMFAULTACT (1 << 0) - -/* --- SCB_CFSR values ----------------------------------------------------- */ - -/* Bits [31:26]: reserved - must be kept cleared */ -/* DIVBYZERO: Divide by zero usage fault */ -#define SCB_CFSR_DIVBYZERO (1 << 25) -/* UNALIGNED: Unaligned access usage fault */ -#define SCB_CFSR_UNALIGNED (1 << 24) -/* Bits [23:20]: reserved - must be kept cleared */ -/* NOCP: No coprocessor usage fault */ -#define SCB_CFSR_NOCP (1 << 19) -/* INVPC: Invalid PC load usage fault */ -#define SCB_CFSR_INVPC (1 << 18) -/* INVSTATE: Invalid state usage fault */ -#define SCB_CFSR_INVSTATE (1 << 17) -/* UNDEFINSTR: Undefined instruction usage fault */ -#define SCB_CFSR_UNDEFINSTR (1 << 16) -/* BFARVALID: Bus Fault Address Register (BFAR) valid flag */ -#define SCB_CFSR_BFARVALID (1 << 15) -/* Bits [14:13]: reserved - must be kept cleared */ -/* STKERR: Bus fault on stacking for exception entry */ -#define SCB_CFSR_STKERR (1 << 12) -/* UNSTKERR: Bus fault on unstacking for a return from exception */ -#define SCB_CFSR_UNSTKERR (1 << 11) -/* IMPRECISERR: Imprecise data bus error */ -#define SCB_CFSR_IMPRECISERR (1 << 10) -/* PRECISERR: Precise data bus error */ -#define SCB_CFSR_PRECISERR (1 << 9) -/* IBUSERR: Instruction bus error */ -#define SCB_CFSR_IBUSERR (1 << 8) -/* MMARVALID: Memory Management Fault Address Register (MMAR) valid flag */ -#define SCB_CFSR_MMARVALID (1 << 7) -/* Bits [6:5]: reserved - must be kept cleared */ -/* MSTKERR: Memory manager fault on stacking for exception entry */ -#define SCB_CFSR_MSTKERR (1 << 4) -/* MUNSTKERR: Memory manager fault on unstacking for a return from exception */ -#define SCB_CFSR_MUNSTKERR (1 << 3) -/* Bit 2: reserved - must be kept cleared */ -/* DACCVIOL: Data access violation flag */ -#define SCB_CFSR_DACCVIOL (1 << 1) -/* IACCVIOL: Instruction access violation flag */ -#define SCB_CFSR_IACCVIOL (1 << 0) - -/* --- SCB_HFSR values ----------------------------------------------------- */ - -/* DEBUG_VT: reserved for debug use */ -#define SCB_HFSR_DEBUG_VT (1 << 31) -/* FORCED: Forced hard fault */ -#define SCB_HFSR_FORCED (1 << 30) -/* Bits [29:2]: reserved - must be kept cleared */ -/* VECTTBL: Vector table hard fault */ -#define SCB_HFSR_VECTTBL (1 << 1) -/* Bit 0: reserved - must be kept cleared */ - -/* --- SCB_MMFAR values ---------------------------------------------------- */ - -/* MMFAR [31:0]: Memory management fault address */ - -/* --- SCB_BFAR values ----------------------------------------------------- */ - -/* BFAR [31:0]: Bus fault address */ - -/* --- SCB_CPACR values ---------------------------------------------------- */ - -/* CPACR CPn: Access privileges values */ -#define SCB_CPACR_NONE 0 /* Access denied */ -#define SCB_CPACR_PRIV 1 /* Privileged access only */ -#define SCB_CPACR_FULL 3 /* Full access */ - -/* CPACR [20:21]: Access privileges for coprocessor 10 */ -#define SCB_CPACR_CP10 (1 << 20) -/* CPACR [22:23]: Access privileges for coprocessor 11 */ -#define SCB_CPACR_CP11 (1 << 22) - -/* --- SCB functions ------------------------------------------------------- */ - -BEGIN_DECLS - -void scb_reset_core(void); -void scb_reset_system(void); -void scb_set_priority_grouping(u32 prigroup); - -/* TODO: */ - -END_DECLS - -#endif diff --git a/lib/cm3/scb.c b/lib/cm3/scb.c new file mode 100644 index 0000000..904bd7c --- /dev/null +++ b/lib/cm3/scb.c @@ -0,0 +1,35 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Gareth McMullin + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include + +void scb_reset_core(void) +{ + SCB_AIRCR = SCB_AIRCR_VECTKEY | SCB_AIRCR_VECTRESET; +} + +void scb_reset_system(void) +{ + SCB_AIRCR = SCB_AIRCR_VECTKEY | SCB_AIRCR_SYSRESETREQ; +} + +void scb_set_priority_grouping(u32 prigroup) +{ + SCB_AIRCR = SCB_AIRCR_VECTKEY | prigroup; +} diff --git a/lib/stm32/f1/scb.c b/lib/stm32/f1/scb.c deleted file mode 100644 index e59134e..0000000 --- a/lib/stm32/f1/scb.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Gareth McMullin - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -#include - -void scb_reset_core(void) -{ - SCB_AIRCR = SCB_AIRCR_VECTKEY | SCB_AIRCR_VECTRESET; -} - -void scb_reset_system(void) -{ - SCB_AIRCR = SCB_AIRCR_VECTKEY | SCB_AIRCR_SYSRESETREQ; -} - -void scb_set_priority_grouping(u32 prigroup) -{ - SCB_AIRCR = SCB_AIRCR_VECTKEY | prigroup; -} diff --git a/lib/stm32/f2/scb.c b/lib/stm32/f2/scb.c deleted file mode 100644 index abb7b44..0000000 --- a/lib/stm32/f2/scb.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Gareth McMullin - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -#include - -void scb_reset_core(void) -{ - SCB_AIRCR = SCB_AIRCR_VECTKEY | SCB_AIRCR_VECTRESET; -} - -void scb_reset_system(void) -{ - SCB_AIRCR = SCB_AIRCR_VECTKEY | SCB_AIRCR_SYSRESETREQ; -} - -void scb_set_priority_grouping(u32 prigroup) -{ - SCB_AIRCR = SCB_AIRCR_VECTKEY | prigroup; -} diff --git a/lib/stm32/f4/scb.c b/lib/stm32/f4/scb.c deleted file mode 100644 index cbf4d53..0000000 --- a/lib/stm32/f4/scb.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Gareth McMullin - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -#include - -void scb_reset_core(void) -{ - SCB_AIRCR = SCB_AIRCR_VECTKEY | SCB_AIRCR_VECTRESET; -} - -void scb_reset_system(void) -{ - SCB_AIRCR = SCB_AIRCR_VECTKEY | SCB_AIRCR_SYSRESETREQ; -} - -void scb_set_priority_grouping(u32 prigroup) -{ - SCB_AIRCR = SCB_AIRCR_VECTKEY | prigroup; -} diff --git a/lib/stm32/f4/vector_chipset.c b/lib/stm32/f4/vector_chipset.c index 5304299..145be05 100644 --- a/lib/stm32/f4/vector_chipset.c +++ b/lib/stm32/f4/vector_chipset.c @@ -18,7 +18,7 @@ * along with this library. If not, see . */ -#include +#include static void pre_main(void) { -- cgit v1.2.3 From bc5146b710c8be3dfa4a8601bd3ca29408ae6397 Mon Sep 17 00:00:00 2001 From: chrysn Date: Thu, 18 Oct 2012 22:26:46 +0200 Subject: unified systick handling the only change this results in in the example binaries is in the hackrf-jellybean/systick example, where the the check in systick_set_clocksource for overflowing from the stm32 area gets used. --- .../lpc43xx/hackrf-jellybean/systick/systickdemo.c | 2 +- examples/stm32/f1/lisa-m-1/can/can.c | 2 +- examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c | 2 +- .../lisa-m-2/usart_irq_printf/usart_irq_printf.c | 2 +- examples/stm32/f1/obldc/can/can.c | 2 +- examples/stm32/f1/obldc/systick/systick.c | 2 +- examples/stm32/f1/other/systick/systick.c | 2 +- examples/stm32/f1/other/usb_hid/usbhid.c | 2 +- .../stm32-h103/usart_irq_printf/usart_irq_printf.c | 2 +- examples/stm32/f1/stm32-h103/usb_hid/usbhid.c | 2 +- include/libopencm3/cm3/systick.h | 113 ++++++++++++++++ include/libopencm3/lpc43xx/systick.h | 88 ------------ include/libopencm3/stm32/systick.h | 111 --------------- lib/cm3/systick.c | 149 +++++++++++++++++++++ lib/lpc43xx/systick.c | 69 ---------- lib/stm32/systick.c | 139 ------------------- 16 files changed, 272 insertions(+), 417 deletions(-) create mode 100644 include/libopencm3/cm3/systick.h delete mode 100644 include/libopencm3/lpc43xx/systick.h delete mode 100644 include/libopencm3/stm32/systick.h create mode 100644 lib/cm3/systick.c delete mode 100644 lib/lpc43xx/systick.c delete mode 100644 lib/stm32/systick.c (limited to 'examples') diff --git a/examples/lpc43xx/hackrf-jellybean/systick/systickdemo.c b/examples/lpc43xx/hackrf-jellybean/systick/systickdemo.c index 61792d1..d38b0bc 100644 --- a/examples/lpc43xx/hackrf-jellybean/systick/systickdemo.c +++ b/examples/lpc43xx/hackrf-jellybean/systick/systickdemo.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include "../jellybean_conf.h" diff --git a/examples/stm32/f1/lisa-m-1/can/can.c b/examples/stm32/f1/lisa-m-1/can/can.c index 92ebd85..41432b6 100644 --- a/examples/stm32/f1/lisa-m-1/can/can.c +++ b/examples/stm32/f1/lisa-m-1/can/can.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include struct can_tx_msg { diff --git a/examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c b/examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c index a0a4d12..f5f0146 100644 --- a/examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c +++ b/examples/stm32/f1/lisa-m-1/usb_hid/usbhid.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include #include #include #include diff --git a/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c b/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c index e4e0127..dd2e221 100644 --- a/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c +++ b/examples/stm32/f1/lisa-m-2/usart_irq_printf/usart_irq_printf.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include diff --git a/examples/stm32/f1/obldc/can/can.c b/examples/stm32/f1/obldc/can/can.c index a29d8d7..281ab1d 100644 --- a/examples/stm32/f1/obldc/can/can.c +++ b/examples/stm32/f1/obldc/can/can.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include struct can_tx_msg { diff --git a/examples/stm32/f1/obldc/systick/systick.c b/examples/stm32/f1/obldc/systick/systick.c index 7abdd54..1426793 100644 --- a/examples/stm32/f1/obldc/systick/systick.c +++ b/examples/stm32/f1/obldc/systick/systick.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include u32 temp32; diff --git a/examples/stm32/f1/other/systick/systick.c b/examples/stm32/f1/other/systick/systick.c index 9aa2e94..c04704d 100644 --- a/examples/stm32/f1/other/systick/systick.c +++ b/examples/stm32/f1/other/systick/systick.c @@ -21,7 +21,7 @@ #include #include #include -#include +#include u32 temp32; diff --git a/examples/stm32/f1/other/usb_hid/usbhid.c b/examples/stm32/f1/other/usb_hid/usbhid.c index 6329f0e..a61d9ea 100644 --- a/examples/stm32/f1/other/usb_hid/usbhid.c +++ b/examples/stm32/f1/other/usb_hid/usbhid.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include diff --git a/examples/stm32/f1/stm32-h103/usart_irq_printf/usart_irq_printf.c b/examples/stm32/f1/stm32-h103/usart_irq_printf/usart_irq_printf.c index 5effb28..b052dc3 100644 --- a/examples/stm32/f1/stm32-h103/usart_irq_printf/usart_irq_printf.c +++ b/examples/stm32/f1/stm32-h103/usart_irq_printf/usart_irq_printf.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include #include #include diff --git a/examples/stm32/f1/stm32-h103/usb_hid/usbhid.c b/examples/stm32/f1/stm32-h103/usb_hid/usbhid.c index d0c2aff..1c27c2f 100644 --- a/examples/stm32/f1/stm32-h103/usb_hid/usbhid.c +++ b/examples/stm32/f1/stm32-h103/usb_hid/usbhid.c @@ -20,7 +20,7 @@ #include #include #include -#include +#include #include #include diff --git a/include/libopencm3/cm3/systick.h b/include/libopencm3/cm3/systick.h new file mode 100644 index 0000000..5e7715b --- /dev/null +++ b/include/libopencm3/cm3/systick.h @@ -0,0 +1,113 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Thomas Otto + * Copyright (C) 2012 Benjamin Vernoux + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ +/** @defgroup CM3_systick_defines SysTick Defines + +@brief libopencm3 Defined Constants and Types for the Cortex SysTick + +@ingroup CM3_defines + +@version 1.0.0 + +@author @htmlonly © @endhtmlonly 2010 Thomas Otto + +@date 19 August 2012 + +LGPL License Terms @ref lgpl_license + */ + +/**@{*/ + +#ifndef LIBOPENCM3_SYSTICK_H +#define LIBOPENCM3_SYSTICK_H + +#include +#include + +/* --- SYSTICK registers --------------------------------------------------- */ + +/* Control and status register (STK_CTRL) */ +#define STK_CTRL MMIO32(SYS_TICK_BASE + 0x00) + +/* reload value register (STK_LOAD) */ +#define STK_LOAD MMIO32(SYS_TICK_BASE + 0x04) + +/* current value register (STK_VAL) */ +#define STK_VAL MMIO32(SYS_TICK_BASE + 0x08) + +/* calibration value register (STK_CALIB) */ +#define STK_CALIB MMIO32(SYS_TICK_BASE + 0x0C) + +/* --- STK_CTRL values ----------------------------------------------------- */ +/* Bits [31:17] Reserved, must be kept cleared. */ +/* COUNTFLAG: */ +#define STK_CTRL_COUNTFLAG (1 << 16) +/* Bits [15:3] Reserved, must be kept cleared. */ +/* CLKSOURCE: Clock source selection */ +#define STK_CTRL_CLKSOURCE (1 << 2) +#define STK_CTRL_CLKSOURCE_LSB 2 +/** @defgroup systick_clksource Clock source selection +@ingroup CM3_systick_defines + +@{*/ +#define STK_CTRL_CLKSOURCE_AHB_DIV8 0 +#define STK_CTRL_CLKSOURCE_AHB 1 +/**@}*/ + +/* TICKINT: SysTick exception request enable */ +#define STK_CTRL_TICKINT (1 << 1) +/* ENABLE: Counter enable */ +#define STK_CTRL_ENABLE (1 << 0) + +/* --- STK_LOAD values ----------------------------------------------------- */ +/* Bits [31:24] Reserved, must be kept cleared. */ +/* RELOAD[23:0]: RELOAD value */ + +/* --- STK_VAL values ------------------------------------------------------ */ +/* Bits [31:24] Reserved, must be kept cleared. */ +/* CURRENT[23:0]: Current counter value */ + +/* --- STK_CALIB values ---------------------------------------------------- */ +/* NOREF: NOREF flag */ +#define STK_CALIB_NOREF (1 << 31) +/* SKEW: SKEW flag */ +#define STK_CALIB_SKEW (1 << 30) +/* Bits [29:24] Reserved, must be kept cleared. */ +/* TENMS[23:0]: Calibration value */ + +/* --- Function Prototypes ------------------------------------------------- */ + +BEGIN_DECLS + +void systick_set_reload(u32 value); +u32 systick_get_value(void); +void systick_set_clocksource(u8 clocksource); +void systick_interrupt_enable(void); +void systick_interrupt_disable(void); +void systick_counter_enable(void); +void systick_counter_disable(void); +u8 systick_get_countflag(void); + +u32 systick_get_calib(void); + +END_DECLS + +#endif +/**@}*/ + diff --git a/include/libopencm3/lpc43xx/systick.h b/include/libopencm3/lpc43xx/systick.h deleted file mode 100644 index 2ae52c2..0000000 --- a/include/libopencm3/lpc43xx/systick.h +++ /dev/null @@ -1,88 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Thomas Otto - * Copyright (C) 2012 Benjamin Vernoux - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -#ifndef LIBOPENCM3_SYSTICK_H -#define LIBOPENCM3_SYSTICK_H - -#include -#include -#include - -/* --- SYSTICK registers --------------------------------------------------- */ -/* See also libopencm3\cm3\scs.h for details on SysTicks registers */ - -/* Control and status register (STK_CTRL) */ -#define STK_CTRL MMIO32(SYS_TICK_BASE + 0x00) - -/* reload value register (STK_LOAD) */ -#define STK_LOAD MMIO32(SYS_TICK_BASE + 0x04) - -/* current value register (STK_VAL) */ -#define STK_VAL MMIO32(SYS_TICK_BASE + 0x08) - -/* calibration value register (STK_CALIB) */ -#define STK_CALIB MMIO32(SYS_TICK_BASE + 0x0C) - -/* --- STK_CTRL values ----------------------------------------------------- */ -/* Bits [31:17] Reserved, must be kept cleared. */ -/* COUNTFLAG: */ -#define STK_CTRL_COUNTFLAG (1 << 16) -/* Bits [15:3] Reserved, must be kept cleared. */ -/* CLKSOURCE: Clock source selection */ -#define STK_CTRL_CLKSOURCE (1 << 2) -/* TICKINT: SysTick exception request enable */ -#define STK_CTRL_TICKINT (1 << 1) -/* ENABLE: Counter enable */ -#define STK_CTRL_ENABLE (1 << 0) - -/* --- STK_LOAD values ----------------------------------------------------- */ -/* Bits [31:24] Reserved, must be kept cleared. */ -/* RELOAD[23:0]: RELOAD value */ - -/* --- STK_VAL values ------------------------------------------------------ */ -/* Bits [31:24] Reserved, must be kept cleared. */ -/* CURRENT[23:0]: Current counter value */ - -/* --- STK_CALIB values ---------------------------------------------------- */ -/* NOREF: NOREF flag */ -#define STK_CALIB_NOREF (1 << 31) -/* SKEW: SKEW flag */ -#define STK_CALIB_SKEW (1 << 30) -/* Bits [29:24] Reserved, must be kept cleared. */ -/* TENMS[23:0]: Calibration value */ - -/* --- Function Prototypes ------------------------------------------------- */ - -BEGIN_DECLS - -void systick_set_reload(u32 value); -u32 systick_get_value(void); -void systick_set_clocksource(u8 clocksource); -void systick_interrupt_enable(void); -void systick_interrupt_disable(void); -void systick_counter_enable(void); -void systick_counter_disable(void); -u8 systick_get_countflag(void); - -u32 systick_get_calib(void); - -END_DECLS - -#endif diff --git a/include/libopencm3/stm32/systick.h b/include/libopencm3/stm32/systick.h deleted file mode 100644 index e42c4e6..0000000 --- a/include/libopencm3/stm32/systick.h +++ /dev/null @@ -1,111 +0,0 @@ -/** @defgroup STM32F_systick_defines SysTick Defines - -@brief libopencm3 Defined Constants and Types for the STM32F SysTick - -@ingroup STM32F_defines - -@version 1.0.0 - -@author @htmlonly © @endhtmlonly 2010 Thomas Otto - -@date 19 August 2012 - -LGPL License Terms @ref lgpl_license - */ - -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Thomas Otto - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -/**@{*/ - -#ifndef LIBOPENCM3_SYSTICK_H -#define LIBOPENCM3_SYSTICK_H - -#include -#include - -/* --- SYSTICK registers --------------------------------------------------- */ - -/* Control and status register (STK_CTRL) */ -#define STK_CTRL MMIO32(SYS_TICK_BASE + 0x00) - -/* reload value register (STK_LOAD) */ -#define STK_LOAD MMIO32(SYS_TICK_BASE + 0x04) - -/* current value register (STK_VAL) */ -#define STK_VAL MMIO32(SYS_TICK_BASE + 0x08) - -/* calibration value register (STK_CALIB) */ -#define STK_CALIB MMIO32(SYS_TICK_BASE + 0x0C) - -/* --- STK_CTRL values ----------------------------------------------------- */ -/* Bits [31:17] Reserved, must be kept cleared. */ -/* COUNTFLAG: */ -#define STK_CTRL_COUNTFLAG (1 << 16) -/* Bits [15:3] Reserved, must be kept cleared. */ -/* CLKSOURCE: Clock source selection */ -#define STK_CTRL_CLKSOURCE (1 << 2) -#define STK_CTRL_CLKSOURCE_LSB 2 -/** @defgroup systick_clksource Clock source selection -@ingroup STM32F_systick_defines - -@{*/ -#define STK_CTRL_CLKSOURCE_AHB_DIV8 0 -#define STK_CTRL_CLKSOURCE_AHB 1 -/**@}*/ - -/* TICKINT: SysTick exception request enable */ -#define STK_CTRL_TICKINT (1 << 1) -/* ENABLE: Counter enable */ -#define STK_CTRL_ENABLE (1 << 0) - -/* --- STK_LOAD values ----------------------------------------------------- */ -/* Bits [31:24] Reserved, must be kept cleared. */ -/* RELOAD[23:0]: RELOAD value */ - -/* --- STK_VAL values ------------------------------------------------------ */ -/* Bits [31:24] Reserved, must be kept cleared. */ -/* CURRENT[23:0]: Current counter value */ - -/* --- STK_CALIB values ---------------------------------------------------- */ -/* NOREF: NOREF flag */ -#define STK_CALIB_NOREF (1 << 31) -/* SKEW: SKEW flag */ -#define STK_CALIB_SKEW (1 << 30) -/* Bits [29:24] Reserved, must be kept cleared. */ -/* TENMS[23:0]: Calibration value */ - -/* --- Function Prototypes ------------------------------------------------- */ - -BEGIN_DECLS - -void systick_set_reload(u32 value); -u32 systick_get_value(void); -void systick_set_clocksource(u8 clocksource); -void systick_interrupt_enable(void); -void systick_interrupt_disable(void); -void systick_counter_enable(void); -void systick_counter_disable(void); -u8 systick_get_countflag(void); - -END_DECLS - -#endif -/**@}*/ - diff --git a/lib/cm3/systick.c b/lib/cm3/systick.c new file mode 100644 index 0000000..325ffff --- /dev/null +++ b/lib/cm3/systick.c @@ -0,0 +1,149 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Thomas Otto + * Copyright (C) 2012 Benjamin Vernoux + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ +/** @defgroup CM3_systick_file SysTick + +@ingroup CM3_files + +@brief libopencm3 Cortex System Tick Timer + +@version 1.0.0 + +@author @htmlonly © @endhtmlonly 2010 Thomas Otto + +@date 19 August 2012 + +This library supports the System Tick timer in ARM Cortex Microcontrollers. + +The System Tick timer is part of the ARM Cortex core. It is a 24 bit +down counter that can be configured with an automatical reload value. + +LGPL License Terms @ref lgpl_license + */ + +/**@{*/ +#include + +/*-----------------------------------------------------------------------------*/ +/** @brief SysTick Set the Automatic Reload Value. + +The counter is set to the reload value when the counter starts and after it +reaches zero. + +@param[in] value u32. 24 bit reload value. +*/ + +void systick_set_reload(u32 value) +{ + STK_LOAD = (value & 0x00FFFFFF); +} + +/*-----------------------------------------------------------------------------*/ +/** @brief SysTick Read the Automatic Reload Value. + +@returns 24 bit reload value as u32. +*/ + +u32 systick_get_value(void) +{ + return STK_VAL; +} + +/*-----------------------------------------------------------------------------*/ +/** @brief Set the SysTick Clock Source. + +The clock source can be either the AHB clock or the same clock divided by 8. + +@param[in] clocksource u8. Clock source from @ref systick_clksource. +*/ + +void systick_set_clocksource(u8 clocksource) +{ + if (clocksource < 2) + STK_CTRL |= (clocksource << STK_CTRL_CLKSOURCE_LSB); +} + +/*-----------------------------------------------------------------------------*/ +/** @brief Enable SysTick Interrupt. + +*/ + +void systick_interrupt_enable(void) +{ + STK_CTRL |= STK_CTRL_TICKINT; +} + +/*-----------------------------------------------------------------------------*/ +/** @brief Disable SysTick Interrupt. + +*/ + +void systick_interrupt_disable(void) +{ + STK_CTRL &= ~STK_CTRL_TICKINT; +} + +/*-----------------------------------------------------------------------------*/ +/** @brief Enable SysTick Counter. + +*/ + +void systick_counter_enable(void) +{ + STK_CTRL |= STK_CTRL_ENABLE; +} + +/*-----------------------------------------------------------------------------*/ +/** @brief Disable SysTick Counter. + +*/ + +void systick_counter_disable(void) +{ + STK_CTRL &= ~STK_CTRL_ENABLE; +} + +/*-----------------------------------------------------------------------------*/ +/** @brief SysTick Read the Counter Flag. + +The count flag is set when the timer count becomes zero, and is cleared when the +flag is read. + +@returns Boolean if flag set. +*/ + +u8 systick_get_countflag(void) +{ + if (STK_CTRL & STK_CTRL_COUNTFLAG) + return 1; + else + return 0; +} + +/*-----------------------------------------------------------------------------*/ +/** @brief SysTick Get Calibration Value + +@returns Current calibration value +*/ +u32 systick_get_calib(void) +{ + return (STK_CALIB&0x00FFFFFF); +} +/**@}*/ + diff --git a/lib/lpc43xx/systick.c b/lib/lpc43xx/systick.c deleted file mode 100644 index 82345a9..0000000 --- a/lib/lpc43xx/systick.c +++ /dev/null @@ -1,69 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Thomas Otto - * Copyright (C) 2012 Benjamin Vernoux - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -#include - -void systick_set_reload(u32 value) -{ - STK_LOAD = (value & 0x00FFFFFF); -} - -u32 systick_get_value(void) -{ - return STK_VAL; -} - -void systick_set_clocksource(u8 clocksource) -{ - STK_CTRL |= clocksource; -} - -void systick_interrupt_enable(void) -{ - STK_CTRL |= STK_CTRL_TICKINT; -} - -void systick_interrupt_disable(void) -{ - STK_CTRL &= ~STK_CTRL_TICKINT; -} - -void systick_counter_enable(void) -{ - STK_CTRL |= STK_CTRL_ENABLE; -} - -void systick_counter_disable(void) -{ - STK_CTRL &= ~STK_CTRL_ENABLE; -} - -u8 systick_get_countflag(void) -{ - if (STK_CTRL & STK_CTRL_COUNTFLAG) - return 1; - else - return 0; -} - -u32 systick_get_calib(void) -{ - return (STK_CALIB&0x00FFFFFF); -} diff --git a/lib/stm32/systick.c b/lib/stm32/systick.c deleted file mode 100644 index 36077cc..0000000 --- a/lib/stm32/systick.c +++ /dev/null @@ -1,139 +0,0 @@ -/** @defgroup STM32F_systick_file SysTick - -@ingroup STM32F_files - -@brief libopencm3 STM32Fxx System Tick Timer - -@version 1.0.0 - -@author @htmlonly © @endhtmlonly 2010 Thomas Otto - -@date 19 August 2012 - -This library supports the System Tick timer in the -STM32F series of ARM Cortex Microcontrollers by ST Microelectronics. - -The System Tick timer is part of the ARM Cortex core. It is a 24 bit -down counter that can be configured with an automatical reload value. - -LGPL License Terms @ref lgpl_license - */ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Thomas Otto - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -/**@{*/ -#include - -/*-----------------------------------------------------------------------------*/ -/** @brief SysTick Set the Automatic Reload Value. - -The counter is set to the reload value when the counter starts and after it -reaches zero. - -@param[in] value u32. 24 bit reload value. -*/ - -void systick_set_reload(u32 value) -{ - STK_LOAD = (value & 0x00FFFFFF); -} - -/*-----------------------------------------------------------------------------*/ -/** @brief SysTick Read the Automatic Reload Value. - -@returns 24 bit reload value as u32. -*/ - -u32 systick_get_value(void) -{ - return STK_VAL; -} - -/*-----------------------------------------------------------------------------*/ -/** @brief Set the SysTick Clock Source. - -The clock source can be either the AHB clock or the same clock divided by 8. - -@param[in] clocksource u8. Clock source from @ref systick_clksource. -*/ - -void systick_set_clocksource(u8 clocksource) -{ - if (clocksource < 2) - STK_CTRL |= (clocksource << STK_CTRL_CLKSOURCE_LSB); -} - -/*-----------------------------------------------------------------------------*/ -/** @brief Enable SysTick Interrupt. - -*/ - -void systick_interrupt_enable(void) -{ - STK_CTRL |= STK_CTRL_TICKINT; -} - -/*-----------------------------------------------------------------------------*/ -/** @brief Disable SysTick Interrupt. - -*/ - -void systick_interrupt_disable(void) -{ - STK_CTRL &= ~STK_CTRL_TICKINT; -} - -/*-----------------------------------------------------------------------------*/ -/** @brief Enable SysTick Counter. - -*/ - -void systick_counter_enable(void) -{ - STK_CTRL |= STK_CTRL_ENABLE; -} - -/*-----------------------------------------------------------------------------*/ -/** @brief Disable SysTick Counter. - -*/ - -void systick_counter_disable(void) -{ - STK_CTRL &= ~STK_CTRL_ENABLE; -} - -/*-----------------------------------------------------------------------------*/ -/** @brief SysTick Read the Counter Flag. - -The count flag is set when the timer count becomes zero, and is cleared when the -flag is read. - -@returns Boolean if flag set. -*/ - -u8 systick_get_countflag(void) -{ - if (STK_CTRL & STK_CTRL_COUNTFLAG) - return 1; - else - return 0; -} -/**@}*/ - -- cgit v1.2.3 From 99d7b210323be1d87dd6cc34c9bb5c53e401b5c3 Mon Sep 17 00:00:00 2001 From: chrysn Date: Fri, 19 Oct 2012 19:05:27 +0200 Subject: define platform specific constants for all chips previously, only stm32 chips passed the information about which chip to build on into the compiler. this information is essential to dispatch, thus defining LPC13XX, LPC17XX, LPC43XX and LM3S in analogy to STM32F1..4. --- examples/lm3s/Makefile.include | 2 +- examples/lpc13xx/Makefile.include | 2 +- examples/lpc17xx/Makefile.include | 2 +- examples/lpc43xx/Makefile.include | 2 +- lib/lm3s/Makefile | 2 +- lib/lpc13xx/Makefile | 2 +- lib/lpc17xx/Makefile | 2 +- lib/lpc43xx/Makefile | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) (limited to 'examples') diff --git a/examples/lm3s/Makefile.include b/examples/lm3s/Makefile.include index f519063..c9bd33c 100644 --- a/examples/lm3s/Makefile.include +++ b/examples/lm3s/Makefile.include @@ -37,7 +37,7 @@ endif endif CFLAGS += -O0 -g3 -Wall -Wextra -I$(TOOLCHAIN_DIR)/include -fno-common \ - -mcpu=cortex-m3 -mthumb -MD + -mcpu=cortex-m3 -mthumb -MD -DLM3S LDSCRIPT ?= $(BINARY).ld LDFLAGS += -L$(TOOLCHAIN_DIR)/lib \ -T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections diff --git a/examples/lpc13xx/Makefile.include b/examples/lpc13xx/Makefile.include index d8aeff0..0b22063 100644 --- a/examples/lpc13xx/Makefile.include +++ b/examples/lpc13xx/Makefile.include @@ -37,7 +37,7 @@ endif endif CFLAGS += -Os -g -Wall -Wextra -I$(TOOLCHAIN_DIR)/include -fno-common \ - -mcpu=cortex-m3 -mthumb -MD + -mcpu=cortex-m3 -mthumb -MD -DLPC13XX LDSCRIPT ?= $(BINARY).ld LDFLAGS += -L$(TOOLCHAIN_DIR)/lib \ -T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections diff --git a/examples/lpc17xx/Makefile.include b/examples/lpc17xx/Makefile.include index 6d7bbfe..9c38a68 100644 --- a/examples/lpc17xx/Makefile.include +++ b/examples/lpc17xx/Makefile.include @@ -37,7 +37,7 @@ endif endif CFLAGS += -O0 -g -Wall -Wextra -I$(TOOLCHAIN_DIR)/include -fno-common \ - -mcpu=cortex-m3 -mthumb -MD + -mcpu=cortex-m3 -mthumb -MD -DLPC17XX LDSCRIPT ?= $(BINARY).ld LDFLAGS += -L$(TOOLCHAIN_DIR)/lib \ -T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections diff --git a/examples/lpc43xx/Makefile.include b/examples/lpc43xx/Makefile.include index 15e523b..cf78538 100644 --- a/examples/lpc43xx/Makefile.include +++ b/examples/lpc43xx/Makefile.include @@ -41,7 +41,7 @@ endif CFLAGS += -O2 -g -Wall -Wextra -I$(TOOLCHAIN_DIR)/include -fno-common \ -mcpu=cortex-m4 -mthumb -MD \ - -mfloat-abi=hard -mfpu=fpv4-sp-d16 + -mfloat-abi=hard -mfpu=fpv4-sp-d16 -DLPC43XX LDSCRIPT ?= $(BINARY).ld LDFLAGS += -L$(TOOLCHAIN_DIR)/lib \ -T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections -Xlinker -Map=$(BINARY).map diff --git a/lib/lm3s/Makefile b/lib/lm3s/Makefile index e471a00..6fc814d 100644 --- a/lib/lm3s/Makefile +++ b/lib/lm3s/Makefile @@ -25,7 +25,7 @@ CC = $(PREFIX)-gcc AR = $(PREFIX)-ar CFLAGS = -Os -g -Wall -Wextra -I../../include -fno-common \ -mcpu=cortex-m3 -mthumb -Wstrict-prototypes \ - -ffunction-sections -fdata-sections -MD + -ffunction-sections -fdata-sections -MD -DLM3S # ARFLAGS = rcsv ARFLAGS = rcs OBJS = gpio.o vector.o assert.o diff --git a/lib/lpc13xx/Makefile b/lib/lpc13xx/Makefile index dd460b8..15bc686 100644 --- a/lib/lpc13xx/Makefile +++ b/lib/lpc13xx/Makefile @@ -25,7 +25,7 @@ CC = $(PREFIX)-gcc AR = $(PREFIX)-ar CFLAGS = -Os -g -Wall -Wextra -I../../include -fno-common \ -mcpu=cortex-m3 -mthumb -Wstrict-prototypes \ - -ffunction-sections -fdata-sections -MD + -ffunction-sections -fdata-sections -MD -DLPC13XX # ARFLAGS = rcsv ARFLAGS = rcs OBJS = gpio.o diff --git a/lib/lpc17xx/Makefile b/lib/lpc17xx/Makefile index f5fa792..19fc152 100644 --- a/lib/lpc17xx/Makefile +++ b/lib/lpc17xx/Makefile @@ -25,7 +25,7 @@ CC = $(PREFIX)-gcc AR = $(PREFIX)-ar CFLAGS = -O0 -g -Wall -Wextra -I../../include -fno-common \ -mcpu=cortex-m3 -mthumb -Wstrict-prototypes \ - -ffunction-sections -fdata-sections -MD + -ffunction-sections -fdata-sections -MD -DLPC17XX # ARFLAGS = rcsv ARFLAGS = rcs OBJS = gpio.o diff --git a/lib/lpc43xx/Makefile b/lib/lpc43xx/Makefile index a3a5361..efbba0d 100644 --- a/lib/lpc43xx/Makefile +++ b/lib/lpc43xx/Makefile @@ -28,7 +28,7 @@ AR = $(PREFIX)-ar CFLAGS = -O2 -g3 -Wall -Wextra -I../../include -fno-common \ -mcpu=cortex-m4 -mthumb -Wstrict-prototypes \ -ffunction-sections -fdata-sections -MD \ - -mfloat-abi=hard -mfpu=fpv4-sp-d16 + -mfloat-abi=hard -mfpu=fpv4-sp-d16 -DLPC43XX # ARFLAGS = rcsv ARFLAGS = rcs OBJS = gpio.o scu.o i2c.o ssp.o -- cgit v1.2.3 From 08129a5644724ef5aba4dd06a55a75cfb39f1a06 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Wed, 31 Oct 2012 13:41:24 -0700 Subject: Fixed stm32f4-discovery/usb_cdcacm example for deduplication patches. --- examples/stm32/f4/stm32f4-discovery/usb_cdcacm/cdcacm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'examples') diff --git a/examples/stm32/f4/stm32f4-discovery/usb_cdcacm/cdcacm.c b/examples/stm32/f4/stm32f4-discovery/usb_cdcacm/cdcacm.c index 1a12267..836bdfb 100644 --- a/examples/stm32/f4/stm32f4-discovery/usb_cdcacm/cdcacm.c +++ b/examples/stm32/f4/stm32f4-discovery/usb_cdcacm/cdcacm.c @@ -22,7 +22,7 @@ #include #include #include -#include +#include static const struct usb_device_descriptor dev = { .bLength = USB_DT_DEVICE_SIZE, -- cgit v1.2.3 From f1f1aa84f30d9496dbaaff1bb252ddb5a0a77660 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Wed, 4 Jul 2012 21:45:14 +0000 Subject: Use make flags to help control where the library is installed Where the library is installed has quite an affect on what -L and -I flags are used. If you install into the toolchain, you don't want to use them at all, but if you install out of tree (/opt/mycm3 for example) you need to specify the -L and -I flags. Update the documentation and the example makefiles to support this --- Makefile | 6 ++++++ README | 24 ++++++++++++++++-------- examples/stm32/f1/Makefile.include | 21 +++++++++++++++++++++ 3 files changed, 43 insertions(+), 8 deletions(-) (limited to 'examples') diff --git a/Makefile b/Makefile index 063d613..83332e9 100644 --- a/Makefile +++ b/Makefile @@ -19,7 +19,13 @@ PREFIX ?= arm-none-eabi #PREFIX ?= arm-elf + +ifeq ($(DETECT_TOOLCHAIN),) DESTDIR ?= /usr/local +else +DESTDIR ?= $(shell dirname $(shell readlink -f $(shell which $(PREFIX)-gcc)))/.. +endif + INCDIR = $(DESTDIR)/$(PREFIX)/include LIBDIR = $(DESTDIR)/$(PREFIX)/lib SHAREDIR = $(DESTDIR)/$(PREFIX)/share/libopencm3/scripts diff --git a/README b/README index 488da0f..5d3e064 100644 --- a/README +++ b/README @@ -48,7 +48,8 @@ Example projects The library ships with a few small example projects which illustrate how individual subsystems of the microcontrollers can be configured and used with -libopencm3. +libopencm3. The makefiles are generally useable for your own projects with +only minimal changes for the libopencm3 install path (See Installation) For flashing the 'miniblink' example (after you built libopencm3 and the examples by typing 'make' at the top-level directory) onto the Olimex @@ -79,16 +80,23 @@ Installation $ make install -This will install the library in /usr/local. If you want to install it -elsewhere, use the following syntax: +This will install the library into /usr/local. (permissions permitting) - $ DESTDIR=/opt make install +If you want to install it elsewhere, use the following syntax: -The recommended location is to install into your toolchain directory, e.g. -/home/someuser/sat for a toolchain built using the summon-arm-toolchain -script from https://github.com/esden/summon-arm-toolchain. + $ make DESTDIR=/opt/libopencm3 install - $ DESTDIR=~/sat make install +If you want to attempt to install into your toolchain, use this: + + $ make DETECT_TOOLCHAIN=1 install + +Note: If you install this into your toolchain, you don't need to pass +any extra -L or -I flags into your projects. However, this also means +you must NOT pass any -L or -I flags that point into the toolchain. This +_will_ confuse the linker. (ie, for summon-arm-toolchain, do NOT pass +-L/home/user/sat/lib) Common symptoms of confusing +the linker are hard faults caused by branches into arm code. +You can use objdump to check for this in your final elf. Coding style and development guidelines diff --git a/examples/stm32/f1/Makefile.include b/examples/stm32/f1/Makefile.include index 6b87b98..2ae9e27 100644 --- a/examples/stm32/f1/Makefile.include +++ b/examples/stm32/f1/Makefile.include @@ -45,6 +45,15 @@ LDFLAGS += --static -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group \ -L$(TOOLCHAIN_DIR)/lib \ -T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections \ $(ARCH_FLAGS) -mfix-cortex-m3-ldrd + +ifneq ($(OPENCM3_DIR),) +CFLAGS += -I$(OPENCM3_DIR)/include +LDFLAGS += -L$(OPENCM3_DIR)/lib -L$(OPENCM3_DIR)/lib/stm32/f1 +SCRIPT_DIR = $(OPENCM3_DIR)/share +else +SCRIPT_DIR = $(shell dirname $(shell readlink -f $(shell which $(PREFIX)-gcc)))/../$(PREFIX)/share +endif + OBJS += $(BINARY).o OOCD ?= openocd @@ -53,6 +62,9 @@ OOCD_BOARD ?= olimex_stm32_h103 # Black magic probe specific variables # Set the BMP_PORT to a serial port and then BMP is used for flashing BMP_PORT ?= +# texane/stlink can be used by uncommenting this... +# or defining it in your own makefiles +#STLINK_PORT ?= :4242 # Be silent per default, but 'make V=1' will show all compiler calls. ifneq ($(V),1) @@ -107,6 +119,7 @@ clean: $(Q)rm -f *.srec $(Q)rm -f *.list +ifeq ($(STLINK_PORT),) ifeq ($(BMP_PORT),) ifeq ($(OOCD_SERIAL),) %.flash: %.hex @@ -140,6 +153,14 @@ else -x $(TOOLCHAIN_DIR)/scripts/black_magic_probe_flash.scr \ $(*).elf endif +else +%.flash: %.elf + @echo " GDB $(*).elf (flash)" + $(Q)$(GDB) --batch \ + -ex 'target extended-remote $(STLINK_PORT)' \ + -x $(SCRIPT_DIR)/libopencm3/scripts/stlink_flash.scr \ + $(*).elf +endif .PHONY: images clean -- cgit v1.2.3 From 8318384cf1fec4d0b336e5d4deb1f126526584be Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Thu, 19 Jul 2012 22:41:52 +0000 Subject: More progress towards L1 support. Believe gpio is complete, but untested without finishing at least the RCC defines. RCC defines are a work in progress --- Makefile | 2 +- examples/stm32/l1/Makefile.include | 165 ++++++++ .../stm32/l1/stm32l-discovery/miniblink/Makefile | 25 ++ .../stm32/l1/stm32l-discovery/miniblink/README | 9 + .../l1/stm32l-discovery/miniblink/miniblink.c | 72 ++++ include/libopencm3/stm32/l1/gpio.h | 241 +++++++++++ include/libopencm3/stm32/l1/rcc.h | 453 +++++++++++++++++++++ lib/stm32/l1/Makefile | 2 +- lib/stm32/l1/libopencm3_stm32l1.ld | 84 ++++ lib/stm32/l1/stm32l15xx8.ld | 31 ++ lib/stm32/l1/stm32l15xxB.ld | 31 ++ 11 files changed, 1113 insertions(+), 2 deletions(-) create mode 100644 examples/stm32/l1/Makefile.include create mode 100644 examples/stm32/l1/stm32l-discovery/miniblink/Makefile create mode 100644 examples/stm32/l1/stm32l-discovery/miniblink/README create mode 100644 examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c create mode 100644 include/libopencm3/stm32/l1/gpio.h create mode 100644 include/libopencm3/stm32/l1/rcc.h create mode 100644 lib/stm32/l1/libopencm3_stm32l1.ld create mode 100644 lib/stm32/l1/stm32l15xx8.ld create mode 100644 lib/stm32/l1/stm32l15xxB.ld (limited to 'examples') diff --git a/Makefile b/Makefile index 83332e9..6c060bf 100644 --- a/Makefile +++ b/Makefile @@ -32,7 +32,7 @@ SHAREDIR = $(DESTDIR)/$(PREFIX)/share/libopencm3/scripts INSTALL = install SRCLIBDIR = $(shell pwd)/lib -TARGETS = stm32/f1 stm32/f2 stm32/f4 lpc13xx lpc17xx lpc43xx lm3s efm32/efm32tg efm32/efm32g efm32/efm32lg efm32/efm32gg +TARGETS = stm32/f1 stm32/f2 stm32/f4 stm32/l1 lpc13xx lpc17xx lpc43xx lm3s efm32/efm32tg efm32/efm32g efm32/efm32lg efm32/efm32gg # Be silent per default, but 'make V=1' will show all compiler calls. ifneq ($(V),1) diff --git a/examples/stm32/l1/Makefile.include b/examples/stm32/l1/Makefile.include new file mode 100644 index 0000000..f152b2a --- /dev/null +++ b/examples/stm32/l1/Makefile.include @@ -0,0 +1,165 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## Copyright (C) 2010 Piotr Esden-Tempski +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +PREFIX ?= arm-none-eabi +#PREFIX ?= arm-elf +CC = $(PREFIX)-gcc +LD = $(PREFIX)-gcc +OBJCOPY = $(PREFIX)-objcopy +OBJDUMP = $(PREFIX)-objdump +GDB = $(PREFIX)-gdb +# If you are copying this file to use in your own project, +# You will need to change this... (Leave unset to assume installed +# in the toolchain itself) +#OPENCM3_DIR ?= /opt/libopencm3/$(PREFIX) +OPENCM3_DIR ?= ../../../../.. + +ARCH_FLAGS = -mcpu=cortex-m3 -mthumb -msoft-float +CFLAGS += -g -Os -Wall -Wextra \ + -fno-common $(ARCH_FLAGS) -MD -DSTM32L1 +LDSCRIPT ?= $(BINARY).ld +LDFLAGS += -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group \ + -T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections \ + $(ARCH_FLAGS) -mfix-cortex-m3-ldrd + +ifneq ($(OPENCM3_DIR),) +CFLAGS += -I$(OPENCM3_DIR)/include +LDFLAGS += -L$(OPENCM3_DIR)/lib -L$(OPENCM3_DIR)/lib/stm32/l1 +SCRIPT_DIR = $(OPENCM3_DIR)/share +else +SCRIPT_DIR = $(shell dirname $(shell readlink -f $(shell which $(PREFIX)-gcc)))/../$(PREFIX)/share +endif + +OBJS += $(BINARY).o + +OOCD ?= openocd +OOCD_INTERFACE ?= flossjtag +OOCD_BOARD ?= olimex_stm32_h103 +# Black magic probe specific variables +# Set the BMP_PORT to a serial port and then BMP is used for flashing +BMP_PORT ?= +# texane/stlink can be used by uncommenting this... +# or defining it in your own makefiles +#STLINK_PORT ?= :4242 + +# Be silent per default, but 'make V=1' will show all compiler calls. +ifneq ($(V),1) +Q := @ +NULL := 2>/dev/null +else +LDFLAGS += -Wl,--print-gc-sections +endif + +.SUFFIXES: .elf .bin .hex .srec .list .images +.SECONDEXPANSION: +.SECONDARY: + +all: images + +images: $(BINARY).images +flash: $(BINARY).flash + +%.images: %.bin %.hex %.srec %.list + @#echo "*** $* images generated ***" + +%.bin: %.elf + @#printf " OBJCOPY $(*).bin\n" + $(Q)$(OBJCOPY) -Obinary $(*).elf $(*).bin + +%.hex: %.elf + @#printf " OBJCOPY $(*).hex\n" + $(Q)$(OBJCOPY) -Oihex $(*).elf $(*).hex + +%.srec: %.elf + @#printf " OBJCOPY $(*).srec\n" + $(Q)$(OBJCOPY) -Osrec $(*).elf $(*).srec + +%.list: %.elf + @#printf " OBJDUMP $(*).list\n" + $(Q)$(OBJDUMP) -S $(*).elf > $(*).list + +ifeq ($(OPENCM3_DIR),) +%.elf: $(OBJS) $(LDSCRIPT) +else +%.elf: $(OBJS) $(LDSCRIPT) $(OPENCM3_DIR)/lib/stm32/l1/libopencm3_stm32l1.a +endif + @#printf " LD $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(LD) -o $(*).elf $(OBJS) -lopencm3_stm32l1 $(LDFLAGS) + +%.o: %.c Makefile + @#printf " CC $(subst $(shell pwd)/,,$(@))\n" + $(Q)$(CC) $(CFLAGS) -o $@ -c $< + +clean: + $(Q)rm -f *.o + $(Q)rm -f *.d + $(Q)rm -f *.elf + $(Q)rm -f *.bin + $(Q)rm -f *.hex + $(Q)rm -f *.srec + $(Q)rm -f *.list + +ifeq ($(STLINK_PORT),) +ifeq ($(BMP_PORT),) +ifeq ($(OOCD_SERIAL),) +%.flash: %.hex + @printf " FLASH $<\n" + @# IMPORTANT: Don't use "resume", only "reset" will work correctly! + $(Q)$(OOCD) -f interface/$(OOCD_INTERFACE).cfg \ + -f board/$(OOCD_BOARD).cfg \ + -c "init" -c "reset init" \ + -c "stm32l1x mass_erase 0" \ + -c "flash write_image $(*).hex" \ + -c "reset" \ + -c "shutdown" $(NULL) +else +%.flash: %.hex + @printf " FLASH $<\n" + @# IMPORTANT: Don't use "resume", only "reset" will work correctly! + $(Q)$(OOCD) -f interface/$(OOCD_INTERFACE).cfg \ + -f board/$(OOCD_BOARD).cfg \ + -c "ft2232_serial $(OOCD_SERIAL)" \ + -c "init" -c "reset init" \ + -c "stm32l1x mass_erase 0" \ + -c "flash write_image $(*).hex" \ + -c "reset" \ + -c "shutdown" $(NULL) +endif +else +%.flash: %.elf + @echo " GDB $(*).elf (flash)" + $(Q)$(GDB) --batch \ + -ex 'target extended-remote $(BMP_PORT)' \ + -x $(TOOLCHAIN_DIR)/scripts/black_magic_probe_flash.scr \ + $(*).elf +endif +else +%.flash: %.elf + @echo " GDB $(*).elf (flash)" + $(Q)$(GDB) --batch \ + -ex 'target extended-remote $(STLINK_PORT)' \ + -x $(SCRIPT_DIR)/libopencm3/scripts/stlink_flash.scr \ + $(*).elf +endif + +.PHONY: images clean + +-include $(OBJS:.o=.d) + diff --git a/examples/stm32/l1/stm32l-discovery/miniblink/Makefile b/examples/stm32/l1/stm32l-discovery/miniblink/Makefile new file mode 100644 index 0000000..8c88be0 --- /dev/null +++ b/examples/stm32/l1/stm32l-discovery/miniblink/Makefile @@ -0,0 +1,25 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +BINARY = miniblink + +LDSCRIPT = ../stm32l15xxB.ld + +include ../../Makefile.include + diff --git a/examples/stm32/l1/stm32l-discovery/miniblink/README b/examples/stm32/l1/stm32l-discovery/miniblink/README new file mode 100644 index 0000000..8bdd314 --- /dev/null +++ b/examples/stm32/l1/stm32l-discovery/miniblink/README @@ -0,0 +1,9 @@ +------------------------------------------------------------------------------ +README +------------------------------------------------------------------------------ + +This is the smallest-possible example program using libopencm3. + +It's intended for the ST STM32L-DISCOVERY eval board. It should blink +the blue LED on the board. + diff --git a/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c b/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c new file mode 100644 index 0000000..a9d7c3d --- /dev/null +++ b/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c @@ -0,0 +1,72 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * Copyright (C) 2011 Stephen Caudle + * Copyright (C) 2012 Karl Palsson + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include +#include + +#define PORT_LED GPIOB +#define PIN_LED GPIO6 + +void gpio_setup(void) +{ + /* Enable GPIOB clock. */ + /* Manually: */ + RCC_AHBENR |= RCC_AHBENR_IOPBEN; + /* Using API functions: */ + //rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_IOPBEN); + + /* Set GPIO6 (in GPIO port B) to 'output push-pull'. */ + /* Using API functions: */ + gpio_mode_setup(PORT_LED, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, PIN_LED); +} + +int main(void) +{ + int i; + + gpio_setup(); + + /* Blink the LED (PC8) on the board. */ + while (1) { + /* Manually: */ + // GPIOD_BSRR = GPIO12; /* LED off */ + // for (i = 0; i < 1000000; i++) /* Wait a bit. */ + // __asm__("nop"); + // GPIOD_BRR = GPIO12; /* LED on */ + // for (i = 0; i < 1000000; i++) /* Wait a bit. */ + // __asm__("nop"); + + /* Using API functions gpio_set()/gpio_clear(): */ + // gpio_set(GPIOD, GPIO12); /* LED off */ + // for (i = 0; i < 1000000; i++) /* Wait a bit. */ + // __asm__("nop"); + // gpio_clear(GPIOD, GPIO12); /* LED on */ + // for (i = 0; i < 1000000; i++) /* Wait a bit. */ + // __asm__("nop"); + + /* Using API function gpio_toggle(): */ + gpio_toggle(PORT_LED, PORT_LED); /* LED on/off */ + for (i = 0; i < 1000000; i++) /* Wait a bit. */ + __asm__("nop"); + } + + return 0; +} diff --git a/include/libopencm3/stm32/l1/gpio.h b/include/libopencm3/stm32/l1/gpio.h new file mode 100644 index 0000000..76325a9 --- /dev/null +++ b/include/libopencm3/stm32/l1/gpio.h @@ -0,0 +1,241 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * Copyright (C) 2012 Piotr Esden-Tempski + * Copyright (C) 2012 Karl Palsson + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#ifndef LIBOPENCM3_GPIO_H +#define LIBOPENCM3_GPIO_H + +#include +#include + +/* --- Convenience macros -------------------------------------------------- */ + +/* GPIO port base addresses (for convenience) */ +#define GPIOA GPIO_PORT_A_BASE +#define GPIOB GPIO_PORT_B_BASE +#define GPIOC GPIO_PORT_C_BASE +#define GPIOD GPIO_PORT_D_BASE +#define GPIOE GPIO_PORT_E_BASE +#define GPIOH GPIO_PORT_H_BASE + +/* GPIO number definitions (for convenience) */ +#define GPIO0 (1 << 0) +#define GPIO1 (1 << 1) +#define GPIO2 (1 << 2) +#define GPIO3 (1 << 3) +#define GPIO4 (1 << 4) +#define GPIO5 (1 << 5) +#define GPIO6 (1 << 6) +#define GPIO7 (1 << 7) +#define GPIO8 (1 << 8) +#define GPIO9 (1 << 9) +#define GPIO10 (1 << 10) +#define GPIO11 (1 << 11) +#define GPIO12 (1 << 12) +#define GPIO13 (1 << 13) +#define GPIO14 (1 << 14) +#define GPIO15 (1 << 15) +#define GPIO_ALL 0xffff + +/* --- GPIO registers ------------------------------------------------------ */ + +/* Port mode register (GPIOx_MODER) */ +#define GPIO_MODER(port) MMIO32(port + 0x00) +#define GPIOA_MODER GPIO_MODER(GPIOA) +#define GPIOB_MODER GPIO_MODER(GPIOB) +#define GPIOC_MODER GPIO_MODER(GPIOC) +#define GPIOD_MODER GPIO_MODER(GPIOD) +#define GPIOE_MODER GPIO_MODER(GPIOE) +#define GPIOH_MODER GPIO_MODER(GPIOH) + +/* Port output type register (GPIOx_OTYPER) */ +#define GPIO_OTYPER(port) MMIO32(port + 0x04) +#define GPIOA_OTYPER GPIO_OTYPER(GPIOA) +#define GPIOB_OTYPER GPIO_OTYPER(GPIOB) +#define GPIOC_OTYPER GPIO_OTYPER(GPIOC) +#define GPIOD_OTYPER GPIO_OTYPER(GPIOD) +#define GPIOE_OTYPER GPIO_OTYPER(GPIOE) +#define GPIOH_OTYPER GPIO_OTYPER(GPIOH) + +/* Port output speed register (GPIOx_OSPEEDR) */ +#define GPIO_OSPEEDR(port) MMIO32(port + 0x08) +#define GPIOA_OSPEEDR GPIO_OSPEEDR(GPIOA) +#define GPIOB_OSPEEDR GPIO_OSPEEDR(GPIOB) +#define GPIOC_OSPEEDR GPIO_OSPEEDR(GPIOC) +#define GPIOD_OSPEEDR GPIO_OSPEEDR(GPIOD) +#define GPIOE_OSPEEDR GPIO_OSPEEDR(GPIOE) +#define GPIOH_OSPEEDR GPIO_OSPEEDR(GPIOH) + +/* Port pull-up/pull-down register (GPIOx_PUPDR) */ +#define GPIO_PUPDR(port) MMIO32(port + 0x0c) +#define GPIOA_PUPDR GPIO_PUPDR(GPIOA) +#define GPIOB_PUPDR GPIO_PUPDR(GPIOB) +#define GPIOC_PUPDR GPIO_PUPDR(GPIOC) +#define GPIOD_PUPDR GPIO_PUPDR(GPIOD) +#define GPIOE_PUPDR GPIO_PUPDR(GPIOE) +#define GPIOH_PUPDR GPIO_PUPDR(GPIOH) + +/* Port input data register (GPIOx_IDR) */ +#define GPIO_IDR(port) MMIO32(port + 0x10) +#define GPIOA_IDR GPIO_IDR(GPIOA) +#define GPIOB_IDR GPIO_IDR(GPIOB) +#define GPIOC_IDR GPIO_IDR(GPIOC) +#define GPIOD_IDR GPIO_IDR(GPIOD) +#define GPIOE_IDR GPIO_IDR(GPIOE) +#define GPIOH_IDR GPIO_IDR(GPIOH) + +/* Port output data register (GPIOx_ODR) */ +#define GPIO_ODR(port) MMIO32(port + 0x14) +#define GPIOA_ODR GPIO_ODR(GPIOA) +#define GPIOB_ODR GPIO_ODR(GPIOB) +#define GPIOC_ODR GPIO_ODR(GPIOC) +#define GPIOD_ODR GPIO_ODR(GPIOD) +#define GPIOE_ODR GPIO_ODR(GPIOE) +#define GPIOH_ODR GPIO_ODR(GPIOH) + +/* Port bit set/reset register (GPIOx_BSRR) */ +#define GPIO_BSRR(port) MMIO32(port + 0x18) +#define GPIOA_BSRR GPIO_BSRR(GPIOA) +#define GPIOB_BSRR GPIO_BSRR(GPIOB) +#define GPIOC_BSRR GPIO_BSRR(GPIOC) +#define GPIOD_BSRR GPIO_BSRR(GPIOD) +#define GPIOE_BSRR GPIO_BSRR(GPIOE) +#define GPIOH_BSRR GPIO_BSRR(GPIOH) + +/* Port configuration lock register (GPIOx_LCKR) */ +#define GPIO_LCKR(port) MMIO32(port + 0x1C) +#define GPIOA_LCKR GPIO_LCKR(GPIOA) +#define GPIOB_LCKR GPIO_LCKR(GPIOB) +#define GPIOC_LCKR GPIO_LCKR(GPIOC) +#define GPIOD_LCKR GPIO_LCKR(GPIOD) +#define GPIOE_LCKR GPIO_LCKR(GPIOE) +#define GPIOH_LCKR GPIO_LCKR(GPIOH) + +/* Alternate function low register (GPIOx_AFRL) */ +#define GPIO_AFRL(port) MMIO32(port + 0x20) +#define GPIOA_AFRL GPIO_AFRL(GPIOA) +#define GPIOB_AFRL GPIO_AFRL(GPIOB) +#define GPIOC_AFRL GPIO_AFRL(GPIOC) +#define GPIOD_AFRL GPIO_AFRL(GPIOD) +#define GPIOE_AFRL GPIO_AFRL(GPIOE) +#define GPIOH_AFRL GPIO_AFRL(GPIOH) + +/* Alternate function high register (GPIOx_AFRH) */ +#define GPIO_AFRH(port) MMIO32(port + 0x24) +#define GPIOA_AFRH GPIO_AFRH(GPIOA) +#define GPIOB_AFRH GPIO_AFRH(GPIOB) +#define GPIOC_AFRH GPIO_AFRH(GPIOC) +#define GPIOD_AFRH GPIO_AFRH(GPIOD) +#define GPIOE_AFRH GPIO_AFRH(GPIOE) +#define GPIOH_AFRH GPIO_AFRH(GPIOH) + +/* --- GPIOx_MODER values-------------------------------------------- */ + +#define GPIO_MODE(n, mode) (mode << (2 * (n))) +#define GPIO_MODE_MASK(n) (0x3 << (2 * (n))) +#define GPIO_MODE_INPUT 0x00 /* Default */ +#define GPIO_MODE_OUTPUT 0x01 +#define GPIO_MODE_ALTFN 0x02 +#define GPIO_MODE_ANALOG 0x03 + +/* --- GPIOx_OTYPER values -------------------------------------------- */ +/* Output type (OTx values) */ +#define GPIO_OTYPE_PP 0x0 +#define GPIO_OTYPE_OD 0x1 + +/* Output speed values */ +#define GPIO_OSPEED(n, speed) (speed << (2 * (n))) +#define GPIO_OSPEED_MASK(n) (0x3 << (2 * (n))) +#define GPIO_OSPEED_400KHZ 0x0 +#define GPIO_OSPEED_2MHZ 0x1 +#define GPIO_OSPEED_10MHZ 0x2 +#define GPIO_OSPEED_40MHZ 0x3 + +/* --- GPIOx_PUPDR values ------------------------------------------- */ + +#define GPIO_PUPD(n, pupd) (pupd << (2 * (n))) +#define GPIO_PUPD_MASK(n) (0x3 << (2 * (n))) +#define GPIO_PUPD_NONE 0x0 +#define GPIO_PUPD_PULLUP 0x1 +#define GPIO_PUPD_PULLDOWN 0x2 + +/* --- GPIO_IDR values ----------------------------------------------------- */ + +/* GPIO_IDR[15:0]: IDRy[15:0]: Port input data (y = 0..15) */ + +/* --- GPIO_ODR values ----------------------------------------------------- */ + +/* GPIO_ODR[15:0]: ODRy[15:0]: Port output data (y = 0..15) */ + +/* --- GPIO_BSRR values ---------------------------------------------------- */ + +/* GPIO_BSRR[31:16]: BRy: Port x reset bit y (y = 0..15) */ +/* GPIO_BSRR[15:0]: BSy: Port x set bit y (y = 0..15) */ + +/* --- GPIO_LCKR values ---------------------------------------------------- */ + +#define GPIO_LCKK (1 << 16) +/* GPIO_LCKR[15:0]: LCKy: Port x lock bit y (y = 0..15) */ + +/* --- GPIOx_AFRL/H values ------------------------------------------------- */ + +/* Note: AFRL is used for bits 0..7, AFRH is used for 8..15 */ +/* See datasheet table 5, page 35 for the definitions */ + +#define GPIO_AFR(n, af) (af << ((n) * 4)) +#define GPIO_AFR_MASK(n) (0xf << ((n) * 4)) +#define GPIO_AF0 0x0 +#define GPIO_AF1 0x1 +#define GPIO_AF2 0x2 +#define GPIO_AF3 0x3 +#define GPIO_AF4 0x4 +#define GPIO_AF5 0x5 +#define GPIO_AF6 0x6 +#define GPIO_AF7 0x7 +#define GPIO_AF8 0x8 +#define GPIO_AF9 0x9 +#define GPIO_AF10 0xa +#define GPIO_AF11 0xb +#define GPIO_AF12 0xc +#define GPIO_AF13 0xd +#define GPIO_AF14 0xe +#define GPIO_AF15 0xf + +/* --- Function prototypes ------------------------------------------------- */ + +/* + * L1, like F2 and F4, has the "new" GPIO peripheral, so use that style + * TODO: this should all really be moved to a "common" gpio header + */ + +void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios); +void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios); +void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios); + +/* F1 compatible api */ +void gpio_set(u32 gpioport, u16 gpios); +void gpio_clear(u32 gpioport, u16 gpios); +u16 gpio_get(u32 gpioport, u16 gpios); +void gpio_toggle(u32 gpioport, u16 gpios); +u16 gpio_port_read(u32 gpioport); +void gpio_port_write(u32 gpioport, u16 data); +void gpio_port_config_lock(u32 gpioport, u16 gpios); + +#endif diff --git a/include/libopencm3/stm32/l1/rcc.h b/include/libopencm3/stm32/l1/rcc.h new file mode 100644 index 0000000..ebcca86 --- /dev/null +++ b/include/libopencm3/stm32/l1/rcc.h @@ -0,0 +1,453 @@ +/** @file + +@ingroup STM32L1xx + +@brief libopencm3 STM32L1xx Reset and Clock Control + +@version 1.0.0 + +@author @htmlonly © @endhtmlonly 2009 Federico Ruiz-Ugalde \ +@author @htmlonly © @endhtmlonly 2009 Uwe Hermann +@author @htmlonly © @endhtmlonly 2012 Karl Palsson + +@date 18 May 2012 + +LGPL License Terms @ref lgpl_license + */ +/** @defgroup STM32L1xx_rcc_defines + +@brief Defined Constants and Types for the STM32L1xx Reset and Clock Control + +@ingroup STM32L1xx_defines + +LGPL License Terms @ref lgpl_license + + */ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * Copyright (C) 2009 Federico Ruiz-Ugalde + * Copyright (C) 2012 Karl Palsson + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + * + * Originally based on the F1 code, as it seemed most similar to the L1 + * TODO: very incomplete still! + */ + +#ifndef LIBOPENCM3_RCC_H +#define LIBOPENCM3_RCC_H + +#include +#include + +/* --- RCC registers ------------------------------------------------------- */ + +#define RCC_CR MMIO32(RCC_BASE + 0x00) +#define RCC_ICSCR MMIO32(RCC_BASE + 0x04) +#define RCC_CFGR MMIO32(RCC_BASE + 0x08) +#define RCC_CIR MMIO32(RCC_BASE + 0x0c) +#define RCC_AHBRSTR MMIO32(RCC_BASE + 0x10) +#define RCC_APB2RSTR MMIO32(RCC_BASE + 0x14) +#define RCC_APB1RSTR MMIO32(RCC_BASE + 0x18) +#define RCC_AHBENR MMIO32(RCC_BASE + 0x1c) +#define RCC_APB2ENR MMIO32(RCC_BASE + 0x20) +#define RCC_APB1ENR MMIO32(RCC_BASE + 0x24) +#define RCC_AHBLPENR MMIO32(RCC_BASE + 0x28) +#define RCC_APB2LPENR MMIO32(RCC_BASE + 0x2c) +#define RCC_APB1LPENR MMIO32(RCC_BASE + 0x30) +#define RCC_CSR MMIO32(RCC_BASE + 0x34) + +/* --- RCC_CR values ------------------------------------------------------- */ + +/* RTCPRE[1:0] at 30:29 */ +#define RCC_CR_CSSON (1 << 28) +#define RCC_CR_PLLRDY (1 << 25) +#define RCC_CR_PLLON (1 << 24) +#define RCC_CR_HSEBYP (1 << 18) +#define RCC_CR_HSERDY (1 << 17) +#define RCC_CR_HSEON (1 << 16) +#define RCC_CR_MSIRDY (1 << 9) +#define RCC_CR_MSION (1 << 8) +#define RCC_CR_HSIRDY (1 << 1) +#define RCC_CR_HSION (1 << 0) + +/* --- RCC_ICSCR values ---------------------------------------------------- */ + +// TODO + +/* --- RCC_CFGR values ----------------------------------------------------- */ + +/* MCOPRE */ +#define RCC_CFGR_MCOPRE_DIV1 0 +#define RCC_CFGR_MCOPRE_DIV2 1 +#define RCC_CFGR_MCOPRE_DIV4 2 +#define RCC_CFGR_MCOPRE_DIV8 3 +#define RCC_CFGR_MCOPRE_DIV16 4 + +/* MCO: Microcontroller clock output */ +#define RCC_CFGR_MCO_NOCLK 0x0 +#define RCC_CFGR_MCO_SYSCLK 0x1 +#define RCC_CFGR_MCO_HSICLK 0x2 +#define RCC_CFGR_MCO_MSICLK 0x3 +#define RCC_CFGR_MCO_HSECLK 0x4 +#define RCC_CFGR_MCO_PLLCLK 0x5 +#define RCC_CFGR_MCO_LSICLK 0x6 +#define RCC_CFGR_MCO_LSECLK 0x7 + +/* PLL Output division selection */ +#define RCC_CFGR_PLLDIV_DIV2 0x1 +#define RCC_CFGR_PLLDIV_DIV3 0x2 +#define RCC_CFGR_PLLDIV_DIV4 0x3 + +/* PLLMUL: PLL multiplication factor */ +#define RCC_CFGR_PLLMUL_MUL3 0x0 +#define RCC_CFGR_PLLMUL_MUL4 0x1 +#define RCC_CFGR_PLLMUL_MUL6 0x2 +#define RCC_CFGR_PLLMUL_MUL8 0x3 +#define RCC_CFGR_PLLMUL_MUL12 0x4 +#define RCC_CFGR_PLLMUL_MUL16 0x5 +#define RCC_CFGR_PLLMUL_MUL24 0x6 +#define RCC_CFGR_PLLMUL_MUL32 0x7 +#define RCC_CFGR_PLLMUL_MUL48 0x8 + +/* PLLSRC: PLL entry clock source */ +#define RCC_CFGR_PLLSRC_HSI_CLK 0x0 +#define RCC_CFGR_PLLSRC_HSE_CLK 0x1 + +/* PPRE2: APB high-speed prescaler (APB2) */ +#define RCC_CFGR_PPRE2_HCLK_NODIV 0x0 +#define RCC_CFGR_PPRE2_HCLK_DIV2 0x4 +#define RCC_CFGR_PPRE2_HCLK_DIV4 0x5 +#define RCC_CFGR_PPRE2_HCLK_DIV8 0x6 +#define RCC_CFGR_PPRE2_HCLK_DIV16 0x7 + +/* PPRE1: APB low-speed prescaler (APB1) */ +#define RCC_CFGR_PPRE1_HCLK_NODIV 0x0 +#define RCC_CFGR_PPRE1_HCLK_DIV2 0x4 +#define RCC_CFGR_PPRE1_HCLK_DIV4 0x5 +#define RCC_CFGR_PPRE1_HCLK_DIV8 0x6 +#define RCC_CFGR_PPRE1_HCLK_DIV16 0x7 + +/* HPRE: AHB prescaler */ +#define RCC_CFGR_HPRE_SYSCLK_NODIV 0x0 +#define RCC_CFGR_HPRE_SYSCLK_DIV2 0x8 +#define RCC_CFGR_HPRE_SYSCLK_DIV4 0x9 +#define RCC_CFGR_HPRE_SYSCLK_DIV8 0xa +#define RCC_CFGR_HPRE_SYSCLK_DIV16 0xb +#define RCC_CFGR_HPRE_SYSCLK_DIV64 0xc +#define RCC_CFGR_HPRE_SYSCLK_DIV128 0xd +#define RCC_CFGR_HPRE_SYSCLK_DIV256 0xe +#define RCC_CFGR_HPRE_SYSCLK_DIV512 0xf + +/* SWS: System clock switch status */ +#define RCC_CFGR_SWS_SYSCLKSEL_MSICLK 0x0 +#define RCC_CFGR_SWS_SYSCLKSEL_HSICLK 0x1 +#define RCC_CFGR_SWS_SYSCLKSEL_HSECLK 0x2 +#define RCC_CFGR_SWS_SYSCLKSEL_PLLCLK 0x3 + +/* SW: System clock switch */ +#define RCC_CFGR_SW_SYSCLKSEL_MSICLK 0x0 +#define RCC_CFGR_SW_SYSCLKSEL_HSICLK 0x1 +#define RCC_CFGR_SW_SYSCLKSEL_HSECLK 0x2 +#define RCC_CFGR_SW_SYSCLKSEL_PLLCLK 0x3 + +/* --- RCC_CIR values ------------------------------------------------------ */ + +/* Clock security system interrupt clear bit */ +#define RCC_CIR_CSSC (1 << 23) + +/* OSC ready interrupt clear bits */ +#define RCC_CIR_MSIRDYC (1 << 21) +#define RCC_CIR_PLLRDYC (1 << 20) +#define RCC_CIR_HSERDYC (1 << 19) +#define RCC_CIR_HSIRDYC (1 << 18) +#define RCC_CIR_LSERDYC (1 << 17) +#define RCC_CIR_LSIRDYC (1 << 16) + +/* OSC ready interrupt enable bits */ +#define RCC_CIR_MSIRDYIE (1 << 13) +#define RCC_CIR_PLLRDYIE (1 << 12) +#define RCC_CIR_HSERDYIE (1 << 11) +#define RCC_CIR_HSIRDYIE (1 << 10) +#define RCC_CIR_LSERDYIE (1 << 9) +#define RCC_CIR_LSIRDYIE (1 << 8) + +/* Clock security system interrupt flag bit */ +#define RCC_CIR_CSSF (1 << 7) + +/* OSC ready interrupt flag bits */ +#define RCC_CIR_MSIRDYF (1 << 5) /* (**) */ +#define RCC_CIR_PLLRDYF (1 << 4) +#define RCC_CIR_HSERDYF (1 << 3) +#define RCC_CIR_HSIRDYF (1 << 2) +#define RCC_CIR_LSERDYF (1 << 1) +#define RCC_CIR_LSIRDYF (1 << 0) + +/* --- RCC_AHBRSTR values ------------------------------------------------- */ +#define RCC_AHBRSTR_DMA1RST (1 << 24) +#define RCC_AHBRSTR_FLITFRST (1 << 15) +#define RCC_AHBRSTR_CRCRST (1 << 12) +#define RCC_AHBRSTR_GPIOHRST (1 << 5) +#define RCC_AHBRSTR_GPIOERST (1 << 4) +#define RCC_AHBRSTR_GPIODRST (1 << 3) +#define RCC_AHBRSTR_GPIOCRST (1 << 2) +#define RCC_AHBRSTR_GPIOBRST (1 << 1) +#define RCC_AHBRSTR_GPIOARST (1 << 0) + +/* --- RCC_APB2RSTR values ------------------------------------------------- */ + +#define RCC_APB2RSTR_USART1RST (1 << 14) +#define RCC_APB2RSTR_SPI1RST (1 << 12) +#define RCC_APB2RSTR_ADC1RST (1 << 9) +#define RCC_APB2RSTR_TIM11RST (1 << 4) +#define RCC_APB2RSTR_TIM10RST (1 << 3) +#define RCC_APB2RSTR_TIM9RST (1 << 2) +#define RCC_APB2RSTR_SYSCFGRST (1 << 0) + +/* --- RCC_APB1RSTR values ------------------------------------------------- */ + +TODO : up to here + +#define RCC_APB1RSTR_DACRST (1 << 29) +#define RCC_APB1RSTR_PWRRST (1 << 28) +#define RCC_APB1RSTR_BKPRST (1 << 27) +#define RCC_APB1RSTR_CAN2RST (1 << 26) /* (**) */ +#define RCC_APB1RSTR_CAN1RST (1 << 25) /* (**) */ +#define RCC_APB1RSTR_CANRST (1 << 25) /* (XX) Alias for CAN1RST */ +#define RCC_APB1RSTR_USBRST (1 << 23) /* (XX) */ +#define RCC_APB1RSTR_I2C2RST (1 << 22) +#define RCC_APB1RSTR_I2C1RST (1 << 21) +#define RCC_APB1RSTR_UART5RST (1 << 20) +#define RCC_APB1RSTR_UART4RST (1 << 19) +#define RCC_APB1RSTR_USART3RST (1 << 18) +#define RCC_APB1RSTR_USART2RST (1 << 17) +#define RCC_APB1RSTR_SPI3RST (1 << 15) +#define RCC_APB1RSTR_SPI2RST (1 << 14) +#define RCC_APB1RSTR_WWDGRST (1 << 11) +#define RCC_APB1RSTR_TIM7RST (1 << 5) +#define RCC_APB1RSTR_TIM6RST (1 << 4) +#define RCC_APB1RSTR_TIM5RST (1 << 3) +#define RCC_APB1RSTR_TIM4RST (1 << 2) +#define RCC_APB1RSTR_TIM3RST (1 << 1) +#define RCC_APB1RSTR_TIM2RST (1 << 0) + +/* --- RCC_AHBENR values --------------------------------------------------- */ + +/** @defgroup rcc_ahbenr_en RCC_AHBENR enable values +@ingroup STM32L1xx_rcc_defines + +@{*/ +#define RCC_AHBENR_ETHMACENRX (1 << 16) +#define RCC_AHBENR_ETHMACENTX (1 << 15) +#define RCC_AHBENR_ETHMACEN (1 << 14) +#define RCC_AHBENR_OTGFSEN (1 << 12) +#define RCC_AHBENR_SDIOEN (1 << 10) +#define RCC_AHBENR_FSMCEN (1 << 8) +#define RCC_AHBENR_CRCEN (1 << 6) +#define RCC_AHBENR_FLITFEN (1 << 4) +#define RCC_AHBENR_SRAMEN (1 << 2) +#define RCC_AHBENR_DMA2EN (1 << 1) +#define RCC_AHBENR_DMA1EN (1 << 0) +/*@}*/ + +/* --- RCC_APB2ENR values -------------------------------------------------- */ + +/** @defgroup rcc_apb2enr_en RCC_APB2ENR enable values +@ingroup STM32L1xx_rcc_defines + +@{*/ +#define RCC_APB2ENR_ADC3EN (1 << 15) /* (XX) */ +#define RCC_APB2ENR_USART1EN (1 << 14) +#define RCC_APB2ENR_TIM8EN (1 << 13) /* (XX) */ +#define RCC_APB2ENR_SPI1EN (1 << 12) +#define RCC_APB2ENR_TIM1EN (1 << 11) +#define RCC_APB2ENR_ADC2EN (1 << 10) +#define RCC_APB2ENR_ADC1EN (1 << 9) +#define RCC_APB2ENR_IOPGEN (1 << 8) /* (XX) */ +#define RCC_APB2ENR_IOPFEN (1 << 7) /* (XX) */ +#define RCC_APB2ENR_IOPEEN (1 << 6) +#define RCC_APB2ENR_IOPDEN (1 << 5) +#define RCC_APB2ENR_IOPCEN (1 << 4) +#define RCC_APB2ENR_IOPBEN (1 << 3) +#define RCC_APB2ENR_IOPAEN (1 << 2) +#define RCC_APB2ENR_AFIOEN (1 << 0) +/*@}*/ + +/* --- RCC_APB1ENR values -------------------------------------------------- */ + +/** @defgroup rcc_apb1enr_en RCC_APB1ENR enable values +@ingroup STM32L1xx_rcc_defines + +@{*/ +#define RCC_APB1ENR_DACEN (1 << 29) +#define RCC_APB1ENR_PWREN (1 << 28) +#define RCC_APB1ENR_BKPEN (1 << 27) +#define RCC_APB1ENR_CAN2EN (1 << 26) /* (**) */ +#define RCC_APB1ENR_CAN1EN (1 << 25) /* (**) */ +#define RCC_APB1ENR_CANEN (1 << 25) /* (XX) Alias for CAN1EN */ +#define RCC_APB1ENR_USBEN (1 << 23) /* (XX) */ +#define RCC_APB1ENR_I2C2EN (1 << 22) +#define RCC_APB1ENR_I2C1EN (1 << 21) +#define RCC_APB1ENR_UART5EN (1 << 20) +#define RCC_APB1ENR_UART4EN (1 << 19) +#define RCC_APB1ENR_USART3EN (1 << 18) +#define RCC_APB1ENR_USART2EN (1 << 17) +#define RCC_APB1ENR_SPI3EN (1 << 15) +#define RCC_APB1ENR_SPI2EN (1 << 14) +#define RCC_APB1ENR_WWDGEN (1 << 11) +#define RCC_APB1ENR_TIM7EN (1 << 5) +#define RCC_APB1ENR_TIM6EN (1 << 4) +#define RCC_APB1ENR_TIM5EN (1 << 3) +#define RCC_APB1ENR_TIM4EN (1 << 2) +#define RCC_APB1ENR_TIM3EN (1 << 1) +#define RCC_APB1ENR_TIM2EN (1 << 0) +/*@}*/ + +/* --- RCC_BDCR values ----------------------------------------------------- */ + +#define RCC_BDCR_BDRST (1 << 16) +#define RCC_BDCR_RTCEN (1 << 15) +/* RCC_BDCR[9:8]: RTCSEL */ +#define RCC_BDCR_LSEBYP (1 << 2) +#define RCC_BDCR_LSERDY (1 << 1) +#define RCC_BDCR_LSEON (1 << 0) + +/* --- RCC_CSR values ------------------------------------------------------ */ + +#define RCC_CSR_LPWRRSTF (1 << 31) +#define RCC_CSR_WWDGRSTF (1 << 30) +#define RCC_CSR_IWDGRSTF (1 << 29) +#define RCC_CSR_SFTRSTF (1 << 28) +#define RCC_CSR_PORRSTF (1 << 27) +#define RCC_CSR_PINRSTF (1 << 26) +#define RCC_CSR_RMVF (1 << 24) +#define RCC_CSR_LSIRDY (1 << 1) +#define RCC_CSR_LSION (1 << 0) + +/* --- RCC_AHBRSTR values -------------------------------------------------- */ + +#define RCC_AHBRSTR_ETHMACRST (1 << 14) +#define RCC_AHBRSTR_OTGFSRST (1 << 12) + +/* --- RCC_CFGR2 values ---------------------------------------------------- */ + +/* I2S3SRC: I2S3 clock source */ +#define RCC_CFGR2_I2S3SRC_SYSCLK 0x0 +#define RCC_CFGR2_I2S3SRC_PLL3_VCO_CLK 0x1 + +/* I2S2SRC: I2S2 clock source */ +#define RCC_CFGR2_I2S2SRC_SYSCLK 0x0 +#define RCC_CFGR2_I2S2SRC_PLL3_VCO_CLK 0x1 + +/* PREDIV1SRC: PREDIV1 entry clock source */ +#define RCC_CFGR2_PREDIV1SRC_HSE_CLK 0x0 +#define RCC_CFGR2_PREDIV1SRC_PLL2_CLK 0x1 + +#define RCC_CFGR2_PLL2MUL (1 << 0) +#define RCC_CFGR2_PREDIV2 (1 << 0) +#define RCC_CFGR2_PREDIV1 (1 << 0) + +/* PLL3MUL: PLL3 multiplication factor */ +#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL8 0x6 +#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL9 0x7 +#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL10 0x8 +#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL11 0x9 +#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL12 0xa +#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL13 0xb +#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL14 0xc +#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL16 0xe +#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL20 0xf + +/* PLL2MUL: PLL2 multiplication factor */ +#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL8 0x6 +#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL9 0x7 +#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL10 0x8 +#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL11 0x9 +#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL12 0xa +#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL13 0xb +#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL14 0xc +#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL16 0xe +#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL20 0xf + +/* PREDIV2: PREDIV2 division factor */ +#define RCC_CFGR2_PREDIV2_NODIV 0x0 +#define RCC_CFGR2_PREDIV2_DIV2 0x1 +#define RCC_CFGR2_PREDIV2_DIV3 0x2 +#define RCC_CFGR2_PREDIV2_DIV4 0x3 +#define RCC_CFGR2_PREDIV2_DIV5 0x4 +#define RCC_CFGR2_PREDIV2_DIV6 0x5 +#define RCC_CFGR2_PREDIV2_DIV7 0x6 +#define RCC_CFGR2_PREDIV2_DIV8 0x7 +#define RCC_CFGR2_PREDIV2_DIV9 0x8 +#define RCC_CFGR2_PREDIV2_DIV10 0x9 +#define RCC_CFGR2_PREDIV2_DIV11 0xa +#define RCC_CFGR2_PREDIV2_DIV12 0xb +#define RCC_CFGR2_PREDIV2_DIV13 0xc +#define RCC_CFGR2_PREDIV2_DIV14 0xd +#define RCC_CFGR2_PREDIV2_DIV15 0xe +#define RCC_CFGR2_PREDIV2_DIV16 0xf + +/* --- Variable definitions ------------------------------------------------ */ +extern u32 rcc_ppre1_frequency; +extern u32 rcc_ppre2_frequency; + +/* --- Function prototypes ------------------------------------------------- */ + +typedef enum { + PLL, HSE, HSI, LSE, LSI +} osc_t; + +void rcc_osc_ready_int_clear(osc_t osc); +void rcc_osc_ready_int_enable(osc_t osc); +void rcc_osc_ready_int_disable(osc_t osc); +int rcc_osc_ready_int_flag(osc_t osc); +void rcc_css_int_clear(void); +int rcc_css_int_flag(void); +void rcc_wait_for_osc_ready(osc_t osc); +void rcc_osc_on(osc_t osc); +void rcc_osc_off(osc_t osc); +void rcc_css_enable(void); +void rcc_css_disable(void); +void rcc_osc_bypass_enable(osc_t osc); +void rcc_osc_bypass_disable(osc_t osc); +void rcc_peripheral_enable_clock(volatile u32 *reg, u32 en); +void rcc_peripheral_disable_clock(volatile u32 *reg, u32 en); +void rcc_peripheral_reset(volatile u32 *reg, u32 reset); +void rcc_peripheral_clear_reset(volatile u32 *reg, u32 clear_reset); +void rcc_set_sysclk_source(u32 clk); +void rcc_set_pll_multiplication_factor(u32 mul); +void rcc_set_pll_source(u32 pllsrc); +void rcc_set_pllxtpre(u32 pllxtpre); +void rcc_set_adcpre(u32 adcpre); +void rcc_set_ppre2(u32 ppre2); +void rcc_set_ppre1(u32 ppre1); +void rcc_set_hpre(u32 hpre); +void rcc_set_usbpre(u32 usbpre); +u32 rcc_get_system_clock_source(int i); +void rcc_clock_setup_in_hsi_out_64mhz(void); +void rcc_clock_setup_in_hsi_out_48mhz(void); + +/** + * Maximum speed possible for F100 (Value Line) on HSI + */ +void rcc_clock_setup_in_hsi_out_24mhz(void); +void rcc_clock_setup_in_hse_8mhz_out_24mhz(void); +void rcc_clock_setup_in_hse_8mhz_out_72mhz(void); +void rcc_clock_setup_in_hse_12mhz_out_72mhz(void); +void rcc_clock_setup_in_hse_16mhz_out_72mhz(void); +void rcc_backupdomain_reset(void); + +#endif diff --git a/lib/stm32/l1/Makefile b/lib/stm32/l1/Makefile index d2cc1be..543c416 100644 --- a/lib/stm32/l1/Makefile +++ b/lib/stm32/l1/Makefile @@ -28,7 +28,7 @@ CFLAGS = -Os -g -Wall -Wextra -I../../../include -fno-common \ -ffunction-sections -fdata-sections -MD -DSTM32L1 # ARFLAGS = rcsv ARFLAGS = rcs -OBJS = vector.o desig.o crc.o +OBJS = vector.o desig.o crc.o gpio.o VPATH += ../../usb:../ diff --git a/lib/stm32/l1/libopencm3_stm32l1.ld b/lib/stm32/l1/libopencm3_stm32l1.ld new file mode 100644 index 0000000..a64a1f7 --- /dev/null +++ b/lib/stm32/l1/libopencm3_stm32l1.ld @@ -0,0 +1,84 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +/* Generic linker script for STM32 targets using libopencm3. */ + +/* Memory regions must be defined in the ld script which includes this one. */ + +/* Enforce emmition of the vector table. */ +EXTERN (vector_table) + +/* Define the entry point of the output file. */ +ENTRY(reset_handler) + +/* Define sections. */ +SECTIONS +{ + . = ORIGIN(rom); + + .text : { + *(.vectors) /* Vector table */ + *(.text*) /* Program code */ + . = ALIGN(4); + *(.rodata*) /* Read-only data */ + . = ALIGN(4); + _etext = .; + } >rom + + /* + * Another section used by C++ stuff, appears when using newlib with + * 64bit (long long) printf support + */ + .ARM.extab : { + *(.ARM.extab*) + } >rom + .ARM.exidx : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >rom + + . = ORIGIN(ram); + + .data : AT (__exidx_end) { + _data = .; + *(.data*) /* Read-write initialized data */ + . = ALIGN(4); + _edata = .; + } >ram + + .bss : { + *(.bss*) /* Read-write zero initialized data */ + *(COMMON) + . = ALIGN(4); + _ebss = .; + } >ram AT >rom + + /* + * The .eh_frame section appears to be used for C++ exception handling. + * You may need to fix this if you're using C++. + */ + /DISCARD/ : { *(.eh_frame) } + + . = ALIGN(4); + end = .; +} + +PROVIDE(_stack = ORIGIN(ram) + LENGTH(ram)); + diff --git a/lib/stm32/l1/stm32l15xx8.ld b/lib/stm32/l1/stm32l15xx8.ld new file mode 100644 index 0000000..1f20f57 --- /dev/null +++ b/lib/stm32/l1/stm32l15xx8.ld @@ -0,0 +1,31 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2012 Karl Palsson . + */ + +/* Linker script for STM32L15xx8, 64K flash, 10K RAM. */ + +/* Define memory regions. */ +MEMORY +{ + rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 10K +} + +/* Include the common ld script. */ +INCLUDE libopencm3_stm32l1.ld + diff --git a/lib/stm32/l1/stm32l15xxB.ld b/lib/stm32/l1/stm32l15xxB.ld new file mode 100644 index 0000000..4c14b71 --- /dev/null +++ b/lib/stm32/l1/stm32l15xxB.ld @@ -0,0 +1,31 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2012 Karl Palsson . + */ + +/* Linker script for STM32L15xxB, 128K flash, 16K RAM. */ + +/* Define memory regions. */ +MEMORY +{ + rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K +} + +/* Include the common ld script. */ +INCLUDE libopencm3_stm32l1.ld + -- cgit v1.2.3 From 9aed64a19db77ad55f46cc9eea979b48c920d13e Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Sun, 22 Jul 2012 19:04:06 +0000 Subject: Finish RCC definitions => Working example! --- .../l1/stm32l-discovery/miniblink/miniblink.c | 4 +- include/libopencm3/stm32/l1/rcc.h | 178 ++++++++------------- 2 files changed, 67 insertions(+), 115 deletions(-) (limited to 'examples') diff --git a/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c b/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c index a9d7c3d..fbace3c 100644 --- a/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c +++ b/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c @@ -29,7 +29,7 @@ void gpio_setup(void) { /* Enable GPIOB clock. */ /* Manually: */ - RCC_AHBENR |= RCC_AHBENR_IOPBEN; + RCC_AHBENR |= RCC_AHBENR_GPIOBEN; /* Using API functions: */ //rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_IOPBEN); @@ -63,7 +63,7 @@ int main(void) // __asm__("nop"); /* Using API function gpio_toggle(): */ - gpio_toggle(PORT_LED, PORT_LED); /* LED on/off */ + gpio_toggle(PORT_LED, PIN_LED); /* LED on/off */ for (i = 0; i < 1000000; i++) /* Wait a bit. */ __asm__("nop"); } diff --git a/include/libopencm3/stm32/l1/rcc.h b/include/libopencm3/stm32/l1/rcc.h index ebcca86..07d3692 100644 --- a/include/libopencm3/stm32/l1/rcc.h +++ b/include/libopencm3/stm32/l1/rcc.h @@ -219,27 +219,19 @@ LGPL License Terms @ref lgpl_license /* --- RCC_APB1RSTR values ------------------------------------------------- */ -TODO : up to here - +#define RCC_APB1RSTR_COMPRST (1 << 31) #define RCC_APB1RSTR_DACRST (1 << 29) #define RCC_APB1RSTR_PWRRST (1 << 28) -#define RCC_APB1RSTR_BKPRST (1 << 27) -#define RCC_APB1RSTR_CAN2RST (1 << 26) /* (**) */ -#define RCC_APB1RSTR_CAN1RST (1 << 25) /* (**) */ -#define RCC_APB1RSTR_CANRST (1 << 25) /* (XX) Alias for CAN1RST */ -#define RCC_APB1RSTR_USBRST (1 << 23) /* (XX) */ +#define RCC_APB1RSTR_USBRST (1 << 23) #define RCC_APB1RSTR_I2C2RST (1 << 22) #define RCC_APB1RSTR_I2C1RST (1 << 21) -#define RCC_APB1RSTR_UART5RST (1 << 20) -#define RCC_APB1RSTR_UART4RST (1 << 19) #define RCC_APB1RSTR_USART3RST (1 << 18) #define RCC_APB1RSTR_USART2RST (1 << 17) -#define RCC_APB1RSTR_SPI3RST (1 << 15) #define RCC_APB1RSTR_SPI2RST (1 << 14) #define RCC_APB1RSTR_WWDGRST (1 << 11) +#define RCC_APB1RSTR_LCDRST (1 << 9) #define RCC_APB1RSTR_TIM7RST (1 << 5) #define RCC_APB1RSTR_TIM6RST (1 << 4) -#define RCC_APB1RSTR_TIM5RST (1 << 3) #define RCC_APB1RSTR_TIM4RST (1 << 2) #define RCC_APB1RSTR_TIM3RST (1 << 1) #define RCC_APB1RSTR_TIM2RST (1 << 0) @@ -250,17 +242,15 @@ TODO : up to here @ingroup STM32L1xx_rcc_defines @{*/ -#define RCC_AHBENR_ETHMACENRX (1 << 16) -#define RCC_AHBENR_ETHMACENTX (1 << 15) -#define RCC_AHBENR_ETHMACEN (1 << 14) -#define RCC_AHBENR_OTGFSEN (1 << 12) -#define RCC_AHBENR_SDIOEN (1 << 10) -#define RCC_AHBENR_FSMCEN (1 << 8) -#define RCC_AHBENR_CRCEN (1 << 6) -#define RCC_AHBENR_FLITFEN (1 << 4) -#define RCC_AHBENR_SRAMEN (1 << 2) -#define RCC_AHBENR_DMA2EN (1 << 1) -#define RCC_AHBENR_DMA1EN (1 << 0) +#define RCC_AHBENR_DMA1EN (1 << 24) +#define RCC_AHBENR_FLITFEN (1 << 15) +#define RCC_AHBENR_CRCEN (1 << 12) +#define RCC_AHBENR_GPIOHEN (1 << 5) +#define RCC_AHBENR_GPIOEEN (1 << 4) +#define RCC_AHBENR_GPIODEN (1 << 3) +#define RCC_AHBENR_GPIOCEN (1 << 2) +#define RCC_AHBENR_GPIOBEN (1 << 1) +#define RCC_AHBENR_GPIOAEN (1 << 0) /*@}*/ /* --- RCC_APB2ENR values -------------------------------------------------- */ @@ -269,21 +259,13 @@ TODO : up to here @ingroup STM32L1xx_rcc_defines @{*/ -#define RCC_APB2ENR_ADC3EN (1 << 15) /* (XX) */ #define RCC_APB2ENR_USART1EN (1 << 14) -#define RCC_APB2ENR_TIM8EN (1 << 13) /* (XX) */ #define RCC_APB2ENR_SPI1EN (1 << 12) -#define RCC_APB2ENR_TIM1EN (1 << 11) -#define RCC_APB2ENR_ADC2EN (1 << 10) #define RCC_APB2ENR_ADC1EN (1 << 9) -#define RCC_APB2ENR_IOPGEN (1 << 8) /* (XX) */ -#define RCC_APB2ENR_IOPFEN (1 << 7) /* (XX) */ -#define RCC_APB2ENR_IOPEEN (1 << 6) -#define RCC_APB2ENR_IOPDEN (1 << 5) -#define RCC_APB2ENR_IOPCEN (1 << 4) -#define RCC_APB2ENR_IOPBEN (1 << 3) -#define RCC_APB2ENR_IOPAEN (1 << 2) -#define RCC_APB2ENR_AFIOEN (1 << 0) +#define RCC_APB2ENR_TIM11EN (1 << 4) +#define RCC_APB2ENR_TIM10EN (1 << 3) +#define RCC_APB2ENR_TIM9EN (1 << 2) +#define RCC_APB2ENR_SYSCFGEN (1 << 0) /*@}*/ /* --- RCC_APB1ENR values -------------------------------------------------- */ @@ -292,38 +274,61 @@ TODO : up to here @ingroup STM32L1xx_rcc_defines @{*/ +#define RCC_APB1ENR_COMPEN (1 << 31) #define RCC_APB1ENR_DACEN (1 << 29) #define RCC_APB1ENR_PWREN (1 << 28) -#define RCC_APB1ENR_BKPEN (1 << 27) -#define RCC_APB1ENR_CAN2EN (1 << 26) /* (**) */ -#define RCC_APB1ENR_CAN1EN (1 << 25) /* (**) */ -#define RCC_APB1ENR_CANEN (1 << 25) /* (XX) Alias for CAN1EN */ -#define RCC_APB1ENR_USBEN (1 << 23) /* (XX) */ +#define RCC_APB1ENR_USBEN (1 << 23) #define RCC_APB1ENR_I2C2EN (1 << 22) #define RCC_APB1ENR_I2C1EN (1 << 21) -#define RCC_APB1ENR_UART5EN (1 << 20) -#define RCC_APB1ENR_UART4EN (1 << 19) #define RCC_APB1ENR_USART3EN (1 << 18) #define RCC_APB1ENR_USART2EN (1 << 17) -#define RCC_APB1ENR_SPI3EN (1 << 15) #define RCC_APB1ENR_SPI2EN (1 << 14) #define RCC_APB1ENR_WWDGEN (1 << 11) +#define RCC_APB1ENR_LCDEN (1 << 9) #define RCC_APB1ENR_TIM7EN (1 << 5) #define RCC_APB1ENR_TIM6EN (1 << 4) -#define RCC_APB1ENR_TIM5EN (1 << 3) #define RCC_APB1ENR_TIM4EN (1 << 2) #define RCC_APB1ENR_TIM3EN (1 << 1) #define RCC_APB1ENR_TIM2EN (1 << 0) /*@}*/ -/* --- RCC_BDCR values ----------------------------------------------------- */ +/* --- RCC_AHBLPENR -------------------------------------------------------- */ +#define RCC_AHBLPENR_DMA1LPEN (1 << 24) +#define RCC_AHBLPENR_SRAMLPEN (1 << 16) +#define RCC_AHBLPENR_FLITFLPEN (1 << 15) +#define RCC_AHBLPENR_CRCLPEN (1 << 12) +#define RCC_AHBLPENR_GPIOHLPEN (1 << 5) +#define RCC_AHBLPENR_GPIOELPEN (1 << 4) +#define RCC_AHBLPENR_GPIODLPEN (1 << 3) +#define RCC_AHBLPENR_GPIOCLPEN (1 << 2) +#define RCC_AHBLPENR_GPIOBLPEN (1 << 1) +#define RCC_AHBLPENR_GPIOALPEN (1 << 0) + +#define RCC_APB2LPENR_USART1LPEN (1 << 14) +#define RCC_APB2LPENR_SPI1LPEN (1 << 12) +#define RCC_APB2LPENR_ADC1LPEN (1 << 9) +#define RCC_APB2LPENR_TIM11LPEN (1 << 4) +#define RCC_APB2LPENR_TIM10LPEN (1 << 3) +#define RCC_APB2LPENR_TIM9LPEN (1 << 2) +#define RCC_APB2LPENR_SYSCFGLPEN (1 << 0) + +#define RCC_APB1LPENR_COMPLPEN (1 << 31) +#define RCC_APB1LPENR_DACLPEN (1 << 29) +#define RCC_APB1LPENR_PWRLPEN (1 << 28) +#define RCC_APB1LPENR_USBLPEN (1 << 23) +#define RCC_APB1LPENR_I2C2LPEN (1 << 22) +#define RCC_APB1LPENR_I2C1LPEN (1 << 21) +#define RCC_APB1LPENR_USART3LPEN (1 << 18) +#define RCC_APB1LPENR_USART2LPEN (1 << 17) +#define RCC_APB1LPENR_SPI2LPEN (1 << 14) +#define RCC_APB1LPENR_WWDGLPEN (1 << 11) +#define RCC_APB1LPENR_LCDLPEN (1 << 9) +#define RCC_APB1LPENR_TIM7LPEN (1 << 5) +#define RCC_APB1LPENR_TIM6LPEN (1 << 4) +#define RCC_APB1LPENR_TIM4LPEN (1 << 2) +#define RCC_APB1LPENR_TIM3LPEN (1 << 1) +#define RCC_APB1LPENR_TIM2LPEN (1 << 0) -#define RCC_BDCR_BDRST (1 << 16) -#define RCC_BDCR_RTCEN (1 << 15) -/* RCC_BDCR[9:8]: RTCSEL */ -#define RCC_BDCR_LSEBYP (1 << 2) -#define RCC_BDCR_LSERDY (1 << 1) -#define RCC_BDCR_LSEON (1 << 0) /* --- RCC_CSR values ------------------------------------------------------ */ @@ -333,72 +338,17 @@ TODO : up to here #define RCC_CSR_SFTRSTF (1 << 28) #define RCC_CSR_PORRSTF (1 << 27) #define RCC_CSR_PINRSTF (1 << 26) +#define RCC_CSR_OBLRSTF (1 << 25) #define RCC_CSR_RMVF (1 << 24) +#define RCC_CSR_RTCRST (1 << 23) +#define RCC_CSR_RTCEN (1 << 22) +/* RTCSEL[1:0] */ +#define RCC_CSR_LSEBYP (1 << 10) +#define RCC_CSR_LSERDY (1 << 9) +#define RCC_CSR_LSEON (1 << 8) #define RCC_CSR_LSIRDY (1 << 1) #define RCC_CSR_LSION (1 << 0) -/* --- RCC_AHBRSTR values -------------------------------------------------- */ - -#define RCC_AHBRSTR_ETHMACRST (1 << 14) -#define RCC_AHBRSTR_OTGFSRST (1 << 12) - -/* --- RCC_CFGR2 values ---------------------------------------------------- */ - -/* I2S3SRC: I2S3 clock source */ -#define RCC_CFGR2_I2S3SRC_SYSCLK 0x0 -#define RCC_CFGR2_I2S3SRC_PLL3_VCO_CLK 0x1 - -/* I2S2SRC: I2S2 clock source */ -#define RCC_CFGR2_I2S2SRC_SYSCLK 0x0 -#define RCC_CFGR2_I2S2SRC_PLL3_VCO_CLK 0x1 - -/* PREDIV1SRC: PREDIV1 entry clock source */ -#define RCC_CFGR2_PREDIV1SRC_HSE_CLK 0x0 -#define RCC_CFGR2_PREDIV1SRC_PLL2_CLK 0x1 - -#define RCC_CFGR2_PLL2MUL (1 << 0) -#define RCC_CFGR2_PREDIV2 (1 << 0) -#define RCC_CFGR2_PREDIV1 (1 << 0) - -/* PLL3MUL: PLL3 multiplication factor */ -#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL8 0x6 -#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL9 0x7 -#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL10 0x8 -#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL11 0x9 -#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL12 0xa -#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL13 0xb -#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL14 0xc -#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL16 0xe -#define RCC_CFGR2_PLL3MUL_PLL3_CLK_MUL20 0xf - -/* PLL2MUL: PLL2 multiplication factor */ -#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL8 0x6 -#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL9 0x7 -#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL10 0x8 -#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL11 0x9 -#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL12 0xa -#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL13 0xb -#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL14 0xc -#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL16 0xe -#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL20 0xf - -/* PREDIV2: PREDIV2 division factor */ -#define RCC_CFGR2_PREDIV2_NODIV 0x0 -#define RCC_CFGR2_PREDIV2_DIV2 0x1 -#define RCC_CFGR2_PREDIV2_DIV3 0x2 -#define RCC_CFGR2_PREDIV2_DIV4 0x3 -#define RCC_CFGR2_PREDIV2_DIV5 0x4 -#define RCC_CFGR2_PREDIV2_DIV6 0x5 -#define RCC_CFGR2_PREDIV2_DIV7 0x6 -#define RCC_CFGR2_PREDIV2_DIV8 0x7 -#define RCC_CFGR2_PREDIV2_DIV9 0x8 -#define RCC_CFGR2_PREDIV2_DIV10 0x9 -#define RCC_CFGR2_PREDIV2_DIV11 0xa -#define RCC_CFGR2_PREDIV2_DIV12 0xb -#define RCC_CFGR2_PREDIV2_DIV13 0xc -#define RCC_CFGR2_PREDIV2_DIV14 0xd -#define RCC_CFGR2_PREDIV2_DIV15 0xe -#define RCC_CFGR2_PREDIV2_DIV16 0xf /* --- Variable definitions ------------------------------------------------ */ extern u32 rcc_ppre1_frequency; @@ -407,9 +357,10 @@ extern u32 rcc_ppre2_frequency; /* --- Function prototypes ------------------------------------------------- */ typedef enum { - PLL, HSE, HSI, LSE, LSI + PLL, HSE, HSI, MSI, LSE, LSI } osc_t; +#if FINISHED == 0 void rcc_osc_ready_int_clear(osc_t osc); void rcc_osc_ready_int_enable(osc_t osc); void rcc_osc_ready_int_disable(osc_t osc); @@ -449,5 +400,6 @@ void rcc_clock_setup_in_hse_8mhz_out_72mhz(void); void rcc_clock_setup_in_hse_12mhz_out_72mhz(void); void rcc_clock_setup_in_hse_16mhz_out_72mhz(void); void rcc_backupdomain_reset(void); +#endif #endif -- cgit v1.2.3 From e4f84278f2b62dee7b4e0ac718c7c6ce998240ba Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Sun, 22 Jul 2012 21:58:09 +0000 Subject: Add most of the rcc functions. (Add the forgotten gpio.c file from before) --- .../l1/stm32l-discovery/miniblink/miniblink.c | 4 +- include/libopencm3/stm32/l1/rcc.h | 7 +- lib/stm32/l1/Makefile | 2 +- lib/stm32/l1/gpio.c | 146 +++++++++ lib/stm32/l1/rcc.c | 357 +++++++++++++++++++++ 5 files changed, 511 insertions(+), 5 deletions(-) create mode 100644 lib/stm32/l1/gpio.c create mode 100644 lib/stm32/l1/rcc.c (limited to 'examples') diff --git a/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c b/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c index fbace3c..2f5c70f 100644 --- a/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c +++ b/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c @@ -29,9 +29,9 @@ void gpio_setup(void) { /* Enable GPIOB clock. */ /* Manually: */ - RCC_AHBENR |= RCC_AHBENR_GPIOBEN; + //RCC_AHBENR |= RCC_AHBENR_GPIOBEN; /* Using API functions: */ - //rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_IOPBEN); + rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOBEN); /* Set GPIO6 (in GPIO port B) to 'output push-pull'. */ /* Using API functions: */ diff --git a/include/libopencm3/stm32/l1/rcc.h b/include/libopencm3/stm32/l1/rcc.h index 07d3692..209d24f 100644 --- a/include/libopencm3/stm32/l1/rcc.h +++ b/include/libopencm3/stm32/l1/rcc.h @@ -84,6 +84,11 @@ LGPL License Terms @ref lgpl_license #define RCC_CR_HSIRDY (1 << 1) #define RCC_CR_HSION (1 << 0) +#define RCC_CR_RTCPRE_DIV2 0 +#define RCC_CR_RTCPRE_DIV4 1 +#define RCC_CR_RTCPRE_DIV8 2 +#define RCC_CR_RTCPRE_DIV18 3 + /* --- RCC_ICSCR values ---------------------------------------------------- */ // TODO @@ -360,7 +365,6 @@ typedef enum { PLL, HSE, HSI, MSI, LSE, LSI } osc_t; -#if FINISHED == 0 void rcc_osc_ready_int_clear(osc_t osc); void rcc_osc_ready_int_enable(osc_t osc); void rcc_osc_ready_int_disable(osc_t osc); @@ -400,6 +404,5 @@ void rcc_clock_setup_in_hse_8mhz_out_72mhz(void); void rcc_clock_setup_in_hse_12mhz_out_72mhz(void); void rcc_clock_setup_in_hse_16mhz_out_72mhz(void); void rcc_backupdomain_reset(void); -#endif #endif diff --git a/lib/stm32/l1/Makefile b/lib/stm32/l1/Makefile index 543c416..9bd942d 100644 --- a/lib/stm32/l1/Makefile +++ b/lib/stm32/l1/Makefile @@ -28,7 +28,7 @@ CFLAGS = -Os -g -Wall -Wextra -I../../../include -fno-common \ -ffunction-sections -fdata-sections -MD -DSTM32L1 # ARFLAGS = rcsv ARFLAGS = rcs -OBJS = vector.o desig.o crc.o gpio.o +OBJS = vector.o desig.o crc.o gpio.o rcc.o VPATH += ../../usb:../ diff --git a/lib/stm32/l1/gpio.c b/lib/stm32/l1/gpio.c new file mode 100644 index 0000000..2314bd4 --- /dev/null +++ b/lib/stm32/l1/gpio.c @@ -0,0 +1,146 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Fergus Noble + * Copyright (C) 2012 Karl Palsson + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + * + * This is virtually a carbon copy of the F4 code... + * TODO: make this code shared by f2, f4, l1 + */ + +#include + +void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios) +{ + u16 i; + u32 moder, pupd; + + /* + * We want to set the config only for the pins mentioned in gpios, + * but keeping the others, so read out the actual config first. + */ + moder = GPIO_MODER(gpioport); + pupd = GPIO_PUPDR(gpioport); + + for (i = 0; i < 16; i++) { + if (!((1 << i) & gpios)) + continue; + + moder &= ~GPIO_MODE_MASK(i); + moder |= GPIO_MODE(i, mode); + pupd &= ~GPIO_PUPD_MASK(i); + pupd |= GPIO_PUPD(i, pull_up_down); + } + + /* Set mode and pull up/down control registers. */ + GPIO_MODER(gpioport) = moder; + GPIO_PUPDR(gpioport) = pupd; +} + +void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios) +{ + u16 i; + u32 ospeedr; + + if (otype == GPIO_OTYPE_OD) + GPIO_OTYPER(gpioport) |= gpios; + else + GPIO_OTYPER(gpioport) &= ~gpios; + + ospeedr = GPIO_OSPEEDR(gpioport); + + for (i = 0; i < 16; i++) { + if (!((1 << i) & gpios)) + continue; + ospeedr &= ~GPIO_OSPEED_MASK(i); + ospeedr |= GPIO_OSPEED(i, speed); + } + + GPIO_OSPEEDR(gpioport) = ospeedr; +} + +void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios) +{ + u16 i; + u32 afrl, afrh; + + afrl = GPIO_AFRL(gpioport); + afrh = GPIO_AFRH(gpioport); + + for (i = 0; i < 8; i++) { + if (!((1 << i) & gpios)) + continue; + afrl &= ~GPIO_AFR_MASK(i); + afrl |= GPIO_AFR(i, alt_func_num); + } + + for (i = 8; i < 16; i++) { + if (!((1 << i) & gpios)) + continue; + afrl &= ~GPIO_AFR_MASK(i - 8); + afrh |= GPIO_AFR(i - 8, alt_func_num); + } + + GPIO_AFRL(gpioport) = afrl; + GPIO_AFRH(gpioport) = afrh; +} + +void gpio_set(u32 gpioport, u16 gpios) +{ + GPIO_BSRR(gpioport) = gpios; +} + +void gpio_clear(u32 gpioport, u16 gpios) +{ + GPIO_BSRR(gpioport) = gpios << 16; +} + +u16 gpio_get(u32 gpioport, u16 gpios) +{ + return gpio_port_read(gpioport) & gpios; +} + +void gpio_toggle(u32 gpioport, u16 gpios) +{ + GPIO_ODR(gpioport) ^= gpios; +} + +u16 gpio_port_read(u32 gpioport) +{ + return (u16)GPIO_IDR(gpioport); +} + +void gpio_port_write(u32 gpioport, u16 data) +{ + GPIO_ODR(gpioport) = data; +} + +void gpio_port_config_lock(u32 gpioport, u16 gpios) +{ + u32 reg32; + + /* Special "Lock Key Writing Sequence", see datasheet. */ + GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */ + GPIO_LCKR(gpioport) = ~GPIO_LCKK & gpios; /* Clear LCKK. */ + GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */ + reg32 = GPIO_LCKR(gpioport); /* Read LCKK. */ + reg32 = GPIO_LCKR(gpioport); /* Read LCKK again. */ + + /* Tell the compiler the variable is actually used. It will get optimized out anyways. */ + reg32 = reg32; + + /* If (reg32 & GPIO_LCKK) is true, the lock is now active. */ +} diff --git a/lib/stm32/l1/rcc.c b/lib/stm32/l1/rcc.c new file mode 100644 index 0000000..a023622 --- /dev/null +++ b/lib/stm32/l1/rcc.c @@ -0,0 +1,357 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Federico Ruiz-Ugalde + * Copyright (C) 2009 Uwe Hermann + * Copyright (C) 2010 Thomas Otto + * Copyright (C) 2012 Karl Palsson + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + * Based on the F4 code... + */ + +#include + +/* Set the default ppre1 and ppre2 peripheral clock frequencies after reset. */ +u32 rcc_ppre1_frequency = 2097000; +u32 rcc_ppre2_frequency = 2097000; + +void rcc_osc_ready_int_clear(osc_t osc) +{ + switch (osc) { + case PLL: + RCC_CIR |= RCC_CIR_PLLRDYC; + break; + case HSE: + RCC_CIR |= RCC_CIR_HSERDYC; + break; + case HSI: + RCC_CIR |= RCC_CIR_HSIRDYC; + break; + case LSE: + RCC_CIR |= RCC_CIR_LSERDYC; + break; + case LSI: + RCC_CIR |= RCC_CIR_LSIRDYC; + break; + case MSI: + RCC_CIR |= RCC_CIR_MSIRDYC; + break; + } +} + +void rcc_osc_ready_int_enable(osc_t osc) +{ + switch (osc) { + case PLL: + RCC_CIR |= RCC_CIR_PLLRDYIE; + break; + case HSE: + RCC_CIR |= RCC_CIR_HSERDYIE; + break; + case HSI: + RCC_CIR |= RCC_CIR_HSIRDYIE; + break; + case LSE: + RCC_CIR |= RCC_CIR_LSERDYIE; + break; + case LSI: + RCC_CIR |= RCC_CIR_LSIRDYIE; + break; + case MSI: + RCC_CIR |= RCC_CIR_MSIRDYIE; + break; + } +} + +void rcc_osc_ready_int_disable(osc_t osc) +{ + switch (osc) { + case PLL: + RCC_CIR &= ~RCC_CIR_PLLRDYIE; + break; + case HSE: + RCC_CIR &= ~RCC_CIR_HSERDYIE; + break; + case HSI: + RCC_CIR &= ~RCC_CIR_HSIRDYIE; + break; + case LSE: + RCC_CIR &= ~RCC_CIR_LSERDYIE; + break; + case LSI: + RCC_CIR &= ~RCC_CIR_LSIRDYIE; + break; + case MSI: + RCC_CIR &= ~RCC_CIR_MSIRDYIE; + break; + } +} + +int rcc_osc_ready_int_flag(osc_t osc) +{ + switch (osc) { + case PLL: + return ((RCC_CIR & RCC_CIR_PLLRDYF) != 0); + break; + case HSE: + return ((RCC_CIR & RCC_CIR_HSERDYF) != 0); + break; + case HSI: + return ((RCC_CIR & RCC_CIR_HSIRDYF) != 0); + break; + case LSE: + return ((RCC_CIR & RCC_CIR_LSERDYF) != 0); + break; + case LSI: + return ((RCC_CIR & RCC_CIR_LSIRDYF) != 0); + break; + case MSI: + return ((RCC_CIR & RCC_CIR_MSIRDYF) != 0); + break; + } + + /* Shouldn't be reached. */ + return -1; +} + +void rcc_css_int_clear(void) +{ + RCC_CIR |= RCC_CIR_CSSC; +} + +int rcc_css_int_flag(void) +{ + return ((RCC_CIR & RCC_CIR_CSSF) != 0); +} + +void rcc_wait_for_osc_ready(osc_t osc) +{ + switch (osc) { + case PLL: + while ((RCC_CR & RCC_CR_PLLRDY) == 0); + break; + case HSE: + while ((RCC_CR & RCC_CR_HSERDY) == 0); + break; + case HSI: + while ((RCC_CR & RCC_CR_HSIRDY) == 0); + break; + case MSI: + while ((RCC_CR & RCC_CR_MSIRDY) == 0); + break; + case LSE: + while ((RCC_CSR & RCC_CSR_LSERDY) == 0); + break; + case LSI: + while ((RCC_CSR & RCC_CSR_LSIRDY) == 0); + break; + } +} + +void rcc_wait_for_sysclk_status(osc_t osc) +{ + switch (osc) { + case PLL: + while ((RCC_CFGR & ((1 << 1) | (1 << 0))) != RCC_CFGR_SWS_SYSCLKSEL_PLLCLK); + break; + case HSE: + while ((RCC_CFGR & ((1 << 1) | (1 << 0))) != RCC_CFGR_SWS_SYSCLKSEL_HSECLK); + break; + case HSI: + while ((RCC_CFGR & ((1 << 1) | (1 << 0))) != RCC_CFGR_SWS_SYSCLKSEL_HSICLK); + break; + case MSI: + while ((RCC_CFGR & ((1 << 1) | (1 << 0))) != RCC_CFGR_SWS_SYSCLKSEL_MSICLK); + break; + default: + /* Shouldn't be reached. */ + break; + } +} + +void rcc_osc_on(osc_t osc) +{ + switch (osc) { + case PLL: + RCC_CR |= RCC_CR_PLLON; + break; + case MSI: + RCC_CR |= RCC_CR_MSION; + break; + case HSE: + RCC_CR |= RCC_CR_HSEON; + break; + case HSI: + RCC_CR |= RCC_CR_HSION; + break; + case LSE: + RCC_CSR |= RCC_CSR_LSEON; + break; + case LSI: + RCC_CSR |= RCC_CSR_LSION; + break; + } +} + +void rcc_osc_off(osc_t osc) +{ + switch (osc) { + case PLL: + RCC_CR &= ~RCC_CR_PLLON; + break; + case MSI: + RCC_CR &= ~RCC_CR_MSION; + break; + case HSE: + RCC_CR &= ~RCC_CR_HSEON; + break; + case HSI: + RCC_CR &= ~RCC_CR_HSION; + break; + case LSE: + RCC_CSR &= ~RCC_CSR_LSEON; + break; + case LSI: + RCC_CSR &= ~RCC_CSR_LSION; + break; + } +} + +void rcc_css_enable(void) +{ + RCC_CR |= RCC_CR_CSSON; +} + +void rcc_css_disable(void) +{ + RCC_CR &= ~RCC_CR_CSSON; +} + +void rcc_osc_bypass_enable(osc_t osc) +{ + switch (osc) { + case HSE: + RCC_CR |= RCC_CR_HSEBYP; + break; + case LSE: + RCC_CSR |= RCC_CSR_LSEBYP; + break; + case PLL: + case HSI: + case LSI: + case MSI: + /* Do nothing, only HSE/LSE allowed here. */ + break; + } +} + +void rcc_osc_bypass_disable(osc_t osc) +{ + switch (osc) { + case HSE: + RCC_CR &= ~RCC_CR_HSEBYP; + break; + case LSE: + RCC_CSR &= ~RCC_CSR_LSEBYP; + break; + case PLL: + case HSI: + case LSI: + case MSI: + /* Do nothing, only HSE/LSE allowed here. */ + break; + } +} + +void rcc_peripheral_enable_clock(volatile u32 *reg, u32 en) +{ + *reg |= en; +} + +void rcc_peripheral_disable_clock(volatile u32 *reg, u32 en) +{ + *reg &= ~en; +} + +void rcc_peripheral_reset(volatile u32 *reg, u32 reset) +{ + *reg |= reset; +} + +void rcc_peripheral_clear_reset(volatile u32 *reg, u32 clear_reset) +{ + *reg &= ~clear_reset; +} + +void rcc_set_sysclk_source(u32 clk) +{ + u32 reg32; + + reg32 = RCC_CFGR; + reg32 &= ~((1 << 1) | (1 << 0)); + RCC_CFGR = (reg32 | clk); +} + +void rcc_set_pll_source(u32 pllsrc) +{ + u32 reg32; + + reg32 = RCC_CFGR; + reg32 &= ~(1 << 16); + RCC_CFGR = (reg32 | (pllsrc << 16)); +} + +void rcc_set_ppre2(u32 ppre2) +{ + u32 reg32; + + reg32 = RCC_CFGR; + reg32 &= ~((1 << 13) | (1 << 12) | (1 << 11)); + RCC_CFGR = (reg32 | (ppre2 << 11)); +} + +void rcc_set_ppre1(u32 ppre1) +{ + u32 reg32; + + reg32 = RCC_CFGR; + reg32 &= ~((1 << 10) | (1 << 9) | (1 << 8)); + RCC_CFGR = (reg32 | (ppre1 << 8)); +} + +void rcc_set_hpre(u32 hpre) +{ + u32 reg32; + + reg32 = RCC_CFGR; + reg32 &= ~((1 << 4) | (1 << 5) | (1 << 6) | (1 << 7)); + RCC_CFGR = (reg32 | (hpre << 4)); +} + +void rcc_set_rtcpre(u32 rtcpre) +{ + u32 reg32; + + reg32 = RCC_CR; + reg32 &= ~((1 << 30) | (1 << 29)); + RCC_CR = (reg32 | (rtcpre << 29)); +} + +u32 rcc_system_clock_source(void) +{ + /* Return the clock source which is used as system clock. */ + return ((RCC_CFGR & 0x000c) >> 2); +} + -- cgit v1.2.3 From 49412864544c3b7c5ab321098c419b61dfc05b3b Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Sat, 20 Oct 2012 19:37:46 +0000 Subject: STM32L1 support, rebased onto upstream generalizations branch. Working example again. --- examples/stm32/l1/Makefile.include | 43 ++-- .../stm32/l1/stm32l-discovery/miniblink/Makefile | 2 +- include/libopencm3/stm32/l1/irq.yaml | 49 +++++ lib/stm32/l1/Makefile | 30 +-- lib/stm32/l1/libopencm3_stm32l1.ld | 19 +- lib/stm32/l1/stm32l15xxB.ld | 31 --- lib/stm32/l1/stm32l15xxb.ld | 31 +++ lib/stm32/l1/vector.c | 228 --------------------- 8 files changed, 116 insertions(+), 317 deletions(-) create mode 100644 include/libopencm3/stm32/l1/irq.yaml delete mode 100644 lib/stm32/l1/stm32l15xxB.ld create mode 100644 lib/stm32/l1/stm32l15xxb.ld delete mode 100644 lib/stm32/l1/vector.c (limited to 'examples') diff --git a/examples/stm32/l1/Makefile.include b/examples/stm32/l1/Makefile.include index f152b2a..32c3cee 100644 --- a/examples/stm32/l1/Makefile.include +++ b/examples/stm32/l1/Makefile.include @@ -25,27 +25,32 @@ LD = $(PREFIX)-gcc OBJCOPY = $(PREFIX)-objcopy OBJDUMP = $(PREFIX)-objdump GDB = $(PREFIX)-gdb -# If you are copying this file to use in your own project, -# You will need to change this... (Leave unset to assume installed -# in the toolchain itself) -#OPENCM3_DIR ?= /opt/libopencm3/$(PREFIX) -OPENCM3_DIR ?= ../../../../.. - -ARCH_FLAGS = -mcpu=cortex-m3 -mthumb -msoft-float -CFLAGS += -g -Os -Wall -Wextra \ + +TOOLCHAIN_DIR ?= ../../../../.. +ifeq ($(wildcard ../../../../../lib/libopencm3_stm32l1.a),) +ifneq ($(strip $(shell which $(CC))),) +TOOLCHAIN_DIR := $(shell dirname `which $(CC)`)/../$(PREFIX) +endif +else +ifeq ($(V),1) +$(info We seem to be building the example in the source directory. Using local library!) +endif +endif + +$(info GAHHHH toolchain: $(TOOLCHAIN_DIR)) + +ARCH_FLAGS = -mthumb -mcpu=cortex-m3 -msoft-float +CFLAGS += -Os -g -Wall -Wextra -I$(TOOLCHAIN_DIR)/include \ -fno-common $(ARCH_FLAGS) -MD -DSTM32L1 LDSCRIPT ?= $(BINARY).ld -LDFLAGS += -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group \ +LDFLAGS += --static -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group \ + -L$(TOOLCHAIN_DIR)/lib \ -T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections \ $(ARCH_FLAGS) -mfix-cortex-m3-ldrd -ifneq ($(OPENCM3_DIR),) -CFLAGS += -I$(OPENCM3_DIR)/include -LDFLAGS += -L$(OPENCM3_DIR)/lib -L$(OPENCM3_DIR)/lib/stm32/l1 -SCRIPT_DIR = $(OPENCM3_DIR)/share -else -SCRIPT_DIR = $(shell dirname $(shell readlink -f $(shell which $(PREFIX)-gcc)))/../$(PREFIX)/share -endif +CFLAGS += -I$(TOOLCHAIN_DIR)/include +LDFLAGS += -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib/stm32/l1 +SCRIPT_DIR = $(TOOLCHAIN_DIR)/share OBJS += $(BINARY).o @@ -95,11 +100,7 @@ flash: $(BINARY).flash @#printf " OBJDUMP $(*).list\n" $(Q)$(OBJDUMP) -S $(*).elf > $(*).list -ifeq ($(OPENCM3_DIR),) -%.elf: $(OBJS) $(LDSCRIPT) -else -%.elf: $(OBJS) $(LDSCRIPT) $(OPENCM3_DIR)/lib/stm32/l1/libopencm3_stm32l1.a -endif +%.elf: $(OBJS) $(LDSCRIPT) $(TOOLCHAIN_DIR)/lib/libopencm3_stm32l1.a @#printf " LD $(subst $(shell pwd)/,,$(@))\n" $(Q)$(LD) -o $(*).elf $(OBJS) -lopencm3_stm32l1 $(LDFLAGS) diff --git a/examples/stm32/l1/stm32l-discovery/miniblink/Makefile b/examples/stm32/l1/stm32l-discovery/miniblink/Makefile index 8c88be0..b0586e5 100644 --- a/examples/stm32/l1/stm32l-discovery/miniblink/Makefile +++ b/examples/stm32/l1/stm32l-discovery/miniblink/Makefile @@ -19,7 +19,7 @@ BINARY = miniblink -LDSCRIPT = ../stm32l15xxB.ld +LDSCRIPT = ../../../../../lib/stm32/l1/stm32l15xxb.ld include ../../Makefile.include diff --git a/include/libopencm3/stm32/l1/irq.yaml b/include/libopencm3/stm32/l1/irq.yaml new file mode 100644 index 0000000..c2f118f --- /dev/null +++ b/include/libopencm3/stm32/l1/irq.yaml @@ -0,0 +1,49 @@ +includeguard: LIBOPENCM3_STM32_L1_NVIC_H +partname_humanreadable: STM32 L1 series +partname_doxygen: STM32L1 +irqs: + - wwdg + - pvd + - tamper + - rtc + - flash + - rcc + - exti0 + - exti1 + - exti2 + - exti3 + - exti4 + - dma1_channel1 + - dma1_channel2 + - dma1_channel3 + - dma1_channel4 + - dma1_channel5 + - dma1_channel6 + - dma1_channel7 + - adc1 + - usb_hp + - usb_lp + - dac + - comp + - exti9_5 + - lcd + - tim9 + - tim10 + - tim11 + - tim2 + - tim3 + - tim4 + - i2c1_ev + - i2c1_er + - i2c2_ev + - i2c2_er + - spi1 + - spi2 + - usart1 + - usart2 + - usart3 + - exti15_10 + - rtc_alarm + - usb_wakeup + - tim6 + - tim7 diff --git a/lib/stm32/l1/Makefile b/lib/stm32/l1/Makefile index 9bd942d..a009857 100644 --- a/lib/stm32/l1/Makefile +++ b/lib/stm32/l1/Makefile @@ -25,34 +25,12 @@ CC = $(PREFIX)-gcc AR = $(PREFIX)-ar CFLAGS = -Os -g -Wall -Wextra -I../../../include -fno-common \ -mcpu=cortex-m3 -mthumb -Wstrict-prototypes \ - -ffunction-sections -fdata-sections -MD -DSTM32L1 + -ffunction-sections -fdata-sections -MD -DSTM32F1 # ARFLAGS = rcsv ARFLAGS = rcs -OBJS = vector.o desig.o crc.o gpio.o rcc.o +OBJS = rcc.o gpio.o desig.o crc.o -VPATH += ../../usb:../ +VPATH += ../../usb:../:../../cm3 -# Be silent per default, but 'make V=1' will show all compiler calls. -ifneq ($(V),1) -Q := @ -endif - -all: $(LIBNAME).a - -$(LIBNAME).a: $(OBJS) - @printf " AR $(subst $(shell pwd)/,,$(@))\n" - $(Q)$(AR) $(ARFLAGS) $@ $^ - -%.o: %.c - @printf " CC $(subst $(shell pwd)/,,$(@))\n" - $(Q)$(CC) $(CFLAGS) -o $@ -c $< - -clean: - @printf " CLEAN lib/stm32/f1\n" - $(Q)rm -f *.o *.d - $(Q)rm -f $(LIBNAME).a - -.PHONY: clean - --include $(OBJS:.o=.d) +include ../../Makefile.include diff --git a/lib/stm32/l1/libopencm3_stm32l1.ld b/lib/stm32/l1/libopencm3_stm32l1.ld index a64a1f7..9d165f6 100644 --- a/lib/stm32/l1/libopencm3_stm32l1.ld +++ b/lib/stm32/l1/libopencm3_stm32l1.ld @@ -30,21 +30,18 @@ ENTRY(reset_handler) /* Define sections. */ SECTIONS { - . = ORIGIN(rom); - .text : { *(.vectors) /* Vector table */ *(.text*) /* Program code */ . = ALIGN(4); *(.rodata*) /* Read-only data */ . = ALIGN(4); - _etext = .; } >rom /* - * Another section used by C++ stuff, appears when using newlib with - * 64bit (long long) printf support - */ + * Another section used by C++ stuff, appears when using newlib with + * 64bit (long long) printf support + */ .ARM.extab : { *(.ARM.extab*) } >rom @@ -54,21 +51,23 @@ SECTIONS __exidx_end = .; } >rom - . = ORIGIN(ram); + . = ALIGN(4); + _etext = .; - .data : AT (__exidx_end) { + .data : { _data = .; *(.data*) /* Read-write initialized data */ . = ALIGN(4); _edata = .; - } >ram + } >ram AT >rom + _data_loadaddr = LOADADDR(.data); .bss : { *(.bss*) /* Read-write zero initialized data */ *(COMMON) . = ALIGN(4); _ebss = .; - } >ram AT >rom + } >ram /* * The .eh_frame section appears to be used for C++ exception handling. diff --git a/lib/stm32/l1/stm32l15xxB.ld b/lib/stm32/l1/stm32l15xxB.ld deleted file mode 100644 index 4c14b71..0000000 --- a/lib/stm32/l1/stm32l15xxB.ld +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2012 Karl Palsson . - */ - -/* Linker script for STM32L15xxB, 128K flash, 16K RAM. */ - -/* Define memory regions. */ -MEMORY -{ - rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K -} - -/* Include the common ld script. */ -INCLUDE libopencm3_stm32l1.ld - diff --git a/lib/stm32/l1/stm32l15xxb.ld b/lib/stm32/l1/stm32l15xxb.ld new file mode 100644 index 0000000..4c14b71 --- /dev/null +++ b/lib/stm32/l1/stm32l15xxb.ld @@ -0,0 +1,31 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2012 Karl Palsson . + */ + +/* Linker script for STM32L15xxB, 128K flash, 16K RAM. */ + +/* Define memory regions. */ +MEMORY +{ + rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K +} + +/* Include the common ld script. */ +INCLUDE libopencm3_stm32l1.ld + diff --git a/lib/stm32/l1/vector.c b/lib/stm32/l1/vector.c deleted file mode 100644 index d8e0ea5..0000000 --- a/lib/stm32/l1/vector.c +++ /dev/null @@ -1,228 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Piotr Esden-Tempski - * Copyright (C) 2012 Karl Palsson - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -#define WEAK __attribute__ ((weak)) - -/* Symbols exported by the linker script(s). */ -extern unsigned __exidx_end, _data, _edata, _ebss, _stack; - -void main(void); -void reset_handler(void); -void blocking_handler(void); -void null_handler(void); - -void WEAK nmi_handler(void); -void WEAK hard_fault_handler(void); -void WEAK mem_manage_handler(void); -void WEAK bus_fault_handler(void); -void WEAK usage_fault_handler(void); -void WEAK sv_call_handler(void); -void WEAK debug_monitor_handler(void); -void WEAK pend_sv_handler(void); -void WEAK sys_tick_handler(void); -void WEAK wwdg_isr(void); -void WEAK pvd_isr(void); -void WEAK tamper_isr(void); -void WEAK rtc_isr(void); -void WEAK flash_isr(void); -void WEAK rcc_isr(void); -void WEAK exti0_isr(void); -void WEAK exti1_isr(void); -void WEAK exti2_isr(void); -void WEAK exti3_isr(void); -void WEAK exti4_isr(void); -void WEAK dma1_channel1_isr(void); -void WEAK dma1_channel2_isr(void); -void WEAK dma1_channel3_isr(void); -void WEAK dma1_channel4_isr(void); -void WEAK dma1_channel5_isr(void); -void WEAK dma1_channel6_isr(void); -void WEAK dma1_channel7_isr(void); -void WEAK adc1_isr(void); -void WEAK usb_hp_isr(void); -void WEAK usb_lp_isr(void); -void WEAK dac_isr(void); -void WEAK comp_isr(void); -void WEAK exti9_5_isr(void); -void WEAK lcd_isr(void); -void WEAK tim9_isr(void); -void WEAK tim10_isr(void); -void WEAK tim11_isr(void); -void WEAK tim2_isr(void); -void WEAK tim3_isr(void); -void WEAK tim4_isr(void); -void WEAK i2c1_ev_isr(void); -void WEAK i2c1_er_isr(void); -void WEAK i2c2_ev_isr(void); -void WEAK i2c2_er_isr(void); -void WEAK spi1_isr(void); -void WEAK spi2_isr(void); -void WEAK usart1_isr(void); -void WEAK usart2_isr(void); -void WEAK usart3_isr(void); -void WEAK exti15_10_isr(void); -void WEAK rtc_alarm_isr(void); -void WEAK usb_wakeup_isr(void); -void WEAK tim6_isr(void); -void WEAK tim7_isr(void); - - -__attribute__ ((section(".vectors"))) -void (*const vector_table[]) (void) = { - (void*)&_stack, /* Addr: 0x0000_0000 */ - reset_handler, /* Addr: 0x0000_0004 */ - nmi_handler, /* Addr: 0x0000_0008 */ - hard_fault_handler, /* Addr: 0x0000_000C */ - mem_manage_handler, /* Addr: 0x0000_0010 */ - bus_fault_handler, /* Addr: 0x0000_0014 */ - usage_fault_handler, /* Addr: 0x0000_0018 */ - 0, 0, 0, 0, /* Reserved Addr: 0x0000_001C - 0x0000_002B */ - sv_call_handler, /* Addr: 0x0000_002C */ - debug_monitor_handler, /* Addr: 0x0000_0030*/ - 0, /* Reserved Addr: 0x0000_00034 */ - pend_sv_handler, /* Addr: 0x0000_0038 */ - sys_tick_handler, /* Addr: 0x0000_003C */ - wwdg_isr, /* Addr: 0x0000_0040 */ - pvd_isr, /* Addr: 0x0000_0044 */ - tamper_isr, /* Addr: 0x0000_0048 */ - rtc_isr, /* Addr: 0x0000_004C */ - flash_isr, /* Addr: 0x0000_0050 */ - rcc_isr, /* Addr: 0x0000_0054 */ - exti0_isr, /* Addr: 0x0000_0058 */ - exti1_isr, /* Addr: 0x0000_005C */ - exti2_isr, /* Addr: 0x0000_0060 */ - exti3_isr, /* Addr: 0x0000_0064 */ - exti4_isr, /* Addr: 0x0000_0068 */ - dma1_channel1_isr, /* Addr: 0x0000_006C */ - dma1_channel2_isr, /* Addr: 0x0000_0070 */ - dma1_channel3_isr, /* Addr: 0x0000_0074 */ - dma1_channel4_isr, /* Addr: 0x0000_0078 */ - dma1_channel5_isr, /* Addr: 0x0000_007C */ - dma1_channel6_isr, /* Addr: 0x0000_0080 */ - dma1_channel7_isr, /* Addr: 0x0000_0084 */ - adc1_isr, /* Addr: 0x0000_0088 */ - usb_hp_isr, /* Addr: 0x0000_008C */ - usb_lp_isr, /* Addr: 0x0000_0090 */ - dac_isr, /* Addr: 0x0000_0094 */ - comp_isr, /* Addr: 0x0000_0098 */ - exti9_5_isr, /* Addr: 0x0000_009C */ - lcd_isr, /* Addr: 0x0000_00A0 */ - tim9_isr, /* Addr: 0x0000_00A4 */ - tim10_isr, /* Addr: 0x0000_00A8 */ - tim11_isr, /* Addr: 0x0000_00AC */ - tim2_isr, /* Addr: 0x0000_00B0 */ - tim3_isr, /* Addr: 0x0000_00B4 */ - tim4_isr, /* Addr: 0x0000_00B8 */ - i2c1_ev_isr, /* Addr: 0x0000_00BC */ - i2c1_er_isr, /* Addr: 0x0000_00C0 */ - i2c2_ev_isr, /* Addr: 0x0000_00C4 */ - i2c2_er_isr, /* Addr: 0x0000_00C8 */ - spi1_isr, /* Addr: 0x0000_00CC */ - spi2_isr, /* Addr: 0x0000_00D0 */ - usart1_isr, /* Addr: 0x0000_00D4 */ - usart2_isr, /* Addr: 0x0000_00D8 */ - usart3_isr, /* Addr: 0x0000_00DC */ - exti15_10_isr, /* Addr: 0x0000_00E0 */ - rtc_alarm_isr, /* Addr: 0x0000_00E4 */ - usb_wakeup_isr, /* Addr: 0x0000_00E8 */ - tim6_isr, /* Addr: 0x0000_00EC */ - tim7_isr, /* Addr: 0x0000_00F0 */ -}; - -void reset_handler(void) -{ - volatile unsigned *src, *dest; - - __asm__("MSR msp, %0" : : "r"(&_stack)); - - for (src = &__exidx_end, dest = &_data; dest < &_edata; src++, dest++) - *dest = *src; - - while (dest < &_ebss) - *dest++ = 0; - - /* Call the application's entry point. */ - main(); -} - -void blocking_handler(void) -{ - while (1) ; -} - -void null_handler(void) -{ - /* Do nothing. */ -} - -#pragma weak nmi_handler = null_handler -#pragma weak hard_fault_handler = blocking_handler -#pragma weak mem_manage_handler = blocking_handler -#pragma weak bus_fault_handler = blocking_handler -#pragma weak usage_fault_handler = blocking_handler -#pragma weak sv_call_handler = null_handler -#pragma weak debug_monitor_handler = null_handler -#pragma weak pend_sv_handler = null_handler -#pragma weak sys_tick_handler = null_handler -#pragma weak wwdg_isr = null_handler -#pragma weak pvd_isr = null_handler -#pragma weak tamper_isr = null_handler -#pragma weak rtc_isr = null_handler -#pragma weak flash_isr = null_handler -#pragma weak rcc_isr = null_handler -#pragma weak exti0_isr = null_handler -#pragma weak exti1_isr = null_handler -#pragma weak exti2_isr = null_handler -#pragma weak exti3_isr = null_handler -#pragma weak exti4_isr = null_handler -#pragma weak dma1_channel1_isr = null_handler -#pragma weak dma1_channel2_isr = null_handler -#pragma weak dma1_channel3_isr = null_handler -#pragma weak dma1_channel4_isr = null_handler -#pragma weak dma1_channel5_isr = null_handler -#pragma weak dma1_channel6_isr = null_handler -#pragma weak dma1_channel7_isr = null_handler -#pragma weak adc1_isr = null_handler -#pragma weak usb_hp_isr = null_handler -#pragma weak usb_lp_isr = null_handler -#pragma weak dac_isr = null_handler -#pragma weak comp_isr = null_handler -#pragma weak exti9_5_isr = null_handler -#pragma weak lcd_isr = null_handler -#pragma weak tim9_isr = null_handler -#pragma weak tim10_isr = null_handler -#pragma weak tim11_isr = null_handler -#pragma weak tim2_isr = null_handler -#pragma weak tim3_isr = null_handler -#pragma weak tim4_isr = null_handler -#pragma weak i2c1_ev_isr = null_handler -#pragma weak i2c1_er_isr = null_handler -#pragma weak i2c2_ev_isr = null_handler -#pragma weak i2c2_er_isr = null_handler -#pragma weak spi1_isr = null_handler -#pragma weak spi2_isr = null_handler -#pragma weak usart1_isr = null_handler -#pragma weak usart2_isr = null_handler -#pragma weak usart3_isr = null_handler -#pragma weak exti15_10_isr = null_handler -#pragma weak rtc_alarm_isr = null_handler -#pragma weak usb_wakeup_isr = null_handler -#pragma weak tim6_isr = null_handler -#pragma weak tim7_isr = null_handler -- cgit v1.2.3 From 25acaa58783b4d046acbe961cb62efe0b39ec981 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Mon, 22 Oct 2012 21:29:42 +0000 Subject: Add usart support for L1. Only tested with basic tx blocking, ie, the same example code as on F2/F4, but the description of the block is almost identical. --- examples/stm32/l1/stm32l-discovery/usart/Makefile | 25 +++++++ examples/stm32/l1/stm32l-discovery/usart/README | 12 ++++ examples/stm32/l1/stm32l-discovery/usart/usart.c | 80 +++++++++++++++++++++++ include/libopencm3/stm32/l1/gpio.h | 2 +- lib/stm32/l1/Makefile | 2 +- lib/stm32/usart.c | 2 + 6 files changed, 121 insertions(+), 2 deletions(-) create mode 100644 examples/stm32/l1/stm32l-discovery/usart/Makefile create mode 100644 examples/stm32/l1/stm32l-discovery/usart/README create mode 100644 examples/stm32/l1/stm32l-discovery/usart/usart.c (limited to 'examples') diff --git a/examples/stm32/l1/stm32l-discovery/usart/Makefile b/examples/stm32/l1/stm32l-discovery/usart/Makefile new file mode 100644 index 0000000..ac088fe --- /dev/null +++ b/examples/stm32/l1/stm32l-discovery/usart/Makefile @@ -0,0 +1,25 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +BINARY = usart + +LDSCRIPT = ../../../../../lib/stm32/l1/stm32l15xxb.ld + +include ../../Makefile.include + diff --git a/examples/stm32/l1/stm32l-discovery/usart/README b/examples/stm32/l1/stm32l-discovery/usart/README new file mode 100644 index 0000000..dcbc5d9 --- /dev/null +++ b/examples/stm32/l1/stm32l-discovery/usart/README @@ -0,0 +1,12 @@ +------------------------------------------------------------------------------ +README +------------------------------------------------------------------------------ + +This example program sends some characters on USART2 on the +ST STM32L DISCOVERY eval board. (USART2 TX on PA2) + +The terminal settings for the receiving device/PC are 38400 8n1. + +The sending is done in a blocking way in the code, see the usart_irq example +for a more elaborate USART example. + diff --git a/examples/stm32/l1/stm32l-discovery/usart/usart.c b/examples/stm32/l1/stm32l-discovery/usart/usart.c new file mode 100644 index 0000000..3335ca8 --- /dev/null +++ b/examples/stm32/l1/stm32l-discovery/usart/usart.c @@ -0,0 +1,80 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * Copyright (C) 2012 Karl Palsson + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include +#include +#include + +void clock_setup(void) { + /* We are running on MSI after boot. */ + /* Enable GPIOD clock for LED & USARTs. */ + rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOAEN); + rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOBEN); + + /* Enable clocks for USART2. */ + rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN); +} + +void usart_setup(void) { + /* Setup USART2 parameters. */ + usart_set_baudrate(USART2, 38400); + usart_set_databits(USART2, 8); + usart_set_stopbits(USART2, USART_STOPBITS_1); + usart_set_mode(USART2, USART_MODE_TX); + usart_set_parity(USART2, USART_PARITY_NONE); + usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE); + + /* Finally enable the USART. */ + usart_enable(USART2); +} + +void gpio_setup(void) { + /* Setup GPIO pin GPIO7 on GPIO port B for Green LED. */ + gpio_mode_setup(GPIOB, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO7); + + /* Setup GPIO pins for USART2 transmit. */ + gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2); + + /* Setup USART2 TX pin as alternate function. */ + gpio_set_af(GPIOA, GPIO_AF7, GPIO2); +} + +int main(void) { + int i, j = 0, c = 0; + + clock_setup(); + gpio_setup(); + usart_setup(); + + /* Blink the LED (PD12) on the board with every transmitted byte. */ + while (1) { + gpio_toggle(GPIOB, GPIO7); /* LED on/off */ + usart_send_blocking(USART2, c + '0'); /* USART2: Send byte. */ + c = (c == 9) ? 0 : c + 1; /* Increment c. */ + if ((j++ % 80) == 0) { /* Newline after line full. */ + usart_send_blocking(USART2, '\r'); + usart_send_blocking(USART2, '\n'); + } + for (i = 0; i < 100000; i++) /* Wait a bit. */ + __asm__("NOP"); + } + + return 0; +} diff --git a/include/libopencm3/stm32/l1/gpio.h b/include/libopencm3/stm32/l1/gpio.h index 76325a9..a39c9f6 100644 --- a/include/libopencm3/stm32/l1/gpio.h +++ b/include/libopencm3/stm32/l1/gpio.h @@ -152,7 +152,7 @@ #define GPIO_MODE_MASK(n) (0x3 << (2 * (n))) #define GPIO_MODE_INPUT 0x00 /* Default */ #define GPIO_MODE_OUTPUT 0x01 -#define GPIO_MODE_ALTFN 0x02 +#define GPIO_MODE_AF 0x02 #define GPIO_MODE_ANALOG 0x03 /* --- GPIOx_OTYPER values -------------------------------------------- */ diff --git a/lib/stm32/l1/Makefile b/lib/stm32/l1/Makefile index a009857..f852239 100644 --- a/lib/stm32/l1/Makefile +++ b/lib/stm32/l1/Makefile @@ -28,7 +28,7 @@ CFLAGS = -Os -g -Wall -Wextra -I../../../include -fno-common \ -ffunction-sections -fdata-sections -MD -DSTM32F1 # ARFLAGS = rcsv ARFLAGS = rcs -OBJS = rcc.o gpio.o desig.o crc.o +OBJS = rcc.o gpio.o desig.o crc.o usart.o VPATH += ../../usb:../:../../cm3 diff --git a/lib/stm32/usart.c b/lib/stm32/usart.c index 5cf861b..1faf486 100644 --- a/lib/stm32/usart.c +++ b/lib/stm32/usart.c @@ -46,6 +46,8 @@ LGPL License Terms @ref lgpl_license # include #elif defined(STM32F4) # include +#elif defined(STM32L1) +# include #else # error "stm32 family not defined." #endif -- cgit v1.2.3 From ce8f47e7df8e0bc8abaaec79058cc08bc297f0c9 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Mon, 22 Oct 2012 23:32:42 +0000 Subject: Enable nvic and exti support for L1 And include an example that uses it. --- .../l1/stm32l-discovery/button-irq-printf/Makefile | 24 +++ .../l1/stm32l-discovery/button-irq-printf/README | 4 + .../l1/stm32l-discovery/button-irq-printf/main.c | 117 ++++++++++++++ .../l1/stm32l-discovery/button-irq-printf/syscfg.h | 45 ++++++ include/libopencm3/stm32/f2/syscfg.h | 46 ------ include/libopencm3/stm32/f4/syscfg.h | 46 ------ include/libopencm3/stm32/syscfg.h | 46 ++++++ lib/dispatch/vector_nvic.c | 2 + lib/stm32/exti2.c | 170 +++++++++++++++++++++ lib/stm32/f2/Makefile | 2 +- lib/stm32/f2/exti.c | 146 ------------------ lib/stm32/f4/Makefile | 2 +- lib/stm32/f4/exti.c | 152 ------------------ lib/stm32/l1/Makefile | 4 +- 14 files changed, 412 insertions(+), 394 deletions(-) create mode 100644 examples/stm32/l1/stm32l-discovery/button-irq-printf/Makefile create mode 100644 examples/stm32/l1/stm32l-discovery/button-irq-printf/README create mode 100644 examples/stm32/l1/stm32l-discovery/button-irq-printf/main.c create mode 100644 examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h delete mode 100644 include/libopencm3/stm32/f2/syscfg.h delete mode 100644 include/libopencm3/stm32/f4/syscfg.h create mode 100644 include/libopencm3/stm32/syscfg.h create mode 100644 lib/stm32/exti2.c delete mode 100644 lib/stm32/f2/exti.c delete mode 100644 lib/stm32/f4/exti.c (limited to 'examples') diff --git a/examples/stm32/l1/stm32l-discovery/button-irq-printf/Makefile b/examples/stm32/l1/stm32l-discovery/button-irq-printf/Makefile new file mode 100644 index 0000000..d57ea7a --- /dev/null +++ b/examples/stm32/l1/stm32l-discovery/button-irq-printf/Makefile @@ -0,0 +1,24 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +BINARY = main +LDSCRIPT = ../../../../../lib/stm32/l1/stm32l15xxb.ld + +include ../../Makefile.include + diff --git a/examples/stm32/l1/stm32l-discovery/button-irq-printf/README b/examples/stm32/l1/stm32l-discovery/button-irq-printf/README new file mode 100644 index 0000000..09e52bc --- /dev/null +++ b/examples/stm32/l1/stm32l-discovery/button-irq-printf/README @@ -0,0 +1,4 @@ +* Counts how long the user button was held down (in ms) +* Uses one free running counter plus EXTI as an ugly input capture +115200@8n1 console on PA2 (tx only) + diff --git a/examples/stm32/l1/stm32l-discovery/button-irq-printf/main.c b/examples/stm32/l1/stm32l-discovery/button-irq-printf/main.c new file mode 100644 index 0000000..1830c4d --- /dev/null +++ b/examples/stm32/l1/stm32l-discovery/button-irq-printf/main.c @@ -0,0 +1,117 @@ +/* + * Karl Palsson, 2012 +#include +#include +#include +#include +#include +#include +#include + +#include "syscfg.h" + +static struct state_t state; + +void clock_setup(void) { + /* Lots of things on all ports... */ + rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOAEN); + rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOBEN); + + /* Enable clocks for USART2. */ + rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN); +} + +void gpio_setup(void) { + gpio_mode_setup(LED_DISCO_GREEN_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, LED_DISCO_GREEN_PIN); + + /* Setup GPIO pins for USART2 transmit. */ + gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2); + + /* Setup USART2 TX pin as alternate function. */ + gpio_set_af(GPIOA, GPIO_AF7, GPIO2); +} + +void usart_setup(void) { + usart_set_baudrate(USART_CONSOLE, 115200); + usart_set_databits(USART_CONSOLE, 8); + usart_set_stopbits(USART_CONSOLE, USART_STOPBITS_1); + usart_set_mode(USART_CONSOLE, USART_MODE_TX); + usart_set_parity(USART_CONSOLE, USART_PARITY_NONE); + usart_set_flow_control(USART_CONSOLE, USART_FLOWCONTROL_NONE); + + /* Finally enable the USART. */ + usart_enable(USART_CONSOLE); +} + +/** + * Use USART_CONSOLE as a console. + * @param file + * @param ptr + * @param len + * @return + */ +int _write(int file, char *ptr, int len) { + int i; + + if (file == STDOUT_FILENO || file == STDERR_FILENO) { + for (i = 0; i < len; i++) { + if (ptr[i] == '\n') { + usart_send_blocking(USART_CONSOLE, '\r'); + } + usart_send_blocking(USART_CONSOLE, ptr[i]); + } + return i; + } + errno = EIO; + return -1; +} + +void BUTTON_DISCO_USER_isr(void) { + exti_reset_request(BUTTON_DISCO_USER_EXTI); + if (state.falling) { + state.falling = false; + exti_set_trigger(BUTTON_DISCO_USER_EXTI, EXTI_TRIGGER_RISING); + // ILOG("fell: %d\n", TIM_CNT(TIM7)); + puts("fell!\n"); + } else { + puts("Rose!\n"); + // TIM_CNT(TIM7) = 0; + state.falling = true; + exti_set_trigger(BUTTON_DISCO_USER_EXTI, EXTI_TRIGGER_FALLING); + } +} + +void setup_buttons(void) { + /* Enable EXTI0 interrupt. */ + nvic_enable_irq(BUTTON_DISCO_USER_NVIC); + + gpio_mode_setup(BUTTON_DISCO_USER_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, BUTTON_DISCO_USER_PIN); + + /* Configure the EXTI subsystem. */ + exti_select_source(BUTTON_DISCO_USER_EXTI, BUTTON_DISCO_USER_PORT); + state.falling = false; + exti_set_trigger(BUTTON_DISCO_USER_EXTI, EXTI_TRIGGER_RISING); + exti_enable_request(BUTTON_DISCO_USER_EXTI); +} + +int main(void) { + int i; + int j = 0; + clock_setup(); + gpio_setup(); + usart_setup(); + puts("hi guys!\n"); + setup_buttons(); + while (1) { + puts("tick:"); + putchar('a' + (j++ % 26)); + gpio_toggle(GPIOB, GPIO7); /* LED on/off */ + for (i = 0; i < 100000; i++) /* Wait a bit. */ + __asm__("NOP"); + } + + return 0; +} diff --git a/examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h b/examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h new file mode 100644 index 0000000..17eb3f1 --- /dev/null +++ b/examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h @@ -0,0 +1,45 @@ +/* + * General configuration of the device + * + * Karl Palsson 2012 + */ + +#ifndef SYSCFG_H +#define SYSCFG_H + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include +#include + + +#define USART_CONSOLE USART2 +#define USE_NASTYLOG 1 + +#define LED_DISCO_GREEN_PORT GPIOB +#define LED_DISCO_GREEN_PIN GPIO7 +#define LED_DISCO_BLUE_PORT GPIOB +#define LED_DISCO_BLUE_PIN GPIO6 + +#define BUTTON_DISCO_USER_PORT GPIOA +#define BUTTON_DISCO_USER_PIN GPIO0 +#define BUTTON_DISCO_USER_EXTI EXTI0 +#define BUTTON_DISCO_USER_isr exti0_isr +#define BUTTON_DISCO_USER_NVIC NVIC_EXTI0_IRQ + + + struct state_t { + bool falling; + }; + + +#ifdef __cplusplus +} +#endif + +#endif /* SYSCFG_H */ + diff --git a/include/libopencm3/stm32/f2/syscfg.h b/include/libopencm3/stm32/f2/syscfg.h deleted file mode 100644 index 7426f16..0000000 --- a/include/libopencm3/stm32/f2/syscfg.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2011 Fergus Noble - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -#ifndef LIBOPENCM3_SYSCFG_H -#define LIBOPENCM3_SYSCFG_H - -#include - -/* --- SYSCFG registers ------------------------------------------------------ */ - -#define SYSCFG_MEMRM MMIO32(SYSCFG_BASE + 0x00) - -#define SYSCFG_PMC MMIO32(SYSCFG_BASE + 0x04) - -/* External interrupt configuration register 1 (SYSCFG_EXTICR1) */ -#define SYSCFG_EXTICR1 MMIO32(SYSCFG_BASE + 0x08) - -/* External interrupt configuration register 2 (SYSCFG_EXTICR2) */ -#define SYSCFG_EXTICR2 MMIO32(SYSCFG_BASE + 0x0c) - -/* External interrupt configuration register 3 (SYSCFG_EXTICR3) */ -#define SYSCFG_EXTICR3 MMIO32(SYSCFG_BASE + 0x10) - -/* External interrupt configuration register 4 (SYSCFG_EXTICR4) */ -#define SYSCFG_EXTICR4 MMIO32(SYSCFG_BASE + 0x14) - -#define SYSCFG_CMPCR MMIO32(SYSCFG_BASE + 0x20) - -#endif - diff --git a/include/libopencm3/stm32/f4/syscfg.h b/include/libopencm3/stm32/f4/syscfg.h deleted file mode 100644 index 7426f16..0000000 --- a/include/libopencm3/stm32/f4/syscfg.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2011 Fergus Noble - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -#ifndef LIBOPENCM3_SYSCFG_H -#define LIBOPENCM3_SYSCFG_H - -#include - -/* --- SYSCFG registers ------------------------------------------------------ */ - -#define SYSCFG_MEMRM MMIO32(SYSCFG_BASE + 0x00) - -#define SYSCFG_PMC MMIO32(SYSCFG_BASE + 0x04) - -/* External interrupt configuration register 1 (SYSCFG_EXTICR1) */ -#define SYSCFG_EXTICR1 MMIO32(SYSCFG_BASE + 0x08) - -/* External interrupt configuration register 2 (SYSCFG_EXTICR2) */ -#define SYSCFG_EXTICR2 MMIO32(SYSCFG_BASE + 0x0c) - -/* External interrupt configuration register 3 (SYSCFG_EXTICR3) */ -#define SYSCFG_EXTICR3 MMIO32(SYSCFG_BASE + 0x10) - -/* External interrupt configuration register 4 (SYSCFG_EXTICR4) */ -#define SYSCFG_EXTICR4 MMIO32(SYSCFG_BASE + 0x14) - -#define SYSCFG_CMPCR MMIO32(SYSCFG_BASE + 0x20) - -#endif - diff --git a/include/libopencm3/stm32/syscfg.h b/include/libopencm3/stm32/syscfg.h new file mode 100644 index 0000000..7426f16 --- /dev/null +++ b/include/libopencm3/stm32/syscfg.h @@ -0,0 +1,46 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2011 Fergus Noble + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#ifndef LIBOPENCM3_SYSCFG_H +#define LIBOPENCM3_SYSCFG_H + +#include + +/* --- SYSCFG registers ------------------------------------------------------ */ + +#define SYSCFG_MEMRM MMIO32(SYSCFG_BASE + 0x00) + +#define SYSCFG_PMC MMIO32(SYSCFG_BASE + 0x04) + +/* External interrupt configuration register 1 (SYSCFG_EXTICR1) */ +#define SYSCFG_EXTICR1 MMIO32(SYSCFG_BASE + 0x08) + +/* External interrupt configuration register 2 (SYSCFG_EXTICR2) */ +#define SYSCFG_EXTICR2 MMIO32(SYSCFG_BASE + 0x0c) + +/* External interrupt configuration register 3 (SYSCFG_EXTICR3) */ +#define SYSCFG_EXTICR3 MMIO32(SYSCFG_BASE + 0x10) + +/* External interrupt configuration register 4 (SYSCFG_EXTICR4) */ +#define SYSCFG_EXTICR4 MMIO32(SYSCFG_BASE + 0x14) + +#define SYSCFG_CMPCR MMIO32(SYSCFG_BASE + 0x20) + +#endif + diff --git a/lib/dispatch/vector_nvic.c b/lib/dispatch/vector_nvic.c index b8e9b7f..33104eb 100644 --- a/lib/dispatch/vector_nvic.c +++ b/lib/dispatch/vector_nvic.c @@ -4,6 +4,8 @@ # include "../stm32/f2/vector_nvic.c" #elif defined(STM32F4) # include "../stm32/f4/vector_nvic.c" +#elif defined(STM32L1) +# include "../stm32/l1/vector_nvic.c" #elif defined(EFM32TG) # include "../efm32/efm32tg/vector_nvic.c" diff --git a/lib/stm32/exti2.c b/lib/stm32/exti2.c new file mode 100644 index 0000000..bea2f4d --- /dev/null +++ b/lib/stm32/exti2.c @@ -0,0 +1,170 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Mark Butler + * Copyright (C) 2012 Karl Palsson + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + * + * This provides the code for the "next gen" EXTI block provided in F2/F4/L1 + * devices. (differences only in the source selection) + */ + +#include +#include +#if defined(STM32F2) +#include +#elif defined(STM32F4) +#include +#elif defined(STM32L1) +#include +#else +#error "invalid/unknown stm32 family for this code" +#endif + +void exti_set_trigger(u32 extis, exti_trigger_type trig) +{ + switch (trig) { + case EXTI_TRIGGER_RISING: + EXTI_RTSR |= extis; + EXTI_FTSR &= ~extis; + break; + case EXTI_TRIGGER_FALLING: + EXTI_RTSR &= ~extis; + EXTI_FTSR |= extis; + break; + case EXTI_TRIGGER_BOTH: + EXTI_RTSR |= extis; + EXTI_FTSR |= extis; + break; + } +} + +void exti_enable_request(u32 extis) +{ + /* Enable interrupts. */ + EXTI_IMR |= extis; + + /* Enable events. */ + EXTI_EMR |= extis; +} + +void exti_disable_request(u32 extis) +{ + /* Disable interrupts. */ + EXTI_IMR &= ~extis; + + /* Disable events. */ + EXTI_EMR &= ~extis; +} + +/* + * Reset the interrupt request by writing a 1 to the corresponding + * pending bit register. + */ +void exti_reset_request(u32 extis) +{ + EXTI_PR = extis; +} + +/* + * Remap an external interrupt line to the corresponding pin on the + * specified GPIO port. + * + * TODO: This could be rewritten in fewer lines of code. + */ +void exti_select_source(u32 exti, u32 gpioport) +{ + u8 shift, bits; + + shift = bits = 0; + + switch (exti) { + case EXTI0: + case EXTI4: + case EXTI8: + case EXTI12: + shift = 0; + break; + case EXTI1: + case EXTI5: + case EXTI9: + case EXTI13: + shift = 4; + break; + case EXTI2: + case EXTI6: + case EXTI10: + case EXTI14: + shift = 8; + break; + case EXTI3: + case EXTI7: + case EXTI11: + case EXTI15: + shift = 12; + break; + } + + switch (gpioport) { + case GPIOA: + bits = 0xf; + break; + case GPIOB: + bits = 0xe; + break; + case GPIOC: + bits = 0xd; + break; + case GPIOD: + bits = 0xc; + break; + case GPIOE: + bits = 0xb; + break; +#if defined(STM32L1) +#else + case GPIOF: + bits = 0xa; + break; + case GPIOG: + bits = 0x9; + break; +#endif + case GPIOH: + bits = 0x8; + break; +#if defined(STM32L1) +#else + case GPIOI: + bits = 0x7; + break; +#endif + } + + /* Ensure that only valid EXTI lines are used. */ + if (exti < EXTI4) { + SYSCFG_EXTICR1 &= ~(0x000F << shift); + SYSCFG_EXTICR1 |= (~bits << shift); + } else if (exti < EXTI8) { + SYSCFG_EXTICR2 &= ~(0x000F << shift); + SYSCFG_EXTICR2 |= (~bits << shift); + } else if (exti < EXTI12) { + SYSCFG_EXTICR3 &= ~(0x000F << shift); + SYSCFG_EXTICR3 |= (~bits << shift); + } else if (exti < EXTI16) { + SYSCFG_EXTICR4 &= ~(0x000F << shift); + SYSCFG_EXTICR4 |= (~bits << shift); + } +} diff --git a/lib/stm32/f2/Makefile b/lib/stm32/f2/Makefile index 5cbb977..e3d73fe 100644 --- a/lib/stm32/f2/Makefile +++ b/lib/stm32/f2/Makefile @@ -29,7 +29,7 @@ CFLAGS = -Os -g -Wall -Wextra -I../../../include -fno-common \ # ARFLAGS = rcsv ARFLAGS = rcs OBJS = rcc.o gpio.o usart.o spi.o flash.o \ - i2c.o exti.o timer.o + i2c.o exti2.o timer.o VPATH += ../../usb:../:../../cm3 diff --git a/lib/stm32/f2/exti.c b/lib/stm32/f2/exti.c deleted file mode 100644 index 5280914..0000000 --- a/lib/stm32/f2/exti.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Mark Butler - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -#include -#include -#include - -void exti_set_trigger(u32 extis, exti_trigger_type trig) -{ - switch (trig) { - case EXTI_TRIGGER_RISING: - EXTI_RTSR |= extis; - EXTI_FTSR &= ~extis; - break; - case EXTI_TRIGGER_FALLING: - EXTI_RTSR &= ~extis; - EXTI_FTSR |= extis; - break; - case EXTI_TRIGGER_BOTH: - EXTI_RTSR |= extis; - EXTI_FTSR |= extis; - break; - } -} - -void exti_enable_request(u32 extis) -{ - /* Enable interrupts. */ - EXTI_IMR |= extis; - - /* Enable events. */ - EXTI_EMR |= extis; -} - -void exti_disable_request(u32 extis) -{ - /* Disable interrupts. */ - EXTI_IMR &= ~extis; - - /* Disable events. */ - EXTI_EMR &= ~extis; -} - -/* - * Reset the interrupt request by writing a 1 to the corresponding - * pending bit register. - */ -void exti_reset_request(u32 extis) -{ - EXTI_PR = extis; -} - -/* - * Remap an external interrupt line to the corresponding pin on the - * specified GPIO port. - * - * TODO: This could be rewritten in fewer lines of code. - */ -void exti_select_source(u32 exti, u32 gpioport) -{ - u8 shift, bits; - - shift = bits = 0; - - switch (exti) { - case EXTI0: - case EXTI4: - case EXTI8: - case EXTI12: - shift = 0; - break; - case EXTI1: - case EXTI5: - case EXTI9: - case EXTI13: - shift = 4; - break; - case EXTI2: - case EXTI6: - case EXTI10: - case EXTI14: - shift = 8; - break; - case EXTI3: - case EXTI7: - case EXTI11: - case EXTI15: - shift = 12; - break; - } - - switch (gpioport) { - case GPIOA: - bits = 0xf; - break; - case GPIOB: - bits = 0xe; - break; - case GPIOC: - bits = 0xd; - break; - case GPIOD: - bits = 0xc; - break; - case GPIOE: - bits = 0xb; - break; - case GPIOF: - bits = 0xa; - break; - case GPIOG: - bits = 0x9; - break; - } - - /* Ensure that only valid EXTI lines are used. */ - if (exti < EXTI4) { - SYSCFG_EXTICR1 &= ~(0x000F << shift); - SYSCFG_EXTICR1 |= (~bits << shift); - } else if (exti < EXTI8) { - SYSCFG_EXTICR2 &= ~(0x000F << shift); - SYSCFG_EXTICR2 |= (~bits << shift); - } else if (exti < EXTI12) { - SYSCFG_EXTICR3 &= ~(0x000F << shift); - SYSCFG_EXTICR3 |= (~bits << shift); - } else if (exti < EXTI16) { - SYSCFG_EXTICR4 &= ~(0x000F << shift); - SYSCFG_EXTICR4 |= (~bits << shift); - } -} diff --git a/lib/stm32/f4/Makefile b/lib/stm32/f4/Makefile index 19ea8ef..1e3192b 100644 --- a/lib/stm32/f4/Makefile +++ b/lib/stm32/f4/Makefile @@ -30,7 +30,7 @@ CFLAGS = -Os -g -Wall -Wextra -I../../../include -fno-common \ # ARFLAGS = rcsv ARFLAGS = rcs OBJS = rcc.o gpio.o usart.o spi.o flash.o \ - i2c.o exti.o pwr.o timer.o \ + i2c.o exti2.o pwr.o timer.o \ usb.o usb_standard.o usb_control.o usb_fx07_common.o usb_f107.o \ usb_f207.o adc.o diff --git a/lib/stm32/f4/exti.c b/lib/stm32/f4/exti.c deleted file mode 100644 index f69e99e..0000000 --- a/lib/stm32/f4/exti.c +++ /dev/null @@ -1,152 +0,0 @@ -/* - * This file is part of the libopencm3 project. - * - * Copyright (C) 2010 Mark Butler - * - * This library is free software: you can redistribute it and/or modify - * it under the terms of the GNU Lesser General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public License - * along with this library. If not, see . - */ - -#include -#include -#include - -void exti_set_trigger(u32 extis, exti_trigger_type trig) -{ - switch (trig) { - case EXTI_TRIGGER_RISING: - EXTI_RTSR |= extis; - EXTI_FTSR &= ~extis; - break; - case EXTI_TRIGGER_FALLING: - EXTI_RTSR &= ~extis; - EXTI_FTSR |= extis; - break; - case EXTI_TRIGGER_BOTH: - EXTI_RTSR |= extis; - EXTI_FTSR |= extis; - break; - } -} - -void exti_enable_request(u32 extis) -{ - /* Enable interrupts. */ - EXTI_IMR |= extis; - - /* Enable events. */ - EXTI_EMR |= extis; -} - -void exti_disable_request(u32 extis) -{ - /* Disable interrupts. */ - EXTI_IMR &= ~extis; - - /* Disable events. */ - EXTI_EMR &= ~extis; -} - -/* - * Reset the interrupt request by writing a 1 to the corresponding - * pending bit register. - */ -void exti_reset_request(u32 extis) -{ - EXTI_PR = extis; -} - -/* - * Remap an external interrupt line to the corresponding pin on the - * specified GPIO port. - * - * TODO: This could be rewritten in fewer lines of code. - */ -void exti_select_source(u32 exti, u32 gpioport) -{ - u8 shift, bits; - - shift = bits = 0; - - switch (exti) { - case EXTI0: - case EXTI4: - case EXTI8: - case EXTI12: - shift = 0; - break; - case EXTI1: - case EXTI5: - case EXTI9: - case EXTI13: - shift = 4; - break; - case EXTI2: - case EXTI6: - case EXTI10: - case EXTI14: - shift = 8; - break; - case EXTI3: - case EXTI7: - case EXTI11: - case EXTI15: - shift = 12; - break; - } - - switch (gpioport) { - case GPIOA: - bits = 0xf; - break; - case GPIOB: - bits = 0xe; - break; - case GPIOC: - bits = 0xd; - break; - case GPIOD: - bits = 0xc; - break; - case GPIOE: - bits = 0xb; - break; - case GPIOF: - bits = 0xa; - break; - case GPIOG: - bits = 0x9; - break; - case GPIOH: - bits = 0x8; - break; - case GPIOI: - bits = 0x7; - break; - } - - /* Ensure that only valid EXTI lines are used. */ - if (exti < EXTI4) { - SYSCFG_EXTICR1 &= ~(0x000F << shift); - SYSCFG_EXTICR1 |= (~bits << shift); - } else if (exti < EXTI8) { - SYSCFG_EXTICR2 &= ~(0x000F << shift); - SYSCFG_EXTICR2 |= (~bits << shift); - } else if (exti < EXTI12) { - SYSCFG_EXTICR3 &= ~(0x000F << shift); - SYSCFG_EXTICR3 |= (~bits << shift); - } else if (exti < EXTI16) { - SYSCFG_EXTICR4 &= ~(0x000F << shift); - SYSCFG_EXTICR4 |= (~bits << shift); - } -} diff --git a/lib/stm32/l1/Makefile b/lib/stm32/l1/Makefile index f852239..71a6505 100644 --- a/lib/stm32/l1/Makefile +++ b/lib/stm32/l1/Makefile @@ -25,10 +25,10 @@ CC = $(PREFIX)-gcc AR = $(PREFIX)-ar CFLAGS = -Os -g -Wall -Wextra -I../../../include -fno-common \ -mcpu=cortex-m3 -mthumb -Wstrict-prototypes \ - -ffunction-sections -fdata-sections -MD -DSTM32F1 + -ffunction-sections -fdata-sections -MD -DSTM32L1 # ARFLAGS = rcsv ARFLAGS = rcs -OBJS = rcc.o gpio.o desig.o crc.o usart.o +OBJS = rcc.o gpio.o desig.o crc.o usart.o exti2.o VPATH += ../../usb:../:../../cm3 -- cgit v1.2.3 From bffaa72f7e4f9a513edee34d1dee7b29a2eee6b2 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Mon, 29 Oct 2012 22:08:40 +0000 Subject: Remove debug code. --- examples/stm32/l1/Makefile.include | 2 -- 1 file changed, 2 deletions(-) (limited to 'examples') diff --git a/examples/stm32/l1/Makefile.include b/examples/stm32/l1/Makefile.include index 32c3cee..57b7030 100644 --- a/examples/stm32/l1/Makefile.include +++ b/examples/stm32/l1/Makefile.include @@ -37,8 +37,6 @@ $(info We seem to be building the example in the source directory. Using local l endif endif -$(info GAHHHH toolchain: $(TOOLCHAIN_DIR)) - ARCH_FLAGS = -mthumb -mcpu=cortex-m3 -msoft-float CFLAGS += -Os -g -Wall -Wextra -I$(TOOLCHAIN_DIR)/include \ -fno-common $(ARCH_FLAGS) -MD -DSTM32L1 -- cgit v1.2.3 From db5d19b4d4662640e13e1d22fb5d13a74a944b81 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Mon, 29 Oct 2012 22:20:18 +0000 Subject: Update documentation to reflect reality --- examples/stm32/l1/stm32l-discovery/button-irq-printf/README | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'examples') diff --git a/examples/stm32/l1/stm32l-discovery/button-irq-printf/README b/examples/stm32/l1/stm32l-discovery/button-irq-printf/README index 09e52bc..63232ef 100644 --- a/examples/stm32/l1/stm32l-discovery/button-irq-printf/README +++ b/examples/stm32/l1/stm32l-discovery/button-irq-printf/README @@ -1,4 +1,3 @@ -* Counts how long the user button was held down (in ms) -* Uses one free running counter plus EXTI as an ugly input capture -115200@8n1 console on PA2 (tx only) +* Prints to the screen when the button is pushed/released (irq driven) + 115200@8n1 console on PA2 (tx only) -- cgit v1.2.3 From 971a295d436893ce731dd7e7e931fff34d748031 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Wed, 7 Nov 2012 16:28:29 -0800 Subject: Adjusted path to nvic.h. --- examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'examples') diff --git a/examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h b/examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h index 17eb3f1..32cf465 100644 --- a/examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h +++ b/examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h @@ -12,7 +12,7 @@ extern "C" { #endif #include -#include +#include #include #include -- cgit v1.2.3 From 5d4d84026a2bd67b0e772333488cd2695aa79547 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Thu, 8 Nov 2012 15:18:26 -0800 Subject: Added updated and improved CAN example for Lisa/M 2.0. --- examples/stm32/f1/lisa-m-2/can/Makefile | 29 ++++ examples/stm32/f1/lisa-m-2/can/README | 4 + examples/stm32/f1/lisa-m-2/can/can.c | 234 ++++++++++++++++++++++++++++++++ 3 files changed, 267 insertions(+) create mode 100644 examples/stm32/f1/lisa-m-2/can/Makefile create mode 100644 examples/stm32/f1/lisa-m-2/can/README create mode 100644 examples/stm32/f1/lisa-m-2/can/can.c (limited to 'examples') diff --git a/examples/stm32/f1/lisa-m-2/can/Makefile b/examples/stm32/f1/lisa-m-2/can/Makefile new file mode 100644 index 0000000..e9191fa --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/can/Makefile @@ -0,0 +1,29 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +BINARY = can + +LDSCRIPT = ../lisa-m.ld + +# You need to set this if your device is running luftboot. +# All Lisa/M 2.0 come with Luftboot preflashed. +LDFLAGS += -Wl,-Ttext=0x8002000 + +include ../../Makefile.include + diff --git a/examples/stm32/f1/lisa-m-2/can/README b/examples/stm32/f1/lisa-m-2/can/README new file mode 100644 index 0000000..3a14e3b --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/can/README @@ -0,0 +1,4 @@ +This test sets up the CAN interface on Lisa/M and transmits 8 bites every +100ms. The first byte is being incremented in each cycle. The demo also +receives messages and is displaing the first 4 bits of the first byte on the +board LEDs. diff --git a/examples/stm32/f1/lisa-m-2/can/can.c b/examples/stm32/f1/lisa-m-2/can/can.c new file mode 100644 index 0000000..dd673ba --- /dev/null +++ b/examples/stm32/f1/lisa-m-2/can/can.c @@ -0,0 +1,234 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2010 Thomas Otto + * Copyright (C) 2010-2011 Piotr Esden-Tempski + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include +#include +#include +#include +#include +#include + +struct can_tx_msg { + u32 std_id; + u32 ext_id; + u8 ide; + u8 rtr; + u8 dlc; + u8 data[8]; +}; + +struct can_rx_msg { + u32 std_id; + u32 ext_id; + u8 ide; + u8 rtr; + u8 dlc; + u8 data[8]; + u8 fmi; +}; + +struct can_tx_msg can_tx_msg; +struct can_rx_msg can_rx_msg; + +void gpio_setup(void) +{ + /* Enable Alternate Function clock. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN); + + /* Enable GPIOA clock. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); + + /* Enable GPIOB clock. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); + + /* Enable GPIOC clock. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN); + + /* Preconfigure LEDs. */ + gpio_set(GPIOA, GPIO8); /* LED1 off */ + gpio_set(GPIOB, GPIO4); /* LED2 off */ + gpio_set(GPIOC, GPIO2); /* LED3 off */ + gpio_set(GPIOC, GPIO5); /* LED4 off */ + gpio_set(GPIOC, GPIO15); /* LED5 off */ + + /* Configure LED GPIOOs. */ + gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO8); + gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO4); + gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO2); + gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO5); + gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO15); + + /* Configure PB4 as GPIO. */ + AFIO_MAPR |= AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST; + +} + +void systick_setup(void) +{ + /* 72MHz / 8 => 9000000 counts per second */ + systick_set_clocksource(STK_CTRL_CLKSOURCE_AHB_DIV8); + + /* 9000000/9000 = 1000 overflows per second - every 1ms one interrupt */ + systick_set_reload(9000); + + systick_interrupt_enable(); + + /* Start counting. */ + systick_counter_enable(); +} + +void can_setup(void) +{ + /* Enable peripheral clocks. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN); + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); + rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_CAN1EN); + + AFIO_MAPR |= AFIO_MAPR_CAN1_REMAP_PORTB; + + /* Configure CAN pin: RX (input pull-up). */ + gpio_set_mode(GPIO_BANK_CAN1_PB_RX, GPIO_MODE_INPUT, + GPIO_CNF_INPUT_PULL_UPDOWN, GPIO_CAN1_PB_RX); + gpio_set(GPIO_BANK_CAN1_PB_RX, GPIO_CAN1_PB_RX); + + /* Configure CAN pin: TX. */ + gpio_set_mode(GPIO_BANK_CAN1_PB_TX, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_CAN1_PB_TX); + + /* NVIC setup. */ + nvic_enable_irq(NVIC_USB_LP_CAN_RX0_IRQ); + nvic_set_priority(NVIC_USB_LP_CAN_RX0_IRQ, 1); + + /* Reset CAN. */ + can_reset(CAN1); + + /* CAN cell init. */ + if (can_init(CAN1, + false, /* TTCM: Time triggered comm mode? */ + true, /* ABOM: Automatic bus-off management? */ + false, /* AWUM: Automatic wakeup mode? */ + false, /* NART: No automatic retransmission? */ + false, /* RFLM: Receive FIFO locked mode? */ + false, /* TXFP: Transmit FIFO priority? */ + CAN_BTR_SJW_1TQ, + CAN_BTR_TS1_3TQ, + CAN_BTR_TS2_4TQ, + 12)) /* BRP+1: Baud rate prescaler */ + { + gpio_set(GPIOA, GPIO8); /* LED1 off */ + gpio_set(GPIOB, GPIO4); /* LED2 off */ + gpio_set(GPIOC, GPIO2); /* LED3 off */ + gpio_clear(GPIOC, GPIO5); /* LED4 on */ + gpio_set(GPIOC, GPIO15); /* LED5 off */ + + /* Die because we failed to initialize. */ + while (1) + __asm__("nop"); + } + + /* CAN filter 0 init. */ + can_filter_id_mask_32bit_init(CAN1, + 0, /* Filter ID */ + 0, /* CAN ID */ + 0, /* CAN ID mask */ + 0, /* FIFO assignment (here: FIFO0) */ + true); /* Enable the filter. */ + + /* Enable CAN RX interrupt. */ + can_enable_irq(CAN1, CAN_IER_FMPIE0); +} + +void sys_tick_handler(void) +{ + static int temp32 = 0; + static u8 data[8] = {0, 1, 2, 0, 0, 0, 0, 0}; + + /* We call this handler every 1ms so every 100ms = 0.1s + * resulting in 100Hz message rate. + */ + if (++temp32 != 100) + return; + + temp32 = 0; + + /* Transmit CAN frame. */ + data[0]++; + if (can_transmit(CAN1, + 0, /* (EX/ST)ID: CAN ID */ + false, /* IDE: CAN ID extended? */ + false, /* RTR: Request transmit? */ + 8, /* DLC: Data length */ + data) == -1) + { + gpio_set(GPIOA, GPIO8); /* LED1 off */ + gpio_set(GPIOB, GPIO4); /* LED2 off */ + gpio_set(GPIOC, GPIO2); /* LED3 off */ + gpio_set(GPIOC, GPIO5); /* LED4 off */ + gpio_clear(GPIOC, GPIO15); /* LED5 on */ + } +} + +void usb_lp_can_rx0_isr(void) +{ + u32 id, fmi; + bool ext, rtr; + u8 length, data[8]; + + can_receive(CAN1, 0, false, &id, &ext, &rtr, &fmi, &length, data); + + if (data[0] & 1) + gpio_clear(GPIOA, GPIO8); + else + gpio_set(GPIOA, GPIO8); + + if (data[0] & 2) + gpio_clear(GPIOB, GPIO4); + else + gpio_set(GPIOB, GPIO4); + + if (data[0] & 4) + gpio_clear(GPIOC, GPIO2); + else + gpio_set(GPIOC, GPIO2); + + if (data[0] & 8) + gpio_clear(GPIOC, GPIO5); + else + gpio_set(GPIOC, GPIO5); + + can_fifo_release(CAN1, 0); +} + +int main(void) +{ + rcc_clock_setup_in_hse_12mhz_out_72mhz(); + gpio_setup(); + can_setup(); + systick_setup(); + + while (1); /* Halt. */ + + return 0; +} -- cgit v1.2.3 From 898691e5ef922d90760d28c18f75b0284738a5b2 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Thu, 8 Nov 2012 15:21:40 -0800 Subject: Updated and backported improvements form the Lisa/M 2.0 CAN example. --- examples/stm32/f1/lisa-m-1/can/README | 4 ++++ examples/stm32/f1/lisa-m-1/can/can.c | 12 +++++++----- 2 files changed, 11 insertions(+), 5 deletions(-) create mode 100644 examples/stm32/f1/lisa-m-1/can/README (limited to 'examples') diff --git a/examples/stm32/f1/lisa-m-1/can/README b/examples/stm32/f1/lisa-m-1/can/README new file mode 100644 index 0000000..3a14e3b --- /dev/null +++ b/examples/stm32/f1/lisa-m-1/can/README @@ -0,0 +1,4 @@ +This test sets up the CAN interface on Lisa/M and transmits 8 bites every +100ms. The first byte is being incremented in each cycle. The demo also +receives messages and is displaing the first 4 bits of the first byte on the +board LEDs. diff --git a/examples/stm32/f1/lisa-m-1/can/can.c b/examples/stm32/f1/lisa-m-1/can/can.c index 41432b6..a4cf30d 100644 --- a/examples/stm32/f1/lisa-m-1/can/can.c +++ b/examples/stm32/f1/lisa-m-1/can/can.c @@ -106,15 +106,15 @@ void can_setup(void) rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_CANEN); - AFIO_MAPR = AFIO_MAPR_CAN1_REMAP_PORTB; + AFIO_MAPR |= AFIO_MAPR_CAN1_REMAP_PORTB; /* Configure CAN pin: RX (input pull-up). */ - gpio_set_mode(GPIOB, GPIO_MODE_INPUT, + gpio_set_mode(GPIO_BANK_CAN1_PB_RX, GPIO_MODE_INPUT, GPIO_CNF_INPUT_PULL_UPDOWN, GPIO_CAN1_PB_RX); gpio_set(GPIOB, GPIO_CAN1_PB_RX); /* Configure CAN pin: TX. */ - gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ, + gpio_set_mode(GPIO_BANK_CAN1_PB_TX, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_CAN1_PB_TX); /* NVIC setup. */ @@ -165,8 +165,10 @@ void sys_tick_handler(void) static int temp32 = 0; static u8 data[8] = {0, 1, 2, 0, 0, 0, 0, 0}; - /* We call this handler every 1ms so 1000ms = 1s on/off. */ - if (++temp32 != 1000) + /* We call this handler every 1ms so 100ms = 1s + * Resulting in 100Hz message frequency. + */ + if (++temp32 != 100) return; temp32 = 0; -- cgit v1.2.3 From 1544800a23932f4adcde93b8ee7cc8e1823443eb Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Thu, 8 Nov 2012 15:35:17 -0800 Subject: Made all Lisa/M 2.0 examples luftboot ready. --- examples/stm32/f1/lisa-m-2/adc_injec/Makefile | 1 + examples/stm32/f1/lisa-m-2/adc_injec_timtrig/Makefile | 1 + examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/Makefile | 1 + examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/Makefile | 1 + examples/stm32/f1/lisa-m-2/adc_regular/Makefile | 1 + examples/stm32/f1/lisa-m-2/can/Makefile | 7 +++---- examples/stm32/f1/lisa-m-2/fancyblink/Makefile | 3 +++ examples/stm32/f1/lisa-m-2/usart/Makefile | 3 +++ examples/stm32/f1/lisa-m-2/usart_dma/Makefile | 3 +++ examples/stm32/f1/lisa-m-2/usart_irq/Makefile | 3 +++ examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile | 3 +++ examples/stm32/f1/lisa-m-2/usart_printf/Makefile | 3 +++ 12 files changed, 26 insertions(+), 4 deletions(-) (limited to 'examples') diff --git a/examples/stm32/f1/lisa-m-2/adc_injec/Makefile b/examples/stm32/f1/lisa-m-2/adc_injec/Makefile index e50737b..666c393 100644 --- a/examples/stm32/f1/lisa-m-2/adc_injec/Makefile +++ b/examples/stm32/f1/lisa-m-2/adc_injec/Makefile @@ -18,6 +18,7 @@ ## BINARY = adc_injec + # Comment the following line if you _don't_ have luftboot flashed! LDFLAGS += -Wl,-Ttext=0x8002000 CFLAGS += -std=c99 diff --git a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig/Makefile b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig/Makefile index af2e9e6..72eab49 100644 --- a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig/Makefile +++ b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig/Makefile @@ -18,6 +18,7 @@ ## BINARY = adc_injec_timtrig + # Comment the following line if you _don't_ have luftboot flashed! LDFLAGS += -Wl,-Ttext=0x8002000 CFLAGS += -std=c99 diff --git a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/Makefile b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/Makefile index c88152e..8ad47e2 100644 --- a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/Makefile +++ b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/Makefile @@ -18,6 +18,7 @@ ## BINARY = adc_injec_timtrig_irq + # Comment the following line if you _don't_ have luftboot flashed! LDFLAGS += -Wl,-Ttext=0x8002000 CFLAGS += -std=c99 diff --git a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/Makefile b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/Makefile index d9a74a2..a3cccec 100644 --- a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/Makefile +++ b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/Makefile @@ -18,6 +18,7 @@ ## BINARY = adc_injec_timtrig_irq_4ch + # Comment the following line if you _don't_ have luftboot flashed! LDFLAGS += -Wl,-Ttext=0x8002000 CFLAGS += -std=c99 diff --git a/examples/stm32/f1/lisa-m-2/adc_regular/Makefile b/examples/stm32/f1/lisa-m-2/adc_regular/Makefile index 20355ce..b61587f 100644 --- a/examples/stm32/f1/lisa-m-2/adc_regular/Makefile +++ b/examples/stm32/f1/lisa-m-2/adc_regular/Makefile @@ -18,6 +18,7 @@ ## BINARY = adc + # Comment the following line if you _don't_ have luftboot flashed! LDFLAGS += -Wl,-Ttext=0x8002000 CFLAGS += -std=c99 diff --git a/examples/stm32/f1/lisa-m-2/can/Makefile b/examples/stm32/f1/lisa-m-2/can/Makefile index e9191fa..71a787a 100644 --- a/examples/stm32/f1/lisa-m-2/can/Makefile +++ b/examples/stm32/f1/lisa-m-2/can/Makefile @@ -19,11 +19,10 @@ BINARY = can -LDSCRIPT = ../lisa-m.ld - -# You need to set this if your device is running luftboot. -# All Lisa/M 2.0 come with Luftboot preflashed. +# Comment the following line if you _don't_ have luftboot flashed! LDFLAGS += -Wl,-Ttext=0x8002000 +CFLAGS += -std=c99 +LDSCRIPT = ../lisa-m.ld include ../../Makefile.include diff --git a/examples/stm32/f1/lisa-m-2/fancyblink/Makefile b/examples/stm32/f1/lisa-m-2/fancyblink/Makefile index e453f84..90ce834 100644 --- a/examples/stm32/f1/lisa-m-2/fancyblink/Makefile +++ b/examples/stm32/f1/lisa-m-2/fancyblink/Makefile @@ -19,6 +19,9 @@ BINARY = fancyblink +# Comment the following line if you _don't_ have luftboot flashed! +LDFLAGS += -Wl,-Ttext=0x8002000 +CFLAGS += -std=c99 LDSCRIPT = ../lisa-m.ld include ../../Makefile.include diff --git a/examples/stm32/f1/lisa-m-2/usart/Makefile b/examples/stm32/f1/lisa-m-2/usart/Makefile index 4ba7e9e..498cd83 100644 --- a/examples/stm32/f1/lisa-m-2/usart/Makefile +++ b/examples/stm32/f1/lisa-m-2/usart/Makefile @@ -19,6 +19,9 @@ BINARY = usart +# Comment the following line if you _don't_ have luftboot flashed! +LDFLAGS += -Wl,-Ttext=0x8002000 +CFLAGS += -std=c99 LDSCRIPT = ../lisa-m.ld include ../../Makefile.include diff --git a/examples/stm32/f1/lisa-m-2/usart_dma/Makefile b/examples/stm32/f1/lisa-m-2/usart_dma/Makefile index 813cda9..5fa5c51 100644 --- a/examples/stm32/f1/lisa-m-2/usart_dma/Makefile +++ b/examples/stm32/f1/lisa-m-2/usart_dma/Makefile @@ -19,6 +19,9 @@ BINARY = usart_dma +# Comment the following line if you _don't_ have luftboot flashed! +LDFLAGS += -Wl,-Ttext=0x8002000 +CFLAGS += -std=c99 LDSCRIPT = ../lisa-m.ld include ../../Makefile.include diff --git a/examples/stm32/f1/lisa-m-2/usart_irq/Makefile b/examples/stm32/f1/lisa-m-2/usart_irq/Makefile index 7baa2fe..dbab248 100644 --- a/examples/stm32/f1/lisa-m-2/usart_irq/Makefile +++ b/examples/stm32/f1/lisa-m-2/usart_irq/Makefile @@ -19,6 +19,9 @@ BINARY = usart_irq +# Comment the following line if you _don't_ have luftboot flashed! +LDFLAGS += -Wl,-Ttext=0x8002000 +CFLAGS += -std=c99 LDSCRIPT = ../lisa-m.ld include ../../Makefile.include diff --git a/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile b/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile index 0b6fd3e..1cc2ed1 100644 --- a/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile +++ b/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile @@ -19,6 +19,9 @@ BINARY = usart_irq_printf +# Comment the following line if you _don't_ have luftboot flashed! +LDFLAGS += -Wl,-Ttext=0x8002000 +CFLAGS += -std=c99 LDSCRIPT = ../lisa-m.ld include ../../Makefile.include diff --git a/examples/stm32/f1/lisa-m-2/usart_printf/Makefile b/examples/stm32/f1/lisa-m-2/usart_printf/Makefile index 80ac033..6eaf005 100644 --- a/examples/stm32/f1/lisa-m-2/usart_printf/Makefile +++ b/examples/stm32/f1/lisa-m-2/usart_printf/Makefile @@ -19,6 +19,9 @@ BINARY = usart_printf +# Comment the following line if you _don't_ have luftboot flashed! +LDFLAGS += -Wl,-Ttext=0x8002000 +CFLAGS += -std=c99 LDSCRIPT = ../lisa-m.ld include ../../Makefile.include -- cgit v1.2.3 From d1e789b5b7816f92264cb833fb4ea60b27e886fc Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Sun, 11 Nov 2012 20:36:21 -0800 Subject: [examples] Added obldc strip led example. --- examples/stm32/f1/obldc-strip/led/Makefile | 25 +++++++++++ examples/stm32/f1/obldc-strip/led/led.c | 65 ++++++++++++++++++++++++++++ examples/stm32/f1/obldc-strip/obldc-strip.ld | 31 +++++++++++++ 3 files changed, 121 insertions(+) create mode 100644 examples/stm32/f1/obldc-strip/led/Makefile create mode 100644 examples/stm32/f1/obldc-strip/led/led.c create mode 100644 examples/stm32/f1/obldc-strip/obldc-strip.ld (limited to 'examples') diff --git a/examples/stm32/f1/obldc-strip/led/Makefile b/examples/stm32/f1/obldc-strip/led/Makefile new file mode 100644 index 0000000..f8ff540 --- /dev/null +++ b/examples/stm32/f1/obldc-strip/led/Makefile @@ -0,0 +1,25 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +BINARY = led + +LDSCRIPT = ../obldc-strip.ld + +include ../../Makefile.include + diff --git a/examples/stm32/f1/obldc-strip/led/led.c b/examples/stm32/f1/obldc-strip/led/led.c new file mode 100644 index 0000000..e9fb92f --- /dev/null +++ b/examples/stm32/f1/obldc-strip/led/led.c @@ -0,0 +1,65 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2012 Piotr Esden-Tempski + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include +#include + +void clock_setup(void) +{ + /* Set STM32 to 64 MHz. */ + rcc_clock_setup_in_hsi_out_64mhz(); + + /* Enable alternate function peripheral clock. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN); + + /* Enable GPIOB clock. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); +} + +void gpio_setup(void) +{ + + /* Configure PB4 as GPIO. */ + AFIO_MAPR |= AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST; + + /* Set GPIO4 and 5 (in GPIO port B) to 'output push-pull'. */ + gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO4 | GPIO5); + +} + +int main(void) +{ + int i; + + clock_setup(); + gpio_setup(); + + /* Blink the LEDs on the board. */ + while (1) { + gpio_toggle(GPIOB, GPIO4); /* LED on/off */ + for (i = 0; i < 8000000; i++) /* Wait a bit. */ + __asm__("nop"); + gpio_toggle(GPIOB, GPIO5); /* LED on/off */ + for (i = 0; i < 8000000; i++) /* Wait a bit. */ + __asm__("nop"); + } + + return 0; +} diff --git a/examples/stm32/f1/obldc-strip/obldc-strip.ld b/examples/stm32/f1/obldc-strip/obldc-strip.ld new file mode 100644 index 0000000..9778070 --- /dev/null +++ b/examples/stm32/f1/obldc-strip/obldc-strip.ld @@ -0,0 +1,31 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2009 Uwe Hermann + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +/* Linker script for Open-BLDC (STM32F103CBT6, 128K flash, 20K RAM). */ + +/* Define memory regions. */ +MEMORY +{ + rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K +} + +/* Include the common ld script. */ +INCLUDE libopencm3_stm32f1.ld + -- cgit v1.2.3 From 7006d3c45770fc46647968985bb3f959f50d1de3 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Sun, 11 Nov 2012 20:37:18 -0800 Subject: [examples] Added systick example for obldc strip. --- examples/stm32/f1/obldc-strip/systick/Makefile | 25 ++++++++ examples/stm32/f1/obldc-strip/systick/systick.c | 81 +++++++++++++++++++++++++ 2 files changed, 106 insertions(+) create mode 100644 examples/stm32/f1/obldc-strip/systick/Makefile create mode 100644 examples/stm32/f1/obldc-strip/systick/systick.c (limited to 'examples') diff --git a/examples/stm32/f1/obldc-strip/systick/Makefile b/examples/stm32/f1/obldc-strip/systick/Makefile new file mode 100644 index 0000000..d89dd3e --- /dev/null +++ b/examples/stm32/f1/obldc-strip/systick/Makefile @@ -0,0 +1,25 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +BINARY = systick + +LDSCRIPT = ../obldc-strip.ld + +include ../../Makefile.include + diff --git a/examples/stm32/f1/obldc-strip/systick/systick.c b/examples/stm32/f1/obldc-strip/systick/systick.c new file mode 100644 index 0000000..8b94901 --- /dev/null +++ b/examples/stm32/f1/obldc-strip/systick/systick.c @@ -0,0 +1,81 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2012 Piotr Esden-Tempski + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include +#include +#include +#include +#include + +u32 temp32; + +void gpio_setup(void) +{ + /* Enable alternate function peripheral clock. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN); + + /* Enable GPIOB clock. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); + + gpio_clear(GPIOB, GPIO4); /* LED green on */ + gpio_set(GPIOB, GPIO5); /* LED red off */ + + /* Set GPIO4/5 (in GPIO port B) to 'output push-pull' for the LEDs. */ + gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO4); + gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO5); + + AFIO_MAPR |= AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST; +} + +void sys_tick_handler(void) +{ + temp32++; + + /* We call this handler every 1ms so 1000ms = 1s on/off. */ + if (temp32 == 1000) { + gpio_toggle(GPIOB, GPIO4); /* LED green on/off */ + gpio_toggle(GPIOB, GPIO5); /* LED red on/off */ + temp32 = 0; + } +} + +int main(void) +{ + rcc_clock_setup_in_hsi_out_64mhz(); + gpio_setup(); + + temp32 = 0; + + /* 64MHz / 8 => 8000000 counts per second */ + systick_set_clocksource(STK_CTRL_CLKSOURCE_AHB_DIV8); + + /* 8000000/8000 = 1000 overflows per second - every 1ms one interrupt */ + systick_set_reload(8000); + + systick_interrupt_enable(); + + /* Start counting. */ + systick_counter_enable(); + + while (1); /* Halt. */ + + return 0; +} -- cgit v1.2.3 From 4691568ca476177dc338e8c62872ceca6b4b4999 Mon Sep 17 00:00:00 2001 From: Piotr Esden-Tempski Date: Sun, 11 Nov 2012 21:02:15 -0800 Subject: [examples] Added CAN example for obldc strip. --- examples/stm32/f1/obldc-strip/can/Makefile | 25 ++++ examples/stm32/f1/obldc-strip/can/README | 4 + examples/stm32/f1/obldc-strip/can/can.c | 202 +++++++++++++++++++++++++++++ 3 files changed, 231 insertions(+) create mode 100644 examples/stm32/f1/obldc-strip/can/Makefile create mode 100644 examples/stm32/f1/obldc-strip/can/README create mode 100644 examples/stm32/f1/obldc-strip/can/can.c (limited to 'examples') diff --git a/examples/stm32/f1/obldc-strip/can/Makefile b/examples/stm32/f1/obldc-strip/can/Makefile new file mode 100644 index 0000000..ae14841 --- /dev/null +++ b/examples/stm32/f1/obldc-strip/can/Makefile @@ -0,0 +1,25 @@ +## +## This file is part of the libopencm3 project. +## +## Copyright (C) 2009 Uwe Hermann +## +## This library is free software: you can redistribute it and/or modify +## it under the terms of the GNU Lesser General Public License as published by +## the Free Software Foundation, either version 3 of the License, or +## (at your option) any later version. +## +## This library is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU Lesser General Public License for more details. +## +## You should have received a copy of the GNU Lesser General Public License +## along with this library. If not, see . +## + +BINARY = can + +LDSCRIPT = ../obldc-strip.ld + +include ../../Makefile.include + diff --git a/examples/stm32/f1/obldc-strip/can/README b/examples/stm32/f1/obldc-strip/can/README new file mode 100644 index 0000000..3a14e3b --- /dev/null +++ b/examples/stm32/f1/obldc-strip/can/README @@ -0,0 +1,4 @@ +This test sets up the CAN interface on Lisa/M and transmits 8 bites every +100ms. The first byte is being incremented in each cycle. The demo also +receives messages and is displaing the first 4 bits of the first byte on the +board LEDs. diff --git a/examples/stm32/f1/obldc-strip/can/can.c b/examples/stm32/f1/obldc-strip/can/can.c new file mode 100644 index 0000000..82473e1 --- /dev/null +++ b/examples/stm32/f1/obldc-strip/can/can.c @@ -0,0 +1,202 @@ +/* + * This file is part of the libopencm3 project. + * + * Copyright (C) 2012 Piotr Esden-Tempski + * + * This library is free software: you can redistribute it and/or modify + * it under the terms of the GNU Lesser General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public License + * along with this library. If not, see . + */ + +#include +#include +#include +#include +#include +#include + +struct can_tx_msg { + u32 std_id; + u32 ext_id; + u8 ide; + u8 rtr; + u8 dlc; + u8 data[8]; +}; + +struct can_rx_msg { + u32 std_id; + u32 ext_id; + u8 ide; + u8 rtr; + u8 dlc; + u8 data[8]; + u8 fmi; +}; + +struct can_tx_msg can_tx_msg; +struct can_rx_msg can_rx_msg; + +void gpio_setup(void) +{ + /* Enable Alternate Function clock. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN); + + /* Enable GPIOB clock. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); + + /* Preconfigure LEDs. */ + gpio_set(GPIOB, GPIO4); /* LED green off */ + gpio_set(GPIOB, GPIO5); /* LED red off */ + + /* Configure LED GPIOs. */ + gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO4); + gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_PUSHPULL, GPIO5); + + /* Configure PB4 as GPIO. */ + AFIO_MAPR |= AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST; + +} + +void systick_setup(void) +{ + /* 64MHz / 8 => 8000000 counts per second */ + systick_set_clocksource(STK_CTRL_CLKSOURCE_AHB_DIV8); + + /* 8000000/8000 = 1000 overflows per second - every 1ms one interrupt */ + systick_set_reload(8000); + + systick_interrupt_enable(); + + /* Start counting. */ + systick_counter_enable(); +} + +void can_setup(void) +{ + /* Enable peripheral clocks. */ + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN); + rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); + rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_CAN1EN); + + AFIO_MAPR |= AFIO_MAPR_CAN1_REMAP_PORTB; + + /* Configure CAN pin: RX (input pull-up). */ + gpio_set_mode(GPIO_BANK_CAN1_PB_RX, GPIO_MODE_INPUT, + GPIO_CNF_INPUT_PULL_UPDOWN, GPIO_CAN1_PB_RX); + gpio_set(GPIO_BANK_CAN1_PB_RX, GPIO_CAN1_PB_RX); + + /* Configure CAN pin: TX. */ + gpio_set_mode(GPIO_BANK_CAN1_PB_TX, GPIO_MODE_OUTPUT_50_MHZ, + GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_CAN1_PB_TX); + + /* NVIC setup. */ + nvic_enable_irq(NVIC_USB_LP_CAN_RX0_IRQ); + nvic_set_priority(NVIC_USB_LP_CAN_RX0_IRQ, 1); + + /* Reset CAN. */ + can_reset(CAN1); + + /* CAN cell init. + * Setting the bitrate to 1MBit. APB1 = 32MHz, + * prescaler = 2 -> 16MHz time quanta frequency. + * 1tq sync + 9tq bit segment1 (TS1) + 6tq bit segment2 (TS2) = + * 16time quanto per bit period, therefor 16MHz/16 = 1MHz + */ + if (can_init(CAN1, + false, /* TTCM: Time triggered comm mode? */ + true, /* ABOM: Automatic bus-off management? */ + false, /* AWUM: Automatic wakeup mode? */ + false, /* NART: No automatic retransmission? */ + false, /* RFLM: Receive FIFO locked mode? */ + false, /* TXFP: Transmit FIFO priority? */ + CAN_BTR_SJW_1TQ, + CAN_BTR_TS1_9TQ, + CAN_BTR_TS2_6TQ, + 2)) /* BRP+1: Baud rate prescaler */ + { + gpio_clear(GPIOB, GPIO4); /* LED green on */ + gpio_set(GPIOB, GPIO5); /* LED red off */ + + /* Die because we failed to initialize. */ + while (1) + __asm__("nop"); + } + + /* CAN filter 0 init. */ + can_filter_id_mask_32bit_init(CAN1, + 0, /* Filter ID */ + 0, /* CAN ID */ + 0, /* CAN ID mask */ + 0, /* FIFO assignment (here: FIFO0) */ + true); /* Enable the filter. */ + + /* Enable CAN RX interrupt. */ + can_enable_irq(CAN1, CAN_IER_FMPIE0); +} + +void sys_tick_handler(void) +{ + static u8 data[8] = {0, 1, 2, 0, 0, 0, 0, 0}; + + /* We call this handler every 1ms so every 1ms = 0.001s + * resulting in 1000Hz message rate. + */ + + /* Transmit CAN frame. */ + data[0]++; + if (can_transmit(CAN1, + 0, /* (EX/ST)ID: CAN ID */ + false, /* IDE: CAN ID extended? */ + false, /* RTR: Request transmit? */ + 8, /* DLC: Data length */ + data) == -1) + { + gpio_set(GPIOB, GPIO4); /* LED green off */ + gpio_clear(GPIOB, GPIO5); /* LED red on */ + } +} + +void usb_lp_can_rx0_isr(void) +{ + u32 id, fmi; + bool ext, rtr; + u8 length, data[8]; + + can_receive(CAN1, 0, false, &id, &ext, &rtr, &fmi, &length, data); + + if (data[0] & 0x40) + gpio_clear(GPIOB, GPIO4); + else + gpio_set(GPIOB, GPIO4); + + if (data[0] & 0x80) + gpio_clear(GPIOB, GPIO5); + else + gpio_set(GPIOB, GPIO5); + + can_fifo_release(CAN1, 0); +} + +int main(void) +{ + rcc_clock_setup_in_hsi_out_64mhz(); + gpio_setup(); + can_setup(); + systick_setup(); + + while (1); /* Halt. */ + + return 0; +} -- cgit v1.2.3