From 569801687744d5f4f4157ea186a8a6c1d159d285 Mon Sep 17 00:00:00 2001 From: Michael Ossmann Date: Mon, 4 Jun 2012 17:30:08 -0600 Subject: moved stuff out of i2cdemo.c and into drivers/headers --- examples/lpc43xx/hackrf-jellybean/i2c/i2cdemo.c | 113 ------------------------ 1 file changed, 113 deletions(-) (limited to 'examples/lpc43xx/hackrf-jellybean/i2c') diff --git a/examples/lpc43xx/hackrf-jellybean/i2c/i2cdemo.c b/examples/lpc43xx/hackrf-jellybean/i2c/i2cdemo.c index 7198bb3..102365b 100644 --- a/examples/lpc43xx/hackrf-jellybean/i2c/i2cdemo.c +++ b/examples/lpc43xx/hackrf-jellybean/i2c/i2cdemo.c @@ -19,8 +19,6 @@ */ #include -#include -#include #include #include "../jellybean_conf.h" @@ -39,9 +37,6 @@ void gpio_setup(void) scu_pinmux(SCU_PINMUX_BOOT2, SCU_GPIO_FAST); scu_pinmux(SCU_PINMUX_BOOT3, SCU_GPIO_FAST); - /* Configure SCU I2C0 Peripheral */ - SCU_SFSI2C0 = SCU_I2C0_NOMINAL; - /* Configure all GPIO as Input (safe state) */ GPIO0_DIR = 0; GPIO1_DIR = 0; @@ -57,115 +52,7 @@ void gpio_setup(void) GPIO3_DIR |= PIN_EN1V8; /* GPIO3[6] on P6_10 as output. */ } -//FIXME generalize and move to drivers - -#define SCU_SFSI2C0_SCL_EFP (1 << 1) /* 3 ns glitch filter */ -#define SCU_SFSI2C0_SCL_EHD (1 << 2) /* Fast-mode Plus transmit */ -#define SCU_SFSI2C0_SCL_EZI (1 << 3) /* Enable the input receiver */ -#define SCU_SFSI2C0_SCL_ZIF (1 << 7) /* Disable input glitch filter */ -#define SCU_SFSI2C0_SDA_EFP (1 << 8) /* 3 ns glitch filter */ -#define SCU_SFSI2C0_SDA_EHD (1 << 10) /* Fast-mode Plus transmit */ -#define SCU_SFSI2C0_SDA_EZI (1 << 11) /* Enable the input receiver */ -#define SCU_SFSI2C0_SDA_ZIF (1 << 15) /* Disable input glitch filter */ - -#define I2C_CONCLR_AAC (1 << 2) /* Assert acknowledge Clear */ -#define I2C_CONCLR_SIC (1 << 3) /* I2C interrupt Clear */ -#define I2C_CONCLR_STAC (1 << 5) /* START flag Clear */ -#define I2C_CONCLR_I2ENC (1 << 6) /* I2C interface Disable bit */ - -#define I2C_CONSET_AA (1 << 2) /* Assert acknowledge flag */ -#define I2C_CONSET_SI (1 << 3) /* I2C interrupt flag */ -#define I2C_CONSET_STO (1 << 4) /* STOP flag */ -#define I2C_CONSET_STA (1 << 5) /* START flag */ -#define I2C_CONSET_I2EN (1 << 6) /* I2C interface enable */ - -#define CGU_SRC_32K 0x00 -#define CGU_SRC_IRC 0x01 -#define CGU_SRC_ENET_RX 0x02 -#define CGU_SRC_ENET_TX 0x03 -#define CGU_SRC_GP_CLKIN 0x04 -#define CGU_SRC_XTAL 0x06 -#define CGU_SRC_PLL0USB 0x07 -#define CGU_SRC_PLL0AUDIO 0x08 -#define CGU_SRC_PLL1 0x09 -#define CGU_SRC_IDIVA 0x0C -#define CGU_SRC_IDIVB 0x0D -#define CGU_SRC_IDIVC 0x0E -#define CGU_SRC_IDIVD 0x0F -#define CGU_SRC_IDIVE 0x10 - -#define CGU_BASE_CLK_PD (1 << 0) /* output stage power-down */ -#define CGU_BASE_CLK_AUTOBLOCK (1 << 11) /* block clock automatically */ -#define CGU_BASE_CLK_SEL_SHIFT 24 /* clock source selection (5 bits) */ - -void i2c0_init() -{ - /* enable input on SCL and SDA pins */ - SCU_SFSI2C0 = (SCU_SFSI2C0_SCL_EZI | SCU_SFSI2C0_SDA_EZI); - - /* use PLL1 as clock source for APB1 (including I2C0) */ - CGU_BASE_APB1_CLK = (CGU_SRC_PLL1 << CGU_BASE_CLK_SEL_SHIFT); - - //FIXME assuming we're on IRC at 96 MHz - - /* 400 kHz I2C */ - //I2C0_SCLH = 120; - //I2C0_SCLL = 120; - - /* 100 kHz I2C */ - I2C0_SCLH = 480; - I2C0_SCLL = 480; - //FIXME not sure why this appears to run at about 290 kHz - - /* clear the control bits */ - I2C0_CONCLR = (I2C_CONCLR_AAC | I2C_CONCLR_SIC - | I2C_CONCLR_STAC | I2C_CONCLR_I2ENC); - - /* enable I2C0 */ - I2C0_CONSET = I2C_CONSET_I2EN; -} - -/* transmit start bit */ -void i2c0_tx_start() -{ - I2C0_CONCLR = I2C_CONCLR_SIC; - I2C0_CONSET = I2C_CONSET_STA; - while (!(I2C0_CONSET & I2C_CONSET_SI)); - I2C0_CONCLR = I2C_CONCLR_STAC; -} - -/* transmit data byte */ -void i2c0_tx_byte(u8 byte) -{ - if (I2C0_CONSET & I2C_CONSET_STA) - I2C0_CONCLR = I2C_CONCLR_STAC; - I2C0_DAT = byte; - I2C0_CONCLR = I2C_CONCLR_SIC; - while (!(I2C0_CONSET & I2C_CONSET_SI)); -} - -/* receive data byte */ -u8 i2c0_rx_byte() -{ - if (I2C0_CONSET & I2C_CONSET_STA) - I2C0_CONCLR = I2C_CONCLR_STAC; - I2C0_CONCLR = I2C_CONCLR_SIC; - while (!(I2C0_CONSET & I2C_CONSET_SI)); - return I2C0_DAT; -} - -/* transmit stop bit */ -void i2c0_stop() -{ - if (I2C0_CONSET & I2C_CONSET_STA) - I2C0_CONCLR = I2C_CONCLR_STAC; - I2C0_CONSET = I2C_CONSET_STO; - I2C0_CONCLR = I2C_CONCLR_SIC; -} - #define SI5351C_I2C_ADDR (0x60 << 1) -#define I2C_WRITE 0 -#define I2C_READ 1 /* write to single register */ void si5351c_write_reg(uint8_t reg, uint8_t val) -- cgit v1.2.3