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2013-02-26COMMON: Fix a tiny macro typo!Piotr Esden-Tempski
2013-02-26Fixed gpio_primary_remap; swjdisable is pre-shifted and therefore needs to ↵Vegard Storheil Eriksen
be u32.
2013-02-25fix stm32f2 sdio base adressalexn
2013-02-25fix stm32f4 sdio base adressalexn
2013-02-24[cm3] add missing declaration for systick_get_reloadFelix Ruess
2013-02-19Merge remote-tracking branch 'github/deprecationmacro'Piotr Esden-Tempski
2013-02-18Merge pull request #92 "DMA tidyup"Piotr Esden-Tempski
Merge remote-tracking branch 'karlp/dma_tidy'
2013-02-18Merge pull request #84 "Pr flash reg rename"Piotr Esden-Tempski
Merge remote-tracking branch 'karlp/pr_flash-reg-rename' Conflicts: include/libopencm3/stm32/l1/flash.h
2013-02-18Merge pull request #79 "More L1 support (and f2/f4 rtc)"Piotr Esden-Tempski
Merge remote-tracking branch 'karlp/pr_more_l1_rtc'
2013-02-18Merging pull request #76 "LM4F clock api"Piotr Esden-Tempski
Merge remote-tracking branch 'mrnuke/lm4f_clock_api'
2013-02-15Fixes #93 copypasta error in RCC_CSR_BORRSTF definition.Piotr Esden-Tempski
2013-02-06[stm32] Use common memorymap include for consistencyKarl Palsson
Most peripheral headers simply include <libopencm3/stm32/memorymap.h> which, like the rest of libopencm3 requires the correct compiler define flag to be set. A few peripherals were directly including the platform include, libopencm3/stm32/xx/memorymap.h, and in some of those cases it wasn't even correctly including the correct platform. (Likely the result of copy/paste errors) These direct includes have been eliminated
2013-01-23[flash] f4: use "proper" bit definition naming.Karl Palsson
Part 4 of 4: updated f4 to use flash_<reg>_bit instead of just flash_bit
2013-01-23[flash] f2: use "proper" bit definition naming.Karl Palsson
Part 3 of 4: updated f2 to use flash_<reg>_bit instead of just flash_bit
2013-01-23[flash] f1: use "proper" bit definition naming.Karl Palsson
Part 2 of 4: updated f1 to use flash_<reg>_bit instead of just flash_bit
2013-01-23[flash] l1: use "proper" bit definition naming.Karl Palsson
Part 1 of 4: updated l1 to use flash_<reg>_bit instead of just flash_bit
2013-01-23Add examples making use of the RTCKarl Palsson
Add an example using the RTC to help with a lower power design. This is a sister example to the existing "button-irq-printf", which is functionally identical, but uses far less power. There's more tricks that can be done to lower the power even further, but this shows a few of the early steps that can be done, using the RTC wakeup instead of a timer.
2013-01-22[stm32] Support the "new" BCD style RTC peripheralKarl Palsson
Add the register definitions and some of the most basic helper functions for the new style BCD RTC module found on the F2, F4, L1, F3 and F0. This tries to keep as close to HACKING_COMMON_DOC as possible, while maintaining sane names.
2013-01-22[l1] rcc: support MSI clockingKarl Palsson
Some new definitions and helpers. Main change really that the list of preconfigured clock configs is no longer restricted to HSI/PLL
2013-01-22[l1] Update to newest ref man definitionsKarl Palsson
Support for the Medium+ and High density parts, mostly by way of extra irqs and register definitions.
2013-01-22[l1] PWR: fix style for common codeKarl Palsson
Code added for L1 to support the PWR Control block didn't properly follow the HACKING_COMMON_DOC guidelines. The naming was wrong, and some headers were missing. This commit has no functional changes, it only addresses the style and structure problems.
2013-01-22[l1] fix whitespace and missing license infoKarl Palsson
Earlier additions to the L1 support were not correctly using linux coding guidelines as specified in /HACKING. Some examples were also missing license information.
2013-01-09Merging pull request #72 DocPiotr Esden-Tempski
Merge remote-tracking branch 'ksarkies/doc' Conflicts: doc/stm32f1/Doxyfile doc/stm32f2/Doxyfile doc/stm32f4/Doxyfile lib/stm32/f1/Makefile lib/stm32/f2/Makefile lib/stm32/f4/Makefile
2013-01-09lm4f: Add API for controlling the system run clock sourcesAlexandru Gagniuc
Add an abstraction layer to handle the clock control for the run time clock on LM4F (RCC). Sleep and deep-sleep clock configuration is not handled. Complete documentation for the clock control API is included in doxygen-style comments, and is included in [doc]. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Conflicts: lib/lm4f/Makefile
2013-01-09lm4f: Add API for enabling/disabling peripherals clock sourceAlexandru Gagniuc
The enum definitions are specified in the form 31:5 register offset from SYSCTL_BASE for the clock register 4:0 bit offset for the given peripheral The names have the form [clock_type]_[periph_type]_[periph_number] Where clock_type is RCC for run clock SCC for sleep clock DCC for deep-sleep clock Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-01-08Minor cleanup to use dispatch memorymap.hKen Sarkies
2013-01-08CRC moved to common areaKen Sarkies
2013-01-08I2C to common areaKen Sarkies
F2/4 has now I2C3 included
2013-01-08IWDG moved to common areaKen Sarkies
2013-01-08Move usart files to common areaKen Sarkies
Again added to L1 which is similar to F1
2013-01-08Move DAC to common areaKen Sarkies
(Note there are now dummy source files dac.c (and others) that are not compiled but are needed for documentation).
2013-01-08STM32: Moved SPI code into the common area.Ken Sarkies
Updated the documentation so that it appears in all families Also added it to the L1 area, but is untested. An addition to the memorymap allows commonality and a #ifdef added to the spi_common_all code to exclude the case of SPI3 for L1 and F0 as SPI3 doesn't exist in those. An rcc dispatch header was added to remove same code from the spi header.
2013-01-08Move STM32F1 DMA files to respective common directoriesKen Sarkies
This sets the stage for adding DMA to STM32F3xx (when added) and STM32L1xx as the controller appears to be identical in these.
2013-01-08STM32 DMA: replaced F4 header to match that for F2, and move header and ↵Ken Sarkies
source files to common. In the header: - Fix DMA_SxCR_CT: change shift from 18 to 19 For use with the convenience functions: - Added DMA_SxCR_CHSEL generic values - Added DMA_STREAM - generic values - Added dma_if_offset - rather than separating out LISR and HISR - Added masks - Added dma_disable_double_buffer_mode()
2013-01-06Merging pull request #74 LM4F initial supportPiotr Esden-Tempski
Merge remote-tracking branch 'mrnuke/lm4f_initial'
2013-01-06Merge pull request #73 RNGPiotr Esden-Tempski
Merge remote-tracking branch 'oojah/master'
2013-01-06Merging pull request #67 L1 support: flash, power basics, timersPiotr Esden-Tempski
Merge remote-tracking branch 'karlp/pr_l1_flash-rcc-pwr-timers'
2013-01-06Merging pull request #64 Various changesPiotr Esden-Tempski
Merge remote-tracking branch 'bgamari/master'
2013-01-06Merging pull request #63 Improvements to STM32F1 I2C, CAN, RCC, and USB (f107)Piotr Esden-Tempski
Merge remote-tracking branch 'icd/master'
2013-01-01lm4f: Add system control register definitionsAlexandru Gagniuc
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2012-12-31lm4f: Compile in the interrupt vector tableAlexandru Gagniuc
Add an "#ifdef(LM4F)" clause to include/libopencm3/dispatch/nvic.h and lib/dispatch/vector_nvic.c. This compiles in the vector table and allows interrupts to be used. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2012-12-31lm4f: Remove erroneous references to lm3sAlexandru Gagniuc
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2012-12-31lm4f: Add lm4f support files copied from lm3sAlexandru Gagniuc
Create lm4f code infrastructure from the lm3s infrastructure. As far as the interrupt table is concerned, don't create an irq.yaml. Just include the LM3S nvic.h. The LM3S vector table seems to be compatible with the LM4F Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2012-12-16Fix trivial typo INTERRPUT -> INTERRUPT.Roger Light
2012-12-12STM32: Move RNG to common area and add support for the F2.Roger Light
2012-12-12Update STM32 RNGEN register bit name to more closely match documentation.Roger Light
2012-11-14stm32/f4/memorymap.h: Fix ADC offsetsBen Gamari
2012-11-14[l1] Add rcc clock setup helper routinesKarl Palsson
Despite the L1 being a low power device, my initial focus is on making it basically compatible with existing devices. To that end, provide clock setup helper routines that configure it for maximum performance, allowing some similar clock speeds to F1 devices to help with testing. This requires adding the power chipset routines to set the voltage range. Clock setup style is similar to the F4 code, which seems nicer than the overflow of different routines used on the F1 code. NOTE: Both the F4 existing pwr code, and this code don't actually include the f1 core power code, even though it should be compatible
2012-11-14[l1] Add PWR register definitionsKarl Palsson
Just the include file.
2012-11-14[l1] Add missing TIM5 bit from newer ref manualKarl Palsson