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-rw-r--r--lib/stm32/f1/Makefile2
-rw-r--r--lib/stm32/f1/desig.c37
-rw-r--r--lib/stm32/f1/rcc.c56
3 files changed, 91 insertions, 4 deletions
diff --git a/lib/stm32/f1/Makefile b/lib/stm32/f1/Makefile
index d598f84..40c109a 100644
--- a/lib/stm32/f1/Makefile
+++ b/lib/stm32/f1/Makefile
@@ -31,7 +31,7 @@ ARFLAGS = rcs
OBJS = vector.o rcc.o gpio.o usart.o adc.o spi.o flash.o nvic.o \
rtc.o i2c.o dma.o systick.o exti.o scb.o ethernet.o \
usb_f103.o usb.o usb_control.o usb_standard.o can.o \
- timer.o usb_f107.o
+ timer.o usb_f107.o desig.o
VPATH += ../../usb:../
diff --git a/lib/stm32/f1/desig.c b/lib/stm32/f1/desig.c
new file mode 100644
index 0000000..7ae968e
--- /dev/null
+++ b/lib/stm32/f1/desig.c
@@ -0,0 +1,37 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2012 Karl Palsson <karlp@ŧweak.net.au>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/f1/desig.h>
+
+u16 desig_get_flash_size(void)
+{
+ return DESIG_FLASH_SIZE;
+}
+
+void desig_get_unique_id(u32 result[])
+{
+ // Could also just return a pointer to the start? read it as they wish?
+ u16 bits15_0 = DESIG_UID_15_0;
+ u32 bits31_16 = DESIG_UID_31_16;
+ u32 bits63_32 = DESIG_UID_63_32;
+ u32 bits95_64 = DESIG_UID_95_64;
+ result[0] = bits95_64;
+ result[1] = bits63_32;
+ result[2] = bits31_16 << 16 | bits15_0;
+}
diff --git a/lib/stm32/f1/rcc.c b/lib/stm32/f1/rcc.c
index d127074..c03153a 100644
--- a/lib/stm32/f1/rcc.c
+++ b/lib/stm32/f1/rcc.c
@@ -1,8 +1,34 @@
+/** @file
+
+@ingroup STM32F1xx
+
+@brief <b>libopencm3 STM32F1xx Reset and Clock Control</b>
+
+@version 1.0.0
+
+@author @htmlonly &copy; @endhtmlonly 2009 Federico Ruiz-Ugalde \<memeruiz at gmail dot com\>
+@author @htmlonly &copy; @endhtmlonly 2009 Uwe Hermann <uwe@hermann-uwe.de>
+@author @htmlonly &copy; @endhtmlonly 2010 Thomas Otto <tommi@viadmin.org>
+
+@date 18 May 2012
+
+This library supports the Reset and Clock
+Control System in the STM32F1xx series of ARM Cortex Microcontrollers
+by ST Microelectronics.
+
+Clock settings and resets for many peripherals are given here rather than in the
+peripheral library.
+
+The library also provides a number of common configurations for the processor
+system clock. Not all possible configurations are given here.
+
+@bugs None known
+
+LGPL License Terms @ref lgpl_license
+ */
/*
* This file is part of the libopencm3 project.
*
- * Copyright (C) 2009 Federico Ruiz-Ugalde <memeruiz at gmail dot com>
- * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
* Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
*
* This library is free software: you can redistribute it and/or modify
@@ -19,13 +45,23 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
+
#include <libopencm3/stm32/f1/rcc.h>
#include <libopencm3/stm32/f1/flash.h>
-/* Set the default ppre1 and ppre2 peripheral clock frequencies after reset. */
+/** Default ppre1 peripheral clock frequency after reset. */
u32 rcc_ppre1_frequency = 8000000;
+/** Default ppre2 peripheral clock frequency after reset. */
u32 rcc_ppre2_frequency = 8000000;
+//-----------------------------------------------------------------------------
+/** @brief RCC Clear the Oscillator Ready Interrupt
+
+Clear the interrupt flag that was set when a clock oscillator became ready to use.
+
+@param[in] enum ::osc_t. Oscillator ID
+*/
+
void rcc_osc_ready_int_clear(osc_t osc)
{
switch (osc) {
@@ -230,6 +266,20 @@ void rcc_osc_bypass_disable(osc_t osc)
}
}
+//-----------------------------------------------------------------------------
+/** @brief RCC Enable a peripheral clock.
+
+Enable the clock on a particular peripheral. Several peripherals could be
+enabled simultaneously if they are controlled by the same register.
+
+@param[in] Unsigned int32 *reg. Pointer to a Clock Enable Register
+ (either RCC_AHBENR, RCC_APB1RENR or RCC_APB2RENR)
+@param[in] Unsigned int32 en. OR of all enables to be set
+@li If register is RCC_AHBER, from @ref rcc_ahbenr_en
+@li If register is RCC_APB1RENR, from @ref rcc_apb1enr_en
+@li If register is RCC_APB2RENR, from @ref rcc_apb2enr_en
+*/
+
void rcc_peripheral_enable_clock(volatile u32 *reg, u32 en)
{
*reg |= en;