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authorStephen Caudle2011-10-28 15:44:29 -0400
committerStephen Caudle2011-10-30 17:42:49 -0400
commitb3a710b0bcc8e765b32cc255dc5047323933d22e (patch)
treeb77acc4dfa1a0b7170121124f0563faac906a0ee /lib/stm32_common
parent3900d16740b790ea2603b8fa7f627da7ff5a9753 (diff)
Rename stm32 lib folders to be consistent with include
Diffstat (limited to 'lib/stm32_common')
-rw-r--r--lib/stm32_common/i2c.c93
-rw-r--r--lib/stm32_common/nvic.c106
-rw-r--r--lib/stm32_common/spi.c298
-rw-r--r--lib/stm32_common/systick.c64
-rw-r--r--lib/stm32_common/usart.c128
5 files changed, 0 insertions, 689 deletions
diff --git a/lib/stm32_common/i2c.c b/lib/stm32_common/i2c.c
deleted file mode 100644
index e1a3b84..0000000
--- a/lib/stm32_common/i2c.c
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <libopencm3/stm32/i2c.h>
-
-void i2c_peripheral_enable(u32 i2c)
-{
- I2C_CR1(i2c) |= I2C_CR1_PE;
-}
-
-void i2c_peripheral_disable(u32 i2c)
-{
- I2C_CR1(i2c) &= ~I2C_CR1_PE;
-}
-
-void i2c_send_start(u32 i2c)
-{
- I2C_CR1(i2c) |= I2C_CR1_START;
-}
-
-void i2c_send_stop(u32 i2c)
-{
- I2C_CR1(i2c) |= I2C_CR1_STOP;
-}
-
-void i2c_set_own_7bit_slave_address(u32 i2c, u8 slave)
-{
- I2C_OAR1(i2c) = (u16)(slave << 1);
- I2C_OAR1(i2c) &= ~I2C_OAR1_ADDMODE;
- I2C_OAR1(i2c) |= (1 << 14); /* Datasheet: always keep 1 by software. */
-}
-
-void i2c_set_own_10bit_slave_address(u32 i2c, u16 slave)
-{
- I2C_OAR1(i2c) = (u16)(I2C_OAR1_ADDMODE | slave);
-}
-
-void i2c_set_fast_mode(u32 i2c)
-{
- I2C_CCR(i2c) |= I2C_CCR_FS;
-}
-
-void i2c_set_standard_mode(u32 i2c)
-{
- I2C_CCR(i2c) &= ~I2C_CCR_FS;
-}
-
-void i2c_set_clock_frequency(u32 i2c, u8 freq)
-{
- u16 reg16;
- reg16 = I2C_CR2(i2c) & 0xffc0; /* Clear bits [5:0]. */
- reg16 |= freq;
- I2C_CR2(i2c) = reg16;
-}
-
-void i2c_set_ccr(u32 i2c, u16 freq)
-{
- u16 reg16;
- reg16 = I2C_CCR(i2c) & 0xf000; /* Clear bits [11:0]. */
- reg16 |= freq;
- I2C_CCR(i2c) = reg16;
-}
-
-void i2c_set_trise(u32 i2c, u16 trise)
-{
- I2C_TRISE(i2c) = trise;
-}
-
-void i2c_send_7bit_address(u32 i2c, u8 slave, u8 readwrite)
-{
- I2C_DR(i2c) = (u8)((slave << 1) | readwrite);
-}
-
-void i2c_send_data(u32 i2c, u8 data)
-{
- I2C_DR(i2c) = data;
-}
diff --git a/lib/stm32_common/nvic.c b/lib/stm32_common/nvic.c
deleted file mode 100644
index cf77cc3..0000000
--- a/lib/stm32_common/nvic.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <libopencm3/stm32/nvic.h>
-
-void nvic_enable_irq(u8 irqn)
-{
- if (irqn < 32)
- NVIC_ISER(0) |= (1 << irqn);
- if ((irqn >= 32) & (irqn < 64))
- NVIC_ISER(1) |= (1 << (irqn - 32));
- if ((irqn >= 64) & (irqn < 68))
- NVIC_ISER(2) |= (1 << (irqn - 64));
-}
-
-void nvic_disable_irq(u8 irqn)
-{
- if (irqn < 32)
- NVIC_ICER(0) |= (1 << irqn);
- if ((irqn >= 32) & (irqn < 64))
- NVIC_ICER(1) |= (1 << (irqn - 32));
- if ((irqn >= 64) & (irqn < 68))
- NVIC_ICER(2) |= (1 << (irqn - 64));
-}
-
-u8 nvic_get_pending_irq(u8 irqn)
-{
- if (irqn < 32)
- return (NVIC_ISPR(0) & (1 << irqn));
- if ((irqn >= 32) & (irqn < 64))
- return (NVIC_ISPR(1) & (1 << (irqn - 32)));
- if ((irqn >= 64) & (irqn < 68))
- return (NVIC_ISPR(2) & (1 << (irqn - 64)));
- return 0;
-}
-
-void nvic_set_pending_irq(u8 irqn)
-{
- if (irqn < 32)
- NVIC_ISPR(0) |= (1 << irqn);
- if ((irqn >= 32) & (irqn < 64))
- NVIC_ISPR(1) |= (1 << (irqn - 32));
- if ((irqn >= 64) & (irqn < 68))
- NVIC_ISPR(2) |= (1 << (irqn - 64));
-}
-
-void nvic_clear_pending_irq(u8 irqn)
-{
- if (irqn < 32)
- NVIC_ICPR(0) |= (1 << irqn);
- if ((irqn >= 32) & (irqn < 64))
- NVIC_ICPR(1) |= (1 << (irqn - 32));
- if ((irqn >= 64) & (irqn < 68))
- NVIC_ICPR(2) |= (1 << (irqn - 64));
-}
-
-u8 nvic_get_active_irq(u8 irqn)
-{
- if (irqn < 32)
- return (NVIC_IABR(0) & (1 << irqn));
- if ((irqn >= 32) & (irqn < 64))
- return (NVIC_IABR(1) & (1 << (irqn - 32)));
- if ((irqn >= 64) & (irqn < 68))
- return (NVIC_IABR(2) & (1 << (irqn - 64)));
- return 0;
-}
-
-u8 nvic_get_irq_enabled(u8 irqn)
-{
- if (irqn < 32)
- return (NVIC_ISER(0) & (1 << irqn));
- if ((irqn >= 32) & (irqn < 64))
- return (NVIC_ISER(1) & (1 << (irqn - 32)));
- if ((irqn >= 64) & (irqn < 68))
- return (NVIC_ISER(2) & (1 << (irqn - 64)));
- return 0;
-}
-
-void nvic_set_priority(u8 irqn, u8 priority)
-{
- NVIC_IPR(irqn/4) |= (priority << ((irqn % 4) * 8));
-}
-
-void nvic_generate_software_interrupt(u8 irqn)
-{
- if (irqn <= 239)
- NVIC_STIR |= irqn;
-}
-
-
diff --git a/lib/stm32_common/spi.c b/lib/stm32_common/spi.c
deleted file mode 100644
index 71bb846..0000000
--- a/lib/stm32_common/spi.c
+++ /dev/null
@@ -1,298 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <libopencm3/stm32/spi.h>
-
-/*
- * SPI and I2S code.
- *
- * Examples:
- * spi_init_master(SPI1, 1000000, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
- * SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT,
- * SPI_CR1_LSBFIRST);
- * spi_write(SPI1, 0x55); // 8-bit write
- * spi_write(SPI1, 0xaa88); // 16-bit write
- * reg8 = spi_read(SPI1); // 8-bit read
- * reg16 = spi_read(SPI1); // 16-bit read
- */
-
-int spi_init_master(u32 spi, u32 br, u32 cpol, u32 cpha, u32 dff, u32 lsbfirst)
-{
- u32 reg32 = 0;
-
- reg32 |= SPI_CR1_MSTR; /* Configure SPI as master. */
-
- reg32 |= br; /* Set BAUD rate bits. */
- reg32 |= cpol; /* Set CPOL value. */
- reg32 |= cpha; /* Set CPHA value. */
- reg32 |= dff; /* Set data format (8 or 16 bits). */
- reg32 |= lsbfirst; /* Set frame format (LSB- or MSB-first). */
-
- /* TODO: NSS pin handling. */
-
- SPI_CR1(spi) = reg32;
-
- return 0; /* TODO */
-}
-
-/* TODO: Error handling? */
-void spi_enable(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_SPE; /* Enable SPI. */
-}
-
-/* TODO: Error handling? */
-void spi_disable(u32 spi)
-{
- u32 reg32;
-
- /* TODO: Follow procedure from section 23.3.8 in the techref manual. */
- reg32 = SPI_CR1(spi);
- reg32 &= ~(SPI_CR1_SPE); /* Disable SPI. */
- SPI_CR1(spi) = reg32;
-}
-
-void spi_write(u32 spi, u16 data)
-{
- /* Write data (8 or 16 bits, depending on DFF) into DR. */
- SPI_DR(spi) = data;
-}
-
-void spi_send(u32 spi, u16 data)
-{
- /* wait for transfer finished */
- while (!(SPI_SR(spi) & SPI_SR_TXE ));
-
- /* Write data (8 or 16 bits, depending on DFF) into DR. */
- SPI_DR(spi) = data;
-}
-
-u16 spi_read(u32 spi)
-{
- /* wait for transfer finished */
- while (!(SPI_SR(spi) & SPI_SR_RXNE ));
-
- /* Read the data (8 or 16 bits, depending on DFF bit) from DR. */
- return SPI_DR(spi);
-}
-
-u16 spi_xfer(u32 spi, u16 data)
-{
- spi_write(spi, data);
-
- /* wait for transfer finished */
- while (!(SPI_SR(spi) & SPI_SR_RXNE ));
-
- /* Read the data (8 or 16 bits, depending on DFF bit) from DR. */
- return SPI_DR(spi);
-}
-
-void spi_set_bidirectional_mode(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_BIDIMODE;
-}
-
-void spi_set_unidirectional_mode(u32 spi)
-{
- SPI_CR1(spi) &= ~SPI_CR1_BIDIMODE;
-}
-
-void spi_set_bidirectional_receive_only_mode(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_BIDIMODE;
- SPI_CR1(spi) &= ~SPI_CR1_BIDIOE;
-}
-
-void spi_set_bidirectional_transmit_only_mode(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_BIDIMODE;
- SPI_CR1(spi) |= SPI_CR1_BIDIOE;
-}
-
-void spi_enable_crc(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_CRCEN;
-}
-
-void spi_disable_crc(u32 spi)
-{
- SPI_CR1(spi) &= ~SPI_CR1_CRCEN;
-}
-
-void spi_set_next_tx_from_buffer(u32 spi)
-{
- SPI_CR1(spi) &= ~SPI_CR1_CRCNEXT;
-}
-
-void spi_set_next_tx_from_crc(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_CRCNEXT;
-}
-
-void spi_set_dff_8bit(u32 spi)
-{
- SPI_CR1(spi) &= ~SPI_CR1_DFF;
-}
-
-void spi_set_dff_16bit(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_DFF;
-}
-
-void spi_set_full_duplex_mode(u32 spi)
-{
- SPI_CR1(spi) &= ~SPI_CR1_RXONLY;
-}
-
-void spi_set_receive_only_mode(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_RXONLY;
-}
-
-void spi_disable_software_slave_management(u32 spi)
-{
- SPI_CR1(spi) &= ~SPI_CR1_SSM;
-}
-
-void spi_enable_software_slave_management(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_SSM;
-}
-
-void spi_set_nss_high(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_SSI;
-}
-
-void spi_set_nss_low(u32 spi)
-{
- SPI_CR1(spi) &= ~SPI_CR1_SSI;
-}
-
-void spi_send_lsb_first(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_LSBFIRST;
-}
-
-void spi_send_msb_first(u32 spi)
-{
- SPI_CR1(spi) &= ~SPI_CR1_LSBFIRST;
-}
-
-void spi_set_baudrate_prescaler(u32 spi, u8 baudrate)
-{
- u32 reg32;
-
- if (baudrate > 7)
- return;
-
- reg32 = ( SPI_CR1(spi) & 0xffc7 ); /* clear bits [5:3] */
- reg32 |= (baudrate << 3);
- SPI_CR1(spi) = reg32;
-}
-
-void spi_set_master_mode(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_MSTR;
-}
-
-void spi_set_slave_mode(u32 spi)
-{
- SPI_CR1(spi) &= ~SPI_CR1_MSTR;
-}
-
-void spi_set_clock_polarity_1(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_CPOL;
-}
-
-void spi_set_clock_polarity_0(u32 spi)
-{
- SPI_CR1(spi) &= ~SPI_CR1_CPOL;
-}
-
-void spi_set_clock_phase_1(u32 spi)
-{
- SPI_CR1(spi) |= SPI_CR1_CPHA;
-}
-
-void spi_set_clock_phase_0(u32 spi)
-{
- SPI_CR1(spi) &= ~SPI_CR1_CPHA;
-}
-
-void spi_enable_tx_buffer_empty_interrupt(u32 spi)
-{
- SPI_CR2(spi) |= SPI_CR2_TXEIE;
-}
-
-void spi_disable_tx_buffer_empty_interrupt(u32 spi)
-{
- SPI_CR2(spi) &= ~SPI_CR2_TXEIE;
-}
-
-void spi_enable_rx_buffer_not_empty_interrupt(u32 spi)
-{
- SPI_CR2(spi) |= SPI_CR2_RXNEIE;
-}
-
-void spi_disable_rx_buffer_not_empty_interrupt(u32 spi)
-{
- SPI_CR2(spi) &= ~SPI_CR2_RXNEIE;
-}
-
-void spi_enable_error_interrupt(u32 spi)
-{
- SPI_CR2(spi) |= SPI_CR2_ERRIE;
-}
-
-void spi_disable_error_interrupt(u32 spi)
-{
- SPI_CR2(spi) &= ~SPI_CR2_ERRIE;
-}
-
-void spi_enable_ss_output(u32 spi)
-{
- SPI_CR2(spi) |= SPI_CR2_SSOE;
-}
-
-void spi_disable_ss_output(u32 spi)
-{
- SPI_CR2(spi) &= ~SPI_CR2_SSOE;
-}
-
-void spi_enable_tx_dma(u32 spi)
-{
- SPI_CR2(spi) |= SPI_CR2_TXDMAEN;
-}
-
-void spi_disable_tx_dma(u32 spi)
-{
- SPI_CR2(spi) &= ~SPI_CR2_TXDMAEN;
-}
-
-void spi_enable_rx_dma(u32 spi)
-{
- SPI_CR2(spi) |= SPI_CR2_RXDMAEN;
-}
-
-void spi_disable_rx_dma(u32 spi)
-{
- SPI_CR2(spi) &= ~SPI_CR2_RXDMAEN;
-}
diff --git a/lib/stm32_common/systick.c b/lib/stm32_common/systick.c
deleted file mode 100644
index 882601d..0000000
--- a/lib/stm32_common/systick.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <libopencm3/stm32/systick.h>
-
-void systick_set_reload(u32 value)
-{
- STK_LOAD = (value & 0x00FFFFFF);
-}
-
-u32 systick_get_value(void)
-{
- return STK_VAL;
-}
-
-void systick_set_clocksource(u8 clocksource)
-{
- if (clocksource < 2)
- STK_CTRL |= (clocksource << STK_CTRL_CLKSOURCE_LSB);
-}
-
-void systick_interrupt_enable(void)
-{
- STK_CTRL |= STK_CTRL_TICKINT;
-}
-
-void systick_interrupt_disable(void)
-{
- STK_CTRL &= ~STK_CTRL_TICKINT;
-}
-
-void systick_counter_enable(void)
-{
- STK_CTRL |= STK_CTRL_ENABLE;
-}
-
-void systick_counter_disable(void)
-{
- STK_CTRL &= ~STK_CTRL_ENABLE;
-}
-
-u8 systick_get_countflag(void)
-{
- if (STK_CTRL & STK_CTRL_COUNTFLAG)
- return 1;
- else
- return 0;
-}
diff --git a/lib/stm32_common/usart.c b/lib/stm32_common/usart.c
deleted file mode 100644
index 116b159..0000000
--- a/lib/stm32_common/usart.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <libopencm3/stm32/usart.h>
-
-void usart_set_baudrate(u32 usart, u32 baud, u32 clock)
-{
- //u32 clock = rcc_ppre1_frequency;
-
- //if (usart == USART1) {
- // clock = rcc_ppre2_frequency;
- //}
-
- /* yes it is as simple as that. The reference manual is
- * talking about factional calculation but it seems to be only
- * marketting bable to sound awesome. It is nothing else but a
- * simple divider to generate the correct baudrate. >_< If I
- * am wrong feel free to correct me on that. :) (esden)
- */
- USART_BRR(usart) = clock/baud;
-}
-
-void usart_set_databits(u32 usart, u32 bits)
-{
- if (bits == 8)
- USART_CR1(usart) &= ~USART_CR1_M; /* 8 data bits */
- else
- USART_CR1(usart) |= USART_CR1_M; /* 9 data bits */
-}
-
-void usart_set_stopbits(u32 usart, u32 stopbits)
-{
- u32 reg32;
-
- reg32 = USART_CR2(usart);
- reg32 = (reg32 & ~USART_CR2_STOPBITS_MASK) | stopbits;
- USART_CR2(usart) = reg32;
-}
-
-void usart_set_parity(u32 usart, u32 parity)
-{
- u32 reg32;
-
- reg32 = USART_CR1(usart);
- reg32 = (reg32 & ~USART_PARITY_MASK) | parity;
- USART_CR1(usart) = reg32;
-}
-
-void usart_set_mode(u32 usart, u32 mode)
-{
- u32 reg32;
-
- reg32 = USART_CR1(usart);
- reg32 = (reg32 & ~USART_MODE_MASK) | mode;
- USART_CR1(usart) = reg32;
-}
-
-void usart_set_flow_control(u32 usart, u32 flowcontrol)
-{
- u32 reg32;
-
- reg32 = USART_CR3(usart);
- reg32 = (reg32 & ~USART_FLOWCONTROL_MASK) | flowcontrol;
- USART_CR3(usart) = reg32;
-}
-
-void usart_enable(u32 usart)
-{
- USART_CR1(usart) |= USART_CR1_UE;
-}
-
-void usart_disable(u32 usart)
-{
- USART_CR1(usart) &= ~USART_CR1_UE;
-}
-
-void usart_send(u32 usart, u16 data)
-{
- /* Send data. */
- USART_DR(usart) = (data & USART_DR_MASK);
-}
-
-u16 usart_recv(u32 usart)
-{
- /* Receive data. */
- return USART_DR(usart) & USART_DR_MASK;
-}
-
-void usart_wait_send_ready(u32 usart)
-{
- /* Wait until the data has been transferred into the shift register. */
- while ((USART_SR(usart) & USART_SR_TXE) == 0);
-}
-
-void usart_wait_recv_ready(u32 usart)
-{
- /* Wait until the data is ready to be received. */
- while ((USART_SR(usart) & USART_SR_RXNE) == 0);
-}
-
-void usart_send_blocking(u32 usart, u16 data)
-{
- usart_wait_send_ready(usart);
- usart_send(usart, data);
-}
-
-u16 usart_recv_blocking(u32 usart)
-{
- usart_wait_recv_ready(usart);
-
- return usart_recv(usart);
-}