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authorPiotr Esden-Tempski2012-02-29 12:02:36 -0800
committerPiotr Esden-Tempski2012-02-29 12:02:36 -0800
commit20c5e56234167e53abbeb77624b351e350f1e3b5 (patch)
tree1c54b51c93e0aeafc686ad02d8a63a512d8f1b2c /lib/stm32/spi.c
parentc49f505df4205e166a184de8063eb1702813cf46 (diff)
Fixed spi convenience reset function to compile properly.
Diffstat (limited to 'lib/stm32/spi.c')
-rw-r--r--lib/stm32/spi.c17
1 files changed, 13 insertions, 4 deletions
diff --git a/lib/stm32/spi.c b/lib/stm32/spi.c
index c97837c..175b182 100644
--- a/lib/stm32/spi.c
+++ b/lib/stm32/spi.c
@@ -18,6 +18,15 @@
*/
#include <libopencm3/stm32/spi.h>
+#if defined(STM32F1)
+# include <libopencm3/stm32/f1/rcc.h>
+#elif defined(STM32F2)
+# include <libopencm3/stm32/f2/rcc.h>
+#elif defined(STM32F4)
+# include <libopencm3/stm32/f4/rcc.h>
+#else
+# error "stm32 family not defined."
+#endif
/*
* SPI and I2S code.
@@ -40,12 +49,12 @@ void spi_reset(u32 spi_peripheral)
rcc_peripheral_clear_reset(&RCC_APB2RSTR, RCC_APB2RSTR_SPI1RST);
break;
case SPI2:
- rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB2RSTR_SPI2RST);
- rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB2RSTR_SPI2RST);
+ rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1RSTR_SPI2RST);
+ rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1RSTR_SPI2RST);
break;
case SPI3:
- rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB2RSTR_SPI3RST);
- rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB2RSTR_SPI3RST);
+ rcc_peripheral_reset(&RCC_APB1RSTR, RCC_APB1RSTR_SPI3RST);
+ rcc_peripheral_clear_reset(&RCC_APB1RSTR, RCC_APB1RSTR_SPI3RST);
break;
}
}