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authorUwe Hermann2010-12-30 02:12:31 +0100
committerUwe Hermann2010-12-30 02:12:31 +0100
commit8e084b1517088036e3db9bbd255b1c231cd2a108 (patch)
tree3951e9861d36a8007e71a41d432329ca63cd81bf /lib/stm32/nvic.c
parentbcce98da54b047a15ef0abf41e0c7794f29f0439 (diff)
Move STM32-specific source to lib/stm32 subdir.
Diffstat (limited to 'lib/stm32/nvic.c')
-rw-r--r--lib/stm32/nvic.c106
1 files changed, 106 insertions, 0 deletions
diff --git a/lib/stm32/nvic.c b/lib/stm32/nvic.c
new file mode 100644
index 0000000..4dffe45
--- /dev/null
+++ b/lib/stm32/nvic.c
@@ -0,0 +1,106 @@
+/*
+ * This file is part of the libopenstm32 project.
+ *
+ * Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopenstm32/nvic.h>
+
+void nvic_enable_irq(u8 irqn)
+{
+ if (irqn < 32)
+ NVIC_ISER(0) |= (1 << irqn);
+ if ((irqn >= 32) & (irqn < 64))
+ NVIC_ISER(1) |= (1 << (irqn - 32));
+ if ((irqn >= 64) & (irqn < 68))
+ NVIC_ISER(2) |= (1 << (irqn - 64));
+}
+
+void nvic_disable_irq(u8 irqn)
+{
+ if (irqn < 32)
+ NVIC_ICER(0) |= (1 << irqn);
+ if ((irqn >= 32) & (irqn < 64))
+ NVIC_ICER(1) |= (1 << (irqn - 32));
+ if ((irqn >= 64) & (irqn < 68))
+ NVIC_ICER(2) |= (1 << (irqn - 64));
+}
+
+u8 nvic_get_pending_irq(u8 irqn)
+{
+ if (irqn < 32)
+ return (NVIC_ISPR(0) & (1 << irqn));
+ if ((irqn >= 32) & (irqn < 64))
+ return (NVIC_ISPR(1) & (1 << (irqn - 32)));
+ if ((irqn >= 64) & (irqn < 68))
+ return (NVIC_ISPR(2) & (1 << (irqn - 64)));
+ return 0;
+}
+
+void nvic_set_pending_irq(u8 irqn)
+{
+ if (irqn < 32)
+ NVIC_ISPR(0) |= (1 << irqn);
+ if ((irqn >= 32) & (irqn < 64))
+ NVIC_ISPR(1) |= (1 << (irqn - 32));
+ if ((irqn >= 64) & (irqn < 68))
+ NVIC_ISPR(2) |= (1 << (irqn - 64));
+}
+
+void nvic_clear_pending_irq(u8 irqn)
+{
+ if (irqn < 32)
+ NVIC_ICPR(0) |= (1 << irqn);
+ if ((irqn >= 32) & (irqn < 64))
+ NVIC_ICPR(1) |= (1 << (irqn - 32));
+ if ((irqn >= 64) & (irqn < 68))
+ NVIC_ICPR(2) |= (1 << (irqn - 64));
+}
+
+u8 nvic_get_active_irq(u8 irqn)
+{
+ if (irqn < 32)
+ return (NVIC_IABR(0) & (1 << irqn));
+ if ((irqn >= 32) & (irqn < 64))
+ return (NVIC_IABR(1) & (1 << (irqn - 32)));
+ if ((irqn >= 64) & (irqn < 68))
+ return (NVIC_IABR(2) & (1 << (irqn - 64)));
+ return 0;
+}
+
+u8 nvic_get_irq_enabled(u8 irqn)
+{
+ if (irqn < 32)
+ return (NVIC_ISER(0) & (1 << irqn));
+ if ((irqn >= 32) & (irqn < 64))
+ return (NVIC_ISER(1) & (1 << (irqn - 32)));
+ if ((irqn >= 64) & (irqn < 68))
+ return (NVIC_ISER(2) & (1 << (irqn - 64)));
+ return 0;
+}
+
+void nvic_set_priority(u8 irqn, u8 priority)
+{
+ NVIC_IPR(irqn/4) |= (priority << ((irqn % 4) * 8));
+}
+
+void nvic_generate_software_interrupt(u8 irqn)
+{
+ if (irqn <= 239)
+ NVIC_STIR |= irqn;
+}
+
+