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authorPiotr Esden-Tempski2013-02-18 14:09:31 -0800
committerPiotr Esden-Tempski2013-02-18 14:09:31 -0800
commit6eef01ce26243184c04a0f8e8409912d8924a14c (patch)
treed585ac23f1482edc1544c794cf5e4f7b2171d13a /lib/stm32/l1/rcc.c
parentf980f197ca17c324089f8650fee9df081e5502e6 (diff)
parent40d9d630f0769a374ddc12616323dc6a94f02b7f (diff)
Merge pull request #84 "Pr flash reg rename"
Merge remote-tracking branch 'karlp/pr_flash-reg-rename' Conflicts: include/libopencm3/stm32/l1/flash.h
Diffstat (limited to 'lib/stm32/l1/rcc.c')
-rw-r--r--lib/stm32/l1/rcc.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/stm32/l1/rcc.c b/lib/stm32/l1/rcc.c
index 9b2df24..a6078c9 100644
--- a/lib/stm32/l1/rcc.c
+++ b/lib/stm32/l1/rcc.c
@@ -39,7 +39,7 @@ const clock_scale_t clock_config[CLOCK_CONFIG_END] =
.ppre1 = RCC_CFGR_PPRE1_HCLK_NODIV,
.ppre2 = RCC_CFGR_PPRE2_HCLK_NODIV,
.voltage_scale = RANGE1,
- .flash_config = FLASH_LATENCY_1WS,
+ .flash_config = FLASH_ACR_LATENCY_1WS,
.apb1_frequency = 24000000,
.apb2_frequency = 24000000,
},
@@ -51,7 +51,7 @@ const clock_scale_t clock_config[CLOCK_CONFIG_END] =
.ppre1 = RCC_CFGR_PPRE1_HCLK_NODIV,
.ppre2 = RCC_CFGR_PPRE2_HCLK_NODIV,
.voltage_scale = RANGE1,
- .flash_config = FLASH_LATENCY_1WS,
+ .flash_config = FLASH_ACR_LATENCY_1WS,
.apb1_frequency = 32000000,
.apb2_frequency = 32000000,
},
@@ -60,7 +60,7 @@ const clock_scale_t clock_config[CLOCK_CONFIG_END] =
.ppre1 = RCC_CFGR_PPRE1_HCLK_NODIV,
.ppre2 = RCC_CFGR_PPRE2_HCLK_NODIV,
.voltage_scale = RANGE1,
- .flash_config = FLASH_LATENCY_0WS,
+ .flash_config = FLASH_ACR_LATENCY_0WS,
.apb1_frequency = 16000000,
.apb2_frequency = 16000000,
},