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authorchrysn2012-10-18 13:30:19 +0200
committerchrysn2012-10-18 13:31:17 +0200
commit172ce56e3cbc7e64fd3e6a3dc564eb10e0ca766a (patch)
treeb26153bbc41374e35370214a765b87b25bc01c33 /lib/lpc43xx
parent7c33025c318bcc43cfcd3a23a76d14b299fecc0a (diff)
parent94ce82396bd69dfde8807dad27e23f30913247aa (diff)
nvic unification
* created include/libopencm3/cm3/nvic.h from the respective stm32 and lpc43xx files. the chip specific definitions were left in place (they were already split out in sthe stm32 case). * created lib/cm3/nvic.c from the respective stm32 and lpc43xx files. a hack from the lpc43xx was taken over (for manipulating the internal interrupts); for now it'll work. * created a include/libopencm3/dispatch/ directory where the dispatching of files with common interfaces but different implenentations can happen; for now, an nvic.h there includes the respective irq name definitions. (future implementations might have some automation or preprocessor magic there; so far, it's manual dispatching based on defines.) * for efm32, an nvic.h gets generated from an interrupt list, the rationale for code generation is, in this case, that this can't be done easily in c preprocessor, and it's really just a list of definitions and not code proper. * examples now include <libopencm3/cm3/nvic.h> instead of <libopencm3/stm32/nvic.h>
Diffstat (limited to 'lib/lpc43xx')
-rw-r--r--lib/lpc43xx/nvic.c76
1 files changed, 0 insertions, 76 deletions
diff --git a/lib/lpc43xx/nvic.c b/lib/lpc43xx/nvic.c
deleted file mode 100644
index 4793312..0000000
--- a/lib/lpc43xx/nvic.c
+++ /dev/null
@@ -1,76 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
- * Copyright (C) 2012 Fergus Noble <fergusnoble@gmail.com>
- * Copyright (C) 2012 Benjamin Vernoux <titanmkd@gmail.com>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-#include <libopencm3/cm3/scs.h>
-#include <libopencm3/lpc43xx/nvic.h>
-
-void nvic_enable_irq(u8 irqn)
-{
- NVIC_ISER(irqn / 32) = (1 << (irqn % 32));
-}
-
-void nvic_disable_irq(u8 irqn)
-{
- NVIC_ICER(irqn / 32) = (1 << (irqn % 32));
-}
-
-u8 nvic_get_pending_irq(u8 irqn)
-{
- return NVIC_ISPR(irqn / 32) & (1 << (irqn % 32)) ? 1 : 0;
-}
-
-void nvic_set_pending_irq(u8 irqn)
-{
- NVIC_ISPR(irqn / 32) = (1 << (irqn % 32));
-}
-
-void nvic_clear_pending_irq(u8 irqn)
-{
- NVIC_ICPR(irqn / 32) = (1 << (irqn % 32));
-}
-
-u8 nvic_get_active_irq(u8 irqn)
-{
- return NVIC_IABR(irqn / 32) & (1 << (irqn % 32)) ? 1 : 0;
-}
-
-u8 nvic_get_irq_enabled(u8 irqn)
-{
- return NVIC_ISER(irqn / 32) & (1 << (irqn % 32)) ? 1 : 0;
-}
-
-void nvic_set_priority(u8 irqn, u8 priority)
-{
- if(irqn>NVIC_M4_QEI_IRQ)
- {
- /* Cortex-M system interrupts */
- SCS_SHPR( (irqn&0xF)-4 ) = priority;
- }else
- {
- /* Device specific interrupts */
- NVIC_IPR(irqn) = priority;
- }
-}
-
-void nvic_generate_software_interrupt(u8 irqn)
-{
- if (irqn <= 239)
- NVIC_STIR |= irqn;
-}