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authorUwe Hermann2011-10-29 22:19:12 +0200
committerUwe Hermann2011-10-29 22:19:12 +0200
commit788f3870c430b6e4ce7ae55bfa263cd66c1c7b37 (patch)
treeb8d95301a35b074bc78211c3329c47d7ddfb719a /include/libopencm3/stm32/f2/pwr.h
parent17d80aa5a4a3f32d28d94bcaedc45eca45ed5441 (diff)
parentfd2524beb0b0ace785c1aceb05b971d2aa902fde (diff)
Merge remote-tracking branch 'fnoble/stm32f2'
Diffstat (limited to 'include/libopencm3/stm32/f2/pwr.h')
-rw-r--r--include/libopencm3/stm32/f2/pwr.h40
1 files changed, 40 insertions, 0 deletions
diff --git a/include/libopencm3/stm32/f2/pwr.h b/include/libopencm3/stm32/f2/pwr.h
new file mode 100644
index 0000000..7cf8dab
--- /dev/null
+++ b/include/libopencm3/stm32/f2/pwr.h
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBOPENCM3_PWR_F2_H
+#define LIBOPENCM3_PWR_F2_H
+
+#include <libopencm3/stm32/pwr.h>
+
+/*
+ * This file extends the version in stm_common with definitions only
+ * applicable to the STM32F2 series of devices.
+ */
+
+/* --- PWR_CR values ------------------------------------------------------- */
+
+/* FPDS: Flash power down in stop mode, only available in F2 family devices. */
+#define PWR_CR_FPDS (1 << 9)
+
+/* --- PWR_CSR values ------------------------------------------------------ */
+
+/* BRE: Backup regulator enable */
+#define PWR_CSR_BRE (1 << 9)
+
+#endif