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authorPiotr Esden-Tempski2012-02-13 16:02:08 -0800
committerPiotr Esden-Tempski2012-02-13 16:02:08 -0800
commit5a384ff895628eeea97ec79e298be443767b5899 (patch)
tree8db8c9bd1b83e5ff2ebda4c51332f1898140b58b /include/libopencm3/stm32/f1/gpio.h
parentb325c81127ec39db26dda720e20bdcbc394a0934 (diff)
Added combined gpio bank definitions to timers as you tend to set those up in bulk.
Diffstat (limited to 'include/libopencm3/stm32/f1/gpio.h')
-rw-r--r--include/libopencm3/stm32/f1/gpio.h18
1 files changed, 16 insertions, 2 deletions
diff --git a/include/libopencm3/stm32/f1/gpio.h b/include/libopencm3/stm32/f1/gpio.h
index 4c7f2d8..9f63628 100644
--- a/include/libopencm3/stm32/f1/gpio.h
+++ b/include/libopencm3/stm32/f1/gpio.h
@@ -150,11 +150,13 @@
#define GPIO_BANK_TIM4_CH2 GPIOB /* PB7 */
#define GPIO_BANK_TIM4_CH3 GPIOB /* PB8 */
#define GPIO_BANK_TIM4_CH4 GPIOB /* PB9 */
+#define GPIO_BANK_TIM4 GPIOB
#define GPIO_BANK_TIM4_RE_CH1 GPIOD /* PD12 */
#define GPIO_BANK_TIM4_RE_CH2 GPIOD /* PD13 */
#define GPIO_BANK_TIM4_RE_CH3 GPIOD /* PD14 */
#define GPIO_BANK_TIM4_RE_CH4 GPIOD /* PD15 */
+#define GPIO_BANK_TIM4_RE GPIOD
/* Timer3 GPIO */
#define GPIO_TIM3_CH1 GPIO6 /* PA6 */
@@ -177,20 +179,23 @@
#define GPIO_BANK_TIM3_CH2 GPIOA /* PA7 */
#define GPIO_BANK_TIM3_CH3 GPIOB /* PB0 */
#define GPIO_BANK_TIM3_CH4 GPIOB /* PB1 */
+#define GPIO_BANK_TIM3_CH12 GPIOA
+#define GPIO_BANK_TIM3_CH34 GPIOB
#define GPIO_BANK_TIM3_PR_CH1 GPIOB /* PB4 */
#define GPIO_BANK_TIM3_PR_CH2 GPIOB /* PB5 */
#define GPIO_BANK_TIM3_PR_CH3 GPIOB /* PB0 */
#define GPIO_BANK_TIM3_PR_CH4 GPIOB /* PB1 */
+#define GPIO_BANK_TIM3_PR GPIOB
#define GPIO_BANK_TIM3_FR_CH1 GPIOC /* PC6 */
#define GPIO_BANK_TIM3_FR_CH2 GPIOC /* PC7 */
#define GPIO_BANK_TIM3_FR_CH3 GPIOC /* PC8 */
#define GPIO_BANK_TIM3_FR_CH4 GPIOC /* PC9 */
+#define GPIO_BANK_TIM3_FR GPIOC
/* Timer2 GPIO */
#define GPIO_TIM2_CH1_ETR GPIO0 /* PA0 */
-#define GPIO_BANK_TIM2_CH1_ETR GPIOA /* PA0 */
#define GPIO_TIM2_CH2 GPIO1 /* PA1 */
#define GPIO_TIM2_CH3 GPIO2 /* PA2 */
#define GPIO_TIM2_CH4 GPIO3 /* PA3 */
@@ -212,25 +217,29 @@
/* Timer2 BANK */
#define GPIO_BANK_TIM2_CH1_ETR GPIOA /* PA0 */
-#define GPIO_BANK_TIM2_CH1_ETR GPIOA /* PA0 */
#define GPIO_BANK_TIM2_CH2 GPIOA /* PA1 */
#define GPIO_BANK_TIM2_CH3 GPIOA /* PA2 */
#define GPIO_BANK_TIM2_CH4 GPIOA /* PA3 */
+#define GPIO_BANK_TIM2 GPIOA
#define GPIO_BANK_TIM2_PR1_CH1_ETR GPIOA /* PA15 */
#define GPIO_BANK_TIM2_PR1_CH2 GPIOB /* PB3 */
#define GPIO_BANK_TIM2_PR1_CH3 GPIOA /* PA2 */
#define GPIO_BANK_TIM2_PR1_CH4 GPIOA /* PA3 */
+#define GPIO_BANK_TIM2_PR1_CH134 GPIOA
#define GPIO_BANK_TIM2_PR2_CH1_ETR GPIOA /* PA0 */
#define GPIO_BANK_TIM2_PR2_CH2 GPIOA /* PA1 */
#define GPIO_BANK_TIM2_PR2_CH3 GPIOB /* PB10 */
#define GPIO_BANK_TIM2_PR2_CH4 GPIOB /* PB11 */
+#define GPIO_BANK_TIM2_PR2_CH12 GPIOA
+#define GPIO_BANK_TIM2_PR2_CH34 GPIOB
#define GPIO_BANK_TIM2_FR_CH1_ETR GPIOA /* PA15 */
#define GPIO_BANK_TIM2_FR_CH2 GPIOB /* PB3 */
#define GPIO_BANK_TIM2_FR_CH3 GPIOB /* PB10 */
#define GPIO_BANK_TIM2_FR_CH4 GPIOB /* PB11 */
+#define GPIO_BANK_TIM2_FR_CH234 GPIOB
/* Timer1 GPIO */
#define GPIO_TIM1_ETR GPIO12 /* PA12 */
@@ -273,6 +282,8 @@
#define GPIO_BANK_TIM1_CH1N GPIOB /* PB13 */
#define GPIO_BANK_TIM1_CH2N GPIOB /* PB14 */
#define GPIO_BANK_TIM1_CH3N GPIOB /* PB15 */
+#define GPIO_BANK_TIM1_ETR_CH1234 GPIOA
+#define GPIO_BANK_TIM1_BKIN_CH123N GPIOB
#define GPIO_BANK_TIM1_PR_ETR GPIOA /* PA12 */
#define GPIO_BANK_TIM1_PR_CH1 GPIOA /* PA8 */
@@ -283,6 +294,8 @@
#define GPIO_BANK_TIM1_PR_CH1N GPIOA /* PA7 */
#define GPIO_BANK_TIM1_PR_CH2N GPIOB /* PB0 */
#define GPIO_BANK_TIM1_PR_CH3N GPIOB /* PB1 */
+#define GPIO_BANK_TIM1_PR_ETR_CH1234_BKIN_CH1N GPIOA
+#define GPIO_BANK_TIM1_PR_CH23N GPIOB
#define GPIO_BANK_TIM1_FR_ETR GPIOE /* PE7 */
#define GPIO_BANK_TIM1_FR_CH1 GPIOE /* PE9 */
@@ -293,6 +306,7 @@
#define GPIO_BANK_TIM1_FR_CH1N GPIOE /* PE8 */
#define GPIO_BANK_TIM1_FR_CH2N GPIOE /* PE10 */
#define GPIO_BANK_TIM1_FR_CH3N GPIOE /* PE12 */
+#define GPIO_BANK_TIM1_FR GPIOE
/* UART5 GPIO */
#define GPIO_UART5_TX GPIO12 /* PC12 */