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authorAlexandru Gagniuc2012-11-21 20:39:36 -0600
committerAlexandru Gagniuc2012-12-31 01:35:25 -0600
commit326c945b55d6dd1cf153c6ca8715685a968b1384 (patch)
tree3b418fbc7f7894218120b43f1cf714d05ed42fd2 /include/libopencm3/lm4f/gpio.h
parent70746ccd676445481511c0e8bc6b617f7b052878 (diff)
lm4f: Add lm4f support files copied from lm3s
Create lm4f code infrastructure from the lm3s infrastructure. As far as the interrupt table is concerned, don't create an irq.yaml. Just include the LM3S nvic.h. The LM3S vector table seems to be compatible with the LM4F Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'include/libopencm3/lm4f/gpio.h')
-rw-r--r--include/libopencm3/lm4f/gpio.h79
1 files changed, 79 insertions, 0 deletions
diff --git a/include/libopencm3/lm4f/gpio.h b/include/libopencm3/lm4f/gpio.h
new file mode 100644
index 0000000..5296b74
--- /dev/null
+++ b/include/libopencm3/lm4f/gpio.h
@@ -0,0 +1,79 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LM3S_GPIO_H
+#define LM3S_GPIO_H
+
+#include <libopencm3/cm3/common.h>
+#include <libopencm3/lm3s/memorymap.h>
+
+/* --- Convenience macros -------------------------------------------------- */
+
+/* GPIO port base addresses (for convenience) */
+#define GPIOA GPIOA_APB_BASE
+#define GPIOB GPIOB_APB_BASE
+#define GPIOC GPIOC_APB_BASE
+#define GPIOD GPIOD_APB_BASE
+#define GPIOE GPIOE_APB_BASE
+#define GPIOF GPIOF_APB_BASE
+#define GPIOG GPIOG_APB_BASE
+#define GPIOH GPIOH_APB_BASE
+
+/* GPIO number definitions (for convenience) */
+#define GPIO0 (1 << 0)
+#define GPIO1 (1 << 1)
+#define GPIO2 (1 << 2)
+#define GPIO3 (1 << 3)
+#define GPIO4 (1 << 4)
+#define GPIO5 (1 << 5)
+#define GPIO6 (1 << 6)
+#define GPIO7 (1 << 7)
+
+/* --- GPIO registers ------------------------------------------------------ */
+
+#define GPIO_DATA(port) ((volatile u32 *)(port + 0x000))
+#define GPIO_DIR(port) MMIO32(port + 0x400)
+#define GPIO_IS(port) MMIO32(port + 0x404)
+#define GPIO_IBE(port) MMIO32(port + 0x408)
+#define GPIO_IEV(port) MMIO32(port + 0x40c)
+#define GPIO_IM(port) MMIO32(port + 0x410)
+#define GPIO_RIS(port) MMIO32(port + 0x414)
+#define GPIO_MIS(port) MMIO32(port + 0x418)
+#define GPIO_ICR(port) MMIO32(port + 0x41c)
+#define GPIO_AFSEL(port) MMIO32(port + 0x420)
+#define GPIO_DR2R(port) MMIO32(port + 0x500)
+#define GPIO_DR4R(port) MMIO32(port + 0x504)
+#define GPIO_DR8R(port) MMIO32(port + 0x508)
+#define GPIO_ODR(port) MMIO32(port + 0x50c)
+#define GPIO_PUR(port) MMIO32(port + 0x510)
+#define GPIO_PDR(port) MMIO32(port + 0x514)
+#define GPIO_SLR(port) MMIO32(port + 0x518)
+#define GPIO_DEN(port) MMIO32(port + 0x51c)
+#define GPIO_LOCK(port) MMIO32(port + 0x520)
+#define GPIO_CR(port) MMIO32(port + 0x524)
+#define GPIO_AMSEL(port) MMIO32(port + 0x528)
+
+BEGIN_DECLS
+
+void gpio_set(u32 gpioport, u8 gpios);
+void gpio_clear(u32 gpioport, u8 gpios);
+
+END_DECLS
+
+#endif