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authorPiotr Esden-Tempski2011-01-31 16:15:09 -0800
committerPiotr Esden-Tempski2011-01-31 16:15:09 -0800
commite85c55a9a70f8f357aceba4cbacd7762ca773d7b (patch)
tree5bac82ef2d4500d42775e28c1814ae4fcb05d983 /examples
parentdd0018ffdf89210f04d5fb3ca153c9cbab7c3144 (diff)
Added timer flag reset function.
Diffstat (limited to 'examples')
-rw-r--r--examples/stm32/stm32-h103/pwm_6step/pwm_6step.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/examples/stm32/stm32-h103/pwm_6step/pwm_6step.c b/examples/stm32/stm32-h103/pwm_6step/pwm_6step.c
index 9c04c9b..cf53ac6 100644
--- a/examples/stm32/stm32-h103/pwm_6step/pwm_6step.c
+++ b/examples/stm32/stm32-h103/pwm_6step/pwm_6step.c
@@ -253,7 +253,8 @@ void tim1_trg_com_isr(void)
{
static int step = 0;
- TIM1_SR &= ~TIM_SR_COMIF;
+ /* Clear the COM trigger interrupt flag. */
+ timer_clear_flag(TIM1, TIM_SR_COMIF);
/* A simplified and inefficient implementation of PWM On
* scheme. Look at the implementation in Open-BLDC on