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authorKen Sarkies2012-08-31 21:47:30 +0930
committerKen Sarkies2012-08-31 21:47:30 +0930
commit9af50d6e5cf0681b276438acfd92c9975290f1b2 (patch)
tree91b265e50e3109f3d54b3b9064788e47a023a577
parentacc276a612d4ea4babf47f8719225eb4a5833036 (diff)
STM32F1xx Additional minor changes to adc.h and adc.c
-rw-r--r--include/libopencm3/stm32/f1/adc.h8
-rw-r--r--lib/stm32/f1/adc.c12
2 files changed, 15 insertions, 5 deletions
diff --git a/include/libopencm3/stm32/f1/adc.h b/include/libopencm3/stm32/f1/adc.h
index 64865f4..5a3fd20 100644
--- a/include/libopencm3/stm32/f1/adc.h
+++ b/include/libopencm3/stm32/f1/adc.h
@@ -187,9 +187,9 @@ LGPL License Terms @ref lgpl_license
#define ADC_CHANNEL15 0x0F
#define ADC_CHANNEL16 0x10
#define ADC_CHANNEL17 0x11
+/**@}*/
#define ADC_MASK 0x1F
#define ADC_SHIFT 0
-/**@}*/
/* --- ADC_SR values ------------------------------------------------------- */
@@ -248,9 +248,9 @@ LGPL License Terms @ref lgpl_license
#define ADC_CR1_DUALMOD_SIM (0x8 << 16)
/** Alternate trigger mode only. */
#define ADC_CR1_DUALMOD_ATM (0x9 << 16)
+/**@}*/
#define ADC_CR1_DUALMOD_MASK (0xF << 16)
#define ADC_CR1_DUALMOD_SHIFT 16
-/**@}*/
/* DISCNUM[2:0]: Discontinous mode channel count. */
/****************************************************************************/
@@ -266,9 +266,9 @@ LGPL License Terms @ref lgpl_license
#define ADC_CR1_DISCNUM_6CHANNELS (0x5 << 13)
#define ADC_CR1_DISCNUM_7CHANNELS (0x6 << 13)
#define ADC_CR1_DISCNUM_8CHANNELS (0x7 << 13)
+/**@}*/
#define ADC_CR1_DISCNUM_MASK (0x7 << 13)
#define ADC_CR1_DISCNUM_SHIFT 13
-/**@}*/
/* JDISCEN: */ /** Discontinous mode on injected channels. */
#define ADC_CR1_JDISCEN (1 << 12)
@@ -325,9 +325,9 @@ LGPL License Terms @ref lgpl_license
#define ADC_CR1_AWDCH_CHANNEL15 (0x0F << 0)
#define ADC_CR1_AWDCH_CHANNEL16 (0x10 << 0)
#define ADC_CR1_AWDCH_CHANNEL17 (0x11 << 0)
+/**@}*/
#define ADC_CR1_AWDCH_MASK (0x1F << 0)
#define ADC_CR1_AWDCH_SHIFT 0
-/**@}*/
/* --- ADC_CR2 values ------------------------------------------------------ */
diff --git a/lib/stm32/f1/adc.c b/lib/stm32/f1/adc.c
index 6f4de48..433cdd2 100644
--- a/lib/stm32/f1/adc.c
+++ b/lib/stm32/f1/adc.c
@@ -272,12 +272,17 @@ void adc_disable_automatic_injected_group_conversion(u32 adc)
}
/*-----------------------------------------------------------------------------*/
-/** @brief ADC Enable Analog Watchdog for All Regular and Injected Channels
+/** @brief ADC Enable Analog Watchdog for All Regular and/or Injected Channels
The analog watchdog allows the monitoring of an analog signal between two threshold
levels. The thresholds must be preset. Comparison is done before data alignment
takes place, so the thresholds are left-aligned.
+@note The analog watchdog must be enabled for either or both of the regular or
+injected channels. If neither are enabled, the analog watchdog feature will be
+disabled.
+@ref adc_enable_analog_watchdog_injected, @ref adc_enable_analog_watchdog_regular.
+
@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
*/
@@ -293,6 +298,11 @@ The analog watchdog allows the monitoring of an analog signal between two thresh
levels. The thresholds must be preset. Comparison is done before data alignment
takes place, so the thresholds are left-aligned.
+@note The analog watchdog must be enabled for either or both of the regular or
+injected channels. If neither are enabled, the analog watchdog feature will be
+disabled. If both are enabled, the same channel number is monitored.
+@ref adc_enable_analog_watchdog_injected, @ref adc_enable_analog_watchdog_regular.
+
@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
@param[in] channel Unsigned int8. ADC channel number @ref adc_watchdog_channel
*/