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authorchrysn2012-10-18 18:00:28 +0200
committerchrysn2012-10-18 18:00:28 +0200
commit771f504757e0ac5553c95308ce66412b417fa8d1 (patch)
treea46efc5067f2bec546514cdfccaddd0587cc6268
parent172ce56e3cbc7e64fd3e6a3dc564eb10e0ca766a (diff)
parentc69916ffb6d515b1dd644830ba27daef4fc75b58 (diff)
vector.c unification
this makes the previous hackish vector.c assemblies into dispatched files (using the same mechanism as for nvic, just this time in lib). the old irq.h files that were generated manually from the old vector.c files were dropped in the process, as were the nvic.h files, and replaced with very simple yaml lists that generate the headers. file generation takes place both in the include/ and the lib/ part, as some of it is definitely header stuff (the NVIC_name_IRQ defines), and some of it needs to be included in specific compilation units (the weak pragmas).
-rw-r--r--Makefile8
-rw-r--r--include/libopencm3/dispatch/nvic.h7
-rw-r--r--include/libopencm3/efm32/tinygecko/Makefile2
-rw-r--r--include/libopencm3/efm32/tinygecko/irq.yaml2
-rw-r--r--include/libopencm3/lm3s/irq.h505
-rw-r--r--include/libopencm3/lm3s/irq.yaml120
-rw-r--r--include/libopencm3/lpc17xx/irq.h33
-rw-r--r--include/libopencm3/lpc43xx/irq.h234
-rw-r--r--include/libopencm3/lpc43xx/irq.yaml55
-rw-r--r--include/libopencm3/lpc43xx/nvic.h68
-rw-r--r--include/libopencm3/stm32/f1/irq.h306
-rw-r--r--include/libopencm3/stm32/f1/irq.yaml72
-rw-r--r--include/libopencm3/stm32/f1/nvic_f1.h116
-rw-r--r--include/libopencm3/stm32/f2/irq.h359
-rw-r--r--include/libopencm3/stm32/f2/irq.yaml85
-rw-r--r--include/libopencm3/stm32/f2/nvic_f2.h114
-rw-r--r--include/libopencm3/stm32/f4/irq.h359
-rw-r--r--include/libopencm3/stm32/f4/irq.yaml85
-rw-r--r--include/libopencm3/stm32/f4/nvic_f4.h114
-rw-r--r--lib/cm3/vector.c8
-rw-r--r--lib/dispatch/vector.c11
-rw-r--r--lib/dispatch/vector_nvic.c19
-rw-r--r--lib/efm32/tinygecko/vector.c2
-rw-r--r--lib/lm3s/vector.c2
-rw-r--r--lib/lpc17xx/vector.c2
-rw-r--r--lib/lpc43xx/vector.c8
-rw-r--r--lib/stm32/f1/vector.c2
-rw-r--r--lib/stm32/f2/vector.c2
-rw-r--r--lib/stm32/f4/vector.c8
-rwxr-xr-xscripts/irq2nvic_h (renamed from include/libopencm3/efm32/tinygecko/irq2nvic_h)46
30 files changed, 507 insertions, 2247 deletions
diff --git a/Makefile b/Makefile
index 492b618..76c302d 100644
--- a/Makefile
+++ b/Makefile
@@ -39,7 +39,13 @@ all: build
build: lib examples
-lib:
+generatedheaders:
+ @printf " UPDATING HEADERS\n"
+ $(Q)for yamlfile in `find -name 'irq.yaml'`; do \
+ ./scripts/irq2nvic_h $$yamlfile ; \
+ done
+
+lib: generatedheaders
$(Q)for i in $(addprefix $@/,$(TARGETS)); do \
if [ -d $$i ]; then \
printf " BUILD $$i\n"; \
diff --git a/include/libopencm3/dispatch/nvic.h b/include/libopencm3/dispatch/nvic.h
index a405b5d..d8e7889 100644
--- a/include/libopencm3/dispatch/nvic.h
+++ b/include/libopencm3/dispatch/nvic.h
@@ -1,9 +1,9 @@
#if defined(STM32F1)
-# include <libopencm3/stm32/f1/nvic_f1.h>
+# include <libopencm3/stm32/f1/nvic.h>
#elif defined(STM32F2)
-# include <libopencm3/stm32/f2/nvic_f2.h>
+# include <libopencm3/stm32/f2/nvic.h>
#elif defined(STM32F4)
-# include <libopencm3/stm32/f4/nvic_f4.h>
+# include <libopencm3/stm32/f4/nvic.h>
#elif defined(TINYGECKO)
# include <libopencm3/efm32/tinygecko/nvic.h>
@@ -15,6 +15,5 @@
# warning"no chipset defined; user interrupts are disabled"
#define NVIC_IRQ_COUNT 0
-#define IRQ_HANDLERS
#endif
diff --git a/include/libopencm3/efm32/tinygecko/Makefile b/include/libopencm3/efm32/tinygecko/Makefile
deleted file mode 100644
index 4ac5347..0000000
--- a/include/libopencm3/efm32/tinygecko/Makefile
+++ /dev/null
@@ -1,2 +0,0 @@
-nvic.h: irq.yaml
- ./irq2nvic_h
diff --git a/include/libopencm3/efm32/tinygecko/irq.yaml b/include/libopencm3/efm32/tinygecko/irq.yaml
index 16fa69c..da954f6 100644
--- a/include/libopencm3/efm32/tinygecko/irq.yaml
+++ b/include/libopencm3/efm32/tinygecko/irq.yaml
@@ -1,4 +1,4 @@
-includeguard: LIBOPENCM3_EFM32_TINYGECKO_VECTOR_H
+includeguard: LIBOPENCM3_EFM32_TINYGECKO_NVIC_H
partname_humanreadable: EFM32 Tiny Gecko series
partname_doxygen: EFM32TG
# The names and sequence are taken from d0034_efm32tg_reference_manual.pdf table 4.1.
diff --git a/include/libopencm3/lm3s/irq.h b/include/libopencm3/lm3s/irq.h
deleted file mode 100644
index 331ee51..0000000
--- a/include/libopencm3/lm3s/irq.h
+++ /dev/null
@@ -1,505 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
- * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef LIBOPENCM3_LM3S_IRQ_H
-#define LIBOPENCM3_LM3S_IRQ_H
-
-#define IRQ_GPIOA 0
-#define IRQ_GPIOB 1
-#define IRQ_GPIOC 2
-#define IRQ_GPIOD 3
-#define IRQ_GPIOE 4
-#define IRQ_UART0 5
-#define IRQ_UART1 6
-#define IRQ_SSI0 7
-#define IRQ_I2C0 8
-#define IRQ_PWM0_FAULT 9
-#define IRQ_PWM0_0 10
-#define IRQ_PWM0_1 11
-#define IRQ_PWM0_2 12
-#define IRQ_QEI0 13
-#define IRQ_ADC0SS0 14
-#define IRQ_ADC0SS1 15
-#define IRQ_ADC0SS2 16
-#define IRQ_ADC0SS3 17
-#define IRQ_WATCHDOG 18
-#define IRQ_TIMER0A 19
-#define IRQ_TIMER0B 20
-#define IRQ_TIMER1A 21
-#define IRQ_TIMER1B 22
-#define IRQ_TIMER2A 23
-#define IRQ_TIMER2B 24
-#define IRQ_COMP0 25
-#define IRQ_COMP1 26
-#define IRQ_COMP2 27
-#define IRQ_SYSCTL 28
-#define IRQ_FLASH 29
-#define IRQ_GPIOF 30
-#define IRQ_GPIOG 31
-#define IRQ_GPIOH 32
-#define IRQ_UART2 33
-#define IRQ_SSI1 34
-#define IRQ_TIMER3A 35
-#define IRQ_TIMER3B 36
-#define IRQ_I2C1 37
-#define IRQ_QEI1 38
-#define IRQ_CAN0 39
-#define IRQ_CAN1 40
-#define IRQ_CAN2 41
-#define IRQ_ETH 42
-#define IRQ_HIBERNATE 43
-#define IRQ_USB0 44
-#define IRQ_PWM0_3 45
-#define IRQ_UDMA 46
-#define IRQ_UDMAERR 47
-#define IRQ_ADC1SS0 48
-#define IRQ_ADC1SS1 49
-#define IRQ_ADC1SS2 50
-#define IRQ_ADC1SS3 51
-#define IRQ_I2S0 52
-#define IRQ_EPI0 53
-#define IRQ_GPIOJ 54
-#define IRQ_GPIOK 55
-#define IRQ_GPIOL 56
-#define IRQ_SSI2 57
-#define IRQ_SSI3 58
-#define IRQ_UART3 59
-#define IRQ_UART4 60
-#define IRQ_UART5 61
-#define IRQ_UART6 62
-#define IRQ_UART7 63
-/* undefined: slot 64 */
-/* undefined: slot 65 */
-/* undefined: slot 66 */
-/* undefined: slot 67 */
-#define IRQ_I2C2 68
-#define IRQ_I2C3 69
-#define IRQ_TIMER4A 70
-#define IRQ_TIMER4B 71
-/* undefined: slot 72 */
-/* undefined: slot 73 */
-/* undefined: slot 74 */
-/* undefined: slot 75 */
-/* undefined: slot 76 */
-/* undefined: slot 77 */
-/* undefined: slot 78 */
-/* undefined: slot 79 */
-/* undefined: slot 80 */
-/* undefined: slot 81 */
-/* undefined: slot 82 */
-/* undefined: slot 83 */
-/* undefined: slot 84 */
-/* undefined: slot 85 */
-/* undefined: slot 86 */
-/* undefined: slot 87 */
-/* undefined: slot 88 */
-/* undefined: slot 89 */
-/* undefined: slot 90 */
-/* undefined: slot 91 */
-#define IRQ_TIMER5A 92
-#define IRQ_TIMER5B 93
-#define IRQ_WTIMER0A 94
-#define IRQ_WTIMER0B 95
-#define IRQ_WTIMER1A 96
-#define IRQ_WTIMER1B 97
-#define IRQ_WTIMER2A 98
-#define IRQ_WTIMER2B 99
-#define IRQ_WTIMER3A 100
-#define IRQ_WTIMER3B 101
-#define IRQ_WTIMER4A 102
-#define IRQ_WTIMER4B 103
-#define IRQ_WTIMER5A 104
-#define IRQ_WTIMER5B 105
-#define IRQ_SYSEXC 106
-#define IRQ_PECI0 107
-#define IRQ_LPC0 108
-#define IRQ_I2C4 109
-#define IRQ_I2C5 110
-#define IRQ_GPIOM 111
-#define IRQ_GPION 112
-/* undefined: slot 113 */
-#define IRQ_FAN0 114
-/* undefined: slot 115 */
-#define IRQ_GPIOP0 116
-#define IRQ_GPIOP1 117
-#define IRQ_GPIOP2 118
-#define IRQ_GPIOP3 119
-#define IRQ_GPIOP4 120
-#define IRQ_GPIOP5 121
-#define IRQ_GPIOP6 122
-#define IRQ_GPIOP7 123
-#define IRQ_GPIOQ0 124
-#define IRQ_GPIOQ1 125
-#define IRQ_GPIOQ2 126
-#define IRQ_GPIOQ3 127
-#define IRQ_GPIOQ4 128
-#define IRQ_GPIOQ5 129
-#define IRQ_GPIOQ6 130
-#define IRQ_GPIOQ7 131
-/* undefined: slot 132 */
-/* undefined: slot 133 */
-#define IRQ_PWM1_0 134
-#define IRQ_PWM1_1 135
-#define IRQ_PWM1_2 136
-#define IRQ_PWM1_3 137
-#define IRQ_PWM1_FAULT 138
-
-#define IRQ_COUNT 139
-
-#define WEAK __attribute__ ((weak))
-
-void WEAK gpioa_isr(void);
-void WEAK gpiob_isr(void);
-void WEAK gpioc_isr(void);
-void WEAK gpiod_isr(void);
-void WEAK gpioe_isr(void);
-void WEAK uart0_isr(void);
-void WEAK uart1_isr(void);
-void WEAK ssi0_isr(void);
-void WEAK i2c0_isr(void);
-void WEAK pwm0_fault_isr(void);
-void WEAK pwm0_0_isr(void);
-void WEAK pwm0_1_isr(void);
-void WEAK pwm0_2_isr(void);
-void WEAK qei0_isr(void);
-void WEAK adc0ss0_isr(void);
-void WEAK adc0ss1_isr(void);
-void WEAK adc0ss2_isr(void);
-void WEAK adc0ss3_isr(void);
-void WEAK watchdog_isr(void);
-void WEAK timer0a_isr(void);
-void WEAK timer0b_isr(void);
-void WEAK timer1a_isr(void);
-void WEAK timer1b_isr(void);
-void WEAK timer2a_isr(void);
-void WEAK timer2b_isr(void);
-void WEAK comp0_isr(void);
-void WEAK comp1_isr(void);
-void WEAK comp2_isr(void);
-void WEAK sysctl_isr(void);
-void WEAK flash_isr(void);
-void WEAK gpiof_isr(void);
-void WEAK gpiog_isr(void);
-void WEAK gpioh_isr(void);
-void WEAK uart2_isr(void);
-void WEAK ssi1_isr(void);
-void WEAK timer3a_isr(void);
-void WEAK timer3b_isr(void);
-void WEAK i2c1_isr(void);
-void WEAK qei1_isr(void);
-void WEAK can0_isr(void);
-void WEAK can1_isr(void);
-void WEAK can2_isr(void);
-void WEAK eth_isr(void);
-void WEAK hibernate_isr(void);
-void WEAK usb0_isr(void);
-void WEAK pwm0_3_isr(void);
-void WEAK udma_isr(void);
-void WEAK udmaerr_isr(void);
-void WEAK adc1ss0_isr(void);
-void WEAK adc1ss1_isr(void);
-void WEAK adc1ss2_isr(void);
-void WEAK adc1ss3_isr(void);
-void WEAK i2s0_isr(void);
-void WEAK epi0_isr(void);
-void WEAK gpioj_isr(void);
-void WEAK gpiok_isr(void);
-void WEAK gpiol_isr(void);
-void WEAK ssi2_isr(void);
-void WEAK ssi3_isr(void);
-void WEAK uart3_isr(void);
-void WEAK uart4_isr(void);
-void WEAK uart5_isr(void);
-void WEAK uart6_isr(void);
-void WEAK uart7_isr(void);
-void WEAK i2c2_isr(void);
-void WEAK i2c3_isr(void);
-void WEAK timer4a_isr(void);
-void WEAK timer4b_isr(void);
-void WEAK timer5a_isr(void);
-void WEAK timer5b_isr(void);
-void WEAK wtimer0a_isr(void);
-void WEAK wtimer0b_isr(void);
-void WEAK wtimer1a_isr(void);
-void WEAK wtimer1b_isr(void);
-void WEAK wtimer2a_isr(void);
-void WEAK wtimer2b_isr(void);
-void WEAK wtimer3a_isr(void);
-void WEAK wtimer3b_isr(void);
-void WEAK wtimer4a_isr(void);
-void WEAK wtimer4b_isr(void);
-void WEAK wtimer5a_isr(void);
-void WEAK wtimer5b_isr(void);
-void WEAK sysexc_isr(void);
-void WEAK peci0_isr(void);
-void WEAK lpc0_isr(void);
-void WEAK i2c4_isr(void);
-void WEAK i2c5_isr(void);
-void WEAK gpiom_isr(void);
-void WEAK gpion_isr(void);
-void WEAK fan0_isr(void);
-void WEAK gpiop0_isr(void);
-void WEAK gpiop1_isr(void);
-void WEAK gpiop2_isr(void);
-void WEAK gpiop3_isr(void);
-void WEAK gpiop4_isr(void);
-void WEAK gpiop5_isr(void);
-void WEAK gpiop6_isr(void);
-void WEAK gpiop7_isr(void);
-void WEAK gpioq0_isr(void);
-void WEAK gpioq1_isr(void);
-void WEAK gpioq2_isr(void);
-void WEAK gpioq3_isr(void);
-void WEAK gpioq4_isr(void);
-void WEAK gpioq5_isr(void);
-void WEAK gpioq6_isr(void);
-void WEAK gpioq7_isr(void);
-void WEAK pwm1_0_isr(void);
-void WEAK pwm1_1_isr(void);
-void WEAK pwm1_2_isr(void);
-void WEAK pwm1_3_isr(void);
-void WEAK pwm1_fault_isr(void);
-
-#pragma weak gpioa_isr = blocking_handler
-#pragma weak gpiob_isr = blocking_handler
-#pragma weak gpioc_isr = blocking_handler
-#pragma weak gpiod_isr = blocking_handler
-#pragma weak gpioe_isr = blocking_handler
-#pragma weak uart0_isr = blocking_handler
-#pragma weak uart1_isr = blocking_handler
-#pragma weak ssi0_isr = blocking_handler
-#pragma weak i2c0_isr = blocking_handler
-#pragma weak pwm0_fault_isr = blocking_handler
-#pragma weak pwm0_0_isr = blocking_handler
-#pragma weak pwm0_1_isr = blocking_handler
-#pragma weak pwm0_2_isr = blocking_handler
-#pragma weak qei0_isr = blocking_handler
-#pragma weak adc0ss0_isr = blocking_handler
-#pragma weak adc0ss1_isr = blocking_handler
-#pragma weak adc0ss2_isr = blocking_handler
-#pragma weak adc0ss3_isr = blocking_handler
-#pragma weak watchdog_isr = blocking_handler
-#pragma weak timer0a_isr = blocking_handler
-#pragma weak timer0b_isr = blocking_handler
-#pragma weak timer1a_isr = blocking_handler
-#pragma weak timer1b_isr = blocking_handler
-#pragma weak timer2a_isr = blocking_handler
-#pragma weak timer2b_isr = blocking_handler
-#pragma weak comp0_isr = blocking_handler
-#pragma weak comp1_isr = blocking_handler
-#pragma weak comp2_isr = blocking_handler
-#pragma weak sysctl_isr = blocking_handler
-#pragma weak flash_isr = blocking_handler
-#pragma weak gpiof_isr = blocking_handler
-#pragma weak gpiog_isr = blocking_handler
-#pragma weak gpioh_isr = blocking_handler
-#pragma weak uart2_isr = blocking_handler
-#pragma weak ssi1_isr = blocking_handler
-#pragma weak timer3a_isr = blocking_handler
-#pragma weak timer3b_isr = blocking_handler
-#pragma weak i2c1_isr = blocking_handler
-#pragma weak qei1_isr = blocking_handler
-#pragma weak can0_isr = blocking_handler
-#pragma weak can1_isr = blocking_handler
-#pragma weak can2_isr = blocking_handler
-#pragma weak eth_isr = blocking_handler
-#pragma weak hibernate_isr = blocking_handler
-#pragma weak usb0_isr = blocking_handler
-#pragma weak pwm0_3_isr = blocking_handler
-#pragma weak udma_isr = blocking_handler
-#pragma weak udmaerr_isr = blocking_handler
-#pragma weak adc1ss0_isr = blocking_handler
-#pragma weak adc1ss1_isr = blocking_handler
-#pragma weak adc1ss2_isr = blocking_handler
-#pragma weak adc1ss3_isr = blocking_handler
-#pragma weak i2s0_isr = blocking_handler
-#pragma weak epi0_isr = blocking_handler
-#pragma weak gpioj_isr = blocking_handler
-#pragma weak gpiok_isr = blocking_handler
-#pragma weak gpiol_isr = blocking_handler
-#pragma weak ssi2_isr = blocking_handler
-#pragma weak ssi3_isr = blocking_handler
-#pragma weak uart3_isr = blocking_handler
-#pragma weak uart4_isr = blocking_handler
-#pragma weak uart5_isr = blocking_handler
-#pragma weak uart6_isr = blocking_handler
-#pragma weak uart7_isr = blocking_handler
-#pragma weak i2c2_isr = blocking_handler
-#pragma weak i2c3_isr = blocking_handler
-#pragma weak timer4a_isr = blocking_handler
-#pragma weak timer4b_isr = blocking_handler
-#pragma weak timer5a_isr = blocking_handler
-#pragma weak timer5b_isr = blocking_handler
-#pragma weak wtimer0a_isr = blocking_handler
-#pragma weak wtimer0b_isr = blocking_handler
-#pragma weak wtimer1a_isr = blocking_handler
-#pragma weak wtimer1b_isr = blocking_handler
-#pragma weak wtimer2a_isr = blocking_handler
-#pragma weak wtimer2b_isr = blocking_handler
-#pragma weak wtimer3a_isr = blocking_handler
-#pragma weak wtimer3b_isr = blocking_handler
-#pragma weak wtimer4a_isr = blocking_handler
-#pragma weak wtimer4b_isr = blocking_handler
-#pragma weak wtimer5a_isr = blocking_handler
-#pragma weak wtimer5b_isr = blocking_handler
-#pragma weak sysexc_isr = blocking_handler
-#pragma weak peci0_isr = blocking_handler
-#pragma weak lpc0_isr = blocking_handler
-#pragma weak i2c4_isr = blocking_handler
-#pragma weak i2c5_isr = blocking_handler
-#pragma weak gpiom_isr = blocking_handler
-#pragma weak gpion_isr = blocking_handler
-#pragma weak fan0_isr = blocking_handler
-#pragma weak gpiop0_isr = blocking_handler
-#pragma weak gpiop1_isr = blocking_handler
-#pragma weak gpiop2_isr = blocking_handler
-#pragma weak gpiop3_isr = blocking_handler
-#pragma weak gpiop4_isr = blocking_handler
-#pragma weak gpiop5_isr = blocking_handler
-#pragma weak gpiop6_isr = blocking_handler
-#pragma weak gpiop7_isr = blocking_handler
-#pragma weak gpioq0_isr = blocking_handler
-#pragma weak gpioq1_isr = blocking_handler
-#pragma weak gpioq2_isr = blocking_handler
-#pragma weak gpioq3_isr = blocking_handler
-#pragma weak gpioq4_isr = blocking_handler
-#pragma weak gpioq5_isr = blocking_handler
-#pragma weak gpioq6_isr = blocking_handler
-#pragma weak gpioq7_isr = blocking_handler
-#pragma weak pwm1_0_isr = blocking_handler
-#pragma weak pwm1_1_isr = blocking_handler
-#pragma weak pwm1_2_isr = blocking_handler
-#pragma weak pwm1_3_isr = blocking_handler
-#pragma weak pwm1_fault_isr = blocking_handler
-
-#define IRQ_HANDLERS \
- [IRQ_GPIOA] = gpioa_isr, \
- [IRQ_GPIOB] = gpiob_isr, \
- [IRQ_GPIOC] = gpioc_isr, \
- [IRQ_GPIOD] = gpiod_isr, \
- [IRQ_GPIOE] = gpioe_isr, \
- [IRQ_UART0] = uart0_isr, \
- [IRQ_UART1] = uart1_isr, \
- [IRQ_SSI0] = ssi0_isr, \
- [IRQ_I2C0] = i2c0_isr, \
- [IRQ_PWM0_FAULT] = pwm0_fault_isr, \
- [IRQ_PWM0_0] = pwm0_0_isr, \
- [IRQ_PWM0_1] = pwm0_1_isr, \
- [IRQ_PWM0_2] = pwm0_2_isr, \
- [IRQ_QEI0] = qei0_isr, \
- [IRQ_ADC0SS0] = adc0ss0_isr, \
- [IRQ_ADC0SS1] = adc0ss1_isr, \
- [IRQ_ADC0SS2] = adc0ss2_isr, \
- [IRQ_ADC0SS3] = adc0ss3_isr, \
- [IRQ_WATCHDOG] = watchdog_isr, \
- [IRQ_TIMER0A] = timer0a_isr, \
- [IRQ_TIMER0B] = timer0b_isr, \
- [IRQ_TIMER1A] = timer1a_isr, \
- [IRQ_TIMER1B] = timer1b_isr, \
- [IRQ_TIMER2A] = timer2a_isr, \
- [IRQ_TIMER2B] = timer2b_isr, \
- [IRQ_COMP0] = comp0_isr, \
- [IRQ_COMP1] = comp1_isr, \
- [IRQ_COMP2] = comp2_isr, \
- [IRQ_SYSCTL] = sysctl_isr, \
- [IRQ_FLASH] = flash_isr, \
- [IRQ_GPIOF] = gpiof_isr, \
- [IRQ_GPIOG] = gpiog_isr, \
- [IRQ_GPIOH] = gpioh_isr, \
- [IRQ_UART2] = uart2_isr, \
- [IRQ_SSI1] = ssi1_isr, \
- [IRQ_TIMER3A] = timer3a_isr, \
- [IRQ_TIMER3B] = timer3b_isr, \
- [IRQ_I2C1] = i2c1_isr, \
- [IRQ_QEI1] = qei1_isr, \
- [IRQ_CAN0] = can0_isr, \
- [IRQ_CAN1] = can1_isr, \
- [IRQ_CAN2] = can2_isr, \
- [IRQ_ETH] = eth_isr, \
- [IRQ_HIBERNATE] = hibernate_isr, \
- [IRQ_USB0] = usb0_isr, \
- [IRQ_PWM0_3] = pwm0_3_isr, \
- [IRQ_UDMA] = udma_isr, \
- [IRQ_UDMAERR] = udmaerr_isr, \
- [IRQ_ADC1SS0] = adc1ss0_isr, \
- [IRQ_ADC1SS1] = adc1ss1_isr, \
- [IRQ_ADC1SS2] = adc1ss2_isr, \
- [IRQ_ADC1SS3] = adc1ss3_isr, \
- [IRQ_I2S0] = i2s0_isr, \
- [IRQ_EPI0] = epi0_isr, \
- [IRQ_GPIOJ] = gpioj_isr, \
- [IRQ_GPIOK] = gpiok_isr, \
- [IRQ_GPIOL] = gpiol_isr, \
- [IRQ_SSI2] = ssi2_isr, \
- [IRQ_SSI3] = ssi3_isr, \
- [IRQ_UART3] = uart3_isr, \
- [IRQ_UART4] = uart4_isr, \
- [IRQ_UART5] = uart5_isr, \
- [IRQ_UART6] = uart6_isr, \
- [IRQ_UART7] = uart7_isr, \
- [IRQ_I2C2] = i2c2_isr, \
- [IRQ_I2C3] = i2c3_isr, \
- [IRQ_TIMER4A] = timer4a_isr, \
- [IRQ_TIMER4B] = timer4b_isr, \
- [IRQ_TIMER5A] = timer5a_isr, \
- [IRQ_TIMER5B] = timer5b_isr, \
- [IRQ_WTIMER0A] = wtimer0a_isr, \
- [IRQ_WTIMER0B] = wtimer0b_isr, \
- [IRQ_WTIMER1A] = wtimer1a_isr, \
- [IRQ_WTIMER1B] = wtimer1b_isr, \
- [IRQ_WTIMER2A] = wtimer2a_isr, \
- [IRQ_WTIMER2B] = wtimer2b_isr, \
- [IRQ_WTIMER3A] = wtimer3a_isr, \
- [IRQ_WTIMER3B] = wtimer3b_isr, \
- [IRQ_WTIMER4A] = wtimer4a_isr, \
- [IRQ_WTIMER4B] = wtimer4b_isr, \
- [IRQ_WTIMER5A] = wtimer5a_isr, \
- [IRQ_WTIMER5B] = wtimer5b_isr, \
- [IRQ_SYSEXC] = sysexc_isr, \
- [IRQ_PECI0] = peci0_isr, \
- [IRQ_LPC0] = lpc0_isr, \
- [IRQ_I2C4] = i2c4_isr, \
- [IRQ_I2C5] = i2c5_isr, \
- [IRQ_GPIOM] = gpiom_isr, \
- [IRQ_GPION] = gpion_isr, \
- [IRQ_FAN0] = fan0_isr, \
- [IRQ_GPIOP0] = gpiop0_isr, \
- [IRQ_GPIOP1] = gpiop1_isr, \
- [IRQ_GPIOP2] = gpiop2_isr, \
- [IRQ_GPIOP3] = gpiop3_isr, \
- [IRQ_GPIOP4] = gpiop4_isr, \
- [IRQ_GPIOP5] = gpiop5_isr, \
- [IRQ_GPIOP6] = gpiop6_isr, \
- [IRQ_GPIOP7] = gpiop7_isr, \
- [IRQ_GPIOQ0] = gpioq0_isr, \
- [IRQ_GPIOQ1] = gpioq1_isr, \
- [IRQ_GPIOQ2] = gpioq2_isr, \
- [IRQ_GPIOQ3] = gpioq3_isr, \
- [IRQ_GPIOQ4] = gpioq4_isr, \
- [IRQ_GPIOQ5] = gpioq5_isr, \
- [IRQ_GPIOQ6] = gpioq6_isr, \
- [IRQ_GPIOQ7] = gpioq7_isr, \
- [IRQ_PWM1_0] = pwm1_0_isr, \
- [IRQ_PWM1_1] = pwm1_1_isr, \
- [IRQ_PWM1_2] = pwm1_2_isr, \
- [IRQ_PWM1_3] = pwm1_3_isr, \
- [IRQ_PWM1_FAULT] = pwm1_fault_isr,
-
-#endif
diff --git a/include/libopencm3/lm3s/irq.yaml b/include/libopencm3/lm3s/irq.yaml
new file mode 100644
index 0000000..7d5ff3a
--- /dev/null
+++ b/include/libopencm3/lm3s/irq.yaml
@@ -0,0 +1,120 @@
+includeguard: LIBOPENCM3_LM3S_NVIC_H
+partname_humanreadable: LM3S series
+partname_doxygen: LM3S
+irqs:
+ 0: GPIOA
+ 1: GPIOB
+ 2: GPIOC
+ 3: GPIOD
+ 4: GPIOE
+ 5: UART0
+ 6: UART1
+ 7: SSI0
+ 8: I2C0
+ 9: PWM0_FAULT
+ 10: PWM0_0
+ 11: PWM0_1
+ 12: PWM0_2
+ 13: QEI0
+ 14: ADC0SS0
+ 15: ADC0SS1
+ 16: ADC0SS2
+ 17: ADC0SS3
+ 18: WATCHDOG
+ 19: TIMER0A
+ 20: TIMER0B
+ 21: TIMER1A
+ 22: TIMER1B
+ 23: TIMER2A
+ 24: TIMER2B
+ 25: COMP0
+ 26: COMP1
+ 27: COMP2
+ 28: SYSCTL
+ 29: FLASH
+ 30: GPIOF
+ 31: GPIOG
+ 32: GPIOH
+ 33: UART2
+ 34: SSI1
+ 35: TIMER3A
+ 36: TIMER3B
+ 37: I2C1
+ 38: QEI1
+ 39: CAN0
+ 40: CAN1
+ 41: CAN2
+ 42: ETH
+ 43: HIBERNATE
+ 44: USB0
+ 45: PWM0_3
+ 46: UDMA
+ 47: UDMAERR
+ 48: ADC1SS0
+ 49: ADC1SS1
+ 50: ADC1SS2
+ 51: ADC1SS3
+ 52: I2S0
+ 53: EPI0
+ 54: GPIOJ
+ 55: GPIOK
+ 56: GPIOL
+ 57: SSI2
+ 58: SSI3
+ 59: UART3
+ 60: UART4
+ 61: UART5
+ 62: UART6
+ 63: UART7
+# undefined: slot 64 - 67
+ 68: I2C2
+ 69: I2C3
+ 70: TIMER4A
+ 71: TIMER4B
+# undefined: slot 72 - 91
+ 92: TIMER5A
+ 93: TIMER5B
+ 94: WTIMER0A
+ 95: WTIMER0B
+ 96: WTIMER1A
+ 97: WTIMER1B
+ 98: WTIMER2A
+ 99: WTIMER2B
+ 100: WTIMER3A
+ 101: WTIMER3B
+ 102: WTIMER4A
+ 103: WTIMER4B
+ 104: WTIMER5A
+ 105: WTIMER5B
+ 106: SYSEXC
+ 107: PECI0
+ 108: LPC0
+ 109: I2C4
+ 110: I2C5
+ 111: GPIOM
+ 112: GPION
+# undefined: slot 113
+ 114: FAN0
+# undefined: slot 115
+ 116: GPIOP0
+ 117: GPIOP1
+ 118: GPIOP2
+ 119: GPIOP3
+ 120: GPIOP4
+ 121: GPIOP5
+ 122: GPIOP6
+ 123: GPIOP7
+ 124: GPIOQ0
+ 125: GPIOQ1
+ 126: GPIOQ2
+ 127: GPIOQ3
+ 128: GPIOQ4
+ 129: GPIOQ5
+ 130: GPIOQ6
+ 131: GPIOQ7
+# undefined: slot 132 - 133
+ 134: PWM1_0
+ 135: PWM1_1
+ 136: PWM1_2
+ 137: PWM1_3
+ 138: PWM1_FAULT
diff --git a/include/libopencm3/lpc17xx/irq.h b/include/libopencm3/lpc17xx/irq.h
deleted file mode 100644
index 9c31267..0000000
--- a/include/libopencm3/lpc17xx/irq.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
- * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef LIBOPENCM3_LPC17xx_IRQ_H
-#define LIBOPENCM3_LPC17xx_IRQ_H
-
-/* TODO: Interrupt definitions */
-#define IRQ_COUNT 0
-
-/* TODO: Interrupt handler prototypes */
-
-/* TODO: Interrupt handler weak aliases */
-
-#define IRQ_HANDLERS
-
-#endif
diff --git a/include/libopencm3/lpc43xx/irq.h b/include/libopencm3/lpc43xx/irq.h
deleted file mode 100644
index a83a8d7..0000000
--- a/include/libopencm3/lpc43xx/irq.h
+++ /dev/null
@@ -1,234 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
- * Copyright (C) 2012 Michael Ossmann <mike@ossmann.com>
- * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef LIBOPENCM3_LPC43XX_IRQ_H
-#define LIBOPENCM3_LPC43XX_IRQ_H
-
-#define IRQ_DAC 0
-#define IRQ_M0CORE 1
-#define IRQ_DMA 2
-/* reserved: 3 */
-/* reserved: 4 */
-#define IRQ_ETHERNET 5
-#define IRQ_SDIO 6
-#define IRQ_LCD 7
-#define IRQ_USB0 8
-#define IRQ_USB1 9
-#define IRQ_SCT 10
-#define IRQ_RITIMER 11
-#define IRQ_TIMER0 12
-#define IRQ_TIMER1 13
-#define IRQ_TIMER2 14
-#define IRQ_TIMER3 15
-#define IRQ_MCPWM 16
-#define IRQ_ADC0 17
-#define IRQ_I2C0 18
-#define IRQ_I2C1 19
-#define IRQ_SPI 20
-#define IRQ_ADC1 21
-#define IRQ_SSP0 22
-#define IRQ_SSP1 23
-#define IRQ_USART0 24
-#define IRQ_UART1 25
-#define IRQ_USART2 26
-#define IRQ_USART3 27
-#define IRQ_I2S0 28
-#define IRQ_I2S1 29
-#define IRQ_SPIFI 30
-#define IRQ_SGPIO 31
-#define IRQ_PIN_INT0 32
-#define IRQ_PIN_INT1 33
-#define IRQ_PIN_INT2 34
-#define IRQ_PIN_INT3 35
-#define IRQ_PIN_INT4 36
-#define IRQ_PIN_INT5 37
-#define IRQ_PIN_INT6 38
-#define IRQ_PIN_INT7 39
-#define IRQ_GINT0 40
-#define IRQ_GINT1 41
-#define IRQ_EVENTROUTER 42
-#define IRQ_C_CAN1 43
-/* reserved: 44 */
-/* reserved: 45 */
-#define IRQ_ATIMER 46
-#define IRQ_RTC 47
-/* reserved: 48 */
-#define IRQ_WWDT 49
-/* reserved: 50 */
-#define IRQ_C_CAN0 51
-#define IRQ_QEI 52
-
-#define IRQ_COUNT 53
-
-#define WEAK __attribute__ ((weak))
-
-void WEAK dac_irqhandler(void);
-void WEAK m0core_irqhandler(void);
-void WEAK dma_irqhandler(void);
-void WEAK ethernet_irqhandler(void);
-void WEAK sdio_irqhandler(void);
-void WEAK lcd_irqhandler(void);
-void WEAK usb0_irqhandler(void);
-void WEAK usb1_irqhandler(void);
-void WEAK sct_irqhandler(void);
-void WEAK ritimer_irqhandler(void);
-void WEAK timer0_irqhandler(void);
-void WEAK timer1_irqhandler(void);
-void WEAK timer2_irqhandler(void);
-void WEAK timer3_irqhandler(void);
-void WEAK mcpwm_irqhandler(void);
-void WEAK adc0_irqhandler(void);
-void WEAK i2c0_irqhandler(void);
-void WEAK i2c1_irqhandler(void);
-void WEAK spi_irqhandler(void);
-void WEAK adc1_irqhandler(void);
-void WEAK ssp0_irqhandler(void);
-void WEAK ssp1_irqhandler(void);
-void WEAK usart0_irqhandler(void);
-void WEAK uart1_irqhandler(void);
-void WEAK usart2_irqhandler(void);
-void WEAK usart3_irqhandler(void);
-void WEAK i2s0_irqhandler(void);
-void WEAK i2s1_irqhandler(void);
-void WEAK spifi_irqhandler(void);
-void WEAK sgpio_irqhandler(void);
-void WEAK pin_int0_irqhandler(void);
-void WEAK pin_int1_irqhandler(void);
-void WEAK pin_int2_irqhandler(void);
-void WEAK pin_int3_irqhandler(void);
-void WEAK pin_int4_irqhandler(void);
-void WEAK pin_int5_irqhandler(void);
-void WEAK pin_int6_irqhandler(void);
-void WEAK pin_int7_irqhandler(void);
-void WEAK gint0_irqhandler(void);
-void WEAK gint1_irqhandler(void);
-void WEAK eventrouter_irqhandler(void);
-void WEAK c_can1_irqhandler(void);
-void WEAK atimer_irqhandler(void);
-void WEAK rtc_irqhandler(void);
-void WEAK wwdt_irqhandler(void);
-void WEAK c_can0_irqhandler(void);
-void WEAK qei_irqhandler(void);
-
-#pragma weak dac_irqhandler = null_handler
-#pragma weak m0core_irqhandler = null_handler
-#pragma weak dma_irqhandler = null_handler
-#pragma weak ethernet_irqhandler = null_handler
-#pragma weak sdio_irqhandler = null_handler
-#pragma weak lcd_irqhandler = null_handler
-#pragma weak usb0_irqhandler = null_handler
-#pragma weak usb1_irqhandler = null_handler
-#pragma weak sct_irqhandler = null_handler
-#pragma weak ritimer_irqhandler = null_handler
-#pragma weak timer0_irqhandler = null_handler
-#pragma weak timer1_irqhandler = null_handler
-#pragma weak timer2_irqhandler = null_handler
-#pragma weak timer3_irqhandler = null_handler
-#pragma weak mcpwm_irqhandler = null_handler
-#pragma weak adc0_irqhandler = null_handler
-#pragma weak i2c0_irqhandler = null_handler
-#pragma weak i2c1_irqhandler = null_handler
-#pragma weak spi_irqhandler = null_handler
-#pragma weak adc1_irqhandler = null_handler
-#pragma weak ssp0_irqhandler = null_handler
-#pragma weak ssp1_irqhandler = null_handler
-#pragma weak usart0_irqhandler = null_handler
-#pragma weak uart1_irqhandler = null_handler
-#pragma weak usart2_irqhandler = null_handler
-#pragma weak usart3_irqhandler = null_handler
-#pragma weak i2s0_irqhandler = null_handler
-#pragma weak i2s1_irqhandler = null_handler
-#pragma weak spifi_irqhandler = null_handler
-#pragma weak sgpio_irqhandler = null_handler
-#pragma weak pin_int0_irqhandler = null_handler
-#pragma weak pin_int1_irqhandler = null_handler
-#pragma weak pin_int2_irqhandler = null_handler
-#pragma weak pin_int3_irqhandler = null_handler
-#pragma weak pin_int4_irqhandler = null_handler
-#pragma weak pin_int5_irqhandler = null_handler
-#pragma weak pin_int6_irqhandler = null_handler
-#pragma weak pin_int7_irqhandler = null_handler
-#pragma weak gint0_irqhandler = null_handler
-#pragma weak gint1_irqhandler = null_handler
-#pragma weak eventrouter_irqhandler = null_handler
-#pragma weak c_can1_irqhandler = null_handler
-#pragma weak atimer_irqhandler = null_handler
-#pragma weak rtc_irqhandler = null_handler
-#pragma weak wwdt_irqhandler = null_handler
-#pragma weak c_can0_irqhandler = null_handler
-#pragma weak qei_irqhandler = null_handler
-
-#define IRQ_HANDLERS \
- dac_irqhandler, \
- m0core_irqhandler, \
- dma_irqhandler, \
- 0, /* reserved */ \
- 0, /* reserved */ \
- ethernet_irqhandler, \
- sdio_irqhandler, \
- lcd_irqhandler, \
- usb0_irqhandler, \
- usb1_irqhandler, \
- sct_irqhandler, \
- ritimer_irqhandler, \
- timer0_irqhandler, \
- timer1_irqhandler, \
- timer2_irqhandler, \
- timer3_irqhandler, \
- mcpwm_irqhandler, \
- adc0_irqhandler, \
- i2c0_irqhandler, \
- i2c1_irqhandler, \
- spi_irqhandler, \
- adc1_irqhandler, \
- ssp0_irqhandler, \
- ssp1_irqhandler, \
- usart0_irqhandler, \
- uart1_irqhandler, \
- usart2_irqhandler, \
- usart3_irqhandler, \
- i2s0_irqhandler, \
- i2s1_irqhandler, \
- spifi_irqhandler, \
- sgpio_irqhandler, \
- pin_int0_irqhandler, \
- pin_int1_irqhandler, \
- pin_int2_irqhandler, \
- pin_int3_irqhandler, \
- pin_int4_irqhandler, \
- pin_int5_irqhandler, \
- pin_int6_irqhandler, \
- pin_int7_irqhandler, \
- gint0_irqhandler, \
- gint1_irqhandler, \
- eventrouter_irqhandler, \
- c_can1_irqhandler, \
- 0, /* reserved */ \
- 0, /* reserved */ \
- atimer_irqhandler, \
- rtc_irqhandler, \
- 0, /* reserved */ \
- wwdt_irqhandler, \
- 0, /* reserved */ \
- c_can0_irqhandler, \
- qei_irqhandler,
-
-#endif
diff --git a/include/libopencm3/lpc43xx/irq.yaml b/include/libopencm3/lpc43xx/irq.yaml
new file mode 100644
index 0000000..bc9536b
--- /dev/null
+++ b/include/libopencm3/lpc43xx/irq.yaml
@@ -0,0 +1,55 @@
+includeguard: LIBOPENCM3_LPC43xx_NVIC_H
+partname_humanreadable: LPC 43xx series
+partname_doxygen: LPC43xx
+irqs:
+ 0: dac
+ 1: m0core
+ 2: dma
+# reserved: 3, 4
+ 5: ethernet
+ 6: sdio
+ 7: lcd
+ 8: usb0
+ 9: usb1
+ 10: sct
+ 11: ritimer
+ 12: timer0
+ 13: timer1
+ 14: timer2
+ 15: timer3
+ 16: mcpwm
+ 17: adc0
+ 18: i2c0
+ 19: i2c1
+ 20: spi
+ 21: adc1
+ 22: ssp0
+ 23: ssp1
+ 24: usart0
+ 25: uart1
+ 26: usart2
+ 27: usart3
+ 28: i2s0
+ 29: i2s1
+ 30: spifi
+ 31: sgpio
+ 32: pin_int0
+ 33: pin_int1
+ 34: pin_int2
+ 35: pin_int3
+ 36: pin_int4
+ 37: pin_int5
+ 38: pin_int6
+ 39: pin_int7
+ 40: gint0
+ 41: gint1
+ 42: eventrouter
+ 43: c_can1
+# reserved: 44, 45
+ 46: atimer
+ 47: rtc
+# reserved: 48
+ 49: wwdt
+# reserved: 50
+ 51: c_can0
+ 52: qei
diff --git a/include/libopencm3/lpc43xx/nvic.h b/include/libopencm3/lpc43xx/nvic.h
deleted file mode 100644
index 0fc5cc6..0000000
--- a/include/libopencm3/lpc43xx/nvic.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* --- IRQ channel numbers-------------------------------------------------- */
-
-/* Cortex M4 System Interrupts */
-#define NVIC_NMI_IRQ -14
-#define NVIC_HARD_FAULT_IRQ -13
-#define NVIC_MEM_MANAGE_IRQ -12
-#define NVIC_BUS_FAULT_IRQ -11
-#define NVIC_USAGE_FAULT_IRQ -10
-/* irq numbers -6 to -9 are reserved */
-#define NVIC_SV_CALL_IRQ -5
-#define DEBUG_MONITOR_IRQ -4
-/* irq number -3 reserved */
-#define NVIC_PENDSV_IRQ -2
-#define NVIC_SYSTICK_IRQ -1
-
-/* LPC43xx M4 specific user interrupts */
-#define NVIC_M4_DAC_IRQ 0
-#define NVIC_M4_M0CORE_IRQ 1
-#define NVIC_M4_DMA_IRQ 2
-#define NVIC_M4_ETHERNET_IRQ 5
-#define NVIC_M4_SDIO_IRQ 6
-#define NVIC_M4_LCD_IRQ 7
-#define NVIC_M4_USB0_IRQ 8
-#define NVIC_M4_USB1_IRQ 9
-#define NVIC_M4_SCT_IRQ 10
-#define NVIC_M4_RITIMER_IRQ 11
-#define NVIC_M4_TIMER0_IRQ 12
-#define NVIC_M4_TIMER1_IRQ 13
-#define NVIC_M4_TIMER2_IRQ 14
-#define NVIC_M4_TIMER3_IRQ 15
-#define NVIC_M4_MCPWM_IRQ 16
-#define NVIC_M4_ADC0_IRQ 17
-#define NVIC_M4_I2C0_IRQ 18
-#define NVIC_M4_I2C1_IRQ 19
-#define NVIC_M4_SPI_IRQ 20
-#define NVIC_M4_ADC1_IRQ 21
-#define NVIC_M4_SSP0_IRQ 22
-#define NVIC_M4_SSP1_IRQ 23
-#define NVIC_M4_USART0_IRQ 24
-#define NVIC_M4_UART1_IRQ 25
-#define NVIC_M4_USART2_IRQ 26
-#define NVIC_M4_USART3_IRQ 27
-#define NVIC_M4_I2S0_IRQ 28
-#define NVIC_M4_I2S1_IRQ 29
-#define NVIC_M4_SPIFI_IRQ 30
-#define NVIC_M4_SGPIO_IRQ 31
-#define NVIC_M4_PIN_INT0_IRQ 32
-#define NVIC_M4_PIN_INT1_IRQ 33
-#define NVIC_M4_PIN_INT2_IRQ 34
-#define NVIC_M4_PIN_INT3_IRQ 35
-#define NVIC_M4_PIN_INT4_IRQ 36
-#define NVIC_M4_PIN_INT5_IRQ 37
-#define NVIC_M4_PIN_INT6_IRQ 38
-#define NVIC_M4_PIN_INT7_IRQ 39
-#define NVIC_M4_GINT0_IRQ 40
-#define NVIC_M4_GINT1_IRQ 41
-#define NVIC_M4_EVENTROUTER_IRQ 42
-#define NVIC_M4_C_CAN1_IRQ 43
-#define NVIC_M4_ATIMER_IRQ 46
-#define NVIC_M4_RTC_IRQ 47
-#define NVIC_M4_WWDT_IRQ 49
-#define NVIC_M4_C_CAN0_IRQ 51
-#define NVIC_M4_QEI_IRQ 52
-
-#define NVIC_IRQ_COUNT 53
-
-/* LPC43xx M0 specific user interrupts */
-//TODO
diff --git a/include/libopencm3/stm32/f1/irq.h b/include/libopencm3/stm32/f1/irq.h
deleted file mode 100644
index cfa07f1..0000000
--- a/include/libopencm3/stm32/f1/irq.h
+++ /dev/null
@@ -1,306 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
- * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef LIBOPENCM3_STM32_F1_IRQ_H
-#define LIBOPENCM3_STM32_F1_IRQ_H
-
-#define IRQ_WWDG 0
-#define IRQ_PVD 1
-#define IRQ_TAMPER 2
-#define IRQ_RTC 3
-#define IRQ_FLASH 4
-#define IRQ_RCC 5
-#define IRQ_EXTI0 6
-#define IRQ_EXTI1 7
-#define IRQ_EXTI2 8
-#define IRQ_EXTI3 9
-#define IRQ_EXTI4 10
-#define IRQ_DMA1_CHANNEL1 11
-#define IRQ_DMA1_CHANNEL2 12
-#define IRQ_DMA1_CHANNEL3 13
-#define IRQ_DMA1_CHANNEL4 14
-#define IRQ_DMA1_CHANNEL5 15
-#define IRQ_DMA1_CHANNEL6 16
-#define IRQ_DMA1_CHANNEL7 17
-#define IRQ_ADC1_2 18
-#define IRQ_USB_HP_CAN_TX 19
-#define IRQ_USB_LP_CAN_RX0 20
-#define IRQ_CAN_RX1 21
-#define IRQ_CAN_SCE 22
-#define IRQ_EXTI9_5 23
-#define IRQ_TIM1_BRK 24
-#define IRQ_TIM1_UP 25
-#define IRQ_TIM1_TRG_COM 26
-#define IRQ_TIM1_CC 27
-#define IRQ_TIM2 28
-#define IRQ_TIM3 29
-#define IRQ_TIM4 30
-#define IRQ_I2C1_EV 31
-#define IRQ_I2C1_ER 32
-#define IRQ_I2C2_EV 33
-#define IRQ_I2C2_ER 34
-#define IRQ_SPI1 35
-#define IRQ_SPI2 36
-#define IRQ_USART1 37
-#define IRQ_USART2 38
-#define IRQ_USART3 39
-#define IRQ_EXTI15_10 40
-#define IRQ_RTC_ALARM 41
-#define IRQ_USB_WAKEUP 42
-#define IRQ_TIM8_BRK 43
-#define IRQ_TIM8_UP 44
-#define IRQ_TIM8_TRG_COM 45
-#define IRQ_TIM8_CC 46
-#define IRQ_ADC3 47
-#define IRQ_FSMC 48
-#define IRQ_SDIO 49
-#define IRQ_TIM5 50
-#define IRQ_SPI3 51
-#define IRQ_UART4 52
-#define IRQ_UART5 53
-#define IRQ_TIM6 54
-#define IRQ_TIM7 55
-#define IRQ_DMA2_CHANNEL1 56
-#define IRQ_DMA2_CHANNEL2 57
-#define IRQ_DMA2_CHANNEL3 58
-#define IRQ_DMA2_CHANNEL4_5 59
-#define IRQ_DMA2_CHANNEL5 60
-#define IRQ_ETH 61
-#define IRQ_ETH_WKUP 62
-#define IRQ_CAN2_TX 63
-#define IRQ_CAN2_RX0 64
-#define IRQ_CAN2_RX1 65
-#define IRQ_CAN2_SCE 66
-#define IRQ_OTG_FS 67
-
-/* FIXME: number from list in lib/stm32/f1/vector.c, might miss irqs */
-#define IRQ_COUNT 68
-
-#define WEAK __attribute__ ((weak))
-
-void WEAK wwdg_isr(void);
-void WEAK pvd_isr(void);
-void WEAK tamper_isr(void);
-void WEAK rtc_isr(void);
-void WEAK flash_isr(void);
-void WEAK rcc_isr(void);
-void WEAK exti0_isr(void);
-void WEAK exti1_isr(void);
-void WEAK exti2_isr(void);
-void WEAK exti3_isr(void);
-void WEAK exti4_isr(void);
-void WEAK dma1_channel1_isr(void);
-void WEAK dma1_channel2_isr(void);
-void WEAK dma1_channel3_isr(void);
-void WEAK dma1_channel4_isr(void);
-void WEAK dma1_channel5_isr(void);
-void WEAK dma1_channel6_isr(void);
-void WEAK dma1_channel7_isr(void);
-void WEAK adc1_2_isr(void);
-void WEAK usb_hp_can_tx_isr(void);
-void WEAK usb_lp_can_rx0_isr(void);
-void WEAK can_rx1_isr(void);
-void WEAK can_sce_isr(void);
-void WEAK exti9_5_isr(void);
-void WEAK tim1_brk_isr(void);
-void WEAK tim1_up_isr(void);
-void WEAK tim1_trg_com_isr(void);
-void WEAK tim1_cc_isr(void);
-void WEAK tim2_isr(void);
-void WEAK tim3_isr(void);
-void WEAK tim4_isr(void);
-void WEAK i2c1_ev_isr(void);
-void WEAK i2c1_er_isr(void);
-void WEAK i2c2_ev_isr(void);
-void WEAK i2c2_er_isr(void);
-void WEAK spi1_isr(void);
-void WEAK spi2_isr(void);
-void WEAK usart1_isr(void);
-void WEAK usart2_isr(void);
-void WEAK usart3_isr(void);
-void WEAK exti15_10_isr(void);
-void WEAK rtc_alarm_isr(void);
-void WEAK usb_wakeup_isr(void);
-void WEAK tim8_brk_isr(void);
-void WEAK tim8_up_isr(void);
-void WEAK tim8_trg_com_isr(void);
-void WEAK tim8_cc_isr(void);
-void WEAK adc3_isr(void);
-void WEAK fsmc_isr(void);
-void WEAK sdio_isr(void);
-void WEAK tim5_isr(void);
-void WEAK spi3_isr(void);
-void WEAK uart4_isr(void);
-void WEAK uart5_isr(void);
-void WEAK tim6_isr(void);
-void WEAK tim7_isr(void);
-void WEAK dma2_channel1_isr(void);
-void WEAK dma2_channel2_isr(void);
-void WEAK dma2_channel3_isr(void);
-void WEAK dma2_channel4_5_isr(void);
-void WEAK dma2_channel5_isr(void);
-void WEAK eth_isr(void);
-void WEAK eth_wkup_isr(void);
-void WEAK can2_tx_isr(void);
-void WEAK can2_rx0_isr(void);
-void WEAK can2_rx1_isr(void);
-void WEAK can2_sce_isr(void);
-void WEAK otg_fs_isr(void);
-
-#pragma weak wwdg_isr = null_handler
-#pragma weak pvd_isr = null_handler
-#pragma weak tamper_isr = null_handler
-#pragma weak rtc_isr = null_handler
-#pragma weak flash_isr = null_handler
-#pragma weak rcc_isr = null_handler
-#pragma weak exti0_isr = null_handler
-#pragma weak exti1_isr = null_handler
-#pragma weak exti2_isr = null_handler
-#pragma weak exti3_isr = null_handler
-#pragma weak exti4_isr = null_handler
-#pragma weak dma1_channel1_isr = null_handler
-#pragma weak dma1_channel2_isr = null_handler
-#pragma weak dma1_channel3_isr = null_handler
-#pragma weak dma1_channel4_isr = null_handler
-#pragma weak dma1_channel5_isr = null_handler
-#pragma weak dma1_channel6_isr = null_handler
-#pragma weak dma1_channel7_isr = null_handler
-#pragma weak adc1_2_isr = null_handler
-#pragma weak usb_hp_can_tx_isr = null_handler
-#pragma weak usb_lp_can_rx0_isr = null_handler
-#pragma weak can_rx1_isr = null_handler
-#pragma weak can_sce_isr = null_handler
-#pragma weak exti9_5_isr = null_handler
-#pragma weak tim1_brk_isr = null_handler
-#pragma weak tim1_up_isr = null_handler
-#pragma weak tim1_trg_com_isr = null_handler
-#pragma weak tim1_cc_isr = null_handler
-#pragma weak tim2_isr = null_handler
-#pragma weak tim3_isr = null_handler
-#pragma weak tim4_isr = null_handler
-#pragma weak i2c1_ev_isr = null_handler
-#pragma weak i2c1_er_isr = null_handler
-#pragma weak i2c2_ev_isr = null_handler
-#pragma weak i2c2_er_isr = null_handler
-#pragma weak spi1_isr = null_handler
-#pragma weak spi2_isr = null_handler
-#pragma weak usart1_isr = null_handler
-#pragma weak usart2_isr = null_handler
-#pragma weak usart3_isr = null_handler
-#pragma weak exti15_10_isr = null_handler
-#pragma weak rtc_alarm_isr = null_handler
-#pragma weak usb_wakeup_isr = null_handler
-#pragma weak tim8_brk_isr = null_handler
-#pragma weak tim8_up_isr = null_handler
-#pragma weak tim8_trg_com_isr = null_handler
-#pragma weak tim8_cc_isr = null_handler
-#pragma weak adc3_isr = null_handler
-#pragma weak fsmc_isr = null_handler
-#pragma weak sdio_isr = null_handler
-#pragma weak tim5_isr = null_handler
-#pragma weak spi3_isr = null_handler
-#pragma weak uart4_isr = null_handler
-#pragma weak uart5_isr = null_handler
-#pragma weak tim6_isr = null_handler
-#pragma weak tim7_isr = null_handler
-#pragma weak dma2_channel1_isr = null_handler
-#pragma weak dma2_channel2_isr = null_handler
-#pragma weak dma2_channel3_isr = null_handler
-#pragma weak dma2_channel4_5_isr = null_handler
-#pragma weak dma2_channel5_isr
-#pragma weak eth_isr = null_handler
-#pragma weak eth_wkup_isr = null_handler
-#pragma weak can2_tx_isr = null_handler
-#pragma weak can2_rx0_isr = null_handler
-#pragma weak can2_rx1_isr = null_handler
-#pragma weak can2_sce_isr = null_handler
-#pragma weak otg_fs_isr = null_handler
-
-#define IRQ_HANDLERS \
- wwdg_isr, \
- pvd_isr, \
- tamper_isr, \
- rtc_isr, \
- flash_isr, \
- rcc_isr, \
- exti0_isr, \
- exti1_isr, \
- exti2_isr, \
- exti3_isr, \
- exti4_isr, \
- dma1_channel1_isr, \
- dma1_channel2_isr, \
- dma1_channel3_isr, \
- dma1_channel4_isr, \
- dma1_channel5_isr, \
- dma1_channel6_isr, \
- dma1_channel7_isr, \
- adc1_2_isr, \
- usb_hp_can_tx_isr, \
- usb_lp_can_rx0_isr, \
- can_rx1_isr, \
- can_sce_isr, \
- exti9_5_isr, \
- tim1_brk_isr, \
- tim1_up_isr, \
- tim1_trg_com_isr, \
- tim1_cc_isr, \
- tim2_isr, \
- tim3_isr, \
- tim4_isr, \
- i2c1_ev_isr, \
- i2c1_er_isr, \
- i2c2_ev_isr, \
- i2c2_er_isr, \
- spi1_isr, \
- spi2_isr, \
- usart1_isr, \
- usart2_isr, \
- usart3_isr, \
- exti15_10_isr, \
- rtc_alarm_isr, \
- usb_wakeup_isr, \
- tim8_brk_isr, \
- tim8_up_isr, \
- tim8_trg_com_isr, \
- tim8_cc_isr, \
- adc3_isr, \
- fsmc_isr, \
- sdio_isr, \
- tim5_isr, \
- spi3_isr, \
- uart4_isr, \
- uart5_isr, \
- tim6_isr, \
- tim7_isr, \
- dma2_channel1_isr, \
- dma2_channel2_isr, \
- dma2_channel3_isr, \
- dma2_channel4_5_isr, \
- dma2_channel5_isr, \
- eth_isr, \
- eth_wkup_isr, \
- can2_tx_isr, \
- can2_rx0_isr, \
- can2_rx1_isr, \
- can2_sce_isr, \
- otg_fs_isr, \
-
-#endif
diff --git a/include/libopencm3/stm32/f1/irq.yaml b/include/libopencm3/stm32/f1/irq.yaml
new file mode 100644
index 0000000..14cbcc0
--- /dev/null
+++ b/include/libopencm3/stm32/f1/irq.yaml
@@ -0,0 +1,72 @@
+includeguard: LIBOPENCM3_STM32_F1_NVIC_H
+partname_humanreadable: STM32 F1 series
+partname_doxygen: STM32F1
+irqs:
+ - wwdg
+ - pvd
+ - tamper
+ - rtc
+ - flash
+ - rcc
+ - exti0
+ - exti1
+ - exti2
+ - exti3
+ - exti4
+ - dma1_channel1
+ - dma1_channel2
+ - dma1_channel3
+ - dma1_channel4
+ - dma1_channel5
+ - dma1_channel6
+ - dma1_channel7
+ - adc1_2
+ - usb_hp_can_tx
+ - usb_lp_can_rx0
+ - can_rx1
+ - can_sce
+ - exti9_5
+ - tim1_brk
+ - tim1_up
+ - tim1_trg_com
+ - tim1_cc
+ - tim2
+ - tim3
+ - tim4
+ - i2c1_ev
+ - i2c1_er
+ - i2c2_ev
+ - i2c2_er
+ - spi1
+ - spi2
+ - usart1
+ - usart2
+ - usart3
+ - exti15_10
+ - rtc_alarm
+ - usb_wakeup
+ - tim8_brk
+ - tim8_up
+ - tim8_trg_com
+ - tim8_cc
+ - adc3
+ - fsmc
+ - sdio
+ - tim5
+ - spi3
+ - uart4
+ - uart5
+ - tim6
+ - tim7
+ - dma2_channel1
+ - dma2_channel2
+ - dma2_channel3
+ - dma2_channel4_5
+ - dma2_channel5
+ - eth
+ - eth_wkup
+ - can2_tx
+ - can2_rx0
+ - can2_rx1
+ - can2_sce
+ - otg_fs
diff --git a/include/libopencm3/stm32/f1/nvic_f1.h b/include/libopencm3/stm32/f1/nvic_f1.h
deleted file mode 100644
index 1544e4f..0000000
--- a/include/libopencm3/stm32/f1/nvic_f1.h
+++ /dev/null
@@ -1,116 +0,0 @@
-/** @brief <b>Defined Constants and Types for the STM32F1xx Nested Vectored Interrupt Controller</b>
-
-@version 1.0.0
-
-@author @htmlonly &copy; @endhtmlonly 2010 Thomas Otto <tommi@viadmin.org>
-
-@date 18 August 2012
-
-LGPL License Terms @ref lgpl_license
- */
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef LIBOPENCM3_NVIC_F1_H
-#define LIBOPENCM3_NVIC_F1_H
-
-/* --- IRQ channel numbers-------------------------------------------------- */
-
-/* Note: These F1 specific user interrupt definitions supplement the
- * general NVIC definitions in ../nvic.h
- */
-
-/* User Interrupts */
-/** @defgroup nvic_stm32f1_userint STM32F1xx User Interrupts
-@ingroup STM32F_nvic_defines
-
-@{*/
-#define NVIC_WWDG_IRQ 0
-#define NVIC_PVD_IRQ 1
-#define NVIC_TAMPER_IRQ 2
-#define NVIC_RTC_IRQ 3
-#define NVIC_FLASH_IRQ 4
-#define NVIC_RCC_IRQ 5
-#define NVIC_EXTI0_IRQ 6
-#define NVIC_EXTI1_IRQ 7
-#define NVIC_EXTI2_IRQ 8
-#define NVIC_EXTI3_IRQ 9
-#define NVIC_EXTI4_IRQ 10
-#define NVIC_DMA1_CHANNEL1_IRQ 11
-#define NVIC_DMA1_CHANNEL2_IRQ 12
-#define NVIC_DMA1_CHANNEL3_IRQ 13
-#define NVIC_DMA1_CHANNEL4_IRQ 14
-#define NVIC_DMA1_CHANNEL5_IRQ 15
-#define NVIC_DMA1_CHANNEL6_IRQ 16
-#define NVIC_DMA1_CHANNEL7_IRQ 17
-#define NVIC_ADC1_2_IRQ 18
-#define NVIC_USB_HP_CAN_TX_IRQ 19
-#define NVIC_USB_LP_CAN_RX0_IRQ 20
-#define NVIC_CAN_RX1_IRQ 21
-#define NVIC_CAN_SCE_IRQ 22
-#define NVIC_EXTI9_5_IRQ 23
-#define NVIC_TIM1_BRK_IRQ 24
-#define NVIC_TIM1_UP_IRQ 25
-#define NVIC_TIM1_TRG_COM_IRQ 26
-#define NVIC_TIM1_CC_IRQ 27
-#define NVIC_TIM2_IRQ 28
-#define NVIC_TIM3_IRQ 29
-#define NVIC_TIM4_IRQ 30
-#define NVIC_I2C1_EV_IRQ 31
-#define NVIC_I2C1_ER_IRQ 32
-#define NVIC_I2C2_EV_IRQ 33
-#define NVIC_I2C2_ER_IRQ 34
-#define NVIC_SPI1_IRQ 35
-#define NVIC_SPI2_IRQ 36
-#define NVIC_USART1_IRQ 37
-#define NVIC_USART2_IRQ 38
-#define NVIC_USART3_IRQ 39
-#define NVIC_EXTI15_10_IRQ 40
-#define NVIC_RTC_ALARM_IRQ 41
-#define NVIC_USB_WAKEUP_IRQ 42
-#define NVIC_TIM8_BRK_IRQ 43
-#define NVIC_TIM8_UP_IRQ 44
-#define NVIC_TIM8_TRG_COM_IRQ 45
-#define NVIC_TIM8_CC_IRQ 46
-#define NVIC_ADC3_IRQ 47
-#define NVIC_FSMC_IRQ 48
-#define NVIC_SDIO_IRQ 49
-#define NVIC_TIM5_IRQ 50
-#define NVIC_SPI3_IRQ 51
-#define NVIC_UART4_IRQ 52
-#define NVIC_UART5_IRQ 53
-#define NVIC_TIM6_IRQ 54
-#define NVIC_TIM7_IRQ 55
-#define NVIC_DMA2_CHANNEL1_IRQ 56
-#define NVIC_DMA2_CHANNEL2_IRQ 57
-#define NVIC_DMA2_CHANNEL3_IRQ 58
-#define NVIC_DMA2_CHANNEL4_5_IRQ 59
-#define NVIC_DMA2_CHANNEL5_IRQ 60
-#define NVIC_ETH_IRQ 61
-#define NVIC_ETH_WKUP_IRQ 62
-#define NVIC_CAN2_TX_IRQ 63
-#define NVIC_CAN2_RX0_IRQ 64
-#define NVIC_CAN2_RX1_IRQ 65
-#define NVIC_CAN2_SCE_IRQ 66
-#define NVIC_OTG_FS_IRQ 67
-
-#define NVIC_IRQ_COUNT 68
-/**@}*/
-
-#endif
diff --git a/include/libopencm3/stm32/f2/irq.h b/include/libopencm3/stm32/f2/irq.h
deleted file mode 100644
index 7aec142..0000000
--- a/include/libopencm3/stm32/f2/irq.h
+++ /dev/null
@@ -1,359 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
- * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
- * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef LIBOPENCM3_STM32_F2_IRQ_H
-#define LIBOPENCM3_STM32_F2_IRQ_H
-
-#define IRQ_WWDG 0
-#define IRQ_PVD 1
-#define IRQ_TAMP_STAMP 2
-#define IRQ_RTC_WKUP 3
-#define IRQ_FLASH 4
-#define IRQ_RCC 5
-#define IRQ_EXTI0 6
-#define IRQ_EXTI1 7
-#define IRQ_EXTI2 8
-#define IRQ_EXTI3 9
-#define IRQ_EXTI4 10
-#define IRQ_DMA1_STREAM0 11
-#define IRQ_DMA1_STREAM1 12
-#define IRQ_DMA1_STREAM2 13
-#define IRQ_DMA1_STREAM3 14
-#define IRQ_DMA1_STREAM4 15
-#define IRQ_DMA1_STREAM5 16
-#define IRQ_DMA1_STREAM6 17
-#define IRQ_ADC 18
-#define IRQ_CAN1_TX 19
-#define IRQ_CAN1_RX0 20
-#define IRQ_CAN1_RX1 21
-#define IRQ_CAN1_SCE 22
-#define IRQ_EXTI9_5 23
-#define IRQ_TIM1_BRK_TIM9 24
-#define IRQ_TIM1_UP_TIM10 25
-#define IRQ_TIM1_TRG_COM_TIM11 26
-#define IRQ_TIM1_CC 27
-#define IRQ_TIM2 28
-#define IRQ_TIM3 29
-#define IRQ_TIM4 30
-#define IRQ_I2C1_EV 31
-#define IRQ_I2C1_ER 32
-#define IRQ_I2C2_EV 33
-#define IRQ_I2C2_ER 34
-#define IRQ_SPI1 35
-#define IRQ_SPI2 36
-#define IRQ_USART1 37
-#define IRQ_USART2 38
-#define IRQ_USART3 39
-#define IRQ_EXTI15_10 40
-#define IRQ_RTC_ALARM 41
-#define IRQ_USB_FS_WKUP 42
-#define IRQ_TIM8_BRK_TIM12 43
-#define IRQ_TIM8_UP_TIM13 44
-#define IRQ_TIM8_TRG_COM_TIM14 45
-#define IRQ_TIM8_CC 46
-#define IRQ_DMA1_STREAM7 47
-#define IRQ_FSMC 48
-#define IRQ_SDIO 49
-#define IRQ_TIM5 50
-#define IRQ_SPI3 51
-#define IRQ_UART4 52
-#define IRQ_UART5 53
-#define IRQ_TIM6_DAC 54
-#define IRQ_TIM7 55
-#define IRQ_DMA2_STREAM0 56
-#define IRQ_DMA2_STREAM1 57
-#define IRQ_DMA2_STREAM2 58
-#define IRQ_DMA2_STREAM3 59
-#define IRQ_DMA2_STREAM4 60
-#define IRQ_ETH 61
-#define IRQ_ETH_WKUP 62
-#define IRQ_CAN2_TX 63
-#define IRQ_CAN2_RX0 64
-#define IRQ_CAN2_RX1 65
-#define IRQ_CAN2_SCE 66
-#define IRQ_OTG_FS 67
-#define IRQ_DMA2_STREAM5 68
-#define IRQ_DMA2_STREAM6 69
-#define IRQ_DMA2_STREAM7 70
-#define IRQ_USART6 71
-#define IRQ_I2C3_EV 72
-#define IRQ_I2C3_ER 73
-#define IRQ_OTG_HS_EP1_OUT 74
-#define IRQ_OTG_HS_EP1_IN 75
-#define IRQ_OTG_HS_WKUP 76
-#define IRQ_OTG_HS 77
-#define IRQ_DCMI 78
-#define IRQ_CRYP 79
-#define IRQ_HASH_RNG 80
-
-/* FIXME: number from list in lib/stm32/f2/vector.c, might miss irqs */
-#define IRQ_COUNT 81
-
-#define WEAK __attribute__ ((weak))
-
-void WEAK wwdg_isr(void);
-void WEAK pvd_isr(void);
-void WEAK tamp_stamp_isr(void);
-void WEAK rtc_wkup_isr(void);
-void WEAK flash_isr(void);
-void WEAK rcc_isr(void);
-void WEAK exti0_isr(void);
-void WEAK exti1_isr(void);
-void WEAK exti2_isr(void);
-void WEAK exti3_isr(void);
-void WEAK exti4_isr(void);
-void WEAK dma1_stream0_isr(void);
-void WEAK dma1_stream1_isr(void);
-void WEAK dma1_stream2_isr(void);
-void WEAK dma1_stream3_isr(void);
-void WEAK dma1_stream4_isr(void);
-void WEAK dma1_stream5_isr(void);
-void WEAK dma1_stream6_isr(void);
-void WEAK adc_isr(void);
-void WEAK can1_tx_isr(void);
-void WEAK can1_rx0_isr(void);
-void WEAK can1_rx1_isr(void);
-void WEAK can1_sce_isr(void);
-void WEAK exti9_5_isr(void);
-void WEAK tim1_brk_tim9_isr(void);
-void WEAK tim1_up_tim10_isr(void);
-void WEAK tim1_trg_com_tim11_isr(void);
-void WEAK tim1_cc_isr(void);
-void WEAK tim2_isr(void);
-void WEAK tim3_isr(void);
-void WEAK tim4_isr(void);
-void WEAK i2c1_ev_isr(void);
-void WEAK i2c1_er_isr(void);
-void WEAK i2c2_ev_isr(void);
-void WEAK i2c2_er_isr(void);
-void WEAK spi1_isr(void);
-void WEAK spi2_isr(void);
-void WEAK usart1_isr(void);
-void WEAK usart2_isr(void);
-void WEAK usart3_isr(void);
-void WEAK exti15_10_isr(void);
-void WEAK rtc_alarm_isr(void);
-void WEAK usb_fs_wkup_isr(void);
-void WEAK tim8_brk_tim12_isr(void);
-void WEAK tim8_up_tim13_isr(void);
-void WEAK tim8_trg_com_tim14_isr(void);
-void WEAK tim8_cc_isr(void);
-void WEAK dma1_stream7_isr(void);
-void WEAK fsmc_isr(void);
-void WEAK sdio_isr(void);
-void WEAK tim5_isr(void);
-void WEAK spi3_isr(void);
-void WEAK uart4_isr(void);
-void WEAK uart5_isr(void);
-void WEAK tim6_dac_isr(void);
-void WEAK tim7_isr(void);
-void WEAK dma2_stream0_isr(void);
-void WEAK dma2_stream1_isr(void);
-void WEAK dma2_stream2_isr(void);
-void WEAK dma2_stream3_isr(void);
-void WEAK dma2_stream4_isr(void);
-void WEAK eth_isr(void);
-void WEAK eth_wkup_isr(void);
-void WEAK can2_tx_isr(void);
-void WEAK can2_rx0_isr(void);
-void WEAK can2_rx1_isr(void);
-void WEAK can2_sce_isr(void);
-void WEAK otg_fs_isr(void);
-void WEAK dma2_stream5_isr(void);
-void WEAK dma2_stream6_isr(void);
-void WEAK dma2_stream7_isr(void);
-void WEAK usart6_isr(void);
-void WEAK i2c3_ev_isr(void);
-void WEAK i2c3_er_isr(void);
-void WEAK otg_hs_ep1_out_isr(void);
-void WEAK otg_hs_ep1_in_isr(void);
-void WEAK otg_hs_wkup_isr(void);
-void WEAK otg_hs_isr(void);
-void WEAK dcmi_isr(void);
-void WEAK cryp_isr(void);
-void WEAK hash_rng_isr(void);
-
-#pragma weak wwdg_isr = null_handler
-#pragma weak pvd_isr = null_handler
-#pragma weak tamp_stamp_isr = null_handler
-#pragma weak rtc_wkup_isr = null_handler
-#pragma weak flash_isr = null_handler
-#pragma weak rcc_isr = null_handler
-#pragma weak exti0_isr = null_handler
-#pragma weak exti1_isr = null_handler
-#pragma weak exti2_isr = null_handler
-#pragma weak exti3_isr = null_handler
-#pragma weak exti4_isr = null_handler
-#pragma weak dma1_stream0_isr = null_handler
-#pragma weak dma1_stream1_isr = null_handler
-#pragma weak dma1_stream2_isr = null_handler
-#pragma weak dma1_stream3_isr = null_handler
-#pragma weak dma1_stream4_isr = null_handler
-#pragma weak dma1_stream5_isr = null_handler
-#pragma weak dma1_stream6_isr = null_handler
-#pragma weak adc_isr = null_handler
-#pragma weak can1_tx_isr = null_handler
-#pragma weak can1_rx0_isr = null_handler
-#pragma weak can1_rx1_isr = null_handler
-#pragma weak can1_sce_isr = null_handler
-#pragma weak exti9_5_isr = null_handler
-#pragma weak tim1_brk_tim9_isr = null_handler
-#pragma weak tim1_up_tim10_isr = null_handler
-#pragma weak tim1_trg_com_tim11_isr = null_handler
-#pragma weak tim1_cc_isr = null_handler
-#pragma weak tim2_isr = null_handler
-#pragma weak tim3_isr = null_handler
-#pragma weak tim4_isr = null_handler
-#pragma weak i2c1_ev_isr = null_handler
-#pragma weak i2c1_er_isr = null_handler
-#pragma weak i2c2_ev_isr = null_handler
-#pragma weak i2c2_er_isr = null_handler
-#pragma weak spi1_isr = null_handler
-#pragma weak spi2_isr = null_handler
-#pragma weak usart1_isr = null_handler
-#pragma weak usart2_isr = null_handler
-#pragma weak usart3_isr = null_handler
-#pragma weak exti15_10_isr = null_handler
-#pragma weak rtc_alarm_isr = null_handler
-#pragma weak usb_fs_wkup_isr = null_handler
-#pragma weak tim8_brk_tim12_isr = null_handler
-#pragma weak tim8_up_tim13_isr = null_handler
-#pragma weak tim8_trg_com_tim14_isr = null_handler
-#pragma weak tim8_cc_isr = null_handler
-#pragma weak dma1_stream7_isr = null_handler
-#pragma weak fsmc_isr = null_handler
-#pragma weak sdio_isr = null_handler
-#pragma weak tim5_isr = null_handler
-#pragma weak spi3_isr = null_handler
-#pragma weak uart4_isr = null_handler
-#pragma weak uart5_isr = null_handler
-#pragma weak tim6_dac_isr = null_handler
-#pragma weak tim7_isr = null_handler
-#pragma weak dma2_stream0_isr = null_handler
-#pragma weak dma2_stream1_isr = null_handler
-#pragma weak dma2_stream2_isr = null_handler
-#pragma weak dma2_stream3_isr = null_handler
-#pragma weak dma2_stream4_isr = null_handler
-#pragma weak eth_isr = null_handler
-#pragma weak eth_wkup_isr = null_handler
-#pragma weak can2_tx_isr = null_handler
-#pragma weak can2_rx0_isr = null_handler
-#pragma weak can2_rx1_isr = null_handler
-#pragma weak can2_sce_isr = null_handler
-#pragma weak otg_fs_isr = null_handler
-#pragma weak dma2_stream5_isr = null_handler
-#pragma weak dma2_stream6_isr = null_handler
-#pragma weak dma2_stream7_isr = null_handler
-#pragma weak usart6_isr = null_handler
-#pragma weak i2c3_ev_isr = null_handler
-#pragma weak i2c3_er_isr = null_handler
-#pragma weak otg_hs_ep1_out_isr = null_handler
-#pragma weak otg_hs_ep1_in_isr = null_handler
-#pragma weak otg_hs_wkup_isr = null_handler
-#pragma weak otg_hs_isr = null_handler
-#pragma weak dcmi_isr = null_handler
-#pragma weak cryp_isr = null_handler
-#pragma weak hash_rng_isr = null_handler
-
-#define IRQ_HANDLERS \
- wwdg_isr, \
- pvd_isr, \
- tamp_stamp_isr, \
- rtc_wkup_isr, \
- flash_isr, \
- rcc_isr, \
- exti0_isr, \
- exti1_isr, \
- exti2_isr, \
- exti3_isr, \
- exti4_isr, \
- dma1_stream0_isr, \
- dma1_stream1_isr, \
- dma1_stream2_isr, \
- dma1_stream3_isr, \
- dma1_stream4_isr, \
- dma1_stream5_isr, \
- dma1_stream6_isr, \
- adc_isr, \
- can1_tx_isr, \
- can1_rx0_isr, \
- can1_rx1_isr, \
- can1_sce_isr, \
- exti9_5_isr, \
- tim1_brk_tim9_isr, \
- tim1_up_tim10_isr, \
- tim1_trg_com_tim11_isr, \
- tim1_cc_isr, \
- tim2_isr, \
- tim3_isr, \
- tim4_isr, \
- i2c1_ev_isr, \
- i2c1_er_isr, \
- i2c2_ev_isr, \
- i2c2_er_isr, \
- spi1_isr, \
- spi2_isr, \
- usart1_isr, \
- usart2_isr, \
- usart3_isr, \
- exti15_10_isr, \
- rtc_alarm_isr, \
- usb_fs_wkup_isr, \
- tim8_brk_tim12_isr, \
- tim8_up_tim13_isr, \
- tim8_trg_com_tim14_isr, \
- tim8_cc_isr, \
- dma1_stream7_isr, \
- fsmc_isr, \
- sdio_isr, \
- tim5_isr, \
- spi3_isr, \
- uart4_isr, \
- uart5_isr, \
- tim6_dac_isr, \
- tim7_isr, \
- dma2_stream0_isr, \
- dma2_stream1_isr, \
- dma2_stream2_isr, \
- dma2_stream3_isr, \
- dma2_stream4_isr, \
- eth_isr, \
- eth_wkup_isr, \
- can2_tx_isr, \
- can2_rx0_isr, \
- can2_rx1_isr, \
- can2_sce_isr, \
- otg_fs_isr, \
- dma2_stream5_isr, \
- dma2_stream6_isr, \
- dma2_stream7_isr, \
- usart6_isr, \
- i2c3_ev_isr, \
- i2c3_er_isr, \
- otg_hs_ep1_out_isr, \
- otg_hs_ep1_in_isr, \
- otg_hs_wkup_isr, \
- otg_hs_isr, \
- dcmi_isr, \
- cryp_isr, \
- hash_rng_isr,
-
-#endif
diff --git a/include/libopencm3/stm32/f2/irq.yaml b/include/libopencm3/stm32/f2/irq.yaml
new file mode 100644
index 0000000..c3600b3
--- /dev/null
+++ b/include/libopencm3/stm32/f2/irq.yaml
@@ -0,0 +1,85 @@
+includeguard: LIBOPENCM3_STM32_F2_NVIC_H
+partname_humanreadable: STM32 F2 series
+partname_doxygen: STM32F2
+irqs:
+ - nvic_wwdg
+ - pvd
+ - tamp_stamp
+ - rtc_wkup
+ - flash
+ - rcc
+ - exti0
+ - exti1
+ - exti2
+ - exti3
+ - exti4
+ - dma1_stream0
+ - dma1_stream1
+ - dma1_stream2
+ - dma1_stream3
+ - dma1_stream4
+ - dma1_stream5
+ - dma1_stream6
+ - adc
+ - can1_tx
+ - can1_rx0
+ - can1_rx1
+ - can1_sce
+ - exti9_5
+ - tim1_brk_tim9
+ - tim1_up_tim10
+ - tim1_trg_com_tim11
+ - tim1_cc
+ - tim2
+ - tim3
+ - tim4
+ - i2c1_ev
+ - i2c1_er
+ - i2c2_ev
+ - i2c2_er
+ - spi1
+ - spi2
+ - usart1
+ - usart2
+ - usart3
+ - exti15_10
+ - rtc_alarm
+ - usb_fs_wkup
+ - tim8_brk_tim12
+ - tim8_up_tim13
+ - tim8_trg_com_tim14
+ - tim8_cc
+ - dma1_stream7
+ - fsmc
+ - sdio
+ - tim5
+ - spi3
+ - uart4
+ - uart5
+ - tim6_dac
+ - tim7
+ - dma2_stream0
+ - dma2_stream1
+ - dma2_stream2
+ - dma2_stream3
+ - dma2_stream4
+ - eth
+ - eth_wkup
+ - can2_tx
+ - can2_rx0
+ - can2_rx1
+ - can2_sce
+ - otg_fs
+ - dma2_stream5
+ - dma2_stream6
+ - dma2_stream7
+ - usart6
+ - i2c3_ev
+ - i2c3_er
+ - otg_hs_ep1_out
+ - otg_hs_ep1_in
+ - otg_hs_wkup
+ - otg_hs
+ - dcmi
+ - cryp
+ - hash_rng
diff --git a/include/libopencm3/stm32/f2/nvic_f2.h b/include/libopencm3/stm32/f2/nvic_f2.h
deleted file mode 100644
index 65a990d..0000000
--- a/include/libopencm3/stm32/f2/nvic_f2.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef LIBOPENCM3_NVIC_F2_H
-#define LIBOPENCM3_NVIC_F2_H
-
-/* --- IRQ channel numbers-------------------------------------------------- */
-
-/* Note: These F2 specific user interrupt definitions supplement the
- * general NVIC definitions in ../nvic.h
- */
-
-/* User Interrupts */
-#define NVIC_NVIC_WWDG_IRQ 0
-#define NVIC_PVD_IRQ 1
-#define NVIC_TAMP_STAMP_IRQ 2
-#define NVIC_RTC_WKUP_IRQ 3
-#define NVIC_FLASH_IRQ 4
-#define NVIC_RCC_IRQ 5
-#define NVIC_EXTI0_IRQ 6
-#define NVIC_EXTI1_IRQ 7
-#define NVIC_EXTI2_IRQ 8
-#define NVIC_EXTI3_IRQ 9
-#define NVIC_EXTI4_IRQ 10
-#define NVIC_DMA1_STREAM0_IRQ 11
-#define NVIC_DMA1_STREAM1_IRQ 12
-#define NVIC_DMA1_STREAM2_IRQ 13
-#define NVIC_DMA1_STREAM3_IRQ 14
-#define NVIC_DMA1_STREAM4_IRQ 15
-#define NVIC_DMA1_STREAM5_IRQ 16
-#define NVIC_DMA1_STREAM6_IRQ 17
-#define NVIC_ADC_IRQ 18
-#define NVIC_CAN1_TX_IRQ 19
-#define NVIC_CAN1_RX0_IRQ 20
-#define NVIC_CAN1_RX1_IRQ 21
-#define NVIC_CAN1_SCE_IRQ 22
-#define NVIC_EXTI9_5_IRQ 23
-#define NVIC_TIM1_BRK_TIM9_IRQ 24
-#define NVIC_TIM1_UP_TIM10_IRQ 25
-#define NVIC_TIM1_TRG_COM_TIM11_IRQ 26
-#define NVIC_TIM1_CC_IRQ 27
-#define NVIC_TIM2_IRQ 28
-#define NVIC_TIM3_IRQ 29
-#define NVIC_TIM4_IRQ 30
-#define NVIC_I2C1_EV_IRQ 31
-#define NVIC_I2C1_ER_IRQ 32
-#define NVIC_I2C2_EV_IRQ 33
-#define NVIC_I2C2_ER_IRQ 34
-#define NVIC_SPI1_IRQ 35
-#define NVIC_SPI2_IRQ 36
-#define NVIC_USART1_IRQ 37
-#define NVIC_USART2_IRQ 38
-#define NVIC_USART3_IRQ 39
-#define NVIC_EXTI15_10_IRQ 40
-#define NVIC_RTC_ALARM_IRQ 41
-#define NVIC_USB_FS_WKUP_IRQ 42
-#define NVIC_TIM8_BRK_TIM12_IRQ 43
-#define NVIC_TIM8_UP_TIM13_IRQ 44
-#define NVIC_TIM8_TRG_COM_TIM14_IRQ 45
-#define NVIC_TIM8_CC_IRQ 46
-#define NVIC_DMA1_STREAM7_IRQ 47
-#define NVIC_FSMC_IRQ 48
-#define NVIC_SDIO_IRQ 49
-#define NVIC_TIM5_IRQ 50
-#define NVIC_SPI3_IRQ 51
-#define NVIC_UART4_IRQ 52
-#define NVIC_UART5_IRQ 53
-#define NVIC_TIM6_DAC_IRQ 54
-#define NVIC_TIM7_IRQ 55
-#define NVIC_DMA2_STREAM0_IRQ 56
-#define NVIC_DMA2_STREAM1_IRQ 57
-#define NVIC_DMA2_STREAM2_IRQ 58
-#define NVIC_DMA2_STREAM3_IRQ 59
-#define NVIC_DMA2_STREAM4_IRQ 60
-#define NVIC_ETH_IRQ 61
-#define NVIC_ETH_WKUP_IRQ 62
-#define NVIC_CAN2_TX_IRQ 63
-#define NVIC_CAN2_RX0_IRQ 64
-#define NVIC_CAN2_RX1_IRQ 65
-#define NVIC_CAN2_SCE_IRQ 66
-#define NVIC_OTG_FS_IRQ 67
-#define NVIC_DMA2_STREAM5_IRQ 68
-#define NVIC_DMA2_STREAM6_IRQ 69
-#define NVIC_DMA2_STREAM7_IRQ 70
-#define NVIC_USART6_IRQ 71
-#define NVIC_I2C3_EV_IRQ 72
-#define NVIC_I2C3_ER_IRQ 73
-#define NVIC_OTG_HS_EP1_OUT_IRQ 74
-#define NVIC_OTG_HS_EP1_IN_IRQ 75
-#define NVIC_OTG_HS_WKUP_IRQ 76
-#define NVIC_OTG_HS_IRQ 77
-#define NVIC_DCMI_IRQ 78
-#define NVIC_CRYP_IRQ 79
-#define NVIC_HASH_RNG_IRQ 80
-
-#define NVIC_IRQ_COUNT 81
-
-#endif
diff --git a/include/libopencm3/stm32/f4/irq.h b/include/libopencm3/stm32/f4/irq.h
deleted file mode 100644
index 4f4f5e5..0000000
--- a/include/libopencm3/stm32/f4/irq.h
+++ /dev/null
@@ -1,359 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
- * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
- * Copyright (C) 2012 chrysn <chrysn@fsfe.org>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef LIBOPENCM3_STM32_F4_IRQ_H
-#define LIBOPENCM3_STM32_F4_IRQ_H
-
-#define IRQ_WWDG 0
-#define IRQ_PVD 1
-#define IRQ_TAMP_STAMP 2
-#define IRQ_RTC_WKUP 3
-#define IRQ_FLASH 4
-#define IRQ_RCC 5
-#define IRQ_EXTI0 6
-#define IRQ_EXTI1 7
-#define IRQ_EXTI2 8
-#define IRQ_EXTI3 9
-#define IRQ_EXTI4 10
-#define IRQ_DMA1_STREAM0 11
-#define IRQ_DMA1_STREAM1 12
-#define IRQ_DMA1_STREAM2 13
-#define IRQ_DMA1_STREAM3 14
-#define IRQ_DMA1_STREAM4 15
-#define IRQ_DMA1_STREAM5 16
-#define IRQ_DMA1_STREAM6 17
-#define IRQ_ADC 18
-#define IRQ_CAN1_TX 19
-#define IRQ_CAN1_RX0 20
-#define IRQ_CAN1_RX1 21
-#define IRQ_CAN1_SCE 22
-#define IRQ_EXTI9_5 23
-#define IRQ_TIM1_BRK_TIM9 24
-#define IRQ_TIM1_UP_TIM10 25
-#define IRQ_TIM1_TRG_COM_TIM11 26
-#define IRQ_TIM1_CC 27
-#define IRQ_TIM2 28
-#define IRQ_TIM3 29
-#define IRQ_TIM4 30
-#define IRQ_I2C1_EV 31
-#define IRQ_I2C1_ER 32
-#define IRQ_I2C2_EV 33
-#define IRQ_I2C2_ER 34
-#define IRQ_SPI1 35
-#define IRQ_SPI2 36
-#define IRQ_USART1 37
-#define IRQ_USART2 38
-#define IRQ_USART3 39
-#define IRQ_EXTI15_10 40
-#define IRQ_RTC_ALARM 41
-#define IRQ_USB_FS_WKUP 42
-#define IRQ_TIM8_BRK_TIM12 43
-#define IRQ_TIM8_UP_TIM13 44
-#define IRQ_TIM8_TRG_COM_TIM14 45
-#define IRQ_TIM8_CC 46
-#define IRQ_DMA1_STREAM7 47
-#define IRQ_FSMC 48
-#define IRQ_SDIO 49
-#define IRQ_TIM5 50
-#define IRQ_SPI3 51
-#define IRQ_UART4 52
-#define IRQ_UART5 53
-#define IRQ_TIM6_DAC 54
-#define IRQ_TIM7 55
-#define IRQ_DMA2_STREAM0 56
-#define IRQ_DMA2_STREAM1 57
-#define IRQ_DMA2_STREAM2 58
-#define IRQ_DMA2_STREAM3 59
-#define IRQ_DMA2_STREAM4 60
-#define IRQ_ETH 61
-#define IRQ_ETH_WKUP 62
-#define IRQ_CAN2_TX 63
-#define IRQ_CAN2_RX0 64
-#define IRQ_CAN2_RX1 65
-#define IRQ_CAN2_SCE 66
-#define IRQ_OTG_FS 67
-#define IRQ_DMA2_STREAM5 68
-#define IRQ_DMA2_STREAM6 69
-#define IRQ_DMA2_STREAM7 70
-#define IRQ_USART6 71
-#define IRQ_I2C3_EV 72
-#define IRQ_I2C3_ER 73
-#define IRQ_OTG_HS_EP1_OUT 74
-#define IRQ_OTG_HS_EP1_IN 75
-#define IRQ_OTG_HS_WKUP 76
-#define IRQ_OTG_HS 77
-#define IRQ_DCMI 78
-#define IRQ_CRYP 79
-#define IRQ_HASH_RNG 80
-
-/* FIXME: number from list in lib/stm32/f4/vector.c, might miss irqs */
-#define IRQ_COUNT 81
-
-#define WEAK __attribute__ ((weak))
-
-void WEAK wwdg_isr(void);
-void WEAK pvd_isr(void);
-void WEAK tamp_stamp_isr(void);
-void WEAK rtc_wkup_isr(void);
-void WEAK flash_isr(void);
-void WEAK rcc_isr(void);
-void WEAK exti0_isr(void);
-void WEAK exti1_isr(void);
-void WEAK exti2_isr(void);
-void WEAK exti3_isr(void);
-void WEAK exti4_isr(void);
-void WEAK dma1_stream0_isr(void);
-void WEAK dma1_stream1_isr(void);
-void WEAK dma1_stream2_isr(void);
-void WEAK dma1_stream3_isr(void);
-void WEAK dma1_stream4_isr(void);
-void WEAK dma1_stream5_isr(void);
-void WEAK dma1_stream6_isr(void);
-void WEAK adc_isr(void);
-void WEAK can1_tx_isr(void);
-void WEAK can1_rx0_isr(void);
-void WEAK can1_rx1_isr(void);
-void WEAK can1_sce_isr(void);
-void WEAK exti9_5_isr(void);
-void WEAK tim1_brk_tim9_isr(void);
-void WEAK tim1_up_tim10_isr(void);
-void WEAK tim1_trg_com_tim11_isr(void);
-void WEAK tim1_cc_isr(void);
-void WEAK tim2_isr(void);
-void WEAK tim3_isr(void);
-void WEAK tim4_isr(void);
-void WEAK i2c1_ev_isr(void);
-void WEAK i2c1_er_isr(void);
-void WEAK i2c2_ev_isr(void);
-void WEAK i2c2_er_isr(void);
-void WEAK spi1_isr(void);
-void WEAK spi2_isr(void);
-void WEAK usart1_isr(void);
-void WEAK usart2_isr(void);
-void WEAK usart3_isr(void);
-void WEAK exti15_10_isr(void);
-void WEAK rtc_alarm_isr(void);
-void WEAK usb_fs_wkup_isr(void);
-void WEAK tim8_brk_tim12_isr(void);
-void WEAK tim8_up_tim13_isr(void);
-void WEAK tim8_trg_com_tim14_isr(void);
-void WEAK tim8_cc_isr(void);
-void WEAK dma1_stream7_isr(void);
-void WEAK fsmc_isr(void);
-void WEAK sdio_isr(void);
-void WEAK tim5_isr(void);
-void WEAK spi3_isr(void);
-void WEAK uart4_isr(void);
-void WEAK uart5_isr(void);
-void WEAK tim6_dac_isr(void);
-void WEAK tim7_isr(void);
-void WEAK dma2_stream0_isr(void);
-void WEAK dma2_stream1_isr(void);
-void WEAK dma2_stream2_isr(void);
-void WEAK dma2_stream3_isr(void);
-void WEAK dma2_stream4_isr(void);
-void WEAK eth_isr(void);
-void WEAK eth_wkup_isr(void);
-void WEAK can2_tx_isr(void);
-void WEAK can2_rx0_isr(void);
-void WEAK can2_rx1_isr(void);
-void WEAK can2_sce_isr(void);
-void WEAK otg_fs_isr(void);
-void WEAK dma2_stream5_isr(void);
-void WEAK dma2_stream6_isr(void);
-void WEAK dma2_stream7_isr(void);
-void WEAK usart6_isr(void);
-void WEAK i2c3_ev_isr(void);
-void WEAK i2c3_er_isr(void);
-void WEAK otg_hs_ep1_out_isr(void);
-void WEAK otg_hs_ep1_in_isr(void);
-void WEAK otg_hs_wkup_isr(void);
-void WEAK otg_hs_isr(void);
-void WEAK dcmi_isr(void);
-void WEAK cryp_isr(void);
-void WEAK hash_rng_isr(void);
-
-#pragma weak wwdg_isr = null_handler
-#pragma weak pvd_isr = null_handler
-#pragma weak tamp_stamp_isr = null_handler
-#pragma weak rtc_wkup_isr = null_handler
-#pragma weak flash_isr = null_handler
-#pragma weak rcc_isr = null_handler
-#pragma weak exti0_isr = null_handler
-#pragma weak exti1_isr = null_handler
-#pragma weak exti2_isr = null_handler
-#pragma weak exti3_isr = null_handler
-#pragma weak exti4_isr = null_handler
-#pragma weak dma1_stream0_isr = null_handler
-#pragma weak dma1_stream1_isr = null_handler
-#pragma weak dma1_stream2_isr = null_handler
-#pragma weak dma1_stream3_isr = null_handler
-#pragma weak dma1_stream4_isr = null_handler
-#pragma weak dma1_stream5_isr = null_handler
-#pragma weak dma1_stream6_isr = null_handler
-#pragma weak adc_isr = null_handler
-#pragma weak can1_tx_isr = null_handler
-#pragma weak can1_rx0_isr = null_handler
-#pragma weak can1_rx1_isr = null_handler
-#pragma weak can1_sce_isr = null_handler
-#pragma weak exti9_5_isr = null_handler
-#pragma weak tim1_brk_tim9_isr = null_handler
-#pragma weak tim1_up_tim10_isr = null_handler
-#pragma weak tim1_trg_com_tim11_isr = null_handler
-#pragma weak tim1_cc_isr = null_handler
-#pragma weak tim2_isr = null_handler
-#pragma weak tim3_isr = null_handler
-#pragma weak tim4_isr = null_handler
-#pragma weak i2c1_ev_isr = null_handler
-#pragma weak i2c1_er_isr = null_handler
-#pragma weak i2c2_ev_isr = null_handler
-#pragma weak i2c2_er_isr = null_handler
-#pragma weak spi1_isr = null_handler
-#pragma weak spi2_isr = null_handler
-#pragma weak usart1_isr = null_handler
-#pragma weak usart2_isr = null_handler
-#pragma weak usart3_isr = null_handler
-#pragma weak exti15_10_isr = null_handler
-#pragma weak rtc_alarm_isr = null_handler
-#pragma weak usb_fs_wkup_isr = null_handler
-#pragma weak tim8_brk_tim12_isr = null_handler
-#pragma weak tim8_up_tim13_isr = null_handler
-#pragma weak tim8_trg_com_tim14_isr = null_handler
-#pragma weak tim8_cc_isr = null_handler
-#pragma weak dma1_stream7_isr = null_handler
-#pragma weak fsmc_isr = null_handler
-#pragma weak sdio_isr = null_handler
-#pragma weak tim5_isr = null_handler
-#pragma weak spi3_isr = null_handler
-#pragma weak uart4_isr = null_handler
-#pragma weak uart5_isr = null_handler
-#pragma weak tim6_dac_isr = null_handler
-#pragma weak tim7_isr = null_handler
-#pragma weak dma2_stream0_isr = null_handler
-#pragma weak dma2_stream1_isr = null_handler
-#pragma weak dma2_stream2_isr = null_handler
-#pragma weak dma2_stream3_isr = null_handler
-#pragma weak dma2_stream4_isr = null_handler
-#pragma weak eth_isr = null_handler
-#pragma weak eth_wkup_isr = null_handler
-#pragma weak can2_tx_isr = null_handler
-#pragma weak can2_rx0_isr = null_handler
-#pragma weak can2_rx1_isr = null_handler
-#pragma weak can2_sce_isr = null_handler
-#pragma weak otg_fs_isr = null_handler
-#pragma weak dma2_stream5_isr = null_handler
-#pragma weak dma2_stream6_isr = null_handler
-#pragma weak dma2_stream7_isr = null_handler
-#pragma weak usart6_isr = null_handler
-#pragma weak i2c3_ev_isr = null_handler
-#pragma weak i2c3_er_isr = null_handler
-#pragma weak otg_hs_ep1_out_isr = null_handler
-#pragma weak otg_hs_ep1_in_isr = null_handler
-#pragma weak otg_hs_wkup_isr = null_handler
-#pragma weak otg_hs_isr = null_handler
-#pragma weak dcmi_isr = null_handler
-#pragma weak cryp_isr = null_handler
-#pragma weak hash_rng_isr = null_handler
-
-#define IRQ_HANDLERS \
- wwdg_isr, \
- pvd_isr, \
- tamp_stamp_isr, \
- rtc_wkup_isr, \
- flash_isr, \
- rcc_isr, \
- exti0_isr, \
- exti1_isr, \
- exti2_isr, \
- exti3_isr, \
- exti4_isr, \
- dma1_stream0_isr, \
- dma1_stream1_isr, \
- dma1_stream2_isr, \
- dma1_stream3_isr, \
- dma1_stream4_isr, \
- dma1_stream5_isr, \
- dma1_stream6_isr, \
- adc_isr, \
- can1_tx_isr, \
- can1_rx0_isr, \
- can1_rx1_isr, \
- can1_sce_isr, \
- exti9_5_isr, \
- tim1_brk_tim9_isr, \
- tim1_up_tim10_isr, \
- tim1_trg_com_tim11_isr, \
- tim1_cc_isr, \
- tim2_isr, \
- tim3_isr, \
- tim4_isr, \
- i2c1_ev_isr, \
- i2c1_er_isr, \
- i2c2_ev_isr, \
- i2c2_er_isr, \
- spi1_isr, \
- spi2_isr, \
- usart1_isr, \
- usart2_isr, \
- usart3_isr, \
- exti15_10_isr, \
- rtc_alarm_isr, \
- usb_fs_wkup_isr, \
- tim8_brk_tim12_isr, \
- tim8_up_tim13_isr, \
- tim8_trg_com_tim14_isr, \
- tim8_cc_isr, \
- dma1_stream7_isr, \
- fsmc_isr, \
- sdio_isr, \
- tim5_isr, \
- spi3_isr, \
- uart4_isr, \
- uart5_isr, \
- tim6_dac_isr, \
- tim7_isr, \
- dma2_stream0_isr, \
- dma2_stream1_isr, \
- dma2_stream2_isr, \
- dma2_stream3_isr, \
- dma2_stream4_isr, \
- eth_isr, \
- eth_wkup_isr, \
- can2_tx_isr, \
- can2_rx0_isr, \
- can2_rx1_isr, \
- can2_sce_isr, \
- otg_fs_isr, \
- dma2_stream5_isr, \
- dma2_stream6_isr, \
- dma2_stream7_isr, \
- usart6_isr, \
- i2c3_ev_isr, \
- i2c3_er_isr, \
- otg_hs_ep1_out_isr, \
- otg_hs_ep1_in_isr, \
- otg_hs_wkup_isr, \
- otg_hs_isr, \
- dcmi_isr, \
- cryp_isr, \
- hash_rng_isr,
-
-#endif
diff --git a/include/libopencm3/stm32/f4/irq.yaml b/include/libopencm3/stm32/f4/irq.yaml
new file mode 100644
index 0000000..2d4bae9
--- /dev/null
+++ b/include/libopencm3/stm32/f4/irq.yaml
@@ -0,0 +1,85 @@
+includeguard: LIBOPENCM3_STM32_F4_NVIC_H
+partname_humanreadable: STM32 F4 series
+partname_doxygen: STM32F4
+irqs:
+ - nvic_wwdg
+ - pvd
+ - tamp_stamp
+ - rtc_wkup
+ - flash
+ - rcc
+ - exti0
+ - exti1
+ - exti2
+ - exti3
+ - exti4
+ - dma1_stream0
+ - dma1_stream1
+ - dma1_stream2
+ - dma1_stream3
+ - dma1_stream4
+ - dma1_stream5
+ - dma1_stream6
+ - adc
+ - can1_tx
+ - can1_rx0
+ - can1_rx1
+ - can1_sce
+ - exti9_5
+ - tim1_brk_tim9
+ - tim1_up_tim10
+ - tim1_trg_com_tim11
+ - tim1_cc
+ - tim2
+ - tim3
+ - tim4
+ - i2c1_ev
+ - i2c1_er
+ - i2c2_ev
+ - i2c2_er
+ - spi1
+ - spi2
+ - usart1
+ - usart2
+ - usart3
+ - exti15_10
+ - rtc_alarm
+ - usb_fs_wkup
+ - tim8_brk_tim12
+ - tim8_up_tim13
+ - tim8_trg_com_tim14
+ - tim8_cc
+ - dma1_stream7
+ - fsmc
+ - sdio
+ - tim5
+ - spi3
+ - uart4
+ - uart5
+ - tim6_dac
+ - tim7
+ - dma2_stream0
+ - dma2_stream1
+ - dma2_stream2
+ - dma2_stream3
+ - dma2_stream4
+ - eth
+ - eth_wkup
+ - can2_tx
+ - can2_rx0
+ - can2_rx1
+ - can2_sce
+ - otg_fs
+ - dma2_stream5
+ - dma2_stream6
+ - dma2_stream7
+ - usart6
+ - i2c3_ev
+ - i2c3_er
+ - otg_hs_ep1_out
+ - otg_hs_ep1_in
+ - otg_hs_wkup
+ - otg_hs
+ - dcmi
+ - cryp
+ - hash_rng
diff --git a/include/libopencm3/stm32/f4/nvic_f4.h b/include/libopencm3/stm32/f4/nvic_f4.h
deleted file mode 100644
index 013e3b5..0000000
--- a/include/libopencm3/stm32/f4/nvic_f4.h
+++ /dev/null
@@ -1,114 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef LIBOPENCM3_NVIC_F4_H
-#define LIBOPENCM3_NVIC_F4_H
-
-/* --- IRQ channel numbers-------------------------------------------------- */
-
-/* Note: These F4 specific user interrupt definitions supplement the
- * general NVIC definitions in ../nvic.h
- */
-
-/* User Interrupts */
-#define NVIC_NVIC_WWDG_IRQ 0
-#define NVIC_PVD_IRQ 1
-#define NVIC_TAMP_STAMP_IRQ 2
-#define NVIC_RTC_WKUP_IRQ 3
-#define NVIC_FLASH_IRQ 4
-#define NVIC_RCC_IRQ 5
-#define NVIC_EXTI0_IRQ 6
-#define NVIC_EXTI1_IRQ 7
-#define NVIC_EXTI2_IRQ 8
-#define NVIC_EXTI3_IRQ 9
-#define NVIC_EXTI4_IRQ 10
-#define NVIC_DMA1_STREAM0_IRQ 11
-#define NVIC_DMA1_STREAM1_IRQ 12
-#define NVIC_DMA1_STREAM2_IRQ 13
-#define NVIC_DMA1_STREAM3_IRQ 14
-#define NVIC_DMA1_STREAM4_IRQ 15
-#define NVIC_DMA1_STREAM5_IRQ 16
-#define NVIC_DMA1_STREAM6_IRQ 17
-#define NVIC_ADC_IRQ 18
-#define NVIC_CAN1_TX_IRQ 19
-#define NVIC_CAN1_RX0_IRQ 20
-#define NVIC_CAN1_RX1_IRQ 21
-#define NVIC_CAN1_SCE_IRQ 22
-#define NVIC_EXTI9_5_IRQ 23
-#define NVIC_TIM1_BRK_TIM9_IRQ 24
-#define NVIC_TIM1_UP_TIM10_IRQ 25
-#define NVIC_TIM1_TRG_COM_TIM11_IRQ 26
-#define NVIC_TIM1_CC_IRQ 27
-#define NVIC_TIM2_IRQ 28
-#define NVIC_TIM3_IRQ 29
-#define NVIC_TIM4_IRQ 30
-#define NVIC_I2C1_EV_IRQ 31
-#define NVIC_I2C1_ER_IRQ 32
-#define NVIC_I2C2_EV_IRQ 33
-#define NVIC_I2C2_ER_IRQ 34
-#define NVIC_SPI1_IRQ 35
-#define NVIC_SPI2_IRQ 36
-#define NVIC_USART1_IRQ 37
-#define NVIC_USART2_IRQ 38
-#define NVIC_USART3_IRQ 39
-#define NVIC_EXTI15_10_IRQ 40
-#define NVIC_RTC_ALARM_IRQ 41
-#define NVIC_USB_FS_WKUP_IRQ 42
-#define NVIC_TIM8_BRK_TIM12_IRQ 43
-#define NVIC_TIM8_UP_TIM13_IRQ 44
-#define NVIC_TIM8_TRG_COM_TIM14_IRQ 45
-#define NVIC_TIM8_CC_IRQ 46
-#define NVIC_DMA1_STREAM7_IRQ 47
-#define NVIC_FSMC_IRQ 48
-#define NVIC_SDIO_IRQ 49
-#define NVIC_TIM5_IRQ 50
-#define NVIC_SPI3_IRQ 51
-#define NVIC_UART4_IRQ 52
-#define NVIC_UART5_IRQ 53
-#define NVIC_TIM6_DAC_IRQ 54
-#define NVIC_TIM7_IRQ 55
-#define NVIC_DMA2_STREAM0_IRQ 56
-#define NVIC_DMA2_STREAM1_IRQ 57
-#define NVIC_DMA2_STREAM2_IRQ 58
-#define NVIC_DMA2_STREAM3_IRQ 59
-#define NVIC_DMA2_STREAM4_IRQ 60
-#define NVIC_ETH_IRQ 61
-#define NVIC_ETH_WKUP_IRQ 62
-#define NVIC_CAN2_TX_IRQ 63
-#define NVIC_CAN2_RX0_IRQ 64
-#define NVIC_CAN2_RX1_IRQ 65
-#define NVIC_CAN2_SCE_IRQ 66
-#define NVIC_OTG_FS_IRQ 67
-#define NVIC_DMA2_STREAM5_IRQ 68
-#define NVIC_DMA2_STREAM6_IRQ 69
-#define NVIC_DMA2_STREAM7_IRQ 70
-#define NVIC_USART6_IRQ 71
-#define NVIC_I2C3_EV_IRQ 72
-#define NVIC_I2C3_ER_IRQ 73
-#define NVIC_OTG_HS_EP1_OUT_IRQ 74
-#define NVIC_OTG_HS_EP1_IN_IRQ 75
-#define NVIC_OTG_HS_WKUP_IRQ 76
-#define NVIC_OTG_HS_IRQ 77
-#define NVIC_DCMI_IRQ 78
-#define NVIC_CRYP_IRQ 79
-#define NVIC_HASH_RNG_IRQ 80
-
-#define NVIC_IRQ_COUNT 81
-
-#endif
diff --git a/lib/cm3/vector.c b/lib/cm3/vector.c
index 200e8e5..a6d2e93 100644
--- a/lib/cm3/vector.c
+++ b/lib/cm3/vector.c
@@ -20,6 +20,11 @@
#include <libopencm3/cm3/vector.h>
+/* load optional platform dependent initialization routines */
+#include "../dispatch/vector.c"
+/* load the weak symbols for IRQ_HANDLERS */
+#include "../dispatch/vector_nvic.c"
+
#define WEAK __attribute__ ((weak))
/* Symbols exported by the linker script(s): */
@@ -70,6 +75,9 @@ void WEAK reset_handler(void)
while (dest < &_ebss)
*dest++ = 0;
+ /* might be provided by platform specific vector.c */
+ pre_main();
+
/* Call the application's entry point. */
main();
}
diff --git a/lib/dispatch/vector.c b/lib/dispatch/vector.c
new file mode 100644
index 0000000..baab436
--- /dev/null
+++ b/lib/dispatch/vector.c
@@ -0,0 +1,11 @@
+#if defined(STM32F4)
+# include "../stm32/f4/vector.c"
+
+#elif defined(LPC43XX)
+# include "../lpc43xx/vector.c"
+
+#else
+
+static void pre_main(void) {}
+
+#endif
diff --git a/lib/dispatch/vector_nvic.c b/lib/dispatch/vector_nvic.c
new file mode 100644
index 0000000..fc5fdd2
--- /dev/null
+++ b/lib/dispatch/vector_nvic.c
@@ -0,0 +1,19 @@
+#if defined(STM32F1)
+# include "../stm32/f1/vector_nvic.c"
+#elif defined(STM32F2)
+# include "../stm32/f2/vector_nvic.c"
+#elif defined(STM32F4)
+# include "../stm32/f4/vector_nvic.c"
+
+#elif defined(TINYGECKO)
+# include "../efm32/tinygecko/vector_nvic.c"
+
+#elif defined(LPC43XX)
+# include "../lpc43xx/vector_nvic.c"
+
+#else
+# warning"no chipset defined; user interrupts are disabled"
+
+#define IRQ_HANDLERS
+
+#endif
diff --git a/lib/efm32/tinygecko/vector.c b/lib/efm32/tinygecko/vector.c
deleted file mode 100644
index d6da5a2..0000000
--- a/lib/efm32/tinygecko/vector.c
+++ /dev/null
@@ -1,2 +0,0 @@
-#include <libopencm3/efm32/tinygecko/irq.h>
-#include "../../cm3/vector.c"
diff --git a/lib/lm3s/vector.c b/lib/lm3s/vector.c
deleted file mode 100644
index e9e7e06..0000000
--- a/lib/lm3s/vector.c
+++ /dev/null
@@ -1,2 +0,0 @@
-#include <libopencm3/lm3s/irq.h>
-#include "../cm3/vector.c"
diff --git a/lib/lpc17xx/vector.c b/lib/lpc17xx/vector.c
deleted file mode 100644
index 61342f4..0000000
--- a/lib/lpc17xx/vector.c
+++ /dev/null
@@ -1,2 +0,0 @@
-#include <libopencm3/lpc17xx/irq.h>
-#include "../cm3/vector.c"
diff --git a/lib/lpc43xx/vector.c b/lib/lpc43xx/vector.c
index 66e9b63..0463a65 100644
--- a/lib/lpc43xx/vector.c
+++ b/lib/lpc43xx/vector.c
@@ -18,17 +18,13 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <libopencm3/lpc43xx/irq.h>
-#define reset_handler original_reset_handler
-#include "../cm3/vector.c"
-#undef reset_handler
#include <libopencm3/cm3/common.h>
extern unsigned _etext_ram, _text_ram, _etext_rom;
#define CREG_M4MEMMAP MMIO32( (0x40043000 + 0x100) )
-void WEAK reset_handler(void)
+static void pre_main(void)
{
volatile unsigned *src, *dest;
@@ -49,6 +45,4 @@ void WEAK reset_handler(void)
/* Continue Execution in RAM */
}
-
- original_reset_handler();
}
diff --git a/lib/stm32/f1/vector.c b/lib/stm32/f1/vector.c
deleted file mode 100644
index 795773b..0000000
--- a/lib/stm32/f1/vector.c
+++ /dev/null
@@ -1,2 +0,0 @@
-#include <libopencm3/stm32/f1/irq.h>
-#include "../../cm3/vector.c"
diff --git a/lib/stm32/f2/vector.c b/lib/stm32/f2/vector.c
deleted file mode 100644
index 24d1185..0000000
--- a/lib/stm32/f2/vector.c
+++ /dev/null
@@ -1,2 +0,0 @@
-#include <libopencm3/stm32/f2/irq.h>
-#include "../../cm3/vector.c"
diff --git a/lib/stm32/f4/vector.c b/lib/stm32/f4/vector.c
index a5017b3..5304299 100644
--- a/lib/stm32/f4/vector.c
+++ b/lib/stm32/f4/vector.c
@@ -18,16 +18,10 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <libopencm3/stm32/f4/irq.h>
-#define reset_handler original_reset_handler
-#include "../../cm3/vector.c"
-#undef reset_handler
#include <libopencm3/stm32/f4/scb.h>
-void WEAK reset_handler(void)
+static void pre_main(void)
{
/* Enable access to Floating-Point coprocessor. */
SCB_CPACR |= SCB_CPACR_FULL * (SCB_CPACR_CP10 | SCB_CPACR_CP11);
-
- original_reset_handler();
}
diff --git a/include/libopencm3/efm32/tinygecko/irq2nvic_h b/scripts/irq2nvic_h
index a7df16e..92d63b8 100755
--- a/include/libopencm3/efm32/tinygecko/irq2nvic_h
+++ b/scripts/irq2nvic_h
@@ -17,10 +17,19 @@
# You should have received a copy of the GNU Lesser General Public License
# along with this library. If not, see <http://www.gnu.org/licenses/>.
+"""Generate an nvic.h header from a small YAML file describing the interrupt
+numbers.
+
+Code generation is chosen here because the resulting C code needs to be very
+repetetive (definition of the IRQ numbers, function prototypes, weak fallback
+definition and vector table definition), all being very repetitive. No portable
+method to achive the same thing with C preprocessor is known to the author.
+(Neither is any non-portable method, for that matter.)"""
+
import sys
import yaml
-template = '''\
+template_nvic_h = '''\
/* This file is part of the libopencm3 project.
*
* It was generated by the irq2nvic_h script.
@@ -29,6 +38,8 @@ template = '''\
#ifndef {includeguard}
#define {includeguard}
+#include <libopencm3/cm3/nvic.h>
+
/** @defgroup CM3_nvic_defines_{partname_doxygen} User interrupts for {partname_humanreadable}
@ingroup CM3_nvic_defines
@@ -51,6 +62,19 @@ template = '''\
/**@}}*/
+#endif /* {includeguard} */
+'''
+
+template_vector_nvic_c = '''\
+/* This file is part of the libopencm3 project.
+ *
+ * It was generated by the irq2nvic_h script.
+ *
+ * This part needs to get included in the compilation unit where
+ * blocking_handler gets defined due to the way #pragma works.
+ */
+
+
/** @defgroup CM3_nvic_isrpragmas_{partname_doxygen} User interrupt service routines (ISR) defaults for {partname_humanreadable}
@ingroup CM3_nvic_isrpragmas
@@ -67,26 +91,34 @@ template = '''\
#define IRQ_HANDLERS \\
{vectortableinitialization}
-
-#endif /* {includeguard} */
'''
-def convert(infile, outfile):
+def convert(infile, outfile_nvic, outfile_vectornvic):
data = yaml.load(infile)
irq2name = list(enumerate(data['irqs']) if isinstance(data['irqs'], list) else data['irqs'].items())
irqnames = [v for (k,v) in irq2name]
+ if isinstance(data['irqs'], list):
+ data['irqcount'] = len(irq2name)
+ else:
+ data['irqcount'] = max(data['irqs'].keys()) + 1
+
data['irqdefinitions'] = "\n".join('#define NVIC_%s_IRQ %d'%(v.upper(),k) for (k,v) in irq2name)
- data['irqcount'] = len(irq2name) # FIXME: what if it's a sparse dictionary?
data['isrprototypes'] = "\n".join('void WEAK %s_isr(void);'%name.lower() for name in irqnames)
data['isrpragmas'] = "\n".join('#pragma weak %s_isr = blocking_handler'%name.lower() for name in irqnames)
data['vectortableinitialization'] = ', \\\n '.join('[NVIC_%s_IRQ] = %s_isr'%(name.upper(), name.lower()) for name in irqnames)
- outfile.write(template.format(**data))
+ outfile_nvic.write(template_nvic_h.format(**data))
+ outfile_vectornvic.write(template_vector_nvic_c.format(**data))
def main():
- convert(open('irq.yaml'), open('nvic.h', 'w'))
+ infile = sys.argv[1]
+ if not infile.startswith('./include/libopencm3/') or not infile.endswith('/irq.yaml'):
+ raise ValueError("Arguent must match ./include/libopencm3/**/irq.yaml")
+ nvic_h = infile.replace('irq.yaml', 'nvic.h')
+ vector_nvic_c = infile.replace('./include/libopencm3/', './lib/').replace('irq.yaml', 'vector_nvic.c')
+ convert(open(infile), open(nvic_h, 'w'), open(vector_nvic_c, 'w'))
if __name__ == "__main__":
main()