From 9f271d5cd7c51251ec5e90a986f6f70a3fff75d8 Mon Sep 17 00:00:00 2001 From: Gareth McMullin Date: Sat, 28 Mar 2015 20:47:17 -0700 Subject: Consistently use 'target *t' for target var. --- src/stm32f1.c | 98 +++++++++++++++++++++++++++++------------------------------ 1 file changed, 49 insertions(+), 49 deletions(-) (limited to 'src/stm32f1.c') diff --git a/src/stm32f1.c b/src/stm32f1.c index 8f7a7d7..49a5815 100644 --- a/src/stm32f1.c +++ b/src/stm32f1.c @@ -46,11 +46,11 @@ const struct command_s stm32f1_cmd_list[] = { }; -static int stm32md_flash_erase(struct target_s *target, uint32_t addr, size_t len); -static int stm32hd_flash_erase(struct target_s *target, uint32_t addr, size_t len); -static int stm32f1_flash_erase(struct target_s *target, uint32_t addr, size_t len, +static int stm32md_flash_erase(target *t, uint32_t addr, size_t len); +static int stm32hd_flash_erase(target *t, uint32_t addr, size_t len); +static int stm32f1_flash_erase(target *t, uint32_t addr, size_t len, uint32_t pagesize); -static int stm32f1_flash_write(struct target_s *target, uint32_t dest, +static int stm32f1_flash_write(target *t, uint32_t dest, const uint8_t *src, size_t len); static const char stm32f1_driver_str[] = "STM32, Medium density."; @@ -127,66 +127,66 @@ static const uint16_t stm32f1_flash_write_stub[] = { #define SRAM_BASE 0x20000000 #define STUB_BUFFER_BASE ALIGN(SRAM_BASE + sizeof(stm32f1_flash_write_stub), 4) -bool stm32f1_probe(struct target_s *target) +bool stm32f1_probe(target *t) { - target->idcode = target_mem_read32(target, DBGMCU_IDCODE) & 0xfff; - switch(target->idcode) { + t->idcode = target_mem_read32(t, DBGMCU_IDCODE) & 0xfff; + switch(t->idcode) { case 0x410: /* Medium density */ case 0x412: /* Low denisty */ case 0x420: /* Value Line, Low-/Medium density */ - target->driver = stm32f1_driver_str; - target->xml_mem_map = stm32f1_xml_memory_map; - target->flash_erase = stm32md_flash_erase; - target->flash_write = stm32f1_flash_write; - target_add_commands(target, stm32f1_cmd_list, "STM32 LD/MD"); + t->driver = stm32f1_driver_str; + t->xml_mem_map = stm32f1_xml_memory_map; + t->flash_erase = stm32md_flash_erase; + t->flash_write = stm32f1_flash_write; + target_add_commands(t, stm32f1_cmd_list, "STM32 LD/MD"); return true; case 0x414: /* High density */ case 0x418: /* Connectivity Line */ case 0x428: /* Value Line, High Density */ - target->driver = stm32hd_driver_str; - target->xml_mem_map = stm32hd_xml_memory_map; - target->flash_erase = stm32hd_flash_erase; - target->flash_write = stm32f1_flash_write; - target_add_commands(target, stm32f1_cmd_list, "STM32 HD/CL"); + t->driver = stm32hd_driver_str; + t->xml_mem_map = stm32hd_xml_memory_map; + t->flash_erase = stm32hd_flash_erase; + t->flash_write = stm32f1_flash_write; + target_add_commands(t, stm32f1_cmd_list, "STM32 HD/CL"); return true; case 0x422: /* STM32F30x */ case 0x432: /* STM32F37x */ - target->driver = stm32f3_driver_str; - target->xml_mem_map = stm32hd_xml_memory_map; - target->flash_erase = stm32hd_flash_erase; - target->flash_write = stm32f1_flash_write; - target_add_commands(target, stm32f1_cmd_list, "STM32F3"); + t->driver = stm32f3_driver_str; + t->xml_mem_map = stm32hd_xml_memory_map; + t->flash_erase = stm32hd_flash_erase; + t->flash_write = stm32f1_flash_write; + target_add_commands(t, stm32f1_cmd_list, "STM32F3"); return true; } - target->idcode = target_mem_read32(target, DBGMCU_IDCODE_F0) & 0xfff; - switch(target->idcode) { + t->idcode = target_mem_read32(t, DBGMCU_IDCODE_F0) & 0xfff; + switch(t->idcode) { case 0x444: /* STM32F03 RM0091 Rev.7 */ case 0x445: /* STM32F04 RM0091 Rev.7 */ case 0x440: /* STM32F05 RM0091 Rev.7 */ case 0x448: /* STM32F07 RM0091 Rev.7 */ case 0x442: /* STM32F09 RM0091 Rev.7 */ - switch(target->idcode) { + switch(t->idcode) { case 0x444: /* STM32F03 */ - target->driver = stm32f03_driver_str; + t->driver = stm32f03_driver_str; break; case 0x445: /* STM32F04 */ - target->driver = stm32f04_driver_str; + t->driver = stm32f04_driver_str; break; case 0x440: /* STM32F05 */ - target->driver = stm32f05_driver_str; + t->driver = stm32f05_driver_str; break; case 0x448: /* STM32F07 */ - target->driver = stm32f07_driver_str; + t->driver = stm32f07_driver_str; break; case 0x442: /* STM32F09 */ - target->driver = stm32f09_driver_str; + t->driver = stm32f09_driver_str; break; } - target->xml_mem_map = stm32f1_xml_memory_map; - target->flash_erase = stm32md_flash_erase; - target->flash_write = stm32f1_flash_write; - target_add_commands(target, stm32f1_cmd_list, "STM32F0"); + t->xml_mem_map = stm32f1_xml_memory_map; + t->flash_erase = stm32md_flash_erase; + t->flash_write = stm32f1_flash_write; + target_add_commands(t, stm32f1_cmd_list, "STM32F0"); return true; } @@ -199,7 +199,7 @@ static void stm32f1_flash_unlock(target *t) target_mem_write32(t, FLASH_KEYR, KEY2); } -static int stm32f1_flash_erase(struct target_s *target, uint32_t addr, +static int stm32f1_flash_erase(target *t, uint32_t addr, size_t len, uint32_t pagesize) { uint16_t sr; @@ -207,19 +207,19 @@ static int stm32f1_flash_erase(struct target_s *target, uint32_t addr, addr &= ~(pagesize - 1); len = (len + pagesize - 1) & ~(pagesize - 1); - stm32f1_flash_unlock(target); + stm32f1_flash_unlock(t); while(len) { /* Flash page erase instruction */ - target_mem_write32(target, FLASH_CR, FLASH_CR_PER); + target_mem_write32(t, FLASH_CR, FLASH_CR_PER); /* write address to FMA */ - target_mem_write32(target, FLASH_AR, addr); + target_mem_write32(t, FLASH_AR, addr); /* Flash page erase start instruction */ - target_mem_write32(target, FLASH_CR, FLASH_CR_STRT | FLASH_CR_PER); + target_mem_write32(t, FLASH_CR, FLASH_CR_STRT | FLASH_CR_PER); /* Read FLASH_SR to poll for BSY bit */ - while (target_mem_read32(target, FLASH_SR) & FLASH_SR_BSY) - if(target_check_error(target)) + while (target_mem_read32(t, FLASH_SR) & FLASH_SR_BSY) + if(target_check_error(t)) return -1; len -= pagesize; @@ -227,24 +227,24 @@ static int stm32f1_flash_erase(struct target_s *target, uint32_t addr, } /* Check for error */ - sr = target_mem_read32(target, FLASH_SR); + sr = target_mem_read32(t, FLASH_SR); if ((sr & SR_ERROR_MASK) || !(sr & SR_EOP)) return -1; return 0; } -static int stm32hd_flash_erase(struct target_s *target, uint32_t addr, size_t len) +static int stm32hd_flash_erase(target *t, uint32_t addr, size_t len) { - return stm32f1_flash_erase(target, addr, len, 0x800); + return stm32f1_flash_erase(t, addr, len, 0x800); } -static int stm32md_flash_erase(struct target_s *target, uint32_t addr, size_t len) +static int stm32md_flash_erase(target *t, uint32_t addr, size_t len) { - return stm32f1_flash_erase(target, addr, len, 0x400); + return stm32f1_flash_erase(t, addr, len, 0x400); } -static int stm32f1_flash_write(struct target_s *target, uint32_t dest, +static int stm32f1_flash_write(target *t, uint32_t dest, const uint8_t *src, size_t len) { uint32_t offset = dest % 4; @@ -256,8 +256,8 @@ static int stm32f1_flash_write(struct target_s *target, uint32_t dest, memcpy((uint8_t *)data + offset, src, len); /* Write stub and data to target ram and set PC */ - target_mem_write(target, STUB_BUFFER_BASE, (void*)data, sizeof(data)); - return cortexm_run_stub(target, SRAM_BASE, stm32f1_flash_write_stub, + target_mem_write(t, STUB_BUFFER_BASE, (void*)data, sizeof(data)); + return cortexm_run_stub(t, SRAM_BASE, stm32f1_flash_write_stub, sizeof(stm32f1_flash_write_stub), dest - offset, STUB_BUFFER_BASE, sizeof(data), 0); -- cgit v1.2.3