From 91b481731d14789a87b9e5db29e7b715bcbc618b Mon Sep 17 00:00:00 2001 From: Paul Fertser Date: Sun, 14 Apr 2013 21:55:32 +0400 Subject: stm32f1/stm32f4: fix hardware CRC calculation This was real-life tested on stm32f1 hardware including computation for odd-sized ranges. Signed-off-by: Paul Fertser --- src/platforms/swlink/platform.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/platforms/swlink') diff --git a/src/platforms/swlink/platform.c b/src/platforms/swlink/platform.c index 33d4f12..1aa45b1 100644 --- a/src/platforms/swlink/platform.c +++ b/src/platforms/swlink/platform.c @@ -51,6 +51,7 @@ int platform_init(void) rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN); rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN); rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN); + rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_CRCEN); /* Unmap JTAG Pins so we can reuse as GPIO */ data = AFIO_MAPR; -- cgit v1.2.3