aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorGareth McMullin2015-03-22 20:54:45 -0700
committerGareth McMullin2015-03-26 20:47:57 -0700
commitf74def35526fe4a3bbd000e13bef11c00de1c481 (patch)
tree155978809184b7a1cf5fb0575c6845568c1add96
parentd9af3cca6ce9ef661436d57da286ddb96d07f120 (diff)
Remove old STM32L1 driver.
-rw-r--r--src/Makefile1
-rw-r--r--src/cortexm.c1
-rw-r--r--src/stm32l0.c7
-rw-r--r--src/stm32l1.c229
4 files changed, 0 insertions, 238 deletions
diff --git a/src/Makefile b/src/Makefile
index 39c19ac..f76ea74 100644
--- a/src/Makefile
+++ b/src/Makefile
@@ -43,7 +43,6 @@ SRC = \
stm32f1.c \
stm32f4.c \
stm32l0.c \
- stm32l1.c \
swdptap.c \
target.c \
diff --git a/src/cortexm.c b/src/cortexm.c
index 78f78df..4a4b5bf 100644
--- a/src/cortexm.c
+++ b/src/cortexm.c
@@ -256,7 +256,6 @@ bool cortexm_probe(target *t)
PROBE(stm32f1_probe);
PROBE(stm32f4_probe);
PROBE(stm32l0_probe); /* STM32L0xx & STM32L1xx */
- PROBE(stm32l1_probe);
PROBE(lpc11xx_probe);
PROBE(lpc43xx_probe);
PROBE(sam3x_probe);
diff --git a/src/stm32l0.c b/src/stm32l0.c
index 28088a8..93c5d94 100644
--- a/src/stm32l0.c
+++ b/src/stm32l0.c
@@ -112,8 +112,6 @@
*/
-#define CONFIG_STM32L1 /* Include support for STM32L1 */
-
#include "general.h"
#include "adiv5.h"
#include "target.h"
@@ -190,7 +188,6 @@ static const char stm32l0_xml_memory_map[] = "<?xml version=\"1.0\"?>"
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x2000\"/>"
"</memory-map>";
-#if defined(CONFIG_STM32L1)
static const char stm32l1_driver_str[] = "STM32L1xx";
static const char stm32l1_xml_memory_map[] = "<?xml version=\"1.0\"?>"
@@ -209,7 +206,6 @@ static const char stm32l1_xml_memory_map[] = "<?xml version=\"1.0\"?>"
/* SRAM; ranges from 4KiB to 80KiB(0x14000). */
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x14000\"/>"
"</memory-map>";
-#endif
static const uint16_t stm32l0_nvm_prog_write_stub [] = {
#include "../flashstub/stm32l05x-nvm-prog-write.stub"
@@ -286,8 +282,6 @@ bool stm32l0_probe(struct target_s* target)
{
uint32_t idcode;
-#if defined(CONFIG_STM32L1)
-
idcode = target_mem_read32(target,
STM32L1_DBGMCU_IDCODE_PHYS) & 0xfff;
switch (idcode) {
@@ -304,7 +298,6 @@ bool stm32l0_probe(struct target_s* target)
target_add_commands(target, stm32lx_cmd_list, "STM32L1x");
return true;
}
-#endif
idcode = target_mem_read32(target,
STM32L0_DBGMCU_IDCODE_PHYS) & 0xfff;
diff --git a/src/stm32l1.c b/src/stm32l1.c
deleted file mode 100644
index 8e63347..0000000
--- a/src/stm32l1.c
+++ /dev/null
@@ -1,229 +0,0 @@
-/*
- * This file is part of the Black Magic Debug project.
- *
- * Copyright (C) 2012 Vegard Storheil Eriksen <zyp@jvnv.net>
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
- */
-
-/* This file implements STM32L1 target specific functions for detecting
- * the device, providing the XML memory map and Flash memory programming.
- *
- * Refereces:
- * ST doc - RM0038
- * Reference manual - STM32L151xx, STM32L152xx and STM32L162xx
- * advanced ARM-based 32-bit MCUs
- * ST doc - PM0062
- * Programming manual - STM32L151xx, STM32L152xx and STM32L162xx
- * Flash and EEPROM programming
- */
-
-#include "general.h"
-#include "adiv5.h"
-#include "target.h"
-#include "command.h"
-#include "gdb_packet.h"
-
-static int stm32l1_flash_erase(struct target_s *target, uint32_t addr,
- size_t len);
-static int stm32l1_flash_write(struct target_s *target, uint32_t dest,
- const uint8_t *src, size_t len);
-
-static const char stm32l1_driver_str[] = "STM32L1xx";
-
-static const char stm32l1_xml_memory_map[] = "<?xml version=\"1.0\"?>"
-/* "<!DOCTYPE memory-map "
- " PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
- " \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"*/
- "<memory-map>"
- " <memory type=\"flash\" start=\"0x8000000\" length=\"0x80000\">"
- " <property name=\"blocksize\">0x100</property>"
- " </memory>"
- " <memory type=\"ram\" start=\"0x20000000\" length=\"0x5000\"/>"
- "</memory-map>";
-
-/* Flash Controller Register Map */
-#define STM32L1_FLASH_BASE 0x40023C00
-#define STM32L1_FLASH_ACR (STM32L1_FLASH_BASE + 0x00)
-#define STM32L1_FLASH_PECR (STM32L1_FLASH_BASE + 0x04)
-#define STM32L1_FLASH_PDKEYR (STM32L1_FLASH_BASE + 0x08)
-#define STM32L1_FLASH_PEKEYR (STM32L1_FLASH_BASE + 0x0C)
-#define STM32L1_FLASH_PRGKEYR (STM32L1_FLASH_BASE + 0x10)
-#define STM32L1_FLASH_OPTKEYR (STM32L1_FLASH_BASE + 0x14)
-#define STM32L1_FLASH_SR (STM32L1_FLASH_BASE + 0x18)
-#define STM32L1_FLASH_OBR (STM32L1_FLASH_BASE + 0x1C)
-#define STM32L1_FLASH_WRPR1 (STM32L1_FLASH_BASE + 0x20)
-#define STM32L1_FLASH_WRPR2 (STM32L1_FLASH_BASE + 0x80)
-#define STM32L1_FLASH_WRPR3 (STM32L1_FLASH_BASE + 0x84)
-
-#define STM32L1_FLASH_PECR_FPRG (1 << 10)
-#define STM32L1_FLASH_PECR_ERASE (1 << 9)
-#define STM32L1_FLASH_PECR_PROG (1 << 3)
-
-#define STM32L1_FLASH_SR_BSY (1 << 0)
-#define STM32L1_FLASH_SR_EOP (1 << 1)
-
-#define STM32L1_FLASH_SR_ERROR_MASK (0x1f << 8)
-
-#define STM32L1_PEKEY1 0x89ABCDEF
-#define STM32L1_PEKEY2 0x02030405
-#define STM32L1_PRGKEY1 0x8C9DAEBF
-#define STM32L1_PRGKEY2 0x13141516
-
-#define STM32L1_DBGMCU_IDCODE 0xE0042000
-
-bool stm32l1_probe(struct target_s *target)
-{
- uint32_t idcode;
-
- idcode = target_mem_read32(target, STM32L1_DBGMCU_IDCODE);
- switch(idcode & 0xFFF) {
- case 0x416: /* CAT. 1 device */
- case 0x429: /* CAT. 2 device */
- case 0x427: /* CAT. 3 device */
- case 0x436: /* CAT. 4 device */
- case 0x437: /* CAT. 5 device */
- target->idcode = idcode & 0xFFF;
- target->driver = stm32l1_driver_str;
- target->xml_mem_map = stm32l1_xml_memory_map;
- target->flash_erase = stm32l1_flash_erase;
- target->flash_write = stm32l1_flash_write;
- return true;
- }
-
- return false;
-}
-
-static void stm32l1_flash_unlock(target *t)
-{
- target_mem_write32(t, STM32L1_FLASH_PEKEYR, STM32L1_PEKEY1);
- target_mem_write32(t, STM32L1_FLASH_PEKEYR, STM32L1_PEKEY2);
- target_mem_write32(t, STM32L1_FLASH_PRGKEYR, STM32L1_PRGKEY1);
- target_mem_write32(t, STM32L1_FLASH_PRGKEYR, STM32L1_PRGKEY2);
-}
-
-static int stm32l1_flash_erase(struct target_s *target, uint32_t addr, size_t len)
-{
- uint16_t sr;
-
- addr &= ~255;
- len &= ~255;
-
- stm32l1_flash_unlock(target);
-
- /* Flash page erase instruction */
- target_mem_write32(target, STM32L1_FLASH_PECR, STM32L1_FLASH_PECR_ERASE | STM32L1_FLASH_PECR_PROG);
-
- /* Read FLASH_SR to poll for BSY bit */
- while(target_mem_read32(target, STM32L1_FLASH_SR) & STM32L1_FLASH_SR_BSY)
- if(target_check_error(target))
- return -1;
-
- while(len) {
- /* Write first word of page to 0 */
- target_mem_write32(target, addr, 0);
-
- len -= 256;
- addr += 256;
- }
-
- /* Disable programming mode */
- target_mem_write32(target, STM32L1_FLASH_PECR, 0);
-
- /* Check for error */
- sr = target_mem_read32(target, STM32L1_FLASH_SR);
- if ((sr & STM32L1_FLASH_SR_ERROR_MASK) || !(sr & STM32L1_FLASH_SR_EOP))
- return -1;
-
- return 0;
-}
-
-static int stm32l1_flash_write(struct target_s *target, uint32_t dest,
- const uint8_t *src, size_t len)
-{
- uint16_t sr;
-
- /* Handle non word-aligned start */
- if(dest & 3) {
- uint32_t data = 0;
- uint32_t wlen = 4 - (dest & 3);
- if(wlen > len)
- wlen = len;
-
- memcpy((uint8_t *)&data + (dest & 3), src, wlen);
- target_mem_write32(target, dest & ~3, data);
- src += wlen;
- dest += wlen;
- len -= wlen;
- }
-
- /* Handle non half-page-aligned start */
- if(dest & 127 && len >= 4) {
- uint32_t xlen = 128 - (dest & 127);
- if(xlen > len)
- xlen = len & ~3;
-
- target_mem_write(target, dest, src, xlen);
- src += xlen;
- dest += xlen;
- len -= xlen;
- }
-
- /* Write half-pages */
- if(len > 128) {
- /* Enable half page mode */
- target_mem_write32(target, STM32L1_FLASH_PECR, STM32L1_FLASH_PECR_FPRG | STM32L1_FLASH_PECR_PROG);
-
- /* Read FLASH_SR to poll for BSY bit */
- while(target_mem_read32(target, STM32L1_FLASH_SR) & STM32L1_FLASH_SR_BSY)
- if(target_check_error(target))
- return -1;
-
- target_mem_write(target, dest, src, len & ~127);
- src += len & ~127;
- dest += len & ~127;
- len -= len & ~127;
-
- /* Disable half page mode */
- target_mem_write32(target, STM32L1_FLASH_PECR, 0);
-
- /* Read FLASH_SR to poll for BSY bit */
- while(target_mem_read32(target, STM32L1_FLASH_SR) & STM32L1_FLASH_SR_BSY)
- if(target_check_error(target))
- return -1;
- }
-
- /* Handle non-full page at the end */
- if(len >= 4) {
- target_mem_write(target, dest, src, len & ~3);
- src += len & ~3;
- dest += len & ~3;
- len -= len & ~3;
- }
-
- /* Handle non-full word at the end */
- if(len) {
- uint32_t data = 0;
-
- memcpy((uint8_t *)&data, src, len);
- target_mem_write32(target, dest, data);
- }
-
- /* Check for error */
- sr = target_mem_read32(target, STM32L1_FLASH_SR);
- if ((sr & STM32L1_FLASH_SR_ERROR_MASK) || !(sr & STM32L1_FLASH_SR_EOP))
- return -1;
-
- return 0;
-}