From b24866225a6301d3a663f874725e83c012dc25d3 Mon Sep 17 00:00:00 2001 From: Florent Duchon Date: Wed, 26 Dec 2012 17:36:00 +0100 Subject: digital/beacon: add bitcloud stack into common directory digital/zigbit --- .../HAL/avr/atmega1281/common/include/gpio.h | 147 +++++++++ .../HAL/avr/atmega1281/common/include/halAdc.h | 68 +++++ .../avr/atmega1281/common/include/halAppClock.h | 101 +++++++ .../HAL/avr/atmega1281/common/include/halAssert.h | 108 +++++++ .../HAL/avr/atmega1281/common/include/halAtomic.h | 57 ++++ .../HAL/avr/atmega1281/common/include/halClkCtrl.h | 70 +++++ .../HAL/avr/atmega1281/common/include/halDbg.h | 95 ++++++ .../avr/atmega1281/common/include/halDiagnostic.h | 51 ++++ .../HAL/avr/atmega1281/common/include/halEeprom.h | 87 ++++++ .../HAL/avr/atmega1281/common/include/halFCPU.h | 36 +++ .../HAL/avr/atmega1281/common/include/halInit.h | 31 ++ .../avr/atmega1281/common/include/halInterrupt.h | 36 +++ .../HAL/avr/atmega1281/common/include/halIrq.h | 99 +++++++ .../HAL/avr/atmega1281/common/include/halPwm.h | 199 +++++++++++++ .../HAL/avr/atmega1281/common/include/halSleep.h | 73 +++++ .../atmega1281/common/include/halSleepTimerClock.h | 146 +++++++++ .../HAL/avr/atmega1281/common/include/halSpi.h | 180 ++++++++++++ .../HAL/avr/atmega1281/common/include/halUsart.h | 327 +++++++++++++++++++++ .../HAL/avr/atmega1281/common/include/halW1.h | 93 ++++++ .../HAL/avr/atmega1281/common/include/halWdt.h | 53 ++++ .../HAL/avr/atmega1281/common/include/i2c.h | 185 ++++++++++++ .../HAL/avr/atmega1281/common/include/macros.m90 | 152 ++++++++++ 22 files changed, 2394 insertions(+) create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/gpio.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAdc.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAppClock.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAssert.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAtomic.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halClkCtrl.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDbg.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDiagnostic.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halEeprom.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halFCPU.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInit.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInterrupt.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halIrq.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halPwm.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleep.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleepTimerClock.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSpi.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halUsart.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halW1.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halWdt.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/i2c.h create mode 100644 digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/macros.m90 (limited to 'digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include') diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/gpio.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/gpio.h new file mode 100644 index 00000000..421cc4d6 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/gpio.h @@ -0,0 +1,147 @@ +/***************************************************************************//** + \file gpio.h + + \brief Implementation of gpio defines. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 4/12/08 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _GPIO_H +#define _GPIO_H + +/****************************************************************************** + Includes section +******************************************************************************/ +// \cond +#include +// \endcond + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/****************************************************************************** +* void gpioX_set() sets GPIOX pin to logical 1 level. +* void gpioX_clr() clears GPIOX pin to logical 0 level. +* void gpioX_make_in makes GPIOX pin as input. +* void gpioX_make_in makes GPIOX pin as output. +* uint8_t gpioX_read() returns logical level GPIOX pin. +* uint8_t gpioX_state() returns configuration of GPIOX port. +*******************************************************************************/ +#define HAL_ASSIGN_PIN(name, port, bit) \ +INLINE void GPIO_##name##_set() {PORT##port |= (1 << bit);} \ +INLINE void GPIO_##name##_clr() {PORT##port &= ~(1 << bit);} \ +INLINE uint8_t GPIO_##name##_read() {return (PIN##port & (1 << bit)) != 0;} \ +INLINE uint8_t GPIO_##name##_state() {return (DDR##port & (1 << bit)) != 0;} \ +INLINE void GPIO_##name##_make_out() {DDR##port |= (1 << bit);} \ +INLINE void GPIO_##name##_make_in() {DDR##port &= ~(1 << bit); PORT##port &= ~(1 << bit);} \ +INLINE void GPIO_##name##_make_pullup() {PORT##port |= (1 << bit);}\ +INLINE void GPIO_##name##_toggle() {PORT##port ^= (1 << bit);} + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +// the macros for the manipulation by GPIO0 +HAL_ASSIGN_PIN(0, B, 5); +// the macros for the manipulation by GPIO1 +HAL_ASSIGN_PIN(1, B, 6); +// the macros for the manipulation by GPIO2 +HAL_ASSIGN_PIN(2, B, 7); +// the macros for the manipulation by GPIO3 +HAL_ASSIGN_PIN(3, G, 0); +// the macros for the manipulation by GPIO4 +HAL_ASSIGN_PIN(4, G, 1); +// the macros for the manipulation by GPIO5 +HAL_ASSIGN_PIN(5, G, 2); +// the macros for the manipulation by GPIO6 +HAL_ASSIGN_PIN(6, D, 6); +// the macros for the manipulation by GPIO7 +HAL_ASSIGN_PIN(7, D, 7); +// the macros for the manipulation by GPIO8 +HAL_ASSIGN_PIN(8, E, 3); + +// macroses only for STK500 +// the macros for the manipulation by GPIO9 +HAL_ASSIGN_PIN(9, C, 0); +// the macros for the manipulation by GPIO10 +HAL_ASSIGN_PIN(10, C, 1); +// the macros for the manipulation by GPIO11 +HAL_ASSIGN_PIN(11, C, 2); +// the macros for the manipulation by GPIO12 +HAL_ASSIGN_PIN(12, C, 3); +// the macros for the manipulation by GPIO13 +HAL_ASSIGN_PIN(13, C, 4); +// the macros for the manipulation by GPIO14 +HAL_ASSIGN_PIN(14, C, 5); +// the macros for the manipulation by GPIO15 +HAL_ASSIGN_PIN(15, C, 6); +// the macros for the manipulation by GPIO16 +HAL_ASSIGN_PIN(16, C, 7); +// macroses only for STK500 + +// macroses only for Rcb +// the macros for the manipulation by GPIOE2 +HAL_ASSIGN_PIN(E2, E, 2); +// the macros for the manipulation by GPIOE3 +HAL_ASSIGN_PIN(E3, E, 3); +// the macros for the manipulation by GPIOE4 +HAL_ASSIGN_PIN(E4, E, 4); +// the macros for the manipulation by GPIOE5 +HAL_ASSIGN_PIN(E5, E, 5); +// macroses only for Rcb + +// the macros for the manipulation by GPIO_I2C_CLK +HAL_ASSIGN_PIN(I2C_CLK, D, 0); +// the macros for the manipulation by GPIO_I2C_DATA +HAL_ASSIGN_PIN(I2C_DATA, D, 1); +// the macros for the manipulation by GPIO_USART1_TXD +HAL_ASSIGN_PIN(USART1_TXD, D, 2); +// the macros for the manipulation by GPIO_USART1_RXD +HAL_ASSIGN_PIN(USART1_RXD, D, 3); +// the macros for the manipulation by GPIO_USART1_EXTCLK +HAL_ASSIGN_PIN(USART1_EXTCLK, D, 5); +// the macros for the manipulation by GPIO_USART_RTS +HAL_ASSIGN_PIN(USART_RTS, D, 4); +// the macros for the manipulation by GPIO_USART_CTS +HAL_ASSIGN_PIN(USART_CTS, D, 5); +// the macros for the manipulation by GPIO_ADC_INPUT_3 +HAL_ASSIGN_PIN(ADC_INPUT_3, F, 3); +// the macros for the manipulation by GPIO_ADC_INPUT_2 +HAL_ASSIGN_PIN(ADC_INPUT_2, F, 2); +// the macros for the manipulation by GPIO_ADC_INPUT_1 +HAL_ASSIGN_PIN(ADC_INPUT_1, F, 1); +// the macros for the manipulation by GPIO_BAT +HAL_ASSIGN_PIN(BAT, F, 0); +// the macros for the manipulation by GPIO_1WR +HAL_ASSIGN_PIN(1WR, G, 5); +// the macros for the manipulation by GPIO_USART_DTR +HAL_ASSIGN_PIN(USART_DTR, E, 4); +// the macros for the manipulation by GPIO_USART0_TXD +HAL_ASSIGN_PIN(USART0_TXD, E, 0); +// the macros for the manipulation by GPIO_USART0_RXD +HAL_ASSIGN_PIN(USART0_RXD, E, 1); +// the macros for the manipulation by GPIO_USART0_EXTCLK +HAL_ASSIGN_PIN(USART0_EXTCLK, E, 2); +// the macros for the manipulation by GPIO_IRQ_7 +HAL_ASSIGN_PIN(IRQ_7, E, 7); +// the macros for the manipulation by GPIO_IRQ_6 +HAL_ASSIGN_PIN(IRQ_6, E, 6); + +#ifdef _HAL_USE_AMPLIFIER_ + // the macros for the manipulation sleep power amplifier + HAL_ASSIGN_PIN(POW_AMPLF_SLP, C, 1); +#endif + +#endif /* _GPIO_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAdc.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAdc.h new file mode 100644 index 00000000..d64f6bd2 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAdc.h @@ -0,0 +1,68 @@ +/**************************************************************************//** + \file halAdc.h + + \brief Declaration of hardware depended ADC interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALADC_H +#define _HALADC_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Initializations the ADC. +\param[in] + param - pointer to parameter structure +******************************************************************************/ +void halOpenAdc(HAL_AdcParams_t *param); + +/**************************************************************************//** +\brief starts convertion on the ADC channel. +\param[in] + channel - channel number. +******************************************************************************/ +void halStartAdc(uint8_t channel); + +/**************************************************************************//** +\brief Closes the ADC. +******************************************************************************/ +void halCloseAdc(void); + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/**************************************************************************//** +\brief SIG_ADC interrupt handler signal implementation +******************************************************************************/ +INLINE void halSigAdcInterrupt(void) +{ + halPostTask3(HAL_ADC); +} + +#endif /* _HALADC_H */ + +// eof halSdc.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAppClock.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAppClock.h new file mode 100644 index 00000000..47a90fac --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAppClock.h @@ -0,0 +1,101 @@ +/**************************************************************************//** + \file halAppClock.h + + \brief Declarations of appTimer hardware-dependent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALAPPCLOCK_H +#define _HALAPPCLOCK_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/** \brief system timer interval in ms */ +#define HAL_APPTIMERINTERVAL 10ul +/** \brief frequency prescaler for system timer */ +#define TIMER_FREQUENCY_PRESCALER 8 +/** \brief timer counter top value */ +#define TOP_TIMER_COUNTER_VALUE ((F_CPU/1000ul) / TIMER_FREQUENCY_PRESCALER) * HAL_APPTIMERINTERVAL +/** \brief cpu clk / 8 */ +#define HAL_CLOCK_SELECTION_MASK (1 << CS11) + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Initialization appTimer clock. +******************************************************************************/ +void halInitAppClock(void); + +/**************************************************************************//** +\brief Synchronization system time which based on application timer. +******************************************************************************/ +void halAppSystemTimeSynchronize(void); + +/**************************************************************************//** +\brief Return time of sleep timer. + +\return + time in ms. +******************************************************************************/ +uint32_t halGetTimeOfAppTimer(void); + +/**************************************************************************//** +\brief Return system time in us + +\param[out] + mem - memory for system time +******************************************************************************/ +void halGetSystemTimeUs(uint64_t *mem); + +/**************************************************************************//** +\brief Takes account of the sleep interval. + +\param[in] + interval - time of sleep +******************************************************************************/ +void halAdjustSleepInterval(uint32_t interval); + +/****************************************************************************** + Inline static functions prototypes section. +******************************************************************************/ +/**************************************************************************//** +\brief Enables appTimer clock. +******************************************************************************/ +INLINE void halStartAppClock(void) +{ + TCCR4B |= HAL_CLOCK_SELECTION_MASK; +} + +/**************************************************************************//** +\brief Disables appTimer clock. +******************************************************************************/ +INLINE void halStopAppClock(void) +{ + TCCR4B &= ~HAL_CLOCK_SELECTION_MASK; // stop the timer +} + +#endif /*_HALAPPCLOCK_H*/ + +// eof halAppClock.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAssert.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAssert.h new file mode 100644 index 00000000..92e0497f --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAssert.h @@ -0,0 +1,108 @@ +/**************************************************************************//** + \file halAssert.h + + \brief Implementation of avr assert algorithm. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 18/08/08 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALASSERT_H +#define _HALASSERT_H + +#ifdef __IAR_SYSTEMS_ICC__ +#ifndef _SYSTEM_BUILD +#pragma system_include +#endif +#endif + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define DELAY_VALUE 0x000000ul + +#ifdef _SYS_ASSERT_ON_ + +#if defined(_HAL_ASSERT_INTERFACE_UART0_) + #define UBRRNH UBRR0H + #define UBRRNL UBRR0L + #define UCSRNA UCSR0A + #define UCSRNB UCSR0B + #define UCSRNC UCSR0C + #define UDRN UDR0 +#elif defined(_HAL_ASSERT_INTERFACE_UART1_) + #define UBRRNH UBRR1H + #define UBRRNL UBRR1L + #define UCSRNA UCSR1A + #define UCSRNB UCSR1B + #define UCSRNC UCSR1C + #define UDRN UDR1 +#else + #error " Unknown assert interface " +#endif + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +INLINE void halAssert(uint8_t condition, uint16_t dbgCode) +{ + if (!condition) + { + uint32_t delay; + + HAL_StopWdt(); + asm("cli"); + DDRB |= 0xE0; + /* Init UART */ + UBRRNH = 0; + if (4000000ul == HAL_ReadFreq()) + UBRRNL = 12; + else + UBRRNL = 25; + UCSRNA = (1 << U2X1); + UCSRNB = (1 << TXEN1); + UCSRNC = (3 << UCSZ10); + while(1) + { + PORTB &= ~0xE0; + /* Send high byte of message to UART */ + while (!(UCSRNA & (1 << UDRE1))); + UDRN = (dbgCode >> 8); + /* Send low byte of message to UART */ + while (!(UCSRNA & (1 << UDRE1))); + UDRN = dbgCode; + delay = DELAY_VALUE; + while (delay--); + + PORTB |= 0xE0; + delay = (DELAY_VALUE / 2); + while(delay--); + } + } +} + +#else /* _SYS_ASSERT_ON_ */ + #define halAssert(condition, dbgCode) +#endif /* _SYS_ASSERT_ON_ */ + +#endif /* _HALASSERT_H */ + +// eof halAssert.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAtomic.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAtomic.h new file mode 100644 index 00000000..245abf6f --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halAtomic.h @@ -0,0 +1,57 @@ +/**************************************************************************//** + \file halAtomic.h + + \brief Implementation of atomic sections. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALATOMIC_H +#define _HALATOMIC_H + +#include + +typedef uint8_t atomic_t; + +/****************************************************************************** +Saves global interrupt bit. Disables global interrupt. +Parameters: + none. +Returns: + none. +******************************************************************************/ +INLINE atomic_t halStartAtomic(void) +{ + atomic_t result = SREG; + cli(); + return result; +} + +/****************************************************************************** +Restores global interrupt. +Parameters: + none. +Returns: + none. +******************************************************************************/ +INLINE void halEndAtomic(atomic_t sreg) +{ + SREG = sreg; +} + +#endif /* _HALATOMIC_H */ +// eof atomic.h + diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halClkCtrl.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halClkCtrl.h new file mode 100644 index 00000000..6bc7a11d --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halClkCtrl.h @@ -0,0 +1,70 @@ +/**************************************************************************//** + \file halClkCtrl.h + + \brief Declarations of clock control hardware-dependent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 E. Ivanov - Created + 16/04/09 A. Khromykh - Refactored + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALCLKCTRL_H +#define _HALCLKCTRL_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Types section +******************************************************************************/ +/**************************************************************************//** +\brief Possible clock source +******************************************************************************/ +typedef enum +{ + INTERNAL_RC, + OTHER_SOURCE +} ClkSource_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Initialization system clock. +******************************************************************************/ +void halInitFreq(void); + +/**************************************************************************//** +\brief Return clock source + +\return + clock source. +******************************************************************************/ +ClkSource_t halGetClockSource(void); + +/**************************************************************************//** +\brief System clock. + +\return + system clock in Hz. +******************************************************************************/ +uint32_t HAL_ReadFreq(void); + +#endif /* _HALCLKCTRL_H */ + +// eof halClkCtrl.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDbg.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDbg.h new file mode 100644 index 00000000..def330ba --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDbg.h @@ -0,0 +1,95 @@ +/***************************************************************************//** + \file halDbg.h + + \brief Declarations of hal , bsb mistake interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 09/11/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALDBG_H +#define _HALDBG_H + +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +enum +{ + APPTIMER_MISTAKE = 0x2000, + INCORRECT_EEPROM_ADDRESS = 0x2001, + MEMORY_CANNOT_WRITE = 0x2002, + USARTC_HALUSARTRXBUFFERFILLER_0 = 0x2003, + USARTC_HALSIGUSARTTRANSMISSIONCOMPLETE_0 = 0x2004, + USARTC_HALSIGUSARTRECEPTIONCOMPLETE_0 = 0x2005, + HALUSARTH_HALCLOSEUSART_0 = 0X2006, + HALUSARTH_HALENABLEUSARTDREMINTERRUPT_0 = 0X2007, + HALUSARTH_HALDISABLEUSARTDREMINTERRUPT_0 = 0X2008, + HALUSARTH_HALENABLEUSARTTXCINTERRUPT_0 = 0X2009, + HALUSARTH_HALDISABLEUSARTTXCINTERRUPT_0 = 0X200A, + HALUSARTH_HALENABLEUSARTRXCINTERRUPT_0 = 0X200B, + HALUSARTH_HALDISABLEUSARTRXCINTERRUPT_0 = 0X200C, + HALUSARTH_HALSENDUSARTBYTE_0 = 0X200D, + USARTC_HALUSARTSAVEERRORREASON = 0x200E, + USARTC_HALSIGUSARTERROROCCURED_0 = 0x200F, + USARTC_HALUNKNOWNERRORREASON_0 = 0x2010, + + HAL_USART_TX_EMPTY_LIMIT = 0x2FDB, + HAL_USART_TRANS_COMPLETE_LIMIT = 0x2FDC, + HAL_USART_HW_CONTROLLER_LIMIT = 0x2FDD, + HAL_SLEEP_TIMER_SYNCHRONIZE_LIMIT = 0x2FDE, + HAL_GET_SLEEP_TIME_LIMIT = 0x2FDF, + HALISR_EEPROM_WRITE_TIME_LIMIT = 0x2FE0, + HAL_APP_TIMER_SYNCHRONIZE_LIMIT = 0x2FE1, + HALISR_INT5_VECT_TIME_LIMIT = 0x2FE2, + HALISR_ADC_TIME_LIMIT = 0x2FE3, + HALISR_TIMER4_COMPA_TIME_LIMIT = 0x2FE4, + HALATOM_SETLOWFUSES_TIME_LIMIT = 0x2FE5, + HALATOM_INITFREQ_TIME_LIMIT = 0x2FE6, + HALISR_EEPROM_READY_TIME_LIMIT = 0x2FE7, + HALISR_INT6_VECT_TIME_LIMIT = 0x2FE8, + HALISR_INT7_VECT_TIME_LIMIT = 0x2FE9, + HALISR_TIMER2_COMPA_TIME_LIMIT = 0x2FEA, + HALISR_TIMER2_OVF_TIME_LIMIT = 0x2FEB, + HALISR_USART0_UDR_TIME_LIMIT = 0x2FEC, + HALISR_USART0_TX_TIME_LIMIT = 0x2FED, + HALISR_USART0_RX_TIME_LIMIT = 0x2FEE, + HALISR_USART1_UDRE_TIME_LIMIT = 0x2FEF, + HALISR_USART1_TX_TIME_LIMIT = 0x2FF0, + HALISR_USART1_RX_TIME_LIMIT = 0x2FF1, + HALISR_INT4_TIME_LIMIT = 0x2FF2, + HALISR_TWI_TIME_LIMIT = 0x2FF3, + HALATOM_STARTWDT_TIME_LIMIT = 0x2FF4, + HALISR_WDT_TIME_LIMIT = 0x2FF5, + HALATOM_WRITEBYTE_RFSPI_TIME_LIMIT = 0x2FF6, + HALISR_TIMER3_COMPA_TIME_LIMIT = 0x2FF7, + HALISR_PHYDISPATCH_RFINT_TIME_LIMIT = 0x2FF8, + HALATOM_GETTIME_OF_APPTIMER_1_TIME_LIMIT = 0x2FF9, + HALATOM_GETTIME_OF_APPTIMER_2_TIME_LIMIT = 0x2FFA, + HALATOM_GETTIME_OF_APPTIMER_3_TIME_LIMIT = 0x2FFB, + HALATOM_WRITE_USART_TIME_LIMIT = 0x2FFC, + HALATOM_READ_USART_TIME_LIMIT = 0x2FFD, + HALATOM_USART_RX_COMPLETE_TIME_LIMIT = 0x2FFE, + HALATOM_CLEAR_TIME_CONTROL_TIME_LIMIT = 0x2FFF +}; + +/****************************************************************************** + Prototypes section +******************************************************************************/ + +#endif /* _HALDBG_H */ + +// eof halDbg.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDiagnostic.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDiagnostic.h new file mode 100644 index 00000000..53fb0302 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halDiagnostic.h @@ -0,0 +1,51 @@ +/**************************************************************************//** + \file halDiagnostic.h + + \brief Implementation of diagnostics defines. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 20/05/09 D. Kasyanov - Created + ******************************************************************************/ + +#ifndef _HALDIAGNOSTIC_H +#define _HALDIAGNOSTIC_H + +#include +#include + +#if defined (MEASURE) + #define TCNT5_ACCESS_TIME 8 + #define DEFALUT_TIME_LIMIT 100 + #define TIMER3_COMPA_TIME_LIMIT 150 + #define PHYDISPATCH_RFINT_TIME_LIMIT 210 + + #define BEGIN_MEASURE { \ + uint16_t timeLimit = DEFALUT_TIME_LIMIT; \ + uint16_t start = TCNT5; uint16_t offset; + + #define END_MEASURE(code) offset = (TCNT5 - start - TCNT5_ACCESS_TIME) / (F_CPU/1000000ul); \ + if (HALISR_TIMER3_COMPA_TIME_LIMIT == code) timeLimit = TIMER3_COMPA_TIME_LIMIT; \ + if (HALISR_PHYDISPATCH_RFINT_TIME_LIMIT == code) timeLimit = PHYDISPATCH_RFINT_TIME_LIMIT; \ + if (timeLimit != 0) { \ + if (offset > timeLimit) { \ + TCCR5B = 0; TCNT5 = offset; assert(0,code); \ + } \ + } \ + } + +#else + #define BEGIN_MEASURE + #define END_MEASURE(code) +#endif + + +#endif /* _HALDIAGNOSTIC_H */ + diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halEeprom.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halEeprom.h new file mode 100644 index 00000000..0ca06bfb --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halEeprom.h @@ -0,0 +1,87 @@ +/**************************************************************************//** + \file halEeprom.h + + \brief Provides interface for the access to hardware dependent + EEPROM module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALEEPROM_H +#define _HALEEPROM_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/** \brief the mask to rise interrupt when operation on EEPROM was completed */ +#define HAL_EEPROM_WRITE_MASK_INT (1 << EEMPE | 1 << EERIE) +#define HAL_EEPROM_WRITE_MASK (1 << EEMPE) + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Writes a byte to EEPROM. +\param[in] + EECRMask - mask that define capability of interrupt after byte writing. +\param[in] + address - address of byte +\param[in] + data - data. +******************************************************************************/ +void halEepromWrite(uint8_t EECRMask, uint16_t address, uint8_t data); + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/**************************************************************************//** +\brief Waits completion of previous operation. +******************************************************************************/ +INLINE void halWaitEepromReady(void) +{ + while (EECR & (1 << EEPE)); // wait for completion of previous write +} + +/**************************************************************************//** +\brief Reads byte from EEPROM. +\param[in] + address -address of byte. +\return + a read byte. +******************************************************************************/ +INLINE uint8_t halReadEeprom(uint16_t address) +{ + EEAR = address; + EECR |= (1 << EERE); + return EEDR; +} + +/**************************************************************************//** +\brief Posts the task to taskhandler that "EEPROM ready" + interrupt has occured. +******************************************************************************/ +INLINE void halSigEepromReadyInterrupt(void) +{ + halPostTask3(HAL_EE_READY); +} +#endif /*_HALEEPROM_H*/ +//eof halEeprom.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halFCPU.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halFCPU.h new file mode 100644 index 00000000..fe961e60 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halFCPU.h @@ -0,0 +1,36 @@ +/**************************************************************************//** + \file halFCPU.h + + \brief Declaration F_CPU for C code. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 6/10/08 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/* Main clock of CPU in Hz. */ +#if defined(HAL_3d6864MHz) + #define F_CPU 3686400 +#elif defined(HAL_4MHz) + #define F_CPU 4000000 +#elif defined(HAL_7d3728MHz) + #define F_CPU 7372800 +#elif defined(HAL_8MHz) + #define F_CPU 8000000 +#endif + +// eof halFCPU.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInit.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInit.h new file mode 100644 index 00000000..b68aac65 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInit.h @@ -0,0 +1,31 @@ +/**************************************************************************//** + \file halInit.h + + \brief HAL start up module interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/06/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALINIT_H +#define _HALINIT_H +/****************************************************************************** + Performs start up HAL initialization. +******************************************************************************/ +void HAL_Init(void); + +#endif /* _HALINIT_H */ + +// eof halInit.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInterrupt.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInterrupt.h new file mode 100644 index 00000000..03300064 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halInterrupt.h @@ -0,0 +1,36 @@ +/**************************************************************************//** + \file halInterrupt.h + + \brief Macroses to manipulate global interrupts. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/05/07 E. Ivanov - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALINTERRUPT_H +#define _HALINTERRUPT_H + +/****************************************************************************** +Enables global interrupt. +******************************************************************************/ +#define HAL_EnableInterrupts() sei() + +/****************************************************************************** +Disables global interrupt. +******************************************************************************/ +#define HAL_DisableInterrupts() cli() + +#endif /* _HALINTERRUPT_H */ +// eof halInterrupt.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halIrq.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halIrq.h new file mode 100644 index 00000000..687447a3 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halIrq.h @@ -0,0 +1,99 @@ +/***************************************************************************//** + \file halIrq.h + + \brief Declaration of HWD IRQ interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALIRQ_H +#define _HALIRQ_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#if defined(PLATFORM_ZIGBIT) + #define MAX_NUM_LINES 2 + #define MIN_VALID_IRQ_NUMBER IRQ_6 +#else + #define MAX_NUM_LINES 3 + #define MIN_VALID_IRQ_NUMBER IRQ_5 +#endif +/** \brief number valid interrupt. */ +#define HAL_NUM_IRQ_LINES MAX_NUM_LINES +/** \brief first valid interrupt. */ +#define HAL_FIRST_VALID_IRQ MIN_VALID_IRQ_NUMBER + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief user's callback type. */ +typedef void (* IrqCallback_t)(void); + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Sets configuration of pins and the registers. +\param[in] + irqNumber - number of interrupt. +\param[in] + irqMode - mode of interrupt. +******************************************************************************/ +void halSetIrqConfig(uint8_t irqNumber, uint8_t irqMode); + +/**************************************************************************//** +\brief Clears configuration of pins and the registers. +\param[in] + irqNumber - number of interrupt. +******************************************************************************/ +void halClrIrqConfig(uint8_t irqNumber); + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/**************************************************************************//** +\brief Enables external interrupt +\param[in] + irqNumber - number of external interrupt. +******************************************************************************/ +INLINE void halEnableIrqInterrupt(uint8_t irqNumber) +{ + // Enable external interrupt request + EIMSK |= (1 << irqNumber); +} + +/**************************************************************************//** +\brief Disables external interrupt +\param[in] + irqNumber - number of external interrupt. +******************************************************************************/ +INLINE void halDisableIrqInterrupt(uint8_t irqNumber) +{ + // Disable external interrupt request + EIMSK &= ~(1 << irqNumber); +} + +#endif /* _HALIRQ_H */ +//eof halirq.h + diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halPwm.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halPwm.h new file mode 100644 index 00000000..6c026ce0 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halPwm.h @@ -0,0 +1,199 @@ +/**************************************************************************//** + \file halPwm.h + + \brief Declaration of hardware depended PWM interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 10/11/08 A. Taradov - Created + 5/04/11 A.Razinkov - Refactored + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALPWM_H +#define _HALPWM_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Definitions section +******************************************************************************/ +/* Waveform Generation Mode bits position. PWM module independent. */ +#define WGMn0 0 +#define WGMn1 1 +#define WGMn2 3 +#define WGMn3 4 + +/* Force Output Compare bits position. PWM module independent. */ +#define FOCnA 7 +#define FOCnB 6 +#define FOCnC 5 + +/* Clock Select bits position. PWM module independent. */ +#define CSn0 0 +#define CSn1 1 +#define CSn2 2 + +/* Compare Output Mode bits position. PWM module independent. */ +#define COMnA0 6 +#define COMnA1 7 +#define COMnB0 4 +#define COMnB1 5 +#define COMnC0 2 +#define COMnC1 3 + +/* PWN unit base channel pins position. PWM module dependent. */ +#define PWM_UNIT_1_BASE_CHANNEL_PIN PB5 +#define PWM_UNIT_3_BASE_CHANNEL_PIN PE3 + +/* Force Output Compare base bit. PWM module independent. */ +#define FOCNX_BASE_BIT FOCnA +/* Compare Output Mode base bit number. PWM module independent. */ +#define COMNX0_BASE_BIT COMnA0 +/* Compare Output Mode bitfield size. PWM module and channel independent. */ +#define COMNX_BITFIELD_SIZE 2 +/* Compare Output Mode low bit number. PWM module independent. */ +#define COMnx0(descriptor) ((descriptor)->service.COMnx0) +/* Compare Output Mode high bit number. PWM module independent. */ +#define COMnx1(descriptor) ((descriptor)->service.COMnx0 + 1) +/* Output Compare Register. PWM module and channel dependent. */ +#define OCRnx(descriptor) (*((descriptor)->service.OCRnx)) +/* Data Direction Rregister. PWM module dependent. */ +#define DDRn(descriptor) (*((descriptor)->service.DDRn)) + +/****************************************************************************** + Types section +******************************************************************************/ + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Initializes the PWM. + +\param [in] pwmUnit - PWM unit number. + Equal to ID of Timer/Counter witch serves PWM module. +******************************************************************************/ +void halOpenPwm(HAL_PwmUnit_t pwmUnit); + +/**************************************************************************//** +\brief Starts PWM on specified channel. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +void halStartPwm(HAL_PwmDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Stops PWM on specified channel. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +void halStopPwm(HAL_PwmDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Sets base frequency of module. Common for all module channels. + +\param [in] pwmUnit - PWM unit number. Equal to corresponding Timer/Counter ID. +\param [in] top - value for the TOP register. +\param [in] prescaler - clock prescaler. +******************************************************************************/ +void halSetPwmFrequency(HAL_PwmUnit_t pwmUnit, uint16_t top, HAL_PwmPrescaler_t prescaler); + +/**************************************************************************//** +\brief Sets compare value for the PWM channel. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +void halSetPwmCompareValue(HAL_PwmDescriptor_t *descriptor, uint16_t cmpValue); + +/**************************************************************************//** +\brief Closes the PWM. + +\param [in] pwmUnit - PWM unit number. + Equal to ID of Timer/Counter witch serves PWM module. +******************************************************************************/ +void halClosePwm(HAL_PwmUnit_t pwmUnit); + +/**************************************************************************//** +\brief Prepare PWM channel access. Determine control registers, ports, pins etc. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +void halPreparePwmChannelAccess(HAL_PwmDescriptor_t *descriptor); + +/**************************************************************************//** +\brief Configure corresponding pin as PWM out. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +static inline void halMakeOutPwmPin(HAL_PwmDescriptor_t *descriptor) +{ + DDRn(descriptor) |= + (1 << (descriptor->service.pwmBaseChannelPin + descriptor->channel)); +} + +/**************************************************************************//** +\brief Configure corresponding PWM output pin as in. + +\param [in] descriptor - PWM channel descriptor. +******************************************************************************/ +static inline void halMakeInPwmPin(HAL_PwmDescriptor_t *descriptor) +{ + DDRn(descriptor) &= + ~(1 << (descriptor->service.pwmBaseChannelPin + descriptor->channel)); +} + +/**************************************************************************//** +\brief Perform two-step writing to 16-bit registers with special access rule: + TCNTn, OCRnA/B/C, ICRn. + +\param [in] reg - register address. +\param [in] word - word to move. +******************************************************************************/ +static inline void halMoveWordToRegister(volatile uint16_t *reg, uint16_t word) +{ +ATOMIC_SECTION_ENTER + /* High byte writing */ + *((volatile uint8_t*)(reg) + 1) = (uint8_t)(word >> 8); + /* Low byte writing */ + *(volatile uint8_t*)(reg) = (uint8_t)(word); +ATOMIC_SECTION_LEAVE +} + +/**************************************************************************//** +\brief Perform two-step reading of 16-bit registers with special access rule: + TCNTn, OCRnA/B/C, ICRn. + +\param [in] reg - register address. + +\return register value +******************************************************************************/ +static inline uint16_t halReadWordFromRegister(volatile uint16_t *reg) +{ + uint16_t word; +ATOMIC_SECTION_ENTER + /* Low byte reading */ + word = *(volatile uint8_t*)(reg); + /* High byte reading */ + word |= ((uint16_t)(*((volatile uint8_t*)(reg) + 1)) << 8); +ATOMIC_SECTION_LEAVE + return word; +} + +#endif /* _HALPWM_H */ + +// eof halPwm.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleep.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleep.h new file mode 100644 index 00000000..c82c1a09 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleep.h @@ -0,0 +1,73 @@ +/**************************************************************************//** + \file halSleep.h + + \brief Interface to control sleep mode. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 1/12/09 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALSLEEP_H +#define _HALSLEEP_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Defines section +******************************************************************************/ +#define HAL_ACTIVE_MODE 0 +#define HAL_SLEEP_MODE 1 +#define HAL_SLEEP_TIMER_IS_STOPPED 0 +#define HAL_SLEEP_TIMER_IS_STARTED 1 +#define HAL_SLEEP_TIMER_IS_WAKEUP_SOURCE 0 +#define HAL_EXT_IRQ_IS_WAKEUP_SOURCE 1 + +/****************************************************************************** + Types section +******************************************************************************/ +typedef struct +{ + HAL_WakeUpCallback_t callback; + HAL_SleepTimer_t sleepTimer; + uint8_t wakeupStation : 1; + uint8_t wakeupSource : 1; + uint8_t sleepTimerState : 1; +} HalSleepControl_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Switch on system power. + +\param[in] + wakeupSource - wake up source +******************************************************************************/ +void halPowerOn(const uint8_t wakeupSource); + +/******************************************************************************* + Shutdown system. + NOTES: + the application should be sure the poweroff will not be + interrupted after the execution of the sleep(). +*******************************************************************************/ +void halPowerOff(void); + +#endif /* _HALSLEEP_H */ +// eof halSleep.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleepTimerClock.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleepTimerClock.h new file mode 100644 index 00000000..36ab9849 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSleepTimerClock.h @@ -0,0 +1,146 @@ +/**************************************************************************//** + \file halSleepTimerClock.h + + \brief Definition for count out requested sleep interval. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 29/06/07 E. Ivanov - Created + 7/04/09 A. Khromykh - Refactored + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALSLEEPTIMERCLOCK_H +#define _HALSLEEPTIMERCLOCK_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define SLEEPTIMER_CLOCK 32768lu + +#if defined(SLEEP_PRESCALER_1) + #define SLEEPTIMER_DIVIDER 1ul + #define SLEEPTIMER_PRESCALER (1u << CS20) // No prescaling +#elif defined(SLEEP_PRESCALER_8) + #define SLEEPTIMER_DIVIDER 8ul + #define SLEEPTIMER_PRESCALER (1u << CS21) // clk/8 +#elif defined(SLEEP_PRESCALER_32) + #define SLEEPTIMER_DIVIDER 32ul + #define SLEEPTIMER_PRESCALER ((1u << CS20) | (1u << CS21)) // clk/32 +#elif defined(SLEEP_PRESCALER_64) + #define SLEEPTIMER_DIVIDER 64ul + #define SLEEPTIMER_PRESCALER (1u << CS22) // clk/64 +#elif defined(SLEEP_PRESCALER_128) + #define SLEEPTIMER_DIVIDER 128ul + #define SLEEPTIMER_PRESCALER ((1u << CS20) | (1u << CS22)) // clk/128 +#elif defined(SLEEP_PRESCALER_256) + #define SLEEPTIMER_DIVIDER 256ul + #define SLEEPTIMER_PRESCALER ((1u << CS21) | (1u << CS22)) // clk/256 +#elif defined(SLEEP_PRESCALER_1024) + #define SLEEPTIMER_DIVIDER 1024ul + #define SLEEPTIMER_PRESCALER ((1u << CS20) | (1u << CS21) | (1u << CS22)) // clk/1024 +#endif + +#define HAL_ASSR_FLAGS ((1 << TCN2UB) | (1 << OCR2AUB) | (1 << OCR2BUB) | (1 << TCR2AUB) | (1 << TCR2BUB)) +// to write some value for correct work of the asynchronous timer +#define SOME_VALUE_FOR_SYNCHRONIZATION 0x44 + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** +Starts the sleep timer clock. +******************************************************************************/ +void halStartSleepTimerClock(void); + +/****************************************************************************** +Stops the sleep timer clock. +******************************************************************************/ +void halStopSleepTimerClock(void); + +/****************************************************************************** +Sets interval. +Parameters: + value - contains number of ticks which the timer must count out. +Returns: + none. +******************************************************************************/ +void halSetSleepTimerInterval(uint32_t value); + +/****************************************************************************** +Returns the sleep timer frequency in Hz. +Parameters: + none. +Returns: + the sleep timer frequency in Hz. +******************************************************************************/ +uint32_t halSleepTimerFrequency(void); + +/**************************************************************************//** +\brief Clear timer control structure +******************************************************************************/ +void halClearTimeControl(void); + +/**************************************************************************//** +\brief Wake up procedure for all external interrupts +******************************************************************************/ +void halWakeupFromIrq(void); + +/**************************************************************************//** +\brief Get time of sleep timer. + +\return + time in ms. +******************************************************************************/ +uint32_t halGetTimeOfSleepTimer(void); + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/****************************************************************************** +Disables the sleep timer interrupt. +Parameters: + none. +Returns: + none. +******************************************************************************/ +INLINE void halDisableSleepTimerInt(void) +{ + // Disables 8-bit Timer/Counter2 compare channel A and overflow interrupt + TIMSK2 &= (~(1 << OCIE2A) & ~(1 << TOIE2)); +} + +/****************************************************************************** + Interrupt handler signal implementation +******************************************************************************/ +INLINE void halInterruptSleepClock(void) +{ + halPostTask0(HAL_ASYNC_TIMER); +} + +/****************************************************************************** + Interrupt handler signal implementation +******************************************************************************/ +INLINE void halSynchronizeSleepTime(void) +{ + halPostTask0(HAL_SYNC_SLEEP_TIME); +} + +#endif /* _HALSLEEPTIMERCLOCK_H */ +// eof halSleepTimerClock.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSpi.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSpi.h new file mode 100644 index 00000000..59ab72c8 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halSpi.h @@ -0,0 +1,180 @@ +/*****************************************************************************//** +\file halSpi.h + +\brief Declarations of USART SPI mode. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 29/06/07 E. Ivanov - Created +**********************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ +#ifndef _HALSPI_H +#define _HALSPI_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#define SPI_CHANNEL_0 USART_CHANNEL_0 // USART0 AtMega1281/2561 start addresss +#define SPI_CHANNEL_1 USART_CHANNEL_1 // USART1 AtMega1281/2561 start addresss + +/****************************************************************************** + Types section +******************************************************************************/ +// spi channel +typedef UsartChannel_t SpiChannel_t; + +// types of the clock mode +typedef enum +{ + // leading edge sample RX bit (rising), trailing edge setup TX bit (falling). + SPI_CLOCK_MODE0, + // leading edge setup TX bit (rising), trailing edge sample RX bit (falling). + SPI_CLOCK_MODE1, + // leading edge sample RX bit (falling), trailing edge setup TX bit (rising). + SPI_CLOCK_MODE2, + // leading edge setup TX bit (falling), trailing edge sample RX bit (rising). + SPI_CLOCK_MODE3 +} SpiClockMode_t; + +// clock rate +typedef enum +{ + SPI_CLOCK_RATE_62 = ((F_CPU / (2 * 62500ul)) - 1), + SPI_CLOCK_RATE_125 = ((F_CPU / (2 * 125000ul)) - 1), + SPI_CLOCK_RATE_250 = ((F_CPU / (2 * 250000ul)) - 1), + SPI_CLOCK_RATE_500 = ((F_CPU / (2 * 500000ul)) - 1), + SPI_CLOCK_RATE_1000 = ((F_CPU / (2 * 1000000ul)) - 1), + SPI_CLOCK_RATE_2000 = ((F_CPU / (2 * 2000000ul)) - 1) +} SpiBaudRate_t; + +// Data order +typedef enum +{ + SPI_DATA_MSB_FIRST, // data with MSB first + SPI_DATA_LSB_FIRST // data with LSB first +} SpiDataOrder_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/****************************************************************************** +Disables USART channel. +Parameters: + tty - spi channel. +******************************************************************************/ +void halClearUsartSpi(SpiChannel_t tty); + +/****************************************************************************** +Write a length bytes to the SPI. +Parameters: + tty - spi channel + buffer - pointer to application data buffer; + length - number bytes for transfer; +Returns: + number of written bytes +******************************************************************************/ +uint16_t halSyncUsartSpiWriteData(SpiChannel_t tty, uint8_t *buffer, uint16_t length); + +/****************************************************************************** +Write & read a length bytes to & from the SPI. +Parameters: + tty - spi channel + buffer - pointer to application data buffer; + length - number bytes for transfer; +Returns: + number of written & read bytes +******************************************************************************/ +uint16_t halSyncUsartSpiReadData(SpiChannel_t tty, uint8_t *buffer, uint16_t length); + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/****************************************************************************** +Enables data register empty interrupt. +Parameters: + tty - spi channel. +Returns: + none. +******************************************************************************/ +INLINE void halEnableUsartSpiDremInterrupt(SpiChannel_t tty) +{ + UCSRnB(tty) |= (1 << UDRIE0); +} + +/****************************************************************************** +Disables data register empty interrupt. +Parameters: + tty - spi channel. +Returns: + none. +******************************************************************************/ +INLINE void halDisableUsartSpiDremInterrupt(SpiChannel_t tty) +{ + UCSRnB(tty) &= ~(1 << UDRIE0); +} + +/****************************************************************************** +Enables transmit complete interrupt. +Parameters: + tty - spi channel. +Returns: + none. +******************************************************************************/ +INLINE void halEnableUsartSpiTxcInterrupt(SpiChannel_t tty) +{ + UCSRnB(tty) |= (1 << TXCIE0); +} + +/****************************************************************************** +Disables transmit complete interrupt. +Parameters: + tty - spi channel. +Returns: + none. +******************************************************************************/ +INLINE void halDisableUsartSpiTxcInterrupt(SpiChannel_t tty) +{ + UCSRnB(tty) &= ~(1 << TXCIE0); +} + +/***************************************************************************** +Enables receive complete interrupt. +Parameters: + tty - spi channel. +Returns: + none. +******************************************************************************/ +INLINE void halEnableUsartSpiRxcInterrupt(SpiChannel_t tty) +{ + UCSRnB(tty) |= (1 << RXCIE0); +} + +/***************************************************************************** +Disables receive complete interrupt. +Parameters: + tty - spi channel. +Returns: + none. +******************************************************************************/ +INLINE void halDisableUsartSpiRxcInterrupt(SpiChannel_t tty) +{ + UCSRnB(tty) &= ~(1 << RXCIE0); +} +#endif +//eof halSpi.h + diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halUsart.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halUsart.h new file mode 100644 index 00000000..ccdd5e8f --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halUsart.h @@ -0,0 +1,327 @@ +/*****************************************************************************//** +\file halUsart.h + +\brief Declarations of usart hardware-dependent module. + +\author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + +\internal + History: + 29/05/07 E. Ivanov - Created +**********************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HAL_USART_H +#define _HAL_USART_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include +#include +#include +#include +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/* if USART_DOUBLE_SPEED is 1 the USART uses U2Xn bit (Double speed the usart transmition). + if USART_DOUBLE_SPEED is 0 then U2Xn bit is not been used. + */ +#ifndef USART_DOUBLE_SPEED + #define USART_DOUBLE_SPEED 1ul +#endif + +#define USART_CHANNEL_0 0xC0 // USART0 AtMega1281/2561 start address +#define USART_CHANNEL_1 0xC8 // USART1 AtMega1281/2561 start address + +#if NUM_USART_CHANNELS == 2 + #define HAL_GET_INDEX_BY_CHANNEL(channel) ((channel - USART_CHANNEL_0) >> 3) +#else + #define HAL_GET_INDEX_BY_CHANNEL(channel) (channel - channel) +#endif + +#define UCSRnA(tty) MMIO_BYTE(tty + 0) +#define UCSRnB(tty) MMIO_BYTE(tty + 1) +#define UCSRnC(tty) MMIO_BYTE(tty + 2) +#define UBRRnL(tty) MMIO_BYTE(tty + 4) +#define UBRRnH(tty) MMIO_BYTE(tty + 5) +#define UBRRn(tty) MMIO_WORD(tty + 4) +#define UDRn(tty) MMIO_BYTE(tty + 6) + +/****************************************************************************** + Types section +******************************************************************************/ +// usart channel +typedef uint8_t UsartChannel_t; + +// clock rate of usart +typedef enum +{ + USART_BAUDRATE_1200 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 1200ul) - 1ul), // 1200 baud rate + USART_BAUDRATE_2400 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 2400ul) - 1ul), // 2400 baud rate + USART_BAUDRATE_4800 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 4800ul) - 1ul), // 4800 baud rate + USART_BAUDRATE_9600 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 9600ul) - 1ul), // 9600 baud rate + USART_BAUDRATE_19200 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 19200ul) - 1ul), // 19200 baud rate + USART_BAUDRATE_38400 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 38400ul) - 1ul), // 38400 baud rate + USART_BAUDRATE_115200 = (unsigned)((F_CPU * (USART_DOUBLE_SPEED + 1ul)) / (16ul * 115200ul)), // 115200 baud rate + USART_SYNC_BAUDRATE_1200 = (uint16_t)((F_CPU / (2ul * 1200ul)) - 1ul), + USART_SYNC_BAUDRATE_2400 = (uint16_t)((F_CPU / (2ul * 2400ul)) - 1ul), + USART_SYNC_BAUDRATE_4800 = (uint16_t)((F_CPU / (2ul * 4800ul)) - 1ul), + USART_SYNC_BAUDRATE_9600 = (uint16_t)((F_CPU / (2ul * 9600ul)) - 1ul), + USART_SYNC_BAUDRATE_38400 = (uint16_t)((F_CPU / (2ul * 38400ul)) - 1ul), + USART_SYNC_BAUDRATE_57600 = (uint16_t)((F_CPU / (2ul * 57600ul)) - 1ul), + USART_SYNC_BAUDRATE_115200 = (uint16_t)((F_CPU / (2ul * 115200ul)) - 1ul) +} UsartBaudRate_t; + +// usart data length +typedef enum +{ + USART_DATA5 = (0 << UCSZ12) | (0 << UCSZ11) | (0 << UCSZ10), // 5 bits data length + USART_DATA6 = (0 << UCSZ12) | (0 << UCSZ11) | (1 << UCSZ10), // 6 bits data length + USART_DATA7 = (0 << UCSZ12) | (1 << UCSZ11) | (0 << UCSZ10), // 7 bits data length + USART_DATA8 = (0 << UCSZ12) | (1 << UCSZ11) | (1 << UCSZ10), // 8 bits data length +} UsartData_t; + +// parity mode +typedef enum +{ + USART_PARITY_NONE = (0 << UPM11) | (0 << UPM10), // Non parity mode + USART_PARITY_EVEN = (1 << UPM11) | (0 << UPM10), // Even parity mode + USART_PARITY_ODD = (1 << UPM11) | (1 << UPM10) // Odd parity mode +} UsartParity_t; + +// number of stop bits +typedef enum +{ + USART_STOPBIT_1 = (0 << USBS1), // 1 stop bits mode + USART_STOPBIT_2 = (1 << USBS1) // 2 stop bits mode +} UsartStopBits_t; + +// USART task IDs. +typedef enum +{ + #if defined(HAL_USE_USART_CHANNEL_0) + HAL_USART_TASK_USART0_DRE, + HAL_USART_TASK_USART0_TXC, + HAL_USART_TASK_USART0_RXC, + #if defined(_USE_USART_ERROR_EVENT_) + HAL_USART_TASK_USART0_ERR, + #endif + #endif + + #if defined(HAL_USE_USART_CHANNEL_1) + HAL_USART_TASK_USART1_DRE, + HAL_USART_TASK_USART1_TXC, + HAL_USART_TASK_USART1_RXC, + #if defined(_USE_USART_ERROR_EVENT_) + HAL_USART_TASK_USART1_ERR, + #endif + #endif + + HAL_USART_TASKS_NUMBER +} HalUsartTaskId_t; + +// Defines edge of clock to sample data. +/* +------------------------------------------------------------------------------------ +| | Transmitted Data Changed (Output | Received Data Sampled (Input on | +| | of TxDn Pin) | RxDn Pin) | +|------------|-----------------------------------|---------------------------------- +|FALLING_EDGE| Rising XCKn Edge | Falling XCKn Edge | +|RISING_EDGE | Falling XCKn Edge | Rising XCKn Edge | +------------------------------------------------------------------------------------ +*/ +typedef enum +{ + USART_EDGE_MODE_FALLING = 0, + USART_EDGE_MODE_RISING = 1 +} UsartEdgeMode_t; + +// USART synchronization mode. +typedef enum +{ + USART_MODE_ASYNC = ((0 << UMSEL01) | (0 << UMSEL00)), + USART_MODE_SYNC = ((0 << UMSEL01) | (1 << UMSEL00)) +} UsartMode_t; + +// clck is output in master mode else input +typedef enum +{ + USART_CLK_MODE_MASTER = 0, + USART_CLK_MODE_SLAVE = 1 +} UsartClkMode_t; + +#if defined(_USE_USART_ERROR_EVENT_) + // usart receiver error reason + typedef enum + { + FRAME_ERROR, + DATA_OVERRUN, + PARITY_ERROR + } UsartErrorReason_t; +#endif + +// usart control +typedef struct +{ + volatile uint16_t txPointOfRead; + volatile uint16_t txPointOfWrite; + volatile uint16_t rxPointOfRead; + volatile uint16_t rxPointOfWrite; + volatile uint16_t rxBytesInBuffer; + uint8_t usartShiftRegisterEmpty; +#if defined(_USE_USART_ERROR_EVENT_) + uint8_t errorReason; +#endif +} HalUsartService_t; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Puts the byte received to the cyclic buffer. + +\param[in] + tty - channel number. +\param[in] + data - data to put. +******************************************************************************/ +void halUsartRxBufferFiller(UsartChannel_t tty, uint8_t data); + +/**************************************************************************//** +\brief Checks the channel number. + +\param[in] + channel - channel to be verified. + +\return + true if channel is possible, \n + false otherwise. +******************************************************************************/ +bool halIsUsartChannelCorrect(UsartChannel_t channel); + +#if defined(_USE_USART_ERROR_EVENT_) +/**************************************************************************//** +\brief Save status register for analyzing of the error reason. + +\param[in] + tty - channel number. +\param[in] + status - usart status register. +******************************************************************************/ +void halUsartSaveErrorReason(UsartChannel_t tty, uint8_t status); +#endif + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/**************************************************************************//** + \brief Disables USART channel + + \param tty - number of USART channel. + \return none. +******************************************************************************/ +INLINE void halCloseUsart(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALCLOSEUSART_0); + UCSRnB(tty) = 0x00; +} + +/**************************************************************************//** + \brief Enables data register empty interrupt + + \param tty - number of USART channel. + \return none. +******************************************************************************/ +INLINE void halEnableUsartDremInterrupt(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALENABLEUSARTDREMINTERRUPT_0); + UCSRnB(tty) |= (1 << UDRIE1); +} + +/**************************************************************************//** + \brief Disables data register empty interrupt + + \param tty - number of USART channel. + \return none. +******************************************************************************/ +INLINE void halDisableUsartDremInterrupt(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALDISABLEUSARTDREMINTERRUPT_0); + UCSRnB(tty) &= ~(1 << UDRIE1); +} + +/**************************************************************************//** + \brief Enables transmit complete interrupt + + \param tty - number of USART channel. + \return none. +******************************************************************************/ +INLINE void halEnableUsartTxcInterrupt(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALENABLEUSARTTXCINTERRUPT_0); + UCSRnB(tty) |= (1 << TXCIE1); +} + +/**************************************************************************//** + \brief Disables transmit complete interrupt + + \param tty - number of USART channel. + return none. +******************************************************************************/ +INLINE void halDisableUsartTxcInterrupt(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALDISABLEUSARTTXCINTERRUPT_0); + UCSRnB(tty) &= ~(1 << TXCIE1); +} + +/**************************************************************************//** + \brief Enables receive complete interrupt + + \param tty - number of USART channel. + \return none. +******************************************************************************/ +INLINE void halEnableUsartRxcInterrupt(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALENABLEUSARTRXCINTERRUPT_0); + UCSRnB(tty) |= (1 << RXCIE0); +} + +/**************************************************************************//** + \brief Disables receive complete interrupt + + \param tty - number of USART channel. + \return none. +******************************************************************************/ +INLINE void halDisableUsartRxcInterrupt(UsartChannel_t tty) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALDISABLEUSARTRXCINTERRUPT_0); + UCSRnB(tty) &= ~(1 << RXCIE0); +} + +/**************************************************************************//** + \brief Puts byte to data register of USART + + \param tty - number of USART channel. + data - byte to send. + \return none. +******************************************************************************/ +INLINE void halSendUsartByte(UsartChannel_t tty, uint8_t data) +{ + assert((USART_CHANNEL_0 == tty) || (USART_CHANNEL_1 == tty), HALUSARTH_HALSENDUSARTBYTE_0); + UCSRnA(tty) |= (1 << TXC1); // clear transmite complete flag + UDRn(tty) = data; +} + +#endif /* _HAL_USART_H */ +//eof halUsart.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halW1.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halW1.h new file mode 100644 index 00000000..46c66fd7 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halW1.h @@ -0,0 +1,93 @@ +/***************************************************************************//** + \file halW1.h + + \brief Declarations of 1-wire hardware-dependent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 10/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALW1_H +#define _HALW1_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Types section +******************************************************************************/ +/** \brief i2c 1-wire status */ +typedef enum +{ + /** \brief There is no device on the bus */ + W1_NO_DEVICE_STATUS, + /** \brief At least one device is on the bus */ + W1_SUCCESS_STATUS, + /** \brief Invalid CRC was read during the device search operation */ + W1_INVALID_CRC +} W1Status_t; + +/***************************************************************************//** +\brief Reads byte from the bus. + +\return + byte read from the bus. +*******************************************************************************/ +uint8_t halReadW1(void); + +/***************************************************************************//** +\brief Reads bit from the bus. + +\return + Read bit is placed to position of last significant bit. +*******************************************************************************/ +uint8_t halReadW1Bit(void); + +/***************************************************************************//** +\brief Writes bit to the bus. + +\param[in] + value - to write. The bit is placed to position of last significant bit. +*******************************************************************************/ +void halWriteW1bit(uint8_t value); + +/***************************************************************************//** +\brief Writes byte to the bus + +\param[in] + value - byte to write. +*******************************************************************************/ +void halWriteW1(uint8_t value); + +/***************************************************************************//** +\brief Resets all devices connected to the bus. + +\return + 0 - there are some devices at the bus. \n + 1 - there are not any devices at the bus. +*******************************************************************************/ +uint8_t halResetW1(void); + +/**************************************************************************//** +\brief Performs delay in microseconds + +\param[in] + delay - number of microseconds to be delay +******************************************************************************/ +void __delay_us(uint8_t delay); + +#endif /* _HALW1_H */ diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halWdt.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halWdt.h new file mode 100644 index 00000000..bdf3ee27 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/halWdt.h @@ -0,0 +1,53 @@ +/**************************************************************************//** + \file halWdt.h + + \brief Declarations of wdt hardware-dependent module. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 1/10/08 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _HALWDT_H +#define _HALWDT_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +#if defined(__ICCAVR__) + +/** Enable the watch dog timer with a specific timeout value */ +#define wdt_enable(timeout) do { \ + uint8_t volatile sreg_temp = SREG; \ + cli(); \ + __watchdog_reset(); \ + WDTCSR |= (1 << WDCE) | (1 << WDE); \ + WDTCSR = (1 << WDE) | timeout; \ + SREG = sreg_temp; \ +} while (0) + +#define wdt_disable() MCUSR = 0; \ + WDTCSR |= (1 << WDCE) | (1 << WDE); \ + WDTCSR = 0x00; + +#endif + +#endif /* _HALWDT_H */ + +//eof halWdt.h diff --git a/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/i2c.h b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/i2c.h new file mode 100644 index 00000000..79e6b2e6 --- /dev/null +++ b/digital/zigbit/bitcloud/stack/Components/HAL/avr/atmega1281/common/include/i2c.h @@ -0,0 +1,185 @@ +/***************************************************************************//** + \file i2c.h + + \brief Declarations of i2c interface. + + \author + Atmel Corporation: http://www.atmel.com \n + Support email: avr@atmel.com + + Copyright (c) 2008-2011, Atmel Corporation. All rights reserved. + Licensed under Atmel's Limited License Agreement (BitCloudTM). + + \internal + History: + 5/12/07 A. Khromykh - Created + ******************************************************************************/ +/****************************************************************************** + * WARNING: CHANGING THIS FILE MAY AFFECT CORE FUNCTIONALITY OF THE STACK. * + * EXPERT USERS SHOULD PROCEED WITH CAUTION. * + ******************************************************************************/ + +#ifndef _I2C_H +#define _I2C_H + +/****************************************************************************** + Includes section +******************************************************************************/ +#include + +/****************************************************************************** + Define(s) section +******************************************************************************/ +/** \brief TWI status codes. */ +enum +{ + TWS_BUSERROR = 0x00, + TWS_START = 0x08, + TWS_RSTART = 0x10, + TWS_MT_SLA_ACK = 0x18, + TWS_MT_SLA_NACK = 0x20, + TWS_MT_DATA_ACK = 0x28, + TWS_MT_DATA_NACK = 0x30, + TWS_M_ARB_LOST = 0x38, + TWS_MR_SLA_ACK = 0x40, + TWS_MR_SLA_NACK = 0x48, + TWS_MR_DATA_ACK = 0x50, + TWS_MR_DATA_NACK = 0x58 +}; + +/****************************************************************************** + Prototypes section +******************************************************************************/ +/**************************************************************************//** +\brief Inits TWI module. Setup the speed of TWI. +\param[in] + i2cMode - the speed of TWI. +******************************************************************************/ +void halInitI2c(HAL_i2cMode_t *i2cMode); + +/**************************************************************************//** +\brief Notification about the start condition was sent. +******************************************************************************/ +void halSendStartDoneI2c(void); + +/**************************************************************************//** +\brief Notification that byte was written to the TWI. +\param[in] + result - contains result of previous operation. +******************************************************************************/ +void halWriteDoneI2c(void); + +/**************************************************************************//** +\brief Notification that byte was read from the TWI. +\param[in] + data - contains byte that was read. +******************************************************************************/ +void halReadDoneI2c(uint8_t data); + +/**************************************************************************//** +\brief Notification that last byte was read from the TWI. Needs send STOP condition +on bus. +\param[in] + data - contains byte that was read. +******************************************************************************/ +void halReadLastByteDoneI2c(uint8_t data); + +/**************************************************************************//** +\brief Notification that address byte was written to the TWI and was read ACK. +Starts reading data. +******************************************************************************/ +void halMasterReadWriteAddressAckI2c(void); + +/**************************************************************************//** +\brief Resets TWI bus and i2c HAL. +******************************************************************************/ +void halI2cBusReset(void); + +/****************************************************************************** + Inline static functions section +******************************************************************************/ +/**************************************************************************//** +\brief Loop for waiting for end of stop condition on bus. +******************************************************************************/ +INLINE void halWaitEndOfStopStation(void) +{ + loop_until_bit_is_clear(TWCR, TWSTO); +} + +/**************************************************************************//** +\brief Enables interrupt on TWI. +******************************************************************************/ +INLINE void halInterruptEnableI2c(void) +{ + TWCR |= (1 << TWIE); +} + +/**************************************************************************//** +\brief Disables interrupt on TWI. +******************************************************************************/ +INLINE void halInterruptDisableI2c(void) +{ + TWCR &= (~(1 << TWIE)); +} + +/*************************************************************************//** +\brief Returns byte that was read from the TWI. +******************************************************************************/ +INLINE uint8_t halReadByteI2c(void) +{ + return TWDR; +} + +/*************************************************************************//** +\brief Resets the TWI. +******************************************************************************/ +INLINE void halResetI2c(void) +{ + TWCR = ((1 << TWSTO) | (1 << TWINT)); // Reset TWI +} + +/**************************************************************************//** +\brief Begins writing an byte to TWI. +\param[in] + data - an byte for sending. +******************************************************************************/ +INLINE void halWriteI2c(uint8_t data) +{ + TWDR = data; + TWCR = (1 << TWINT) | (1 << TWEN) | (1 << TWIE); +} + +/**************************************************************************//** +\brief Begins read an byte from TWI. +\param[in] + ack - defines the need to send ACK after an byte was recieved. +******************************************************************************/ +INLINE void halReadI2c(bool ack) +{ + if (ack) + TWCR |= (1 << TWEA); + else + TWCR &= ~(1 << TWEA); + + TWCR |= ((1 << TWINT) | (1 << TWIE) | (1 << TWEN)); // Trigger the TWI +} + +/**************************************************************************//** +\brief Directs TWI to send stop condition. +******************************************************************************/ +INLINE void halSendStopI2c(void) +{ + TWCR = ((1 << TWSTO) | (1 << TWINT) | (1 << TWEN)); +} + +/**************************************************************************//** +\brief Directs the TWI to send start condition. +******************************************************************************/ +INLINE void halSendStartI2c(void) +{ + TWCR = ((1 << TWSTA) | (1 <> 8) & 0x7F) != 90) +#error This file should only be assembled by aa90 or aavr +#endif + +#define A90_PROC_OPTION ((__TID__ >> 4) & 0x0F) + +/* Long or relative jumps and calls */ +#if (A90_PROC_OPTION == 0) || (A90_PROC_OPTION == 1) +#define XCALL RCALL +#define XJMP RJMP +#else +#define XCALL CALL +#define XJMP JMP +#endif + +/* Length of pointer registers (X/Y/Z) */ +#if (A90_PROC_OPTION == 0) || (A90_PROC_OPTION == 2) +#define A90_POINTER_REG_SIZE 1 +#define A90_TINY_INDEX +#else /*!(A90_PROC_OPTION == 0) || (A90_PROC_OPTION == 2)*/ +#if (A90_PROC_OPTION == 1) || (A90_PROC_OPTION == 3) || (A90_PROC_OPTION ==5) +#define A90_POINTER_REG_SIZE 2 +#else /*!(A90_PROC_OPTION == 1) || (A90_PROC_OPTION == 3) || (A90_PROC_OPTION ==5)*/ +#if (A90_PROC_OPTION == 4) || (A90_PROC_OPTION == 6) +#define A90_POINTER_REG_SIZE 3 +#define A90_EXTENDED_DATA +#else /*!(A90_PROC_OPTION == 4) || (A90_PROC_OPTION == 6)*/ +#error Unknown processor option!! +#endif /*!(A90_PROC_OPTION == 4) || (A90_PROC_OPTION == 6)*/ +#endif /*!(A90_PROC_OPTION == 1) || (A90_PROC_OPTION == 3) || (A90_PROC_OPTION ==5)*/ +#endif /*!(A90_PROC_OPTION == 0) || (A90_PROC_OPTION == 2)*/ + +#if (A90_PROC_OPTION > 4) +#define A90_LARGE_CODE +#endif + +#if (A90_PROC_OPTION > 1) +#define A90_HAS_POSSIBLE_ELPM +#endif + +#ifdef A90_HAS_POSSIBLE_ELPM +#ifdef __HAS_ELPM__ +#define A90_HAS_ELPM +#else +#ifndef SMALL_FLASH +#define A90_HAS_ELPM +#endif +#endif +#endif + +#if A90_PROC_OPTION > 1 +#define A90_24BIT_GENERIC +#endif + +#if A90_PROC_OPTION < 2 +#define A90_16BIT_GENERIC +#endif + +#ifdef __MEMORY_MODEL__ + +#define TINY_MEMORY_MODEL 0 +#define SMALL_MEMORY_MODEL 1 +#define LARGE_MEMORY_MODEL 2 + +#if __MEMORY_MODEL__ == 1 +#undef MEMORY_MODEL +#define MEMORY_MODEL TINY_MEMORY_MODEL +#endif + +#if __MEMORY_MODEL__ == 2 +#undef MEMORY_MODEL +#define MEMORY_MODEL SMALL_MEMORY_MODEL +#endif + +#if __MEMORY_MODEL__ == 3 +#undef MEMORY_MODEL +#define MEMORY_MODEL LARGE_MEMORY_MODEL +#endif + +#else + +#ifdef MEMORY_MODEL +#define t 0 +#define s 1 +#define l 2 + +#define TINY_MEMORY_MODEL 0 +#define SMALL_MEMORY_MODEL 1 +#define LARGE_MEMORY_MODEL 2 + +#if MEMORY_MODEL == t +#undef MEMORY_MODEL +#define MEMORY_MODEL TINY_MEMORY_MODEL +#endif + +#if MEMORY_MODEL == s +#undef MEMORY_MODEL +#define MEMORY_MODEL SMALL_MEMORY_MODEL +#endif + +#if MEMORY_MODEL == l +#undef MEMORY_MODEL +#define MEMORY_MODEL LARGE_MEMORY_MODEL +#endif + +#undef t +#undef s +#undef l +#endif +#endif + +/* Register nicknames */ +#define T0 R0 +#define T1 R1 +#define T2 R2 +#define T3 R3 +#define P0 R16 +#define P1 R17 +#define P2 R18 +#define P3 R19 +#define Q0 R20 +#define Q1 R21 +#define Q2 R22 +#define Q3 R23 +#define X0 R26 +#define X1 R27 +#define X2 R25 +#define Y0 R28 +#define Y1 R29 +#define Z0 R30 +#define Z1 R31 +#define Z2 R19 + +/* I/O-Space Register nicknames */ +#define RAMPD 0x38 +#define RAMPX 0x39 +#define RAMPY 0x3A +#define RAMPZ 0x3B +#define EIND 0x3C +#define SREG 0x3F -- cgit v1.2.3