path: root/digital
AgeCommit message (Collapse)Author
2007-11-20 * digital/asserv/src/hdlcounter:Nicolas Schodet
- changed CPLD pinout.
2007-11-16 * digital/asserv/pcb:Nicolas Schodet
- first PCB release. - one connector is missing, one connector is to be changed. - CPLD pinout may change to ease routing.
2007-11-05 * digital/avr/doc:Nicolas Schodet
- added AVR Modules introduction.
2007-11-05 * digital/avr/doc:Nicolas Schodet
- added build system documentation.
2007-10-07Added counter decoder AVR implementation.Nicolas Schodet
2007-10-07Included SI2E avr modules.Nicolas Schodet
Well, this need more works...
2007-10-03Use AVR external memory bus.Nicolas Schodet
2007-09-17Added longer trajectory.Nicolas Schodet
2007-09-17Added curve trajectory.Nicolas Schodet
2007-09-17Added real trajectories (distance and angle).Nicolas Schodet
2007-09-13Added encoders model.Nicolas Schodet
2007-08-06Added encoder computations to choose between different decoding solutions.Nicolas Schodet
2007-08-06Added motor models.Nicolas Schodet
2007-08-01Added encoder documentation.Nicolas Schodet
2007-08-01Added xilinx project for CPLD synthesis.Nicolas Schodet
Project fits in a XC9572.
2007-08-01Fixed switch operand sizes in quad_decoder_div4.Nicolas Schodet
Added an output latch, now output will not change when oe is one.
2007-06-30Added hdlcounter for CPLD.Nicolas Schodet
Verilog source files and test cases.