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-rw-r--r--digital/ucoolib/ucoolib/hal/i2c/Config5
-rw-r--r--digital/ucoolib/ucoolib/hal/i2c/Module1
-rw-r--r--digital/ucoolib/ucoolib/hal/i2c/i2c_hard.hh33
-rw-r--r--digital/ucoolib/ucoolib/hal/i2c/i2c_hard.stm32.cc386
-rw-r--r--digital/ucoolib/ucoolib/hal/i2c/i2c_hard.stm32.hh89
-rw-r--r--digital/ucoolib/ucoolib/hal/i2c/i2c_slave_data_buffer.cc80
-rw-r--r--digital/ucoolib/ucoolib/hal/i2c/i2c_slave_data_buffer.hh71
-rw-r--r--digital/ucoolib/ucoolib/hal/i2c/test/Makefile9
-rw-r--r--digital/ucoolib/ucoolib/hal/i2c/test/test_i2c.cc122
-rw-r--r--digital/ucoolib/ucoolib/intf/i2c.hh121
10 files changed, 917 insertions, 0 deletions
diff --git a/digital/ucoolib/ucoolib/hal/i2c/Config b/digital/ucoolib/ucoolib/hal/i2c/Config
new file mode 100644
index 00000000..3871f5c1
--- /dev/null
+++ b/digital/ucoolib/ucoolib/hal/i2c/Config
@@ -0,0 +1,5 @@
+[hal/i2c]
+# Size of slave buffer, used for both reception and transmission.
+slave_buffer_size = 64
+# Activate debug trace.
+trace = false
diff --git a/digital/ucoolib/ucoolib/hal/i2c/Module b/digital/ucoolib/ucoolib/hal/i2c/Module
new file mode 100644
index 00000000..d502c4a0
--- /dev/null
+++ b/digital/ucoolib/ucoolib/hal/i2c/Module
@@ -0,0 +1 @@
+hal_i2c_SOURCES := i2c_slave_data_buffer.cc i2c_hard.stm32.cc
diff --git a/digital/ucoolib/ucoolib/hal/i2c/i2c_hard.hh b/digital/ucoolib/ucoolib/hal/i2c/i2c_hard.hh
new file mode 100644
index 00000000..be50b0a1
--- /dev/null
+++ b/digital/ucoolib/ucoolib/hal/i2c/i2c_hard.hh
@@ -0,0 +1,33 @@
+#ifndef ucoolib_hal_i2c_i2c_hard_hh
+#define ucoolib_hal_i2c_i2c_hard_hh
+// ucoolib - Microcontroller object oriented library. {{{
+//
+// Copyright (C) 2013 Nicolas Schodet
+//
+// APBTeam:
+// Web: http://apbteam.org/
+// Email: team AT apbteam DOT org
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 2 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+//
+// }}}
+
+#ifdef TARGET_stm32
+# include "i2c_hard.stm32.hh"
+#else
+# error "not implemented for this target"
+#endif
+
+#endif // ucoolib_hal_i2c_i2c_hard_hh
diff --git a/digital/ucoolib/ucoolib/hal/i2c/i2c_hard.stm32.cc b/digital/ucoolib/ucoolib/hal/i2c/i2c_hard.stm32.cc
new file mode 100644
index 00000000..11baba60
--- /dev/null
+++ b/digital/ucoolib/ucoolib/hal/i2c/i2c_hard.stm32.cc
@@ -0,0 +1,386 @@
+// ucoolib - Microcontroller object oriented library. {{{
+//
+// Copyright (C) 2013 Nicolas Schodet
+//
+// APBTeam:
+// Web: http://apbteam.org/
+// Email: team AT apbteam DOT org
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 2 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+//
+// }}}
+#include "i2c_hard.stm32.hh"
+
+#include <libopencm3/stm32/i2c.h>
+#include <libopencm3/stm32/f4/rcc.h>
+#include <libopencm3/stm32/nvic.h>
+
+#include "ucoolib/utils/trace.hh"
+
+namespace ucoo {
+
+/// Local trace.
+static Trace<UCOO_CONFIG_HAL_I2C_TRACE> i2c_trace;
+
+static const int i2c_nb = 3;
+
+/// Information on I2C hardware structure.
+struct i2c_hardware_t
+{
+ /// I2C base address.
+ uint32_t base;
+ /// RCC enable bit.
+ uint32_t rcc_en;
+ /// Corresponding event IRQ (error IRQ is next one).
+ int ev_irq;
+};
+
+/// Information on I2C hardware array, this is zero indexed, I2C1 is at index
+/// 0.
+static const i2c_hardware_t i2c_hardware[i2c_nb] =
+{
+ { I2C1_BASE, RCC_APB1ENR_I2C1EN, NVIC_I2C1_EV_IRQ },
+ { I2C2_BASE, RCC_APB1ENR_I2C2EN, NVIC_I2C2_EV_IRQ },
+ { I2C3_BASE, RCC_APB1ENR_I2C3EN, NVIC_I2C3_EV_IRQ },
+};
+
+static I2cHard *i2c_instances[i2c_nb];
+
+} // namespace ucoo
+
+extern "C" {
+
+void i2c1_ev_isr () { ucoo::I2cHard::ev_isr (0); }
+
+void i2c1_er_isr () { ucoo::I2cHard::er_isr (0); }
+
+void i2c2_ev_isr () { ucoo::I2cHard::ev_isr (1); }
+
+void i2c2_er_isr () { ucoo::I2cHard::er_isr (1); }
+
+void i2c3_ev_isr () { ucoo::I2cHard::ev_isr (2); }
+
+void i2c3_er_isr () { ucoo::I2cHard::er_isr (2); }
+
+}
+
+namespace ucoo {
+
+I2cHard::I2cHard (int n, bool enable, int speed)
+ : n_ (n), enable_ (false), slave_addr_ (0), slave_data_handler_ (0),
+ master_ (false), master_status_ (STATUS_ERROR), master_buf_ (0)
+{
+ assert (n < i2c_nb);
+ assert (!i2c_instances[n]);
+ i2c_instances[n] = this;
+ setup (enable, speed);
+}
+
+I2cHard::~I2cHard ()
+{
+ setup (false);
+ i2c_instances[n_] = 0;
+}
+
+void
+I2cHard::setup (bool enable, int speed)
+{
+ if (enable != enable_)
+ {
+ uint32_t base = i2c_hardware[n_].base;
+ if (enable)
+ {
+ // Turn on.
+ rcc_peripheral_enable_clock (&RCC_APB1ENR,
+ i2c_hardware[n_].rcc_en);
+ // Reset.
+ I2C_CR1 (base) = I2C_CR1_SWRST;
+ // TODO: make sure the bus is free!!! How!
+ I2C_CR1 (base) = 0;
+ // Compute clock parameters.
+ int pclk = rcc_ppre1_frequency;
+ int pclk_mhz = pclk / 1000000;
+ uint16_t ccr, tris;
+ if (speed <= 100000)
+ {
+ ccr = pclk / speed / 2;
+ tris = pclk_mhz + 1;
+ }
+ else
+ {
+ assert (speed <= 400000);
+ ccr = I2C_CCR_FS | I2C_CCR_DUTY | (pclk / speed / 25);
+ tris = pclk_mhz * 3 / 10 + 1;
+ }
+ // Set all parameters.
+ I2C_CCR (base) = ccr;
+ I2C_TRISE (base) = tris;
+ I2C_OAR1 (base) = slave_addr_ | (1 << 14);
+ I2C_OAR2 (base) = 0;
+ I2C_CR2 (base) = I2C_CR2_ITEVTEN | I2C_CR2_ITERREN | pclk_mhz;
+ // Enable.
+ nvic_enable_irq (i2c_hardware[n_].ev_irq);
+ nvic_enable_irq (i2c_hardware[n_].ev_irq + 1);
+ I2C_CR1 (base) = I2C_CR1_ACK | I2C_CR1_PE;
+ }
+ else
+ {
+ // TODO: wait for end of transfer?
+ // Disable.
+ nvic_disable_irq (i2c_hardware[n_].ev_irq);
+ nvic_disable_irq (i2c_hardware[n_].ev_irq + 1);
+ I2C_CR1 (base) = 0;
+ // Turn off.
+ rcc_peripheral_disable_clock (&RCC_APB1ENR,
+ i2c_hardware[n_].rcc_en);
+ }
+ enable_ = enable;
+ }
+}
+
+void
+I2cHard::transfer (uint8_t addr, char *buf, int count)
+{
+ assert (count);
+ // No need to lock, master is not busy.
+ assert (master_status_ != STATUS_BUSY);
+ uint32_t base = i2c_hardware[n_].base;
+ // Wait until STOP condition terminated, polling is the only way.
+ while (I2C_CR1 (base) & I2C_CR1_STOP)
+ barrier ();
+ // Now, program next transfer.
+ master_status_ = STATUS_BUSY;
+ master_slave_addr_ = addr;
+ master_buf_ = buf;
+ master_count_ = count;
+ // TODO: multimaster: about ACK, may have to lock IRQ for multimaster.
+ I2C_CR1 (base) |= I2C_CR1_START;
+}
+
+void
+I2cHard::send (uint8_t addr, const char *buf, int count)
+{
+ transfer (addr, const_cast<char *> (buf), count);
+}
+
+void
+I2cHard::recv (uint8_t addr, char *buf, int count)
+{
+ assert (count >= 2); // TODO: count = 1 not supported, there is no IT!
+ // LSB = 1 for receiver mode.
+ transfer (addr | 1, buf, count);
+}
+
+int
+I2cHard::status ()
+{
+ return master_status_;
+}
+
+int
+I2cHard::wait ()
+{
+ while (master_status_ == STATUS_BUSY)
+ barrier ();
+ return master_status_;
+}
+
+void
+I2cHard::register_data (uint8_t addr, DataHandler &data_handler)
+{
+ assert ((addr & 1) == 0);
+ slave_addr_ = addr;
+ slave_data_handler_ = &data_handler;
+ if (enable_)
+ {
+ uint32_t base = i2c_hardware[n_].base;
+ // Just in case a transfer is triggered right now.
+ barrier ();
+ // According to datasheet, bit 14 should be 1!
+ I2C_OAR1 (base) = addr | (1 << 14);
+ }
+}
+
+void
+I2cHard::ev_isr (int n)
+{
+ uint32_t base = i2c_hardware[n].base;
+ assert (i2c_instances[n]);
+ I2cHard &i2c = *i2c_instances[n];
+ i2c_trace ("<%d> event isr", n);
+ while (1)
+ {
+ uint16_t sr1 = I2C_SR1 (base);
+ i2c_trace ("<%d> sr1=%04x", n, sr1);
+ // Can not read SR2 because doing so would clear the ADDR bit.
+ if (i2c.master_)
+ {
+ if (sr1 & I2C_SR1_ADDR)
+ {
+ uint16_t sr2;
+ // If only one or two bytes should be received, disable ACK
+ // before reading SR2, and STOP after... Crappy hardware!
+ if ((i2c.master_slave_addr_ & 1) && i2c.buf_count_ == 1)
+ {
+ I2C_CR1 (base) = I2C_CR1_PE;
+ sr2 = I2C_SR2 (base);
+ I2C_CR1 (base) = I2C_CR1_STOP | I2C_CR1_PE;
+ // TODO: what to wait now? Unsupported for now.
+ }
+ else if ((i2c.master_slave_addr_ & 1) && i2c.buf_count_ == 2)
+ {
+ I2C_CR1 (base) = I2C_CR1_POS | I2C_CR1_PE;
+ sr2 = I2C_SR2 (base);
+ // Wait for BTF.
+ }
+ else
+ {
+ sr2 = I2C_SR2 (base);
+ I2C_CR2 (base) |= I2C_CR2_ITBUFEN;
+ }
+ i2c_trace ("<%d> master sr2=%04x", n, sr2);
+ }
+ else if (sr1 & I2C_SR1_TxE)
+ {
+ i2c_trace ("<%d> master tx index=%d", n, i2c.buf_index_);
+ // Send next byte or stop.
+ if (i2c.buf_index_ < i2c.buf_count_)
+ I2C_DR (base) = i2c.master_buf_[i2c.buf_index_++];
+ else
+ {
+ I2C_CR1 (base) = I2C_CR1_ACK | I2C_CR1_STOP | I2C_CR1_PE;
+ I2C_CR2 (base) &= ~I2C_CR2_ITBUFEN;
+ I2C_DR (base) = 0xff;
+ i2c.master_ = false;
+ i2c.master_status_ = i2c.buf_index_;
+ }
+ }
+ else if (sr1 & I2C_SR1_RxNE
+ && i2c.buf_count_ - i2c.buf_index_ > 3)
+ {
+ i2c_trace ("<%d> master rx index=%d", n, i2c.buf_index_);
+ i2c.master_buf_[i2c.buf_index_++] = I2C_DR (base);
+ if (i2c.buf_count_ - i2c.buf_index_ == 3)
+ // Wait for BTF.
+ I2C_CR2 (base) &= ~I2C_CR2_ITBUFEN;
+ }
+ else if (sr1 & I2C_SR1_BTF)
+ {
+ i2c_trace ("<%d> master btf index=%d", n, i2c.buf_index_);
+ if (i2c.buf_count_ - i2c.buf_index_ == 3)
+ {
+ I2C_CR1 (base) = I2C_CR1_PE;
+ i2c.master_buf_[i2c.buf_index_++] = I2C_DR (base);
+ // Wait for BTF.
+ }
+ else
+ {
+ I2C_CR1 (base) = I2C_CR1_ACK | I2C_CR1_STOP | I2C_CR1_PE;
+ if (i2c.buf_count_ - i2c.buf_index_ == 2)
+ i2c.master_buf_[i2c.buf_index_++] = I2C_DR (base);
+ i2c.master_buf_[i2c.buf_index_++] = I2C_DR (base);
+ i2c.master_ = false;
+ i2c.master_status_ = i2c.buf_index_;
+ }
+ }
+ else
+ break;
+ }
+ else
+ {
+ if (sr1 & I2C_SR1_ADDR)
+ {
+ uint16_t sr2 = I2C_SR2 (base);
+ i2c_trace ("<%d> slave sr2=%04x", n, sr2);
+ // Initiate new slave transfer.
+ if (sr2 & I2C_SR2_TRA)
+ {
+ i2c.buf_count_ = i2c.slave_data_handler_->to_send
+ (i2c.slave_buf_, sizeof (i2c.slave_buf_));
+ }
+ else
+ i2c.buf_count_ = sizeof (i2c.slave_buf_);
+ i2c.buf_index_ = 0;
+ I2C_CR2 (base) |= I2C_CR2_ITBUFEN;
+ }
+ else if (sr1 & I2C_SR1_TxE)
+ {
+ i2c_trace ("<%d> slave tx index=%d", n, i2c.buf_index_);
+ uint8_t b = 0xff;
+ if (i2c.buf_index_ < i2c.buf_count_)
+ b = i2c.slave_buf_[i2c.buf_index_++];
+ I2C_DR (base) = b;
+ }
+ else if (sr1 & I2C_SR1_RxNE)
+ {
+ i2c_trace ("<%d> slave rx index=%d", n, i2c.buf_index_);
+ uint8_t b = I2C_DR (base);
+ if (i2c.buf_index_ < i2c.buf_count_)
+ i2c.slave_buf_[i2c.buf_index_++] = b;
+ }
+ else if (sr1 & I2C_SR1_STOPF)
+ {
+ i2c_trace ("<%d> slave stop", n);
+ i2c.slave_data_handler_->to_recv (i2c.slave_buf_, i2c.buf_index_);
+ // TODO: multimaster: there is no way to write in this
+ // register if a START was requested to switch to master mode!
+ I2C_CR1 (base) = I2C_CR1_ACK | I2C_CR1_PE;
+ I2C_CR2 (base) &= ~I2C_CR2_ITBUFEN;
+ }
+ else if (sr1 & I2C_SR1_SB)
+ {
+ i2c_trace ("<%d> master start", n);
+ // Starting master mode.
+ I2C_DR (base) = i2c.master_slave_addr_;
+ i2c.master_ = true;
+ i2c.buf_count_ = i2c.master_count_;
+ i2c.buf_index_ = 0;
+ }
+ else
+ break;
+ }
+
+ }
+}
+
+void
+I2cHard::er_isr (int n)
+{
+ uint32_t base = i2c_hardware[n].base;
+ assert (i2c_instances[n]);
+ I2cHard &i2c = *i2c_instances[n];
+ uint16_t sr1 = I2C_SR1 (base);
+ I2C_SR1 (base) = 0;
+ i2c_trace ("<%d> error isr sr1=%04x", n, sr1);
+ if (i2c.master_)
+ {
+ if (sr1 & I2C_SR1_ARLO)
+ {
+ // Try again.
+ I2C_CR1 (base) = I2C_CR1_ACK | I2C_CR1_START | I2C_CR1_PE;
+ i2c.master_ = false;
+ }
+ else if (sr1 & I2C_SR1_AF)
+ {
+ I2C_CR1 (base) = I2C_CR1_ACK | I2C_CR1_STOP | I2C_CR1_PE;
+ i2c.master_ = false;
+ i2c.master_status_ = i2c.buf_index_;
+ }
+ }
+ I2C_CR2 (base) &= ~I2C_CR2_ITBUFEN;
+ // TODO: handle misplaced STOP errata.
+}
+
+} // namespace ucoo
diff --git a/digital/ucoolib/ucoolib/hal/i2c/i2c_hard.stm32.hh b/digital/ucoolib/ucoolib/hal/i2c/i2c_hard.stm32.hh
new file mode 100644
index 00000000..866fc57e
--- /dev/null
+++ b/digital/ucoolib/ucoolib/hal/i2c/i2c_hard.stm32.hh
@@ -0,0 +1,89 @@
+#ifndef ucoolib_hal_i2c_i2c_hard_stm32_hh
+#define ucoolib_hal_i2c_i2c_hard_stm32_hh
+// ucoolib - Microcontroller object oriented library. {{{
+//
+// Copyright (C) 2013 Nicolas Schodet
+//
+// APBTeam:
+// Web: http://apbteam.org/
+// Email: team AT apbteam DOT org
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 2 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+//
+// }}}
+#include "ucoolib/intf/i2c.hh"
+
+#include "config/hal/i2c.hh"
+
+namespace ucoo {
+
+/// I2C interface, using dedicated hardware.
+class I2cHard : public I2c
+{
+ public:
+ /// Initialise the Nth I2C.
+ I2cHard (int n, bool enable, int speed = 100000);
+ /// Shutdown.
+ ~I2cHard ();
+ /// Enable or disable.
+ void setup (bool enable, int speed = 100000);
+ /// See I2cMaster::send.
+ void send (uint8_t addr, const char *buf, int count);
+ /// See I2cMaster::recv.
+ void recv (uint8_t addr, char *buf, int count);
+ /// See I2cMaster::status.
+ int status ();
+ /// See I2cMaster::wait.
+ int wait ();
+ /// See I2cSlave::register_data.
+ void register_data (uint8_t addr, DataHandler &data_handler);
+ /// Event ISR.
+ static void ev_isr (int n);
+ /// Error ISR.
+ static void er_isr (int n);
+ private:
+ /// Start a master transfer, send or recv, depending on addr LSB.
+ void transfer (uint8_t addr, char *buf, int count);
+ private:
+ /// I2C number.
+ int n_;
+ /// Is it enabled?
+ bool enable_;
+ /// Slave address.
+ uint8_t slave_addr_;
+ /// Handler called to source or sink data for slave exchanges.
+ DataHandler *slave_data_handler_;
+ /// Slave buffer.
+ char slave_buf_[UCOO_CONFIG_HAL_I2C_SLAVE_BUFFER_SIZE];
+ /// Current buffer count (bytes to send), or buffer size (available room).
+ int buf_count_;
+ /// Current buffer index (position to read byte to send or write received
+ /// byte).
+ int buf_index_;
+ /// Master access granted.
+ bool master_;
+ /// Current master transfer status.
+ int master_status_;
+ /// Current master transfer buffer.
+ char *master_buf_;
+ /// Current master transfer size, copied to buf_count_ when active.
+ int master_count_;
+ /// Current master transfer slave address, LSB is set for receiver mode.
+ uint8_t master_slave_addr_;
+};
+
+} // namespace ucoo
+
+#endif // ucoolib_hal_i2c_i2c_hard_stm32_hh
diff --git a/digital/ucoolib/ucoolib/hal/i2c/i2c_slave_data_buffer.cc b/digital/ucoolib/ucoolib/hal/i2c/i2c_slave_data_buffer.cc
new file mode 100644
index 00000000..8833f2ac
--- /dev/null
+++ b/digital/ucoolib/ucoolib/hal/i2c/i2c_slave_data_buffer.cc
@@ -0,0 +1,80 @@
+// ucoolib - Microcontroller object oriented library. {{{
+//
+// Copyright (C) 2013 Nicolas Schodet
+//
+// APBTeam:
+// Web: http://apbteam.org/
+// Email: team AT apbteam DOT org
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 2 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+//
+// }}}
+#include "i2c_slave_data_buffer.hh"
+
+#include <algorithm>
+
+namespace ucoo {
+
+I2cSlaveDataBuffer::I2cSlaveDataBuffer (char *send_buf, int send_size,
+ char *recv_buf, int recv_size)
+ : send_buf_ (send_buf), send_size_ (send_size), send_count_ (0),
+ recv_buf_ (recv_buf), recv_size_ (recv_size), recv_count_ (0)
+{
+}
+
+void
+I2cSlaveDataBuffer::update (const char *buf, int count)
+{
+ int r = std::min (count, send_size_);
+ irq_flags_t flags = irq_lock ();
+ std::copy (buf, buf + r, send_buf_);
+ send_count_ = r;
+ irq_restore (flags);
+}
+
+int
+I2cSlaveDataBuffer::poll (char *buf, int count)
+{
+ // Test to avoid superfluous irq lock. This is not a problem if
+ // condition become false before irq is locked.
+ if (recv_count_)
+ {
+ irq_flags_t flags = irq_lock ();
+ int r = std::min (count, recv_count_);
+ recv_count_ = 0;
+ std::copy (recv_buf_, recv_buf_ + r, buf);
+ irq_restore (flags);
+ return r;
+ }
+ else return 0;
+}
+
+int
+I2cSlaveDataBuffer::to_send (char *buf, int count)
+{
+ int r = std::min (count, send_count_);
+ std::copy (send_buf_, send_buf_ + r, buf);
+ return r;
+}
+
+void
+I2cSlaveDataBuffer::to_recv (const char *buf, int count)
+{
+ int r = std::min (count, recv_size_);
+ std::copy (buf, buf + r, recv_buf_);
+ recv_count_ = r;
+}
+
+} // namespace ucoo
diff --git a/digital/ucoolib/ucoolib/hal/i2c/i2c_slave_data_buffer.hh b/digital/ucoolib/ucoolib/hal/i2c/i2c_slave_data_buffer.hh
new file mode 100644
index 00000000..ed68f20b
--- /dev/null
+++ b/digital/ucoolib/ucoolib/hal/i2c/i2c_slave_data_buffer.hh
@@ -0,0 +1,71 @@
+#ifndef ucoolib_hal_i2c_i2c_slave_data_buffer_hh
+#define ucoolib_hal_i2c_i2c_slave_data_buffer_hh
+// ucoolib - Microcontroller object oriented library. {{{
+//
+// Copyright (C) 2013 Nicolas Schodet
+//
+// APBTeam:
+// Web: http://apbteam.org/
+// Email: team AT apbteam DOT org
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 2 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+//
+// }}}
+#include "ucoolib/intf/i2c.hh"
+
+namespace ucoo {
+
+/// Data sink and source for I2C slave. Store any received data and data to
+/// send in buffers.
+class I2cSlaveDataBuffer : public I2cSlave::DataHandler
+{
+ public:
+ /// Constructor, take buffers.
+ I2cSlaveDataBuffer (char *send_buf, int send_size,
+ char *recv_buf, int recv_size);
+ /// Update slave internal buffer, will be sent to master on request.
+ void update (const char *buf, int count);
+ /// If data has been received, copy it to provided buffer and return its
+ /// size. Else, return 0.
+ int poll (char *buf, int count);
+ /// See I2cSlave::DataHandler::to_send.
+ int to_send (char *buf, int count);
+ /// See I2cSlave::DataHandler::to_recv.
+ void to_recv (const char *buf, int count);
+ private:
+ char *send_buf_;
+ int send_size_, send_count_;
+ char *recv_buf_;
+ int recv_size_, recv_count_;
+};
+
+/// Same as I2cSlaveDataBuffer, but include buffers.
+template<int send_size, int recv_size>
+class I2cSlaveDataBufferSize : public I2cSlaveDataBuffer
+{
+ public:
+ /// Default constructor.
+ I2cSlaveDataBufferSize ()
+ : I2cSlaveDataBuffer (send_array_, sizeof (send_array_),
+ recv_array_, sizeof (recv_array_))
+ { }
+ private:
+ char send_array_[send_size];
+ char recv_array_[recv_size];
+};
+
+} // namespace ucoo
+
+#endif // ucoolib_hal_i2c_i2c_slave_data_buffer_hh
diff --git a/digital/ucoolib/ucoolib/hal/i2c/test/Makefile b/digital/ucoolib/ucoolib/hal/i2c/test/Makefile
new file mode 100644
index 00000000..14a46120
--- /dev/null
+++ b/digital/ucoolib/ucoolib/hal/i2c/test/Makefile
@@ -0,0 +1,9 @@
+BASE = ../../../..
+
+TARGETS = stm32f4
+PROGS = test_i2c
+test_i2c_SOURCES = test_i2c.cc
+
+MODULES = hal/i2c utils base/test hal/usb
+
+include $(BASE)/build/top.mk
diff --git a/digital/ucoolib/ucoolib/hal/i2c/test/test_i2c.cc b/digital/ucoolib/ucoolib/hal/i2c/test/test_i2c.cc
new file mode 100644
index 00000000..b870665b
--- /dev/null
+++ b/digital/ucoolib/ucoolib/hal/i2c/test/test_i2c.cc
@@ -0,0 +1,122 @@
+// ucoolib - Microcontroller object oriented library. {{{
+//
+// Copyright (C) 2013 Nicolas Schodet
+//
+// APBTeam:
+// Web: http://apbteam.org/
+// Email: team AT apbteam DOT org
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 2 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+//
+// }}}
+#include "ucoolib/hal/i2c/i2c_hard.hh"
+#include "ucoolib/hal/i2c/i2c_slave_data_buffer.hh"
+
+#include "ucoolib/arch/arch.hh"
+#include "ucoolib/hal/gpio/gpio.hh"
+#include "ucoolib/utils/delay.hh"
+#include "ucoolib/base/test/test.hh"
+
+#include <libopencm3/stm32/f4/rcc.h>
+
+#include <algorithm>
+#include <cstring>
+
+static const int buffer_size = 16;
+static const int margin = 5;
+static const uint8_t a1 = 0x2c, a2 = 0x2e;
+
+void
+test_basic (ucoo::TestSuite &tsuite, ucoo::I2cMaster &m,
+ ucoo::I2cSlaveDataBuffer &d, uint8_t addr)
+{
+ tsuite.group ("basic");
+ {
+ ucoo::Test test (tsuite, "recv");
+ // Slave is not able to signal its buffer end. Extra bytes will be
+ // read as 0xff.
+ const char *hello = "Hello world!";
+ char buf[buffer_size + margin];
+ d.update (hello, std::strlen (hello) + 1);
+ char ref[buffer_size + margin];
+ std::copy (hello, hello + std::strlen (hello) + 1, ref);
+ std::fill (ref + std::strlen (hello) + 1, ref + sizeof (ref), 0xff);
+ for (int len = 2; len < (int) sizeof (buf); len++)
+ {
+ std::fill (buf, buf + sizeof (buf), 42);
+ m.recv (addr, buf, len);
+ int r = m.wait ();
+ test_fail_break_unless (test, r == len);
+ test_fail_break_unless (test, std::equal (buf, buf + len, ref));
+ test_fail_break_unless (test, std::count (buf, buf + sizeof (buf), 42)
+ == (int) sizeof (buf) - len);
+ }
+ }
+ {
+ ucoo::Test test (tsuite, "send");
+ // Slave is supposed to signal when it received enough data, but this
+ // is not implemented.
+ char buf[buffer_size + margin];
+ for (int len = 1; len < (int) sizeof (buf); len++)
+ {
+ int r;
+ // Before transfer, no data.
+ r = d.poll (buf, sizeof (buf));
+ test_fail_break_unless (test, r == 0);
+ // Send data.
+ char c = '0' + len % 10;
+ std::fill (buf, buf + len, c);
+ m.send (addr, buf, len);
+ r = m.wait ();
+ test_fail_break_unless (test, r == len);
+ // Let some time for slave to finish reception.
+ ucoo::delay_ms (1);
+ // Check what is received.
+ r = d.poll (buf, sizeof (buf));
+ test_fail_break_unless (test, r == std::min (len, buffer_size));
+ test_fail_break_unless (test, std::count (buf, buf + r, c) == r);
+ }
+ }
+}
+
+int
+main (int argc, const char **argv)
+{
+ ucoo::arch_init (argc, argv);
+ ucoo::TestSuite tsuite ("i2c");
+ // I2C1: B6: SCL, B9: SDA
+ // I2C3: A8: SCL, C9: SDA
+ rcc_peripheral_enable_clock (&RCC_AHB1ENR, RCC_AHB1ENR_IOPAEN);
+ rcc_peripheral_enable_clock (&RCC_AHB1ENR, RCC_AHB1ENR_IOPBEN);
+ rcc_peripheral_enable_clock (&RCC_AHB1ENR, RCC_AHB1ENR_IOPCEN);
+ gpio_mode_setup (GPIOB, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO6 | GPIO9);
+ gpio_mode_setup (GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO8);
+ gpio_mode_setup (GPIOC, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO9);
+ gpio_set_output_options (GPIOB, GPIO_OTYPE_OD, GPIO_OSPEED_2MHZ, GPIO6 | GPIO9);
+ gpio_set_output_options (GPIOA, GPIO_OTYPE_OD, GPIO_OSPEED_2MHZ, GPIO8);
+ gpio_set_output_options (GPIOC, GPIO_OTYPE_OD, GPIO_OSPEED_2MHZ, GPIO9);
+ gpio_set_af (GPIOB, GPIO_AF4, GPIO6 | GPIO9);
+ gpio_set_af (GPIOA, GPIO_AF4, GPIO8);
+ gpio_set_af (GPIOC, GPIO_AF4, GPIO9);
+ ucoo::I2cSlaveDataBufferSize<16, 16> data1, data2;
+ ucoo::I2cHard i2c1 (0, true);
+ ucoo::I2cHard i2c2 (2, true);
+ i2c1.register_data (a1, data1);
+ i2c2.register_data (a2, data2);
+ // Run tests.
+ test_basic (tsuite, i2c1, data2, a2);
+ test_basic (tsuite, i2c2, data1, a1);
+ return tsuite.report () ? 0 : 1;
+}
diff --git a/digital/ucoolib/ucoolib/intf/i2c.hh b/digital/ucoolib/ucoolib/intf/i2c.hh
new file mode 100644
index 00000000..622510a1
--- /dev/null
+++ b/digital/ucoolib/ucoolib/intf/i2c.hh
@@ -0,0 +1,121 @@
+#ifndef ucoolib_intf_i2c_hh
+#define ucoolib_intf_i2c_hh
+// ucoolib - Microcontroller object oriented library. {{{
+//
+// Copyright (C) 2013 Nicolas Schodet
+//
+// APBTeam:
+// Web: http://apbteam.org/
+// Email: team AT apbteam DOT org
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 2 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+//
+// }}}
+#include "ucoolib/common.hh"
+
+namespace ucoo {
+
+/// Master side of I2C interface.
+class I2cMaster
+{
+ public:
+ /// Master transfer status, any other value is the transfer size in case
+ /// of success.
+ enum Status
+ {
+ /// Transfer is still ongoing.
+ STATUS_BUSY = -1,
+ /// Transfer finished with error.
+ STATUS_ERROR = 0,
+ };
+ /// Callback used when master transfer is finised.
+ class FinishedHandler
+ {
+ public:
+ /// Called when transfer is finished, may be called in interrupt
+ /// context. I2C send and recv can be called from this handler.
+ virtual void finished (int status) = 0;
+ };
+ public:
+ /// Send data to selected slave. This is asynchronous, you will have to
+ /// poll status or use a callback to determine if transfer is finished.
+ /// Input buffer is not copied and should be kept valid until transfer is
+ /// finished.
+ ///
+ /// If asynchronous transfer is not supported, this will block.
+ virtual void send (uint8_t addr, const char *buf, int count) = 0;
+ /// Receive data from selected slave. This is asynchronous, you will have
+ /// to poll status or use a callback to determine if transfer is finished.
+ /// Buffer is directly written and should be kept valid until transfer is
+ /// finished.
+ ///
+ /// If asynchronous transfer is not supported, this will block.
+ virtual void recv (uint8_t addr, char *buf, int count) = 0;
+ /// Return last transfer status.
+ virtual int status () = 0;
+ /// Wait until transfer is finished and return status.
+ virtual int wait () = 0;
+ /// Register a handler called when transfer is finished.
+ void register_finished (FinishedHandler &finished_handler)
+ { finished_handler_ = &finished_handler; }
+ protected:
+ /// Default constructor.
+ I2cMaster () : finished_handler_ (0) { }
+ protected:
+ /// Handler called when transfer is finished.
+ FinishedHandler *finished_handler_;
+};
+
+/// Slave side of I2C interface.
+class I2cSlave
+{
+ public:
+ /// Data source and sink.
+ ///
+ /// When master requests data from a slave or send data to it, slave is
+ /// expected to reply as quickly as possible as the bus is stalled until a
+ /// response is done.
+ ///
+ /// This interface provides data to send to master and receives data from
+ /// master. It has to be fast and may be run under an interrupt context.
+ class DataHandler
+ {
+ public:
+ /// Request data to send to master, should write to provided buffer of
+ /// size COUNT and return the writen size.
+ virtual int to_send (char *buf, int count) = 0;
+ /// Provide data sent by master, should make a copy if needed as data will
+ /// be discarded.
+ virtual void to_recv (const char *buf, int count) = 0;
+ };
+ public:
+ /// Register data source and sink, along with 7 bit address (in MSB).
+ virtual void register_data (uint8_t addr, DataHandler &data_handler) = 0;
+ protected:
+ /// Default constructor.
+ I2cSlave () { }
+};
+
+/// Both side of I2C interface.
+class I2c : public I2cMaster, public I2cSlave
+{
+ protected:
+ /// Default constructor.
+ I2c () { }
+};
+
+} // namespace ucoo
+
+#endif // ucoolib_intf_i2c_hh