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authorNélio Laranjeiro2009-03-01 12:08:16 +0100
committerNélio Laranjeiro2009-03-01 12:08:16 +0100
commitba98e932657a6a8f9d5139a571bb77ef5de1beca (patch)
tree63e447e3fe88423c2a00666d496a11ab608318cb /digital/avr/modules/flash
parent1e5721817dcc9e4dd12d6efed0fc2184e701a235 (diff)
digital/avr/modules/flash: Fix the read and write.
Now it verifies the flash status before writing or reading.
Diffstat (limited to 'digital/avr/modules/flash')
-rw-r--r--digital/avr/modules/flash/flash.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/digital/avr/modules/flash/flash.c b/digital/avr/modules/flash/flash.c
index 2a4b2493..8d714fd6 100644
--- a/digital/avr/modules/flash/flash.c
+++ b/digital/avr/modules/flash/flash.c
@@ -168,8 +168,8 @@ flash_first_sector (void)
void
flash_write (uint32_t addr, uint8_t data)
{
- flash_send_command (FLASH_WREN);
while (flash_is_busy ());
+ flash_send_command (FLASH_WREN);
AC_FLASH_PORT &= ~_BV(AC_FLASH_BIT_SS);
/* Write instruction. */
@@ -190,12 +190,14 @@ flash_read (uint32_t addr)
{
uint8_t data;
+ while (flash_is_busy ());
AC_FLASH_PORT &= ~_BV(AC_FLASH_BIT_SS);
/* Send the read instruction. */
spi_send (FLASH_READ);
flash_address (addr);
data = spi_recv ();
AC_FLASH_PORT |= _BV(AC_FLASH_BIT_SS);
+ while (flash_is_busy ());
return data;
}
@@ -211,6 +213,7 @@ flash_read_array (uint32_t addr, uint8_t *buffer, uint32_t length)
{
uint8_t i;
+ while (flash_is_busy ());
AC_FLASH_PORT &= ~_BV(AC_FLASH_BIT_SS);
spi_send (FLASH_READ);
flash_address (addr);
@@ -219,6 +222,7 @@ flash_read_array (uint32_t addr, uint8_t *buffer, uint32_t length)
buffer[i] = spi_recv ();
}
AC_FLASH_PORT |= _BV(AC_FLASH_BIT_SS);
+ while (flash_is_busy ());
}
/** Write in the flash byte provided in parameter.