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authorGuillaume Chevillot2008-03-13 10:34:32 +0100
committerGuillaume Chevillot2008-03-13 10:34:32 +0100
commit65baffda4311b55c9d4026d84c1c1544d0ee7aa4 (patch)
treecef12af16ced96358a4cbf163db674d8ba8a4f14 /analog/motor-power-avr/src/mp_pwm_LR_.h
parent7e1e72e29349a8248901d4d4f466d1c9b556344d (diff)
- Add current limitation management (not tested yet !) :
- Add current limitation PWM generation - Add external current limitation interrupts management - Update current limitation software part - Update TODO list (try to reduce it...)
Diffstat (limited to 'analog/motor-power-avr/src/mp_pwm_LR_.h')
-rw-r--r--analog/motor-power-avr/src/mp_pwm_LR_.h26
1 files changed, 21 insertions, 5 deletions
diff --git a/analog/motor-power-avr/src/mp_pwm_LR_.h b/analog/motor-power-avr/src/mp_pwm_LR_.h
index 32a0f08a..b8c6887f 100644
--- a/analog/motor-power-avr/src/mp_pwm_LR_.h
+++ b/analog/motor-power-avr/src/mp_pwm_LR_.h
@@ -98,16 +98,32 @@
#define TCCR_L_ TCCR0
#define TCCR_R_ TCCR2
-// timer configuration
-// for 57.21kHz : prescaler = 0 : CSx2:0 = 0x01
-// for 7.68kHz : prescaler = 8 : CSx2:0 = 0x02
+/** Timer configuration for left and right side
+ * for 57.21kHz : prescaler = 0 : CSx2:0 = 0x01
+ * for 7.68kHz : prescaler = 8 : CSx2:0 = 0x02 */
#define TCCR_LR_CFG (regv (FOC0, WGM00, COM01, COM00, WGM01, CS02, CS01, CS00, \
0, 1, 0, 0, 1, 0, 1, 0))
-// timer interrupts configuration
+/** Set timer interrupts configuration */
#define TIMSK_LR_CFG (regv (OCIE2, TOIE2, TICIE1, OCIE1A, OCIE1B, TOIE1, OCIE0, TOIE0, \
1, 1, 0, 0, 0, 0, 1, 1))
+/** Defines timer control register for current limitation PWM (both side)
+ * toggle OC1x on compare, fast 8bit PWM mode, no prescaling */
+#define TCCRA_LR_CFG (regv (COM1A1, COM1A0, COM1B1, COM1B0, FOC1A, FOC1B, WGM11, WGM10, \
+ 0, 1, 0, 1, 0, 0, 0, 1))
+#define TCCRB_LR_CFG (regv (ICNC1, ICES1, 5, WGM13, WGM12, CS12, CS11, CS10, \
+ 0, 0, 0, 0, 1, 0, 0, 1))
+
+/** Defines external interrupts level configuration :
+ * low level of INT0 and INT1 generates an interrup request */
+#define MCUCR_LR_CFG (regv (SM2, SE, SM1, SM0, ISC11, ISC10, ISC01, ISC00, \
+ 0, 0, 0, 0, 0, 0, 0, 0))
+
+/** Enable external interrupts INT1 and INT0 fir current limitation */
+#define GICR_LR_CFG (regv (INT1, INT0, INT2, 4, 3, 2, IVSEL, IVCE, \
+ 1, 1, 0, 0, 0, 0, 0, 0))
+
// PWM max, min, and offset values
#define PWM_MIN_LR_ 0x10
#define PWM_MAX_LR_ 0xF0
@@ -137,7 +153,7 @@ void init_timer_LR_(void);
void init_curLim (void);
uint8_t get_curLim_temp (uint8_t temperature);
uint8_t get_curLim_bat (uint8_t battery);
-void update_curLim(void);
+inline void update_curLim(void);
void launch_envTest(void);
void setCurLim_soft(uint8_t curLim);