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authorNicolas Schodet2010-04-29 23:03:00 +0200
committerNicolas Schodet2010-04-29 23:03:00 +0200
commit213d168457bd52aa4174e96e193a9eb792fd82eb (patch)
tree4b1948a53a7a8cfad7b83a5f3d3fe220be82124f
parentf8cc79927bd48eb17a3128253ce12c71be6886f0 (diff)
digital/mimot/src/cpld: add CPLD sources, refs #123
-rw-r--r--digital/mimot/src/cpld/Makefile19
-rw-r--r--digital/mimot/src/cpld/test_top.v92
-rw-r--r--digital/mimot/src/cpld/top.v78
3 files changed, 189 insertions, 0 deletions
diff --git a/digital/mimot/src/cpld/Makefile b/digital/mimot/src/cpld/Makefile
new file mode 100644
index 00000000..bd1c3b20
--- /dev/null
+++ b/digital/mimot/src/cpld/Makefile
@@ -0,0 +1,19 @@
+EXEC = test_top
+
+vpath %.v ../../../asserv/src/hdlcounter
+
+test_top_SOURCES = test_top.v top.v input_latch.v quad_decoder_div4.v
+
+all: $(EXEC:%=%.vcd)
+
+%.vcd: %
+ vvp $<
+
+define EXEC_TEMPLATE
+$1: $$($1_SOURCES)
+ iverilog -Wall -o $$@ $$^
+endef
+$(foreach exec,$(EXEC),$(eval $(call EXEC_TEMPLATE,$(exec))))
+
+clean:
+ rm -f $(EXEC) $(EXEC:%=%.vcd)
diff --git a/digital/mimot/src/cpld/test_top.v b/digital/mimot/src/cpld/test_top.v
new file mode 100644
index 00000000..47eef548
--- /dev/null
+++ b/digital/mimot/src/cpld/test_top.v
@@ -0,0 +1,92 @@
+// test_top.v
+// mimot - Mini motor control, with motor driver. {{{
+//
+// Copyright (C) 2010 Nicolas Schodet
+//
+// APBTeam:
+// Web: http://apbteam.org/
+// Email: team AT apbteam DOT org
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 2 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+//
+// }}}
+`timescale 1ns / 1ps
+
+module test_top();
+ reg clk;
+ reg rst;
+ reg ale, rd;
+ wire [7:0] ad;
+ reg [1:0] q0, q1;
+ reg i0, i1;
+ reg dir0, brk0, pwm0, fs0, dir1, brk1, pwm1, fs1;
+ wire en0, in0a, in0b, en1, in1a, in1b;
+ wire led;
+ reg x7;
+
+ // Clock generator.
+ always #5 clk <= !clk;
+
+ // Instantiation.
+ top uut (clk, rst, ale, rd, ad, q0, q1, i0, i1, dir0, brk0, pwm0, fs0, en0,
+ in0a, in0b, dir1, brk1, pwm1, fs1, en1, in1a, in1b, led, x7);
+
+ initial begin
+ $dumpfile ("test_top.vcd");
+ $dumpvars;
+ clk <= 1;
+ rst <= 0;
+ ale <= 1;
+ rd <= 1;
+ q0 <= 0;
+ q1 <= 0;
+ i0 <= 0;
+ i1 <= 0;
+ dir0 <= 0;
+ brk0 <= 0;
+ pwm0 <= 0;
+ fs0 <= 0;
+ dir1 <= 0;
+ brk1 <= 0;
+ pwm1 <= 0;
+ fs1 <= 0;
+ x7 <= 0;
+ #3 rst <= 1;
+ #50 brk0 <= 1;
+ #50
+ repeat (10) begin
+ #5 pwm0 <= 1;
+ #5 pwm0 <= 0;
+ end
+ dir0 <= 1;
+ repeat (10) begin
+ #5 pwm0 <= 1;
+ #5 pwm0 <= 0;
+ end
+ #50 brk1 <= 1;
+ #50
+ repeat (10) begin
+ #5 pwm1 <= 1;
+ #5 pwm1 <= 0;
+ end
+ dir1 <= 1;
+ repeat (10) begin
+ #5 pwm1 <= 1;
+ #5 pwm1 <= 0;
+ end
+ $finish;
+ end
+
+endmodule
diff --git a/digital/mimot/src/cpld/top.v b/digital/mimot/src/cpld/top.v
new file mode 100644
index 00000000..50764fa8
--- /dev/null
+++ b/digital/mimot/src/cpld/top.v
@@ -0,0 +1,78 @@
+// top.v
+// mimot - Mini motor control, with motor driver. {{{
+//
+// Copyright (C) 2010 Nicolas Schodet
+//
+// APBTeam:
+// Web: http://apbteam.org/
+// Email: team AT apbteam DOT org
+//
+// This program is free software; you can redistribute it and/or modify
+// it under the terms of the GNU General Public License as published by
+// the Free Software Foundation; either version 2 of the License, or
+// (at your option) any later version.
+//
+// This program is distributed in the hope that it will be useful,
+// but WITHOUT ANY WARRANTY; without even the implied warranty of
+// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+// GNU General Public License for more details.
+//
+// You should have received a copy of the GNU General Public License
+// along with this program; if not, write to the Free Software
+// Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+//
+// }}}
+`timescale 1ns / 1ps
+
+module top(clk, rst, ale, rd, ad, q0, q1, i0, i1, dir0, brk0, pwm0, fs0, en0,
+ in0a, in0b, dir1, brk1, pwm1, fs1, en1, in1a, in1b, led, x7);
+ parameter size = 8;
+ parameter lsize = 8;
+ input clk;
+ input rst;
+ input ale, rd;
+ inout [size-1:0] ad;
+ input [1:0] q0, q1;
+ input i0, i1;
+ input dir0, brk0, pwm0, dir1, brk1, pwm1;
+ input fs0, fs1;
+ output en0, in0a, in0b, en1, in1a, in1b;
+ output led;
+ input x7;
+
+ wire [1:0] qf0, qf1;
+ wire [size-1:0] count0, count1;
+
+ // Decode encoders outputs.
+ input_latch f0[1:0] (clk, rst, q0, qf0);
+ quad_decoder_div4 #(size) qd0 (clk, rst, qf0, count0);
+
+ input_latch f1[1:0] (clk, rst, q1, qf1);
+ quad_decoder_div4 #(size) qd1 (clk, rst, qf1, count1);
+
+ reg [lsize-1:0] lcount;
+
+ // Latch a counter when its address is given.
+ always @(negedge ale or negedge rst) begin
+ if (!rst)
+ lcount <= 0;
+ else begin
+ lcount <=
+ ad[0] == 0 ? count0 :
+ count1;
+ end
+ end
+
+ // Tri-state output unless rd is active (0).
+ assign ad = rd ? 8'bz : lcount;
+
+ // Power signals.
+ assign en0 = brk0;
+ assign in0a = brk0 & (dir0 | !pwm0);
+ assign in0b = brk0 & (!dir0 | !pwm0);
+
+ assign en1 = brk1;
+ assign in1a = brk1 & (dir1 | !pwm1);
+ assign in1b = brk1 & (!dir1 | !pwm1);
+
+endmodule