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authorNicolas Schodet2015-12-08 15:54:19 +0100
committerNicolas Schodet2019-10-07 00:44:57 +0200
commitab62929a0a7e3dfd5f095c8182425829a8d1b2a6 (patch)
treefc7d7a01dcd49f9d8234ed0552793162ac11f591
parentcd8dfb2c6cae2cb3c4a9440bb19773cefb1d0eb3 (diff)
ucoo/hal/timer: enable/disable update interrupt
This should be improved to handle low level interrupt access.
-rw-r--r--ucoo/hal/timer/timer.stm32.hh4
-rw-r--r--ucoo/hal/timer/timer.stm32.tcc14
2 files changed, 18 insertions, 0 deletions
diff --git a/ucoo/hal/timer/timer.stm32.hh b/ucoo/hal/timer/timer.stm32.hh
index a7d135d..f139fce 100644
--- a/ucoo/hal/timer/timer.stm32.hh
+++ b/ucoo/hal/timer/timer.stm32.hh
@@ -58,6 +58,10 @@ class TimerHard
void wait_input_capture (int ch) const;
/// Get timer frequency.
int get_freq () const { return freq_; }
+ /// Enable interrupts on update event.
+ void enable_interrupt ();
+ /// Disable interrupts on update event.
+ void disable_interrupt ();
private:
/// Enable updates (reload value, output compare values...).
void enable_updates ();
diff --git a/ucoo/hal/timer/timer.stm32.tcc b/ucoo/hal/timer/timer.stm32.tcc
index e031f8c..4083f26 100644
--- a/ucoo/hal/timer/timer.stm32.tcc
+++ b/ucoo/hal/timer/timer.stm32.tcc
@@ -229,6 +229,20 @@ TimerHard<Base>::wait_input_capture (int ch) const
template<uint32_t Base>
void
+TimerHard<Base>::enable_interrupt ()
+{
+ TIM_DIER (Base) |= TIM_DIER_UIE;
+}
+
+template<uint32_t Base>
+void
+TimerHard<Base>::disable_interrupt ()
+{
+ TIM_DIER (Base) &= ~TIM_DIER_UIE;
+}
+
+template<uint32_t Base>
+void
TimerHard<Base>::enable_updates ()
{
TIM_CR1 (Base) &= ~TIM_CR1_UDIS;