From 1eb4e6ed29edc60598afc04e69b090a5ad3e9d80 Mon Sep 17 00:00:00 2001 From: Karl Palsson Date: Wed, 23 Jan 2013 13:14:17 +0000 Subject: [flash] f1: use "proper" bit definition naming. Part 2 of 4: updated f1 to use flash__bit instead of just flash_bit --- include/libopencm3/stm32/f1/flash.h | 56 ++++++++++++++++----------------- lib/stm32/f1/flash.c | 63 +++++++++++++++++++------------------ lib/stm32/f1/rcc.c | 16 +++++----- 3 files changed, 68 insertions(+), 67 deletions(-) diff --git a/include/libopencm3/stm32/f1/flash.h b/include/libopencm3/stm32/f1/flash.h index 919b4d4..fef1257 100644 --- a/include/libopencm3/stm32/f1/flash.h +++ b/include/libopencm3/stm32/f1/flash.h @@ -44,48 +44,48 @@ /* --- FLASH_ACR values ---------------------------------------------------- */ -#define FLASH_PRFTBS (1 << 5) -#define FLASH_PRFTBE (1 << 4) -#define FLASH_HLFCYA (1 << 3) -#define FLASH_LATENCY_0WS 0x00 -#define FLASH_LATENCY_1WS 0x01 -#define FLASH_LATENCY_2WS 0x02 +#define FLASH_ACR_PRFTBS (1 << 5) +#define FLASH_ACR_PRFTBE (1 << 4) +#define FLASH_ACR_HLFCYA (1 << 3) +#define FLASH_ACR_LATENCY_0WS 0x00 +#define FLASH_ACR_LATENCY_1WS 0x01 +#define FLASH_ACR_LATENCY_2WS 0x02 /* --- FLASH_SR values ----------------------------------------------------- */ -#define FLASH_EOP (1 << 5) -#define FLASH_WRPRTERR (1 << 4) -#define FLASH_PGERR (1 << 2) -#define FLASH_BSY (1 << 0) +#define FLASH_SR_EOP (1 << 5) +#define FLASH_SR_WRPRTERR (1 << 4) +#define FLASH_SR_PGERR (1 << 2) +#define FLASH_SR_BSY (1 << 0) /* --- FLASH_CR values ----------------------------------------------------- */ -#define FLASH_EOPIE (1 << 12) -#define FLASH_ERRIE (1 << 10) -#define FLASH_OPTWRE (1 << 9) -#define FLASH_LOCK (1 << 7) -#define FLASH_STRT (1 << 6) -#define FLASH_OPTER (1 << 5) -#define FLASH_OPTPG (1 << 4) -#define FLASH_MER (1 << 2) -#define FLASH_PER (1 << 1) -#define FLASH_PG (1 << 0) +#define FLASH_CR_EOPIE (1 << 12) +#define FLASH_CR_ERRIE (1 << 10) +#define FLASH_CR_OPTWRE (1 << 9) +#define FLASH_CR_LOCK (1 << 7) +#define FLASH_CR_STRT (1 << 6) +#define FLASH_CR_OPTER (1 << 5) +#define FLASH_CR_OPTPG (1 << 4) +#define FLASH_CR_MER (1 << 2) +#define FLASH_CR_PER (1 << 1) +#define FLASH_CR_PG (1 << 0) /* --- FLASH_OBR values ---------------------------------------------------- */ /* FLASH_OBR[25:18]: Data1 */ /* FLASH_OBR[17:10]: Data0 */ -#define FLASH_NRST_STDBY (1 << 4) -#define FLASH_NRST_STOP (1 << 3) -#define FLASH_WDG_SW (1 << 2) -#define FLASH_RDPRT (1 << 1) -#define FLASH_OPTERR (1 << 0) +#define FLASH_OBR_NRST_STDBY (1 << 4) +#define FLASH_OBR_NRST_STOP (1 << 3) +#define FLASH_OBR_WDG_SW (1 << 2) +#define FLASH_OBR_RDPRT (1 << 1) +#define FLASH_OBR_OPTERR (1 << 0) /* --- FLASH Keys -----------------------------------------------------------*/ -#define RDP_KEY ((u16)0x00a5) -#define FLASH_KEY1 ((u32)0x45670123) -#define FLASH_KEY2 ((u32)0xcdef89ab) +#define FLASH_RDP_KEY ((u16)0x00a5) +#define FLASH_KEYR_KEY1 ((u32)0x45670123) +#define FLASH_KEYR_KEY2 ((u32)0xcdef89ab) /* --- Function prototypes ------------------------------------------------- */ diff --git a/lib/stm32/f1/flash.c b/lib/stm32/f1/flash.c index 232086c..49f182c 100644 --- a/lib/stm32/f1/flash.c +++ b/lib/stm32/f1/flash.c @@ -22,22 +22,22 @@ void flash_prefetch_buffer_enable(void) { - FLASH_ACR |= FLASH_PRFTBE; + FLASH_ACR |= FLASH_ACR_PRFTBE; } void flash_prefetch_buffer_disable(void) { - FLASH_ACR &= ~FLASH_PRFTBE; + FLASH_ACR &= ~FLASH_ACR_PRFTBE; } void flash_halfcycle_enable(void) { - FLASH_ACR |= FLASH_HLFCYA; + FLASH_ACR |= FLASH_ACR_HLFCYA; } void flash_halfcycle_disable(void) { - FLASH_ACR &= ~FLASH_HLFCYA; + FLASH_ACR &= ~FLASH_ACR_HLFCYA; } void flash_set_ws(u32 ws) @@ -53,33 +53,33 @@ void flash_set_ws(u32 ws) void flash_unlock(void) { /* Authorize the FPEC access. */ - FLASH_KEYR = FLASH_KEY1; - FLASH_KEYR = FLASH_KEY2; + FLASH_KEYR = FLASH_KEYR_KEY1; + FLASH_KEYR = FLASH_KEYR_KEY2; } void flash_lock(void) { - FLASH_CR |= FLASH_LOCK; + FLASH_CR |= FLASH_CR_LOCK; } void flash_clear_pgerr_flag(void) { - FLASH_SR |= FLASH_PGERR; + FLASH_SR |= FLASH_SR_PGERR; } void flash_clear_eop_flag(void) { - FLASH_SR |= FLASH_EOP; + FLASH_SR |= FLASH_SR_EOP; } void flash_clear_wrprterr_flag(void) { - FLASH_SR |= FLASH_WRPRTERR; + FLASH_SR |= FLASH_SR_WRPRTERR; } void flash_clear_bsy_flag(void) { - FLASH_SR &= ~FLASH_BSY; + FLASH_SR &= ~FLASH_SR_BSY; } void flash_clear_status_flags(void) @@ -92,13 +92,14 @@ void flash_clear_status_flags(void) void flash_unlock_option_bytes(void) { - FLASH_OPTKEYR = FLASH_KEY1; - FLASH_OPTKEYR = FLASH_KEY2; + /* F1 uses same keys for flash and option */ + FLASH_OPTKEYR = FLASH_KEYR_KEY1; + FLASH_OPTKEYR = FLASH_KEYR_KEY2; } void flash_wait_for_last_operation(void) { - while ((FLASH_SR & FLASH_BSY) == FLASH_BSY) + while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY) ; } @@ -108,7 +109,7 @@ void flash_program_word(u32 address, u32 data) flash_wait_for_last_operation(); /* Enable writes to flash. */ - FLASH_CR |= FLASH_PG; + FLASH_CR |= FLASH_CR_PG; /* Program the first half of the word. */ (*(volatile u16 *)address) = (u16)data; @@ -123,67 +124,67 @@ void flash_program_word(u32 address, u32 data) flash_wait_for_last_operation(); /* Disable writes to flash. */ - FLASH_CR &= ~FLASH_PG; + FLASH_CR &= ~FLASH_CR_PG; } void flash_program_half_word(u32 address, u16 data) { flash_wait_for_last_operation(); - FLASH_CR |= FLASH_PG; + FLASH_CR |= FLASH_CR_PG; (*(volatile u16 *)address) = data; flash_wait_for_last_operation(); - FLASH_CR &= ~FLASH_PG; /* Disable the PG bit. */ + FLASH_CR &= ~FLASH_CR_PG; /* Disable the PG bit. */ } void flash_erase_page(u32 page_address) { flash_wait_for_last_operation(); - FLASH_CR |= FLASH_PER; + FLASH_CR |= FLASH_CR_PER; FLASH_AR = page_address; - FLASH_CR |= FLASH_STRT; + FLASH_CR |= FLASH_CR_STRT; flash_wait_for_last_operation(); - FLASH_CR &= ~FLASH_PER; + FLASH_CR &= ~FLASH_CR_PER; } void flash_erase_all_pages(void) { flash_wait_for_last_operation(); - FLASH_CR |= FLASH_MER; /* Enable mass erase. */ - FLASH_CR |= FLASH_STRT; /* Trigger the erase. */ + FLASH_CR |= FLASH_CR_MER; /* Enable mass erase. */ + FLASH_CR |= FLASH_CR_STRT; /* Trigger the erase. */ flash_wait_for_last_operation(); - FLASH_CR &= ~FLASH_MER; /* Disable mass erase. */ + FLASH_CR &= ~FLASH_CR_MER; /* Disable mass erase. */ } void flash_erase_option_bytes(void) { flash_wait_for_last_operation(); - if ((FLASH_CR & FLASH_OPTWRE) == 0) + if ((FLASH_CR & FLASH_CR_OPTWRE) == 0) flash_unlock_option_bytes(); - FLASH_CR |= FLASH_OPTER; /* Enable option byte erase. */ - FLASH_CR |= FLASH_STRT; + FLASH_CR |= FLASH_CR_OPTER; /* Enable option byte erase. */ + FLASH_CR |= FLASH_CR_STRT; flash_wait_for_last_operation(); - FLASH_CR &= ~FLASH_OPTER; /* Disable option byte erase. */ + FLASH_CR &= ~FLASH_CR_OPTER; /* Disable option byte erase. */ } void flash_program_option_bytes(u32 address, u16 data) { flash_wait_for_last_operation(); - if ((FLASH_CR & FLASH_OPTWRE) == 0) + if ((FLASH_CR & FLASH_CR_OPTWRE) == 0) flash_unlock_option_bytes(); - FLASH_CR |= FLASH_OPTPG; /* Enable option byte programming. */ + FLASH_CR |= FLASH_CR_OPTPG; /* Enable option byte programming. */ (*(volatile u16 *)address) = data; flash_wait_for_last_operation(); - FLASH_CR &= ~FLASH_OPTPG; /* Disable option byte programming. */ + FLASH_CR &= ~FLASH_CR_OPTPG; /* Disable option byte programming. */ } diff --git a/lib/stm32/f1/rcc.c b/lib/stm32/f1/rcc.c index 9cd8658..707c931 100644 --- a/lib/stm32/f1/rcc.c +++ b/lib/stm32/f1/rcc.c @@ -761,7 +761,7 @@ void rcc_clock_setup_in_hsi_out_64mhz(void) * 1WS from 24-48MHz * 2WS from 48-72MHz */ - flash_set_ws(FLASH_LATENCY_2WS); + flash_set_ws(FLASH_ACR_LATENCY_2WS); /* * Set the PLL multiplication factor to 16. @@ -814,7 +814,7 @@ void rcc_clock_setup_in_hsi_out_48mhz(void) * 1WS from 24-48MHz * 2WS from 48-72MHz */ - flash_set_ws(FLASH_LATENCY_1WS); + flash_set_ws(FLASH_ACR_LATENCY_1WS); /* * Set the PLL multiplication factor to 12. @@ -865,7 +865,7 @@ void rcc_clock_setup_in_hsi_out_24mhz(void) { * 1WS from 24-48MHz * 2WS from 48-72MHz */ - flash_set_ws(FLASH_LATENCY_0WS); + flash_set_ws(FLASH_ACR_LATENCY_0WS); /* * Set the PLL multiplication factor to 6. @@ -922,7 +922,7 @@ void rcc_clock_setup_in_hse_8mhz_out_24mhz(void) * 1WS from 24-48MHz * 2WS from 48-72MHz */ - flash_set_ws(FLASH_LATENCY_0WS); + flash_set_ws(FLASH_ACR_LATENCY_0WS); /* * Set the PLL multiplication factor to 3. @@ -985,7 +985,7 @@ void rcc_clock_setup_in_hse_8mhz_out_72mhz(void) * 1WS from 24-48MHz * 2WS from 48-72MHz */ - flash_set_ws(FLASH_LATENCY_2WS); + flash_set_ws(FLASH_ACR_LATENCY_2WS); /* * Set the PLL multiplication factor to 9. @@ -1048,7 +1048,7 @@ void rcc_clock_setup_in_hse_12mhz_out_72mhz(void) * 1WS from 24-48MHz * 2WS from 48-72MHz */ - flash_set_ws(FLASH_LATENCY_2WS); + flash_set_ws(FLASH_ACR_LATENCY_2WS); /* * Set the PLL multiplication factor to 9. @@ -1111,7 +1111,7 @@ void rcc_clock_setup_in_hse_16mhz_out_72mhz(void) * 1WS from 24-48MHz * 2WS from 48-72MHz */ - flash_set_ws(FLASH_LATENCY_2WS); + flash_set_ws(FLASH_ACR_LATENCY_2WS); /* * Set the PLL multiplication factor to 9. @@ -1158,7 +1158,7 @@ void rcc_clock_setup_in_hse_25mhz_out_72mhz(void) * 1WS from 24-48MHz * 2WS from 48-72MHz */ - flash_set_ws(FLASH_LATENCY_2WS); + flash_set_ws(FLASH_ACR_LATENCY_2WS); /* * Set prescalers for AHB, ADC, ABP1, ABP2. -- cgit v1.2.3