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Diffstat (limited to 'include/libopencm3/stm32/f2')
-rw-r--r--include/libopencm3/stm32/f2/flash.h4
-rw-r--r--include/libopencm3/stm32/f2/gpio.h4
-rw-r--r--include/libopencm3/stm32/f2/rcc.h4
-rw-r--r--include/libopencm3/stm32/f2/scb.h5
-rw-r--r--include/libopencm3/stm32/f2/timer.h4
5 files changed, 21 insertions, 0 deletions
diff --git a/include/libopencm3/stm32/f2/flash.h b/include/libopencm3/stm32/f2/flash.h
index 5b4483f..2c78757 100644
--- a/include/libopencm3/stm32/f2/flash.h
+++ b/include/libopencm3/stm32/f2/flash.h
@@ -116,6 +116,8 @@
/* --- Function prototypes ------------------------------------------------- */
+BEGIN_DECLS
+
void flash_dcache_enable(void);
void flash_dcache_disable(void);
void flash_icache_enable(void);
@@ -145,4 +147,6 @@ void flash_program_byte(u32 address, u8 data, u32 program_size);
void flash_wait_for_last_operation(void);
void flash_program_option_bytes(u32 data);
+END_DECLS
+
#endif
diff --git a/include/libopencm3/stm32/f2/gpio.h b/include/libopencm3/stm32/f2/gpio.h
index 1a9fd0f..6616769 100644
--- a/include/libopencm3/stm32/f2/gpio.h
+++ b/include/libopencm3/stm32/f2/gpio.h
@@ -254,6 +254,8 @@
/* --- Function prototypes ------------------------------------------------- */
+BEGIN_DECLS
+
/*
* Note: The F2 series has a completely new GPIO peripheral with different
* configuration options. Here we implement a different API partly to more
@@ -275,4 +277,6 @@ u16 gpio_port_read(u32 gpioport);
void gpio_port_write(u32 gpioport, u16 data);
void gpio_port_config_lock(u32 gpioport, u16 gpios);
+END_DECLS
+
#endif
diff --git a/include/libopencm3/stm32/f2/rcc.h b/include/libopencm3/stm32/f2/rcc.h
index dfce266..4ffa242 100644
--- a/include/libopencm3/stm32/f2/rcc.h
+++ b/include/libopencm3/stm32/f2/rcc.h
@@ -479,6 +479,8 @@ typedef enum {
PLL, HSE, HSI, LSE, LSI
} osc_t;
+BEGIN_DECLS
+
void rcc_osc_ready_int_clear(osc_t osc);
void rcc_osc_ready_int_enable(osc_t osc);
void rcc_osc_ready_int_disable(osc_t osc);
@@ -509,4 +511,6 @@ u32 rcc_get_system_clock_source(int i);
void rcc_clock_setup_hse_3v3(const clock_scale_t *clock);
void rcc_backupdomain_reset(void);
+END_DECLS
+
#endif
diff --git a/include/libopencm3/stm32/f2/scb.h b/include/libopencm3/stm32/f2/scb.h
index 12a74a2..181aa7a 100644
--- a/include/libopencm3/stm32/f2/scb.h
+++ b/include/libopencm3/stm32/f2/scb.h
@@ -293,10 +293,15 @@
/* BFAR [31:0]: Bus fault address */
/* --- SCB functions ------------------------------------------------------- */
+
+BEGIN_DECLS
+
void scb_reset_core(void);
void scb_reset_system(void);
void scb_set_priority_grouping(u32 prigroup);
/* TODO: */
+END_DECLS
+
#endif
diff --git a/include/libopencm3/stm32/f2/timer.h b/include/libopencm3/stm32/f2/timer.h
index 3436bba..737d6f0 100644
--- a/include/libopencm3/stm32/f2/timer.h
+++ b/include/libopencm3/stm32/f2/timer.h
@@ -52,6 +52,10 @@
/* --- Function prototypes ------------------------------------------------- */
+BEGIN_DECLS
+
void timer_set_option(u32 timer_peripheral, u32 option);
+END_DECLS
+
#endif