aboutsummaryrefslogtreecommitdiff
path: root/examples/stm32/f1/lisa-m-2/spi_dma_adv/spi_dma_adv.c
diff options
context:
space:
mode:
Diffstat (limited to 'examples/stm32/f1/lisa-m-2/spi_dma_adv/spi_dma_adv.c')
-rw-r--r--examples/stm32/f1/lisa-m-2/spi_dma_adv/spi_dma_adv.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/examples/stm32/f1/lisa-m-2/spi_dma_adv/spi_dma_adv.c b/examples/stm32/f1/lisa-m-2/spi_dma_adv/spi_dma_adv.c
index 8c63170..a8054e7 100644
--- a/examples/stm32/f1/lisa-m-2/spi_dma_adv/spi_dma_adv.c
+++ b/examples/stm32/f1/lisa-m-2/spi_dma_adv/spi_dma_adv.c
@@ -57,7 +57,9 @@ u16 dummy_tx_buf = 0xdd;
u8 dummy_tx_buf = 0xdd;
#endif
-void clock_setup(void)
+int _write(int file, char *ptr, int len);
+
+static void clock_setup(void)
{
rcc_clock_setup_in_hse_12mhz_out_72mhz();
@@ -79,7 +81,7 @@ void clock_setup(void)
rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_DMA1EN);
}
-void spi_setup(void) {
+static void spi_setup(void) {
/* Configure GPIOs: SS=PA4, SCK=PA5, MISO=PA6 and MOSI=PA7
* For now ignore the SS pin so we can use it to time the ISRs
@@ -144,15 +146,15 @@ static void dma_int_disable(void) {
}
*/
-void dma_setup(void)
+static void dma_setup(void)
{
dma_int_enable();
}
#if USE_16BIT_TRANSFERS
-int spi_dma_transceive(u16 *tx_buf, int tx_len, u16 *rx_buf, int rx_len)
+static int spi_dma_transceive(u16 *tx_buf, int tx_len, u16 *rx_buf, int rx_len)
#else
-int spi_dma_transceive(u8 *tx_buf, int tx_len, u8 *rx_buf, int rx_len)
+static int spi_dma_transceive(u8 *tx_buf, int tx_len, u8 *rx_buf, int rx_len)
#endif
{
@@ -338,7 +340,7 @@ void dma1_channel3_isr(void)
gpio_clear(GPIOB,GPIO1);
}
-void usart_setup(void)
+static void usart_setup(void)
{
/* Setup GPIO pin GPIO_USART2_TX and GPIO_USART2_RX. */
gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
@@ -372,7 +374,7 @@ int _write(int file, char *ptr, int len)
return -1;
}
-void gpio_setup(void)
+static void gpio_setup(void)
{
/* Set GPIO8 (in GPIO port A) to 'output push-pull'. */
gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_2_MHZ,