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-rw-r--r--.gitignore12
-rw-r--r--HACKING_COMMON_DOC62
-rw-r--r--Makefile10
-rw-r--r--README24
-rw-r--r--doc/Doxyfile_common2
-rw-r--r--doc/DoxygenLayout.xml6
-rw-r--r--doc/HACKING89
-rw-r--r--doc/Makefile39
-rw-r--r--doc/README63
-rw-r--r--doc/cm3/DoxygenLayout_cm3.xml5
-rw-r--r--doc/efm32g/Doxyfile29
-rw-r--r--doc/efm32g/Doxyfile_latex32
-rw-r--r--doc/efm32g/DoxygenLayout_efm32g.xml197
-rw-r--r--doc/efm32g/header_efm32g.tex61
-rw-r--r--doc/efm32gg/Doxyfile29
-rw-r--r--doc/efm32gg/Doxyfile_latex32
-rw-r--r--doc/efm32gg/DoxygenLayout_efm32gg.xml197
-rw-r--r--doc/efm32gg/header_efm32gg.tex61
-rw-r--r--doc/efm32lg/Doxyfile29
-rw-r--r--doc/efm32lg/Doxyfile_latex32
-rw-r--r--doc/efm32lg/DoxygenLayout_efm32lg.xml197
-rw-r--r--doc/efm32lg/header_efm32lg.tex61
-rw-r--r--doc/efm32tg/Doxyfile29
-rw-r--r--doc/efm32tg/Doxyfile_latex32
-rw-r--r--doc/efm32tg/DoxygenLayout_efm32tg.xml (renamed from doc/stm32/DoxygenLayout_stm32.xml)5
-rw-r--r--doc/efm32tg/header_efm32tg.tex61
-rw-r--r--doc/lm3s/Doxyfile_latex1
-rw-r--r--doc/lm3s/DoxygenLayout_lm3s.xml6
-rw-r--r--doc/lpc13xx/Doxyfile_latex1
-rw-r--r--doc/lpc13xx/DoxygenLayout_lpc13xx.xml6
-rw-r--r--doc/lpc17xx/Doxyfile_latex1
-rw-r--r--doc/lpc17xx/DoxygenLayout_lpc17xx.xml6
-rw-r--r--doc/lpc43xx/Doxyfile_latex1
-rw-r--r--doc/lpc43xx/DoxygenLayout_lpc43xx.xml6
-rw-r--r--doc/stm32/Doxyfile30
-rw-r--r--doc/stm32f1/Doxyfile13
-rw-r--r--doc/stm32f1/Doxyfile_latex11
-rw-r--r--doc/stm32f1/DoxygenLayout_stm32f1.xml8
-rw-r--r--doc/stm32f2/Doxyfile12
-rw-r--r--doc/stm32f2/Doxyfile_latex12
-rw-r--r--doc/stm32f2/DoxygenLayout_stm32f2.xml6
-rw-r--r--doc/stm32f4/Doxyfile12
-rw-r--r--doc/stm32f4/Doxyfile_latex12
-rw-r--r--doc/stm32f4/DoxygenLayout_stm32f4.xml6
-rw-r--r--doc/stm32f4/header_stm32f4.tex2
-rw-r--r--doc/stm32l1/Doxyfile33
-rw-r--r--doc/stm32l1/Doxyfile_latex36
-rw-r--r--doc/stm32l1/DoxygenLayout_stm32l1.xml197
-rw-r--r--doc/stm32l1/header_stm32l1.tex61
-rw-r--r--examples/stm32/f1/Makefile.include21
-rw-r--r--examples/stm32/f1/lisa-m-1/can/README4
-rw-r--r--examples/stm32/f1/lisa-m-1/can/can.c16
-rw-r--r--examples/stm32/f1/lisa-m-2/adc_injec/Makefile1
-rw-r--r--examples/stm32/f1/lisa-m-2/adc_injec_timtrig/Makefile1
-rw-r--r--examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/Makefile1
-rw-r--r--examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/Makefile1
-rw-r--r--examples/stm32/f1/lisa-m-2/adc_regular/Makefile1
-rw-r--r--examples/stm32/f1/lisa-m-2/can/Makefile28
-rw-r--r--examples/stm32/f1/lisa-m-2/can/README4
-rw-r--r--examples/stm32/f1/lisa-m-2/can/can.c234
-rw-r--r--examples/stm32/f1/lisa-m-2/fancyblink/Makefile3
-rw-r--r--examples/stm32/f1/lisa-m-2/usart/Makefile3
-rw-r--r--examples/stm32/f1/lisa-m-2/usart_dma/Makefile3
-rw-r--r--examples/stm32/f1/lisa-m-2/usart_irq/Makefile3
-rw-r--r--examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile3
-rw-r--r--examples/stm32/f1/lisa-m-2/usart_printf/Makefile3
-rw-r--r--examples/stm32/f1/obldc-strip/can/Makefile25
-rw-r--r--examples/stm32/f1/obldc-strip/can/README4
-rw-r--r--examples/stm32/f1/obldc-strip/can/can.c202
-rw-r--r--examples/stm32/f1/obldc-strip/led/Makefile25
-rw-r--r--examples/stm32/f1/obldc-strip/led/led.c65
-rw-r--r--examples/stm32/f1/obldc-strip/obldc-strip.ld31
-rw-r--r--examples/stm32/f1/obldc-strip/systick/Makefile25
-rw-r--r--examples/stm32/f1/obldc-strip/systick/systick.c81
-rw-r--r--examples/stm32/f1/obldc-strip/usart/Makefile25
-rw-r--r--examples/stm32/f1/obldc-strip/usart/usart.c87
-rw-r--r--examples/stm32/f1/other/usb_dfu/usbdfu.c2
-rw-r--r--examples/stm32/l1/Makefile.include164
-rw-r--r--examples/stm32/l1/stm32l-discovery/button-irq-printf/Makefile24
-rw-r--r--examples/stm32/l1/stm32l-discovery/button-irq-printf/README3
-rw-r--r--examples/stm32/l1/stm32l-discovery/button-irq-printf/main.c117
-rw-r--r--examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h45
-rw-r--r--examples/stm32/l1/stm32l-discovery/miniblink/Makefile25
-rw-r--r--examples/stm32/l1/stm32l-discovery/miniblink/README9
-rw-r--r--examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c72
-rw-r--r--examples/stm32/l1/stm32l-discovery/usart/Makefile25
-rw-r--r--examples/stm32/l1/stm32l-discovery/usart/README12
-rw-r--r--examples/stm32/l1/stm32l-discovery/usart/usart.c80
-rw-r--r--include/libopencm3/cm3/nvic.h2
-rw-r--r--include/libopencm3/dispatch/nvic.h2
-rw-r--r--include/libopencm3/efm32/efm32g/doc-efm32g.h32
-rw-r--r--include/libopencm3/efm32/efm32gg/doc-efm32gg.h32
-rw-r--r--include/libopencm3/stm32/can.h30
-rw-r--r--include/libopencm3/stm32/common/gpio_common_all.h73
-rw-r--r--include/libopencm3/stm32/common/gpio_common_f24.h285
-rw-r--r--include/libopencm3/stm32/desig.h (renamed from include/libopencm3/stm32/f1/desig.h)9
-rw-r--r--include/libopencm3/stm32/f1/dma.h1
-rw-r--r--include/libopencm3/stm32/f1/gpio.h88
-rw-r--r--include/libopencm3/stm32/f1/rcc.h25
-rw-r--r--include/libopencm3/stm32/f2/gpio.h280
-rw-r--r--include/libopencm3/stm32/f4/gpio.h280
-rw-r--r--include/libopencm3/stm32/f4/syscfg.h46
-rw-r--r--include/libopencm3/stm32/gpio.h31
-rw-r--r--include/libopencm3/stm32/i2c.h20
-rw-r--r--include/libopencm3/stm32/l1/doc-stm32l1.h32
-rw-r--r--include/libopencm3/stm32/l1/gpio.h266
-rw-r--r--include/libopencm3/stm32/l1/irq.yaml49
-rw-r--r--include/libopencm3/stm32/l1/memorymap.h108
-rw-r--r--include/libopencm3/stm32/l1/rcc.h404
-rw-r--r--include/libopencm3/stm32/memorymap.h2
-rw-r--r--include/libopencm3/stm32/pwr.h2
-rw-r--r--include/libopencm3/stm32/syscfg.h (renamed from include/libopencm3/stm32/f2/syscfg.h)0
-rw-r--r--include/libopencm3/usb/usbd.h14
-rw-r--r--include/libopencm3/usb/usbstd.h3
-rw-r--r--lib/dispatch/vector_nvic.c2
-rw-r--r--lib/stm32/can.c172
-rw-r--r--lib/stm32/common/gpio_common_all.c139
-rw-r--r--lib/stm32/common/gpio_common_f24.c195
-rw-r--r--lib/stm32/desig.c (renamed from lib/stm32/f1/desig.c)24
-rw-r--r--lib/stm32/exti2.c (renamed from lib/stm32/f4/exti.c)20
-rw-r--r--lib/stm32/f1/Makefile5
-rw-r--r--lib/stm32/f1/adc.c114
-rw-r--r--lib/stm32/f1/dma.c11
-rw-r--r--lib/stm32/f1/gpio.c142
-rw-r--r--lib/stm32/f1/rcc.c167
-rw-r--r--lib/stm32/f1/rtc.c2
-rw-r--r--lib/stm32/f2/Makefile5
-rw-r--r--lib/stm32/f2/exti.c146
-rw-r--r--lib/stm32/f2/gpio.c134
-rw-r--r--lib/stm32/f4/Makefile7
-rw-r--r--lib/stm32/f4/gpio.c134
-rw-r--r--lib/stm32/i2c.c144
-rw-r--r--lib/stm32/l1/Makefile37
-rw-r--r--lib/stm32/l1/gpio.c28
-rw-r--r--lib/stm32/l1/libopencm3_stm32l1.ld83
-rw-r--r--lib/stm32/l1/rcc.c357
-rw-r--r--lib/stm32/l1/stm32l15xx8.ld31
-rw-r--r--lib/stm32/l1/stm32l15xxb.ld31
-rw-r--r--lib/stm32/usart.c2
-rw-r--r--lib/usb/usb.c3
-rw-r--r--lib/usb/usb_control.c5
-rw-r--r--lib/usb/usb_private.h1
-rw-r--r--lib/usb/usb_standard.c73
143 files changed, 6266 insertions, 1417 deletions
diff --git a/.gitignore b/.gitignore
index 8625d7d..d5d1fd4 100644
--- a/.gitignore
+++ b/.gitignore
@@ -16,4 +16,14 @@ lib/*.ld
html/
latex/
*.pdf
-
+# These are generated
+include/libopencm3/**/nvic.h
+include/libopencm3/**/**/nvic.h
+lib/**/vector_nvic.c
+lib/**/**/vector_nvic.c
+include/libopencmsis/efm32/
+include/libopencmsis/lm3s/
+include/libopencmsis/lpc13xx/
+include/libopencmsis/lpc17xx/
+include/libopencmsis/lpc43xx/
+include/libopencmsis/stm32/
diff --git a/HACKING_COMMON_DOC b/HACKING_COMMON_DOC
new file mode 100644
index 0000000..fa78271
--- /dev/null
+++ b/HACKING_COMMON_DOC
@@ -0,0 +1,62 @@
+Files for each peripheral (examples given for STM32 GPIO)
+---------------------------------------------------------
+
+In include/libopencm3/stm32.
+A "dispatch" header to point to the subfamily header (gpio.h)
+
+In include/libopencm3/stm32/f*
+A file with defines that are specific to the subfamily, and an include of
+needed common header files (gpio.h).
+
+In include/libopencm3/stm32/common
+A file with defines common to all subfamilies. Includes the cm3 common header
+(gpio_common_all.h).
+
+In include/libopencm3/stm32/common
+May be one other file with defines common to a subgroup of devices.
+This includes the file common to all (gpio_common_f24.h).
+
+In lib/stm32/f*
+A file with functions specific to the subfamily. Includes the "dispatch" header
+and any common headers needed (gpio.c).
+
+In lib/stm32/common
+Has functions common to all subfamilies. Includes the "dispatch" header
+(gpio_common_all.c).
+
+In lib/stm32/common
+May be one other file with functions common to a group of subfamilies. Includes
+the "dispatch" header and the file common to all (gpio_common_f24.h).
+
+Makefiles in lib/stm32/f? have the common object files added and the
+common directory added to VPATH.
+
+NOTE: The common source files MUST have the "dispatch" header so that
+compilation will use the specific defines for the subfamily being compiled.
+These can differ between subfamilies.
+
+Documentation
+-------------
+
+In include/libopencm3/stm32/f*
+A file doc-stm32f*.h contains a definition of the particular family grouping.
+This grouping will appear in the main index of the resulting document with all
+documentation under it.
+
+All header files for a peripheral (common or otherwise) will subgroup under a
+name which is the same in all families (such as gpio_defines). The peripheral
+header file in include/libopencm3/stm32/f* will then include this group as a
+subgroup under the specific family group. Doxygen is run separately for each
+family so there is no danger of accidentally including the wrong stuff.
+
+Similarly for the source files for a peripheral which will subgroup under a
+same name (such as gpio_files). The peripheral source file in lib/stm32/f*
+will include this as a subgroup under the specific family group.
+
+DOXYFILE for a particular family will list the family specific and common files
+(headers and source) that are to be included. The result (in the long run) will
+be that all peripherals will appear under the same family grouping in the
+documentation, even if they are identical over a number of families. That is
+probably most useful to end users who only need to see the documentation for
+one family.
+
diff --git a/Makefile b/Makefile
index 063d613..6b7cc83 100644
--- a/Makefile
+++ b/Makefile
@@ -19,14 +19,20 @@
PREFIX ?= arm-none-eabi
#PREFIX ?= arm-elf
+
+ifeq ($(DETECT_TOOLCHAIN),)
DESTDIR ?= /usr/local
+else
+DESTDIR ?= $(shell dirname $(shell readlink -f $(shell which $(PREFIX)-gcc)))/..
+endif
+
INCDIR = $(DESTDIR)/$(PREFIX)/include
LIBDIR = $(DESTDIR)/$(PREFIX)/lib
SHAREDIR = $(DESTDIR)/$(PREFIX)/share/libopencm3/scripts
INSTALL = install
SRCLIBDIR = $(shell pwd)/lib
-TARGETS = stm32/f1 stm32/f2 stm32/f4 lpc13xx lpc17xx lpc43xx lm3s efm32/efm32tg efm32/efm32g efm32/efm32lg efm32/efm32gg
+TARGETS = stm32/f1 stm32/f2 stm32/f4 stm32/l1 lpc13xx lpc17xx lpc43xx lm3s efm32/efm32tg efm32/efm32g efm32/efm32lg efm32/efm32gg
# Be silent per default, but 'make V=1' will show all compiler calls.
ifneq ($(V),1)
@@ -84,7 +90,7 @@ install: lib
$(Q)$(INSTALL) -m 0644 scripts/* $(SHAREDIR)
doc:
- $(Q)$(MAKE) -C doc doc
+ $(Q)$(MAKE) -C doc html
# Bleh http://www.makelinux.net/make3/make3-CHP-6-SECT-1#make3-CHP-6-SECT-1
clean: cleanheaders
diff --git a/README b/README
index 488da0f..5d3e064 100644
--- a/README
+++ b/README
@@ -48,7 +48,8 @@ Example projects
The library ships with a few small example projects which illustrate how
individual subsystems of the microcontrollers can be configured and used with
-libopencm3.
+libopencm3. The makefiles are generally useable for your own projects with
+only minimal changes for the libopencm3 install path (See Installation)
For flashing the 'miniblink' example (after you built libopencm3 and the
examples by typing 'make' at the top-level directory) onto the Olimex
@@ -79,16 +80,23 @@ Installation
$ make install
-This will install the library in /usr/local. If you want to install it
-elsewhere, use the following syntax:
+This will install the library into /usr/local. (permissions permitting)
- $ DESTDIR=/opt make install
+If you want to install it elsewhere, use the following syntax:
-The recommended location is to install into your toolchain directory, e.g.
-/home/someuser/sat for a toolchain built using the summon-arm-toolchain
-script from https://github.com/esden/summon-arm-toolchain.
+ $ make DESTDIR=/opt/libopencm3 install
- $ DESTDIR=~/sat make install
+If you want to attempt to install into your toolchain, use this:
+
+ $ make DETECT_TOOLCHAIN=1 install
+
+Note: If you install this into your toolchain, you don't need to pass
+any extra -L or -I flags into your projects. However, this also means
+you must NOT pass any -L or -I flags that point into the toolchain. This
+_will_ confuse the linker. (ie, for summon-arm-toolchain, do NOT pass
+-L/home/user/sat/lib) Common symptoms of confusing
+the linker are hard faults caused by branches into arm code.
+You can use objdump to check for this in your final elf.
Coding style and development guidelines
diff --git a/doc/Doxyfile_common b/doc/Doxyfile_common
index 8182f1f..e611451 100644
--- a/doc/Doxyfile_common
+++ b/doc/Doxyfile_common
@@ -536,7 +536,7 @@ GENERATE_BUGLIST = YES
# disable (NO) the deprecated list. This list is created by putting
# \deprecated commands in the documentation.
-GENERATE_DEPRECATEDLIST= YES
+GENERATE_DEPRECATEDLIST= NO
# The ENABLED_SECTIONS tag can be used to enable conditional
# documentation sections, marked by \if sectionname ... \endif.
diff --git a/doc/DoxygenLayout.xml b/doc/DoxygenLayout.xml
index b958d14..b97c54d 100644
--- a/doc/DoxygenLayout.xml
+++ b/doc/DoxygenLayout.xml
@@ -5,14 +5,18 @@
<tab type="pages" visible="yes" title="General Information" intro=""/>
<tab type="user" visible="yes" url="../html/index.html" title="Top Level" intro=""/>
<tab type="user" visible="yes" url="../cm3/html/modules.html" title="CM3 Core" intro=""/>
- <tab type="user" visible="yes" url="../stm32/html/modules.html" title="STM32 Common" intro=""/>
<tab type="user" visible="yes" url="../stm32f1/html/modules.html" title="STM32F1" intro=""/>
<tab type="user" visible="yes" url="../stm32f2/html/modules.html" title="STM32F2" intro=""/>
<tab type="user" visible="yes" url="../stm32f4/html/modules.html" title="STM32F4" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32l1/html/modules.html" title="STM32L1" intro=""/>
<tab type="user" visible="yes" url="../lm3s/html/modules.html" title="LM3S" intro=""/>
<tab type="user" visible="yes" url="../lpc13xx/html/modules.html" title="LPC13" intro=""/>
<tab type="user" visible="yes" url="../lpc17xx/html/modules.html" title="LPC17" intro=""/>
<tab type="user" visible="yes" url="../lpc43xx/html/modules.html" title="LPC43" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32g/html/modules.html" title="EMF32 Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32gg/html/modules.html" title="EMF32 Giant Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32lg/html/modules.html" title="EMF32 Leopard Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32tg/html/modules.html" title="EMF32 Tiny Gecko" intro=""/>
<tab type="namespaces" visible="yes" title="">
<tab type="namespaces" visible="yes" title="" intro=""/>
<tab type="namespacemembers" visible="yes" title="" intro=""/>
diff --git a/doc/HACKING b/doc/HACKING
new file mode 100644
index 0000000..07fb872
--- /dev/null
+++ b/doc/HACKING
@@ -0,0 +1,89 @@
+libopencm3 Documentation
+12 October 2012 (C) K Sarkies
+-----------------------------
+
+Each family and subfamily of devices has a separate directory and configuration
+files. Doxygen is run independently on each of these and the result is
+integrated under a single HTML page. LaTeX and pdf files are produced
+separately. Due to relative referencing used in the files, the directory
+structure is important and should be maintained.
+
+Each of the subdirectories has a configuration file, a layout file and
+subdirectories for the documentation. Doxygen is intended to be run inside
+these subdirectories. The Makefile will handle this in the appropriate
+order. Tag files are generated and used by other doxygen runs to resolve links.
+
+Tagfiles
+--------
+
+Tagfiles contain all information about the document, and are used to resolve
+references in other documents. The groups defined in these external documents
+are not shown when EXTERNAL_GROUPS = NO. The high level tagfiles must be
+generated before any others so order is important.
+
+As well as the processor families, a "cm3" subdirectory is used to generate
+a tagfile to integrate the CM3 common core defines.
+
+Markup
+------
+
+Each family has been given a group name that will allow subgrouping of API
+functions and defines in the documentation.
+
+The header and source files for each family must have a heading section
+in which an @defgroup defines the group names. For a peripheral xxx the
+header will have a group name xxx_defines and the source file will have
+xxx_file. This will allow the group to appear separately. An @ingroup must
+be provided to place the group as a subgroup of the appropriate family
+grouping. Note that @file is not used.
+
+Common header and source files must have an @addgroup to include its
+documentation into the appropriate peripheral group. These must not have any
+reference to family groupings to allow them to be incorporated into multiple
+family groups.
+
+Each function must have a header with an @brief, and where appropriate
+@parameter and @return elements. These must describe the allowable parameter
+ranges preferably with reference to a suitable define.
+
+The Doxyfile for a family must include input files from the header and source
+subdirectories, as well as all needed common files. The common files can be
+added separately or as an entire directory with exclusions of inappropriate
+files.
+
+Doxyfiles
+---------
+
+Doxyfile_common holds global settings.
+
+OUTPUT_DIRECTORY blank so that the output is placed in the current directory.
+RECURSIVE = NO
+EXTERNAL_GROUPS = NO
+
+Each Doxyfile_include for a processor family has:
+
+@INCLUDE = ../Doxyfile_common
+INPUT = specific directories needed, including /include/libopencm3/cm3
+ in top directory to set the top level page and GNU license.
+LAYOUT_FILE = DoxygenLayout_$processor.xml
+WARN_LOGFILE = doxygen_$processor.log
+TAGFILES = ../cm3/cm3.tag=../../cm3/html
+GENERATE_TAGFILE = $processor.tag
+
+For the top level Doxyfile
+
+INPUT = ../include/libopencm3/docmain.dox to add in the main page text
+LAYOUT_FILE = DoxygenLayout.xml
+WARN_LOGFILE = doxygen.log
+TAGFILES = cm3/cm3.tag=../cm3/html plus all families to be included.
+
+Generation of PDF
+-----------------
+
+The needs for pdf documents differ from HTML so separate Doxyfile_latex
+files are provided.
+
+@INCLUDE = ../Doxyfile_common
+GENERATE_LATEX = YES
+GENERATE_HTML = NO
+
diff --git a/doc/Makefile b/doc/Makefile
index ff36677..a9b4438 100644
--- a/doc/Makefile
+++ b/doc/Makefile
@@ -5,7 +5,7 @@
doc: html latex
-html: cm3 stm32 stm32f1 stm32f2 stm32f4 lm3s lpc13 lpc17 lpc43 top
+html: cm3 stm32l1 stm32f1 stm32f2 stm32f4 efm32g efm32gg efm32lg efm32tg lm3s lpc13 lpc17 lpc43 top
cm3:
cd cm3/; doxygen
@@ -13,6 +13,18 @@ cm3:
lm3s:
cd lm3s/; doxygen
+efm32g:
+ cd efm32g/; doxygen
+
+efm32gg:
+ cd efm32gg/; doxygen
+
+efm32lg:
+ cd efm32lg/; doxygen
+
+efm32tg:
+ cd efm32tg/; doxygen
+
lpc13:
cd lpc13xx/; doxygen
@@ -22,9 +34,6 @@ lpc17:
lpc43:
cd lpc43xx/; doxygen
-stm32:
- cd stm32/; doxygen
-
stm32f1:
cd stm32f1/; doxygen
@@ -34,10 +43,16 @@ stm32f2:
stm32f4:
cd stm32f4/; doxygen
+stm32l1:
+ cd stm32l1/; doxygen
+
top:
doxygen
-latex: stm32f1.pdf stm32f2.pdf stm32f4.pdf lm3s.pdf lpc13.pdf lpc17.pdf lpc43.pdf
+latex: stm32l1.pdf stm32f1.pdf stm32f2.pdf stm32f4.pdf lm3s.pdf lpc13.pdf lpc17.pdf lpc43.pdf efm32g.pdf efm32gg.pdf efm32lg.pdf efm32tg.pdf
+
+stm32l1.pdf:
+ cd stm32l1/; doxygen Doxyfile_latex; cd latex/; $(MAKE); cp refman.pdf ../../stm32l1.pdf
stm32f1.pdf:
cd stm32f1/; doxygen Doxyfile_latex; cd latex/; $(MAKE); cp refman.pdf ../../stm32f1.pdf
@@ -60,8 +75,20 @@ lpc17.pdf:
lpc43.pdf:
cd lpc43xx/; doxygen Doxyfile_latex; cd latex/; $(MAKE); cp refman.pdf ../../lpc43.pdf
+efm32g.pdf:
+ cd efm32g/; doxygen Doxyfile_latex; cd latex/; $(MAKE); cp refman.pdf ../../efm32g.pdf
+
+efm32gg.pdf:
+ cd efm32gg/; doxygen Doxyfile_latex; cd latex/; $(MAKE); cp refman.pdf ../../efm32gg.pdf
+
+efm32lg.pdf:
+ cd efm32lg/; doxygen Doxyfile_latex; cd latex/; $(MAKE); cp refman.pdf ../../efm32lg.pdf
+
+efm32tg.pdf:
+ cd efm32tg/; doxygen Doxyfile_latex; cd latex/; $(MAKE); cp refman.pdf ../../efm32tg.pdf
+
clean:
@rm -rf html/ */html/ */latex/ *.pdf */*.tag
-.PHONY: doc html cm3 lm3s lpc13 lpc17 lpc43 stm32 stm32f1 stm32f2 stm32f4 top latex
+.PHONY: doc html cm3 lm3s lpc13 lpc17 lpc43 stm32l1 stm32f1 stm32f2 stm32f4 efm32g efm32gg efm32lg efm32tg top latex
diff --git a/doc/README b/doc/README
index 81d8262..947564c 100644
--- a/doc/README
+++ b/doc/README
@@ -1,68 +1,27 @@
libopencm3 Documentation
14 September 2012 (C) K Sarkies
-------------------------
+-------------------------------
-To generate documentation run 'make doc' in the doc directory. This
-runs doxygen for each of the processor families then integrates the whole.
+To generate all documentation run 'make doc' in the doc directory, or
+for html documentation only run 'make html' (much faster). This runs doxygen
+for each of the processor families then integrates the whole.
+
+Alternatively run 'make doc' in the top directory to make html documentation.
+LaTeX and pdf documentation is currently very large in size.
This requires doxygen v 1.8.2 or later.
-HTML, LaTeX, and pdf output is produced.
+HTML, LaTeX, and pdf output can be produced.
Generation of HTML
------------------
-To view HTML, point a browser to doc/html/index.html.
-
-The directory structure is important and should be maintained.
-Each of the subdirectories has a configuration file, a layout file and
-subdirectories for the documentation. Doxygen is intended to be run inside
-these subdirectories. The Makefile will handle this in the appropriate
-order. Tag files are generated and used by other doxygen runs to resolve links.
-
-Tagfiles contain all information about the document, and are used to resolve
-references in other documents. The groups defined in these external documents
-are not shown when EXTERNAL_GROUPS = NO. The high level tagfiles must be generated
-before any others.
-
-As well as the processor families, a "cm3" subdirectory is used to generate
-a tagfile to integrate the CM3 common core defines.
-
-Doxyfile_common holds global settings.
-
-OUTPUT_DIRECTORY blank so that the output is placed in the current directory.
-RECURSIVE = NO
-EXTERNAL_GROUPS = NO
-
-Each Doxyfile_include for a processor family has:
-
-@INCLUDE = ../Doxyfile_common
-INPUT = specific directories needed, including /include/libopencm3/cm3
- in top directory to set the top level page and GNU license.
-LAYOUT_FILE = DoxygenLayout_$processor.xml
-WARN_LOGFILE = doxygen_$processor.log
-TAGFILES = ../cm3/cm3.tag=../../cm3/html
-GENERATE_TAGFILE = $processor.tag
-
-For the STM32 subfamilies, to include the common files references, add
-TAGFILES += ../stm32/stm32.tag=../../stm32/html
-
-For the top level Doxyfile
-
-INPUT = ../include/libopencm3/docmain.dox to add in the main page text
-LAYOUT_FILE = DoxygenLayout.xml
-WARN_LOGFILE = doxygen.log
-TAGFILES = cm3/cm3.tag=../cm3/html plus all families to be included.
+To view HTML, point a browser to libopencm3/doc/html/index.html.
Generation of PDF
-----------------
-The pdf is generated via LaTeX. The needs for the documents differ from HTML
-so separate Doxyfile_latex are provided. The pdf files are placed in the
+The pdf is generated via LaTeX. The pdf files are placed in the
doc directory. Each file contains all documentation for the core and common
-features.
-
-@INCLUDE = ../Doxyfile_common
-GENERATE_LATEX = YES
-GENERATE_HTML = NO
+features. The resulting files are huge.
diff --git a/doc/cm3/DoxygenLayout_cm3.xml b/doc/cm3/DoxygenLayout_cm3.xml
index 462a24b..275846e 100644
--- a/doc/cm3/DoxygenLayout_cm3.xml
+++ b/doc/cm3/DoxygenLayout_cm3.xml
@@ -8,10 +8,15 @@
<tab type="user" visible="yes" url="../../stm32f1/html/modules.html" title="STM32F1" intro=""/>
<tab type="user" visible="yes" url="../../stm32f2/html/modules.html" title="STM32F2" intro=""/>
<tab type="user" visible="yes" url="../../stm32f4/html/modules.html" title="STM32F4" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32l1/html/modules.html" title="STM32L1" intro=""/>
<tab type="user" visible="yes" url="../../lm3s/html/modules.html" title="LM3S" intro=""/>
<tab type="user" visible="yes" url="../../lpc13xx/html/modules.html" title="LPC13" intro=""/>
<tab type="user" visible="yes" url="../../lpc17xx/html/modules.html" title="LPC17" intro=""/>
<tab type="user" visible="yes" url="../../lpc43xx/html/modules.html" title="LPC43" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32g/html/modules.html" title="EMF32 Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32gg/html/modules.html" title="EMF32 Giant Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32lg/html/modules.html" title="EMF32 Leopard Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32tg/html/modules.html" title="EMF32 Tiny Gecko" intro=""/>
<tab type="namespaces" visible="yes" title="">
<tab type="namespaces" visible="yes" title="" intro=""/>
<tab type="namespacemembers" visible="yes" title="" intro=""/>
diff --git a/doc/efm32g/Doxyfile b/doc/efm32g/Doxyfile
new file mode 100644
index 0000000..c80eaa2
--- /dev/null
+++ b/doc/efm32g/Doxyfile
@@ -0,0 +1,29 @@
+# HTML Documentation for efm32 code level
+
+# 11 November 2012
+# (C) Ken Sarkies <ksarkies@internode.on.net>
+
+#---------------------------------------------------------------------------
+# Common Include File
+#---------------------------------------------------------------------------
+
+@INCLUDE = ../Doxyfile_common
+
+#---------------------------------------------------------------------------
+# Local settings
+#---------------------------------------------------------------------------
+
+WARN_LOGFILE = doxygen_efm32g.log
+
+INPUT = ../../include/libopencm3/license.dox \
+ ../../include/libopencm3/efm32/efm32g \
+ ../../lib/efm32/efm32g
+
+EXCLUDE =
+
+LAYOUT_FILE = DoxygenLayout_efm32g.xml
+
+TAGFILES = ../cm3/cm3.tag=../../cm3/html \
+
+GENERATE_TAGFILE = efm32g.tag
+
diff --git a/doc/efm32g/Doxyfile_latex b/doc/efm32g/Doxyfile_latex
new file mode 100644
index 0000000..47373f0
--- /dev/null
+++ b/doc/efm32g/Doxyfile_latex
@@ -0,0 +1,32 @@
+# LaTeX Documentation for efm32 code level
+
+# 12 November 2012
+# (C) Ken Sarkies <ksarkies@internode.on.net>
+
+#---------------------------------------------------------------------------
+# Common Include File
+#---------------------------------------------------------------------------
+
+@INCLUDE = ../Doxyfile_common
+
+#---------------------------------------------------------------------------
+# Local settings
+#---------------------------------------------------------------------------
+
+WARN_LOGFILE = doxygen_efm32g_latex.log
+
+INPUT = ../../include/libopencm3/docmain.dox \
+ ../../include/libopencm3/license.dox \
+ ../../include/libopencm3/efm32/efm32g \
+ ../../lib/efm32/efm32g
+
+EXCLUDE = ../../include/libopencm3/efm32/doc-efm32g.h
+
+LAYOUT_FILE = DoxygenLayout_efm32g.xml
+
+GENERATE_HTML = NO
+
+GENERATE_LATEX = YES
+
+LATEX_HEADER = header_efm32g.tex
+
diff --git a/doc/efm32g/DoxygenLayout_efm32g.xml b/doc/efm32g/DoxygenLayout_efm32g.xml
new file mode 100644
index 0000000..32a668d
--- /dev/null
+++ b/doc/efm32g/DoxygenLayout_efm32g.xml
@@ -0,0 +1,197 @@
+<doxygenlayout version="1.0">
+ <!-- Navigation index tabs for HTML output -->
+ <navindex>
+ <tab type="mainpage" visible="yes" title="libopencm3"/>
+ <tab type="pages" visible="yes" title="General Information" intro=""/>
+ <tab type="user" visible="yes" url="../../html/index.html" title="Back to Top" intro=""/>
+ <tab type="user" visible="yes" url="../../cm3/html/modules.html" title="CM3 Core" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32f1/html/modules.html" title="STM32F1" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32f2/html/modules.html" title="STM32F2" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32f4/html/modules.html" title="STM32F4" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32l1/html/modules.html" title="STM32L1" intro=""/>
+ <tab type="user" visible="yes" url="../../lm3s/html/modules.html" title="LM3S" intro=""/>
+ <tab type="user" visible="yes" url="../../lpc13xx/html/modules.html" title="LPC13" intro=""/>
+ <tab type="user" visible="yes" url="../../lpc17xx/html/modules.html" title="LPC17" intro=""/>
+ <tab type="user" visible="yes" url="../../lpc43xx/html/modules.html" title="LPC43" intro=""/>
+ <tab type="modules" visible="yes" title="EFM32 Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32gg/html/modules.html" title="EMF32 Giant Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32lg/html/modules.html" title="EMF32 Leopard Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32tg/html/modules.html" title="EMF32 Tiny Gecko" intro=""/>
+ <tab type="namespaces" visible="yes" title="">
+ <tab type="namespaces" visible="yes" title="" intro=""/>
+ <tab type="namespacemembers" visible="yes" title="" intro=""/>
+ </tab>
+ <tab type="classes" visible="yes" title="">
+ <tab type="classes" visible="yes" title="" intro=""/>
+ <tab type="classindex" visible="$ALPHABETICAL_INDEX" title=""/>
+ <tab type="hierarchy" visible="yes" title="" intro=""/>
+ <tab type="classmembers" visible="yes" title="" intro=""/>
+ </tab>
+ <tab type="files" visible="yes" title="">
+ <tab type="files" visible="yes" title="" intro=""/>
+ <tab type="globals" visible="yes" title="" intro=""/>
+ </tab>
+ <tab type="examples" visible="yes" title="" intro=""/>
+ </navindex>
+
+ <!-- Layout definition for a class page -->
+ <class>
+ <briefdescription visible="yes"/>
+ <includes visible="$SHOW_INCLUDE_FILES"/>
+ <inheritancegraph visible="$CLASS_GRAPH"/>
+ <collaborationgraph visible="$COLLABORATION_GRAPH"/>
+ <allmemberslink visible="yes"/>
+ <memberdecl>
+ <nestedclasses visible="yes" title=""/>
+ <publictypes title=""/>
+ <publicslots title=""/>
+ <signals title=""/>
+ <publicmethods title=""/>
+ <publicstaticmethods title=""/>
+ <publicattributes title=""/>
+ <publicstaticattributes title=""/>
+ <protectedtypes title=""/>
+ <protectedslots title=""/>
+ <protectedmethods title=""/>
+ <protectedstaticmethods title=""/>
+ <protectedattributes title=""/>
+ <protectedstaticattributes title=""/>
+ <packagetypes title=""/>
+ <packagemethods title=""/>
+ <packagestaticmethods title=""/>
+ <packageattributes title=""/>
+ <packagestaticattributes title=""/>
+ <properties title=""/>
+ <events title=""/>
+ <privatetypes title=""/>
+ <privateslots title=""/>
+ <privatemethods title=""/>
+ <privatestaticmethods title=""/>
+ <privateattributes title=""/>
+ <privatestaticattributes title=""/>
+ <friends title=""/>
+ <related title="" subtitle=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <typedefs title=""/>
+ <enums title=""/>
+ <constructors title=""/>
+ <functions title=""/>
+ <related title=""/>
+ <variables title=""/>
+ <properties title=""/>
+ <events title=""/>
+ </memberdef>
+ <usedfiles visible="$SHOW_USED_FILES"/>
+ <authorsection visible="yes"/>
+ </class>
+
+ <!-- Layout definition for a namespace page -->
+ <namespace>
+ <briefdescription visible="yes"/>
+ <memberdecl>
+ <nestednamespaces visible="yes" title=""/>
+ <classes visible="yes" title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ </memberdef>
+ <authorsection visible="yes"/>
+ </namespace>
+
+ <!-- Layout definition for a file page -->
+ <file>
+ <briefdescription visible="yes"/>
+ <includes visible="$SHOW_INCLUDE_FILES"/>
+ <includegraph visible="$INCLUDE_GRAPH"/>
+ <includedbygraph visible="$INCLUDED_BY_GRAPH"/>
+ <sourcelink visible="yes"/>
+ <memberdecl>
+ <classes visible="yes" title=""/>
+ <namespaces visible="yes" title=""/>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ </memberdef>
+ <authorsection/>
+ </file>
+
+ <!-- Layout definition for a group page -->
+ <group>
+ <briefdescription visible="yes"/>
+ <groupgraph visible="$GROUP_GRAPHS"/>
+ <memberdecl>
+ <classes visible="yes" title=""/>
+ <namespaces visible="yes" title=""/>
+ <dirs visible="yes" title=""/>
+ <nestedgroups visible="yes" title=""/>
+ <files visible="yes" title=""/>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <enumvalues title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <signals title=""/>
+ <publicslots title=""/>
+ <protectedslots title=""/>
+ <privateslots title=""/>
+ <events title=""/>
+ <properties title=""/>
+ <friends title=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <pagedocs/>
+ <inlineclasses title=""/>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <enumvalues title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <signals title=""/>
+ <publicslots title=""/>
+ <protectedslots title=""/>
+ <privateslots title=""/>
+ <events title=""/>
+ <properties title=""/>
+ <friends title=""/>
+ </memberdef>
+ <authorsection visible="yes"/>
+ </group>
+
+ <!-- Layout definition for a directory page -->
+ <directory>
+ <briefdescription visible="yes"/>
+ <directorygraph visible="yes"/>
+ <memberdecl>
+ <dirs visible="yes"/>
+ <files visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ </directory>
+</doxygenlayout>
diff --git a/doc/efm32g/header_efm32g.tex b/doc/efm32g/header_efm32g.tex
new file mode 100644
index 0000000..43a3ea6
--- /dev/null
+++ b/doc/efm32g/header_efm32g.tex
@@ -0,0 +1,61 @@
+\documentclass{book}
+\usepackage[a4paper,top=2.5cm,bottom=2.5cm,left=2.5cm,right=2.5cm]{geometry}
+\usepackage{makeidx}
+\usepackage{natbib}
+\usepackage{graphicx}
+\usepackage{multicol}
+\usepackage{float}
+\usepackage{listings}
+\usepackage{color}
+\usepackage{ifthen}
+\usepackage[table]{xcolor}
+\usepackage{textcomp}
+\usepackage{alltt}
+\usepackage{ifpdf}
+\ifpdf
+\usepackage[pdftex,
+ pagebackref=true,
+ colorlinks=true,
+ linkcolor=blue,
+ unicode
+ ]{hyperref}
+\else
+\usepackage[ps2pdf,
+ pagebackref=true,
+ colorlinks=true,
+ linkcolor=blue,
+ unicode
+ ]{hyperref}
+\usepackage{pspicture}
+\fi
+\usepackage[utf8]{inputenc}
+\usepackage{mathptmx}
+\usepackage[scaled=.90]{helvet}
+\usepackage{courier}
+\usepackage{sectsty}
+\usepackage{amssymb}
+\usepackage[titles]{tocloft}
+\usepackage{doxygen}
+\lstset{language=C++,inputencoding=utf8,basicstyle=\footnotesize,breaklines=true,breakatwhitespace=true,tabsize=4,numbers=left }
+\makeindex
+\setcounter{tocdepth}{3}
+\renewcommand{\footrulewidth}{0.4pt}
+\renewcommand{\familydefault}{\sfdefault}
+\hfuzz=15pt
+\setlength{\emergencystretch}{15pt}
+\hbadness=750
+\tolerance=750
+\begin{document}
+\hypersetup{pageanchor=false,citecolor=blue}
+\begin{titlepage}
+\vspace*{7cm}
+\begin{center}
+{\Huge libopencm3: API Reference\\ EFM32 Gecko ARM Cortex M3 Series}\\
+\vspace*{1cm}
+{\large Generated by Doxygen 1.8.2}\\
+\vspace*{0.5cm}
+{\small Thu Sep 13 2012 23:26:45}\\
+\end{center}
+\end{titlepage}
+\pagenumbering{arabic}
+\hypersetup{pageanchor=true,citecolor=blue}
diff --git a/doc/efm32gg/Doxyfile b/doc/efm32gg/Doxyfile
new file mode 100644
index 0000000..210d75d
--- /dev/null
+++ b/doc/efm32gg/Doxyfile
@@ -0,0 +1,29 @@
+# HTML Documentation for efm32 code level
+
+# 11 November 2012
+# (C) Ken Sarkies <ksarkies@internode.on.net>
+
+#---------------------------------------------------------------------------
+# Common Include File
+#---------------------------------------------------------------------------
+
+@INCLUDE = ../Doxyfile_common
+
+#---------------------------------------------------------------------------
+# Local settings
+#---------------------------------------------------------------------------
+
+WARN_LOGFILE = doxygen_efm32gg.log
+
+INPUT = ../../include/libopencm3/license.dox \
+ ../../include/libopencm3/efm32/efm32gg \
+ ../../lib/efm32/efm32gg
+
+EXCLUDE =
+
+LAYOUT_FILE = DoxygenLayout_efm32gg.xml
+
+TAGFILES = ../cm3/cm3.tag=../../cm3/html \
+
+GENERATE_TAGFILE = efm32gg.tag
+
diff --git a/doc/efm32gg/Doxyfile_latex b/doc/efm32gg/Doxyfile_latex
new file mode 100644
index 0000000..2f1f8fd
--- /dev/null
+++ b/doc/efm32gg/Doxyfile_latex
@@ -0,0 +1,32 @@
+# LaTeX Documentation for efm32 code level
+
+# 12 November 2012
+# (C) Ken Sarkies <ksarkies@internode.on.net>
+
+#---------------------------------------------------------------------------
+# Common Include File
+#---------------------------------------------------------------------------
+
+@INCLUDE = ../Doxyfile_common
+
+#---------------------------------------------------------------------------
+# Local settings
+#---------------------------------------------------------------------------
+
+WARN_LOGFILE = doxygen_efm32gg_latex.log
+
+INPUT = ../../include/libopencm3/docmain.dox \
+ ../../include/libopencm3/license.dox \
+ ../../include/libopencm3/efm32/efm32gg \
+ ../../lib/efm32/efm32gg
+
+EXCLUDE = ../../include/libopencm3/efm32/doc-efm32gg.h
+
+LAYOUT_FILE = DoxygenLayout_efm32gg.xml
+
+GENERATE_HTML = NO
+
+GENERATE_LATEX = YES
+
+LATEX_HEADER = header_efm32gg.tex
+
diff --git a/doc/efm32gg/DoxygenLayout_efm32gg.xml b/doc/efm32gg/DoxygenLayout_efm32gg.xml
new file mode 100644
index 0000000..09b3743
--- /dev/null
+++ b/doc/efm32gg/DoxygenLayout_efm32gg.xml
@@ -0,0 +1,197 @@
+<doxygenlayout version="1.0">
+ <!-- Navigation index tabs for HTML output -->
+ <navindex>
+ <tab type="mainpage" visible="yes" title="libopencm3"/>
+ <tab type="pages" visible="yes" title="General Information" intro=""/>
+ <tab type="user" visible="yes" url="../../html/index.html" title="Back to Top" intro=""/>
+ <tab type="user" visible="yes" url="../../cm3/html/modules.html" title="CM3 Core" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32f1/html/modules.html" title="STM32F1" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32f2/html/modules.html" title="STM32F2" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32f4/html/modules.html" title="STM32F4" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32l1/html/modules.html" title="STM32L1" intro=""/>
+ <tab type="user" visible="yes" url="../../lm3s/html/modules.html" title="LM3S" intro=""/>
+ <tab type="user" visible="yes" url="../../lpc13xx/html/modules.html" title="LPC13" intro=""/>
+ <tab type="user" visible="yes" url="../../lpc17xx/html/modules.html" title="LPC17" intro=""/>
+ <tab type="user" visible="yes" url="../../lpc43xx/html/modules.html" title="LPC43" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32g/html/modules.html" title="EMF32 Gecko" intro=""/>
+ <tab type="modules" visible="yes" title="EFM32 Giant Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32lg/html/modules.html" title="EMF32 Leopard Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32tg/html/modules.html" title="EMF32 Tiny Gecko" intro=""/>
+ <tab type="namespaces" visible="yes" title="">
+ <tab type="namespaces" visible="yes" title="" intro=""/>
+ <tab type="namespacemembers" visible="yes" title="" intro=""/>
+ </tab>
+ <tab type="classes" visible="yes" title="">
+ <tab type="classes" visible="yes" title="" intro=""/>
+ <tab type="classindex" visible="$ALPHABETICAL_INDEX" title=""/>
+ <tab type="hierarchy" visible="yes" title="" intro=""/>
+ <tab type="classmembers" visible="yes" title="" intro=""/>
+ </tab>
+ <tab type="files" visible="yes" title="">
+ <tab type="files" visible="yes" title="" intro=""/>
+ <tab type="globals" visible="yes" title="" intro=""/>
+ </tab>
+ <tab type="examples" visible="yes" title="" intro=""/>
+ </navindex>
+
+ <!-- Layout definition for a class page -->
+ <class>
+ <briefdescription visible="yes"/>
+ <includes visible="$SHOW_INCLUDE_FILES"/>
+ <inheritancegraph visible="$CLASS_GRAPH"/>
+ <collaborationgraph visible="$COLLABORATION_GRAPH"/>
+ <allmemberslink visible="yes"/>
+ <memberdecl>
+ <nestedclasses visible="yes" title=""/>
+ <publictypes title=""/>
+ <publicslots title=""/>
+ <signals title=""/>
+ <publicmethods title=""/>
+ <publicstaticmethods title=""/>
+ <publicattributes title=""/>
+ <publicstaticattributes title=""/>
+ <protectedtypes title=""/>
+ <protectedslots title=""/>
+ <protectedmethods title=""/>
+ <protectedstaticmethods title=""/>
+ <protectedattributes title=""/>
+ <protectedstaticattributes title=""/>
+ <packagetypes title=""/>
+ <packagemethods title=""/>
+ <packagestaticmethods title=""/>
+ <packageattributes title=""/>
+ <packagestaticattributes title=""/>
+ <properties title=""/>
+ <events title=""/>
+ <privatetypes title=""/>
+ <privateslots title=""/>
+ <privatemethods title=""/>
+ <privatestaticmethods title=""/>
+ <privateattributes title=""/>
+ <privatestaticattributes title=""/>
+ <friends title=""/>
+ <related title="" subtitle=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <typedefs title=""/>
+ <enums title=""/>
+ <constructors title=""/>
+ <functions title=""/>
+ <related title=""/>
+ <variables title=""/>
+ <properties title=""/>
+ <events title=""/>
+ </memberdef>
+ <usedfiles visible="$SHOW_USED_FILES"/>
+ <authorsection visible="yes"/>
+ </class>
+
+ <!-- Layout definition for a namespace page -->
+ <namespace>
+ <briefdescription visible="yes"/>
+ <memberdecl>
+ <nestednamespaces visible="yes" title=""/>
+ <classes visible="yes" title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ </memberdef>
+ <authorsection visible="yes"/>
+ </namespace>
+
+ <!-- Layout definition for a file page -->
+ <file>
+ <briefdescription visible="yes"/>
+ <includes visible="$SHOW_INCLUDE_FILES"/>
+ <includegraph visible="$INCLUDE_GRAPH"/>
+ <includedbygraph visible="$INCLUDED_BY_GRAPH"/>
+ <sourcelink visible="yes"/>
+ <memberdecl>
+ <classes visible="yes" title=""/>
+ <namespaces visible="yes" title=""/>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ </memberdef>
+ <authorsection/>
+ </file>
+
+ <!-- Layout definition for a group page -->
+ <group>
+ <briefdescription visible="yes"/>
+ <groupgraph visible="$GROUP_GRAPHS"/>
+ <memberdecl>
+ <classes visible="yes" title=""/>
+ <namespaces visible="yes" title=""/>
+ <dirs visible="yes" title=""/>
+ <nestedgroups visible="yes" title=""/>
+ <files visible="yes" title=""/>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <enumvalues title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <signals title=""/>
+ <publicslots title=""/>
+ <protectedslots title=""/>
+ <privateslots title=""/>
+ <events title=""/>
+ <properties title=""/>
+ <friends title=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <pagedocs/>
+ <inlineclasses title=""/>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <enumvalues title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <signals title=""/>
+ <publicslots title=""/>
+ <protectedslots title=""/>
+ <privateslots title=""/>
+ <events title=""/>
+ <properties title=""/>
+ <friends title=""/>
+ </memberdef>
+ <authorsection visible="yes"/>
+ </group>
+
+ <!-- Layout definition for a directory page -->
+ <directory>
+ <briefdescription visible="yes"/>
+ <directorygraph visible="yes"/>
+ <memberdecl>
+ <dirs visible="yes"/>
+ <files visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ </directory>
+</doxygenlayout>
diff --git a/doc/efm32gg/header_efm32gg.tex b/doc/efm32gg/header_efm32gg.tex
new file mode 100644
index 0000000..55288fb
--- /dev/null
+++ b/doc/efm32gg/header_efm32gg.tex
@@ -0,0 +1,61 @@
+\documentclass{book}
+\usepackage[a4paper,top=2.5cm,bottom=2.5cm,left=2.5cm,right=2.5cm]{geometry}
+\usepackage{makeidx}
+\usepackage{natbib}
+\usepackage{graphicx}
+\usepackage{multicol}
+\usepackage{float}
+\usepackage{listings}
+\usepackage{color}
+\usepackage{ifthen}
+\usepackage[table]{xcolor}
+\usepackage{textcomp}
+\usepackage{alltt}
+\usepackage{ifpdf}
+\ifpdf
+\usepackage[pdftex,
+ pagebackref=true,
+ colorlinks=true,
+ linkcolor=blue,
+ unicode
+ ]{hyperref}
+\else
+\usepackage[ps2pdf,
+ pagebackref=true,
+ colorlinks=true,
+ linkcolor=blue,
+ unicode
+ ]{hyperref}
+\usepackage{pspicture}
+\fi
+\usepackage[utf8]{inputenc}
+\usepackage{mathptmx}
+\usepackage[scaled=.90]{helvet}
+\usepackage{courier}
+\usepackage{sectsty}
+\usepackage{amssymb}
+\usepackage[titles]{tocloft}
+\usepackage{doxygen}
+\lstset{language=C++,inputencoding=utf8,basicstyle=\footnotesize,breaklines=true,breakatwhitespace=true,tabsize=4,numbers=left }
+\makeindex
+\setcounter{tocdepth}{3}
+\renewcommand{\footrulewidth}{0.4pt}
+\renewcommand{\familydefault}{\sfdefault}
+\hfuzz=15pt
+\setlength{\emergencystretch}{15pt}
+\hbadness=750
+\tolerance=750
+\begin{document}
+\hypersetup{pageanchor=false,citecolor=blue}
+\begin{titlepage}
+\vspace*{7cm}
+\begin{center}
+{\Huge libopencm3: API Reference\\ EFM32 Giant Gecko ARM Cortex M3 Series}\\
+\vspace*{1cm}
+{\large Generated by Doxygen 1.8.2}\\
+\vspace*{0.5cm}
+{\small Thu Sep 13 2012 23:26:45}\\
+\end{center}
+\end{titlepage}
+\pagenumbering{arabic}
+\hypersetup{pageanchor=true,citecolor=blue}
diff --git a/doc/efm32lg/Doxyfile b/doc/efm32lg/Doxyfile
new file mode 100644
index 0000000..60b5e0c
--- /dev/null
+++ b/doc/efm32lg/Doxyfile
@@ -0,0 +1,29 @@
+# HTML Documentation for efm32 code level
+
+# 11 November 2012
+# (C) Ken Sarkies <ksarkies@internode.on.net>
+
+#---------------------------------------------------------------------------
+# Common Include File
+#---------------------------------------------------------------------------
+
+@INCLUDE = ../Doxyfile_common
+
+#---------------------------------------------------------------------------
+# Local settings
+#---------------------------------------------------------------------------
+
+WARN_LOGFILE = doxygen_efm32lg.log
+
+INPUT = ../../include/libopencm3/license.dox \
+ ../../include/libopencm3/efm32/efm32lg \
+ ../../lib/efm32/efm32lg
+
+EXCLUDE =
+
+LAYOUT_FILE = DoxygenLayout_efm32lg.xml
+
+TAGFILES = ../cm3/cm3.tag=../../cm3/html \
+
+GENERATE_TAGFILE = efm32lg.tag
+
diff --git a/doc/efm32lg/Doxyfile_latex b/doc/efm32lg/Doxyfile_latex
new file mode 100644
index 0000000..0b8ed0d
--- /dev/null
+++ b/doc/efm32lg/Doxyfile_latex
@@ -0,0 +1,32 @@
+# LaTeX Documentation for efm32 code level
+
+# 12 November 2012
+# (C) Ken Sarkies <ksarkies@internode.on.net>
+
+#---------------------------------------------------------------------------
+# Common Include File
+#---------------------------------------------------------------------------
+
+@INCLUDE = ../Doxyfile_common
+
+#---------------------------------------------------------------------------
+# Local settings
+#---------------------------------------------------------------------------
+
+WARN_LOGFILE = doxygen_efm32lg_latex.log
+
+INPUT = ../../include/libopencm3/docmain.dox \
+ ../../include/libopencm3/license.dox \
+ ../../include/libopencm3/efm32/efm32lg \
+ ../../lib/efm32/efm32lg
+
+EXCLUDE = ../../include/libopencm3/efm32/doc-efm32lg.h
+
+LAYOUT_FILE = DoxygenLayout_efm32lg.xml
+
+GENERATE_HTML = NO
+
+GENERATE_LATEX = YES
+
+LATEX_HEADER = header_efm32lg.tex
+
diff --git a/doc/efm32lg/DoxygenLayout_efm32lg.xml b/doc/efm32lg/DoxygenLayout_efm32lg.xml
new file mode 100644
index 0000000..dd5a712
--- /dev/null
+++ b/doc/efm32lg/DoxygenLayout_efm32lg.xml
@@ -0,0 +1,197 @@
+<doxygenlayout version="1.0">
+ <!-- Navigation index tabs for HTML output -->
+ <navindex>
+ <tab type="mainpage" visible="yes" title="libopencm3"/>
+ <tab type="pages" visible="yes" title="General Information" intro=""/>
+ <tab type="user" visible="yes" url="../../html/index.html" title="Back to Top" intro=""/>
+ <tab type="user" visible="yes" url="../../cm3/html/modules.html" title="CM3 Core" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32f1/html/modules.html" title="STM32F1" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32f2/html/modules.html" title="STM32F2" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32f4/html/modules.html" title="STM32F4" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32l1/html/modules.html" title="STM32L1" intro=""/>
+ <tab type="user" visible="yes" url="../../lm3s/html/modules.html" title="LM3S" intro=""/>
+ <tab type="user" visible="yes" url="../../lpc13xx/html/modules.html" title="LPC13" intro=""/>
+ <tab type="user" visible="yes" url="../../lpc17xx/html/modules.html" title="LPC17" intro=""/>
+ <tab type="user" visible="yes" url="../../lpc43xx/html/modules.html" title="LPC43" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32g/html/modules.html" title="EMF32 Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32gg/html/modules.html" title="EMF32 Giant Gecko" intro=""/>
+ <tab type="modules" visible="yes" title="EFM32 Leopard Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32tg/html/modules.html" title="EMF32 Tiny Gecko" intro=""/>
+ <tab type="namespaces" visible="yes" title="">
+ <tab type="namespaces" visible="yes" title="" intro=""/>
+ <tab type="namespacemembers" visible="yes" title="" intro=""/>
+ </tab>
+ <tab type="classes" visible="yes" title="">
+ <tab type="classes" visible="yes" title="" intro=""/>
+ <tab type="classindex" visible="$ALPHABETICAL_INDEX" title=""/>
+ <tab type="hierarchy" visible="yes" title="" intro=""/>
+ <tab type="classmembers" visible="yes" title="" intro=""/>
+ </tab>
+ <tab type="files" visible="yes" title="">
+ <tab type="files" visible="yes" title="" intro=""/>
+ <tab type="globals" visible="yes" title="" intro=""/>
+ </tab>
+ <tab type="examples" visible="yes" title="" intro=""/>
+ </navindex>
+
+ <!-- Layout definition for a class page -->
+ <class>
+ <briefdescription visible="yes"/>
+ <includes visible="$SHOW_INCLUDE_FILES"/>
+ <inheritancegraph visible="$CLASS_GRAPH"/>
+ <collaborationgraph visible="$COLLABORATION_GRAPH"/>
+ <allmemberslink visible="yes"/>
+ <memberdecl>
+ <nestedclasses visible="yes" title=""/>
+ <publictypes title=""/>
+ <publicslots title=""/>
+ <signals title=""/>
+ <publicmethods title=""/>
+ <publicstaticmethods title=""/>
+ <publicattributes title=""/>
+ <publicstaticattributes title=""/>
+ <protectedtypes title=""/>
+ <protectedslots title=""/>
+ <protectedmethods title=""/>
+ <protectedstaticmethods title=""/>
+ <protectedattributes title=""/>
+ <protectedstaticattributes title=""/>
+ <packagetypes title=""/>
+ <packagemethods title=""/>
+ <packagestaticmethods title=""/>
+ <packageattributes title=""/>
+ <packagestaticattributes title=""/>
+ <properties title=""/>
+ <events title=""/>
+ <privatetypes title=""/>
+ <privateslots title=""/>
+ <privatemethods title=""/>
+ <privatestaticmethods title=""/>
+ <privateattributes title=""/>
+ <privatestaticattributes title=""/>
+ <friends title=""/>
+ <related title="" subtitle=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <typedefs title=""/>
+ <enums title=""/>
+ <constructors title=""/>
+ <functions title=""/>
+ <related title=""/>
+ <variables title=""/>
+ <properties title=""/>
+ <events title=""/>
+ </memberdef>
+ <usedfiles visible="$SHOW_USED_FILES"/>
+ <authorsection visible="yes"/>
+ </class>
+
+ <!-- Layout definition for a namespace page -->
+ <namespace>
+ <briefdescription visible="yes"/>
+ <memberdecl>
+ <nestednamespaces visible="yes" title=""/>
+ <classes visible="yes" title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ </memberdef>
+ <authorsection visible="yes"/>
+ </namespace>
+
+ <!-- Layout definition for a file page -->
+ <file>
+ <briefdescription visible="yes"/>
+ <includes visible="$SHOW_INCLUDE_FILES"/>
+ <includegraph visible="$INCLUDE_GRAPH"/>
+ <includedbygraph visible="$INCLUDED_BY_GRAPH"/>
+ <sourcelink visible="yes"/>
+ <memberdecl>
+ <classes visible="yes" title=""/>
+ <namespaces visible="yes" title=""/>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ </memberdef>
+ <authorsection/>
+ </file>
+
+ <!-- Layout definition for a group page -->
+ <group>
+ <briefdescription visible="yes"/>
+ <groupgraph visible="$GROUP_GRAPHS"/>
+ <memberdecl>
+ <classes visible="yes" title=""/>
+ <namespaces visible="yes" title=""/>
+ <dirs visible="yes" title=""/>
+ <nestedgroups visible="yes" title=""/>
+ <files visible="yes" title=""/>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <enumvalues title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <signals title=""/>
+ <publicslots title=""/>
+ <protectedslots title=""/>
+ <privateslots title=""/>
+ <events title=""/>
+ <properties title=""/>
+ <friends title=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <pagedocs/>
+ <inlineclasses title=""/>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <enumvalues title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <signals title=""/>
+ <publicslots title=""/>
+ <protectedslots title=""/>
+ <privateslots title=""/>
+ <events title=""/>
+ <properties title=""/>
+ <friends title=""/>
+ </memberdef>
+ <authorsection visible="yes"/>
+ </group>
+
+ <!-- Layout definition for a directory page -->
+ <directory>
+ <briefdescription visible="yes"/>
+ <directorygraph visible="yes"/>
+ <memberdecl>
+ <dirs visible="yes"/>
+ <files visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ </directory>
+</doxygenlayout>
diff --git a/doc/efm32lg/header_efm32lg.tex b/doc/efm32lg/header_efm32lg.tex
new file mode 100644
index 0000000..900752c
--- /dev/null
+++ b/doc/efm32lg/header_efm32lg.tex
@@ -0,0 +1,61 @@
+\documentclass{book}
+\usepackage[a4paper,top=2.5cm,bottom=2.5cm,left=2.5cm,right=2.5cm]{geometry}
+\usepackage{makeidx}
+\usepackage{natbib}
+\usepackage{graphicx}
+\usepackage{multicol}
+\usepackage{float}
+\usepackage{listings}
+\usepackage{color}
+\usepackage{ifthen}
+\usepackage[table]{xcolor}
+\usepackage{textcomp}
+\usepackage{alltt}
+\usepackage{ifpdf}
+\ifpdf
+\usepackage[pdftex,
+ pagebackref=true,
+ colorlinks=true,
+ linkcolor=blue,
+ unicode
+ ]{hyperref}
+\else
+\usepackage[ps2pdf,
+ pagebackref=true,
+ colorlinks=true,
+ linkcolor=blue,
+ unicode
+ ]{hyperref}
+\usepackage{pspicture}
+\fi
+\usepackage[utf8]{inputenc}
+\usepackage{mathptmx}
+\usepackage[scaled=.90]{helvet}
+\usepackage{courier}
+\usepackage{sectsty}
+\usepackage{amssymb}
+\usepackage[titles]{tocloft}
+\usepackage{doxygen}
+\lstset{language=C++,inputencoding=utf8,basicstyle=\footnotesize,breaklines=true,breakatwhitespace=true,tabsize=4,numbers=left }
+\makeindex
+\setcounter{tocdepth}{3}
+\renewcommand{\footrulewidth}{0.4pt}
+\renewcommand{\familydefault}{\sfdefault}
+\hfuzz=15pt
+\setlength{\emergencystretch}{15pt}
+\hbadness=750
+\tolerance=750
+\begin{document}
+\hypersetup{pageanchor=false,citecolor=blue}
+\begin{titlepage}
+\vspace*{7cm}
+\begin{center}
+{\Huge libopencm3: API Reference\\ EFM32 Leopard Gecko ARM Cortex M3 Series}\\
+\vspace*{1cm}
+{\large Generated by Doxygen 1.8.2}\\
+\vspace*{0.5cm}
+{\small Thu Sep 13 2012 23:26:45}\\
+\end{center}
+\end{titlepage}
+\pagenumbering{arabic}
+\hypersetup{pageanchor=true,citecolor=blue}
diff --git a/doc/efm32tg/Doxyfile b/doc/efm32tg/Doxyfile
new file mode 100644
index 0000000..dd7191c
--- /dev/null
+++ b/doc/efm32tg/Doxyfile
@@ -0,0 +1,29 @@
+# HTML Documentation for efm32 code level
+
+# 11 November 2012
+# (C) Ken Sarkies <ksarkies@internode.on.net>
+
+#---------------------------------------------------------------------------
+# Common Include File
+#---------------------------------------------------------------------------
+
+@INCLUDE = ../Doxyfile_common
+
+#---------------------------------------------------------------------------
+# Local settings
+#---------------------------------------------------------------------------
+
+WARN_LOGFILE = doxygen_efm32tg.log
+
+INPUT = ../../include/libopencm3/license.dox \
+ ../../include/libopencm3/efm32/efm32tg \
+ ../../lib/efm32/efm32tg
+
+EXCLUDE =
+
+LAYOUT_FILE = DoxygenLayout_efm32tg.xml
+
+TAGFILES = ../cm3/cm3.tag=../../cm3/html \
+
+GENERATE_TAGFILE = efm32tg.tag
+
diff --git a/doc/efm32tg/Doxyfile_latex b/doc/efm32tg/Doxyfile_latex
new file mode 100644
index 0000000..adca3de
--- /dev/null
+++ b/doc/efm32tg/Doxyfile_latex
@@ -0,0 +1,32 @@
+# LaTeX Documentation for efm32 code level
+
+# 12 November 2012
+# (C) Ken Sarkies <ksarkies@internode.on.net>
+
+#---------------------------------------------------------------------------
+# Common Include File
+#---------------------------------------------------------------------------
+
+@INCLUDE = ../Doxyfile_common
+
+#---------------------------------------------------------------------------
+# Local settings
+#---------------------------------------------------------------------------
+
+WARN_LOGFILE = doxygen_efm32tg_latex.log
+
+INPUT = ../../include/libopencm3/docmain.dox \
+ ../../include/libopencm3/license.dox \
+ ../../include/libopencm3/efm32/efm32tg \
+ ../../lib/efm32/efm32tg
+
+EXCLUDE = ../../include/libopencm3/efm32/doc-efm32tg.h
+
+LAYOUT_FILE = DoxygenLayout_efm32tg.xml
+
+GENERATE_HTML = NO
+
+GENERATE_LATEX = YES
+
+LATEX_HEADER = header_efm32tg.tex
+
diff --git a/doc/stm32/DoxygenLayout_stm32.xml b/doc/efm32tg/DoxygenLayout_efm32tg.xml
index 439d349..afab4c7 100644
--- a/doc/stm32/DoxygenLayout_stm32.xml
+++ b/doc/efm32tg/DoxygenLayout_efm32tg.xml
@@ -5,14 +5,17 @@
<tab type="pages" visible="yes" title="General Information" intro=""/>
<tab type="user" visible="yes" url="../../html/index.html" title="Back to Top" intro=""/>
<tab type="user" visible="yes" url="../../cm3/html/modules.html" title="CM3 Core" intro=""/>
- <tab type="modules" visible="yes" title="STM32 Common" intro=""/>
<tab type="user" visible="yes" url="../../stm32f1/html/modules.html" title="STM32F1" intro=""/>
<tab type="user" visible="yes" url="../../stm32f2/html/modules.html" title="STM32F2" intro=""/>
<tab type="user" visible="yes" url="../../stm32f4/html/modules.html" title="STM32F4" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32l1/html/modules.html" title="STM32L1" intro=""/>
<tab type="user" visible="yes" url="../../lm3s/html/modules.html" title="LM3S" intro=""/>
<tab type="user" visible="yes" url="../../lpc13xx/html/modules.html" title="LPC13" intro=""/>
<tab type="user" visible="yes" url="../../lpc17xx/html/modules.html" title="LPC17" intro=""/>
<tab type="user" visible="yes" url="../../lpc43xx/html/modules.html" title="LPC43" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32g/html/modules.html" title="EMF32 Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32gg/html/modules.html" title="EMF32 Giant Gecko" intro=""/>
+ <tab type="modules" visible="yes" title="EFM32 Tiny Gecko" intro=""/>
<tab type="namespaces" visible="yes" title="">
<tab type="namespaces" visible="yes" title="" intro=""/>
<tab type="namespacemembers" visible="yes" title="" intro=""/>
diff --git a/doc/efm32tg/header_efm32tg.tex b/doc/efm32tg/header_efm32tg.tex
new file mode 100644
index 0000000..625e7fa
--- /dev/null
+++ b/doc/efm32tg/header_efm32tg.tex
@@ -0,0 +1,61 @@
+\documentclass{book}
+\usepackage[a4paper,top=2.5cm,bottom=2.5cm,left=2.5cm,right=2.5cm]{geometry}
+\usepackage{makeidx}
+\usepackage{natbib}
+\usepackage{graphicx}
+\usepackage{multicol}
+\usepackage{float}
+\usepackage{listings}
+\usepackage{color}
+\usepackage{ifthen}
+\usepackage[table]{xcolor}
+\usepackage{textcomp}
+\usepackage{alltt}
+\usepackage{ifpdf}
+\ifpdf
+\usepackage[pdftex,
+ pagebackref=true,
+ colorlinks=true,
+ linkcolor=blue,
+ unicode
+ ]{hyperref}
+\else
+\usepackage[ps2pdf,
+ pagebackref=true,
+ colorlinks=true,
+ linkcolor=blue,
+ unicode
+ ]{hyperref}
+\usepackage{pspicture}
+\fi
+\usepackage[utf8]{inputenc}
+\usepackage{mathptmx}
+\usepackage[scaled=.90]{helvet}
+\usepackage{courier}
+\usepackage{sectsty}
+\usepackage{amssymb}
+\usepackage[titles]{tocloft}
+\usepackage{doxygen}
+\lstset{language=C++,inputencoding=utf8,basicstyle=\footnotesize,breaklines=true,breakatwhitespace=true,tabsize=4,numbers=left }
+\makeindex
+\setcounter{tocdepth}{3}
+\renewcommand{\footrulewidth}{0.4pt}
+\renewcommand{\familydefault}{\sfdefault}
+\hfuzz=15pt
+\setlength{\emergencystretch}{15pt}
+\hbadness=750
+\tolerance=750
+\begin{document}
+\hypersetup{pageanchor=false,citecolor=blue}
+\begin{titlepage}
+\vspace*{7cm}
+\begin{center}
+{\Huge libopencm3: API Reference\\ EFM32 Tiny Gecko ARM Cortex M3 Series}\\
+\vspace*{1cm}
+{\large Generated by Doxygen 1.8.2}\\
+\vspace*{0.5cm}
+{\small Thu Sep 13 2012 23:26:45}\\
+\end{center}
+\end{titlepage}
+\pagenumbering{arabic}
+\hypersetup{pageanchor=true,citecolor=blue}
diff --git a/doc/lm3s/Doxyfile_latex b/doc/lm3s/Doxyfile_latex
index b4ffe3d..1cff565 100644
--- a/doc/lm3s/Doxyfile_latex
+++ b/doc/lm3s/Doxyfile_latex
@@ -17,7 +17,6 @@ WARN_LOGFILE = doxygen_lm3s_latex.log
INPUT = ../../include/libopencm3/docmain.dox \
../../include/libopencm3/license.dox \
- ../../include/libopencm3/cm3/ \
../../include/libopencm3/lm3s \
../../lib/lm3s
diff --git a/doc/lm3s/DoxygenLayout_lm3s.xml b/doc/lm3s/DoxygenLayout_lm3s.xml
index 186acef..f70a4c1 100644
--- a/doc/lm3s/DoxygenLayout_lm3s.xml
+++ b/doc/lm3s/DoxygenLayout_lm3s.xml
@@ -5,14 +5,18 @@
<tab type="pages" visible="yes" title="General Information" intro=""/>
<tab type="user" visible="yes" url="../../html/index.html" title="Back to Top" intro=""/>
<tab type="user" visible="yes" url="../../cm3/html/modules.html" title="CM3 Core" intro=""/>
- <tab type="user" visible="yes" url="../../stm32/html/modules.html" title="STM32" intro=""/>
<tab type="user" visible="yes" url="../../stm32f1/html/modules.html" title="STM32F1" intro=""/>
<tab type="user" visible="yes" url="../../stm32f2/html/modules.html" title="STM32F2" intro=""/>
<tab type="user" visible="yes" url="../../stm32f4/html/modules.html" title="STM32F4" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32l1/html/modules.html" title="STM32L1" intro=""/>
<tab type="modules" visible="yes" title="LM3S" intro=""/>
<tab type="user" visible="yes" url="../../lpc13xx/html/modules.html" title="LPC13" intro=""/>
<tab type="user" visible="yes" url="../../lpc17xx/html/modules.html" title="LPC17" intro=""/>
<tab type="user" visible="yes" url="../../lpc43xx/html/modules.html" title="LPC43" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32g/html/modules.html" title="EMF32 Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32gg/html/modules.html" title="EMF32 Giant Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32lg/html/modules.html" title="EMF32 Leopard Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32tg/html/modules.html" title="EMF32 Tiny Gecko" intro=""/>
<tab type="namespaces" visible="yes" title="">
<tab type="namespaces" visible="yes" title="" intro=""/>
<tab type="namespacemembers" visible="yes" title="" intro=""/>
diff --git a/doc/lpc13xx/Doxyfile_latex b/doc/lpc13xx/Doxyfile_latex
index 0bbcb5a2..140e908 100644
--- a/doc/lpc13xx/Doxyfile_latex
+++ b/doc/lpc13xx/Doxyfile_latex
@@ -17,7 +17,6 @@ WARN_LOGFILE = doxygen_lpc13xx_latex.log
INPUT = ../../include/libopencm3/docmain.dox \
../../include/libopencm3/license.dox \
- ../../include/libopencm3/cm3/ \
../../include/libopencm3/lpc13xx/ \
../../lib/lpc13xx
diff --git a/doc/lpc13xx/DoxygenLayout_lpc13xx.xml b/doc/lpc13xx/DoxygenLayout_lpc13xx.xml
index b6aacce..adb366c 100644
--- a/doc/lpc13xx/DoxygenLayout_lpc13xx.xml
+++ b/doc/lpc13xx/DoxygenLayout_lpc13xx.xml
@@ -5,14 +5,18 @@
<tab type="pages" visible="yes" title="General Information" intro=""/>
<tab type="user" visible="yes" url="../../html/index.html" title="Back to Top" intro=""/>
<tab type="user" visible="yes" url="../../cm3/html/modules.html" title="CM3 Core" intro=""/>
- <tab type="user" visible="yes" url="../../stm32/html/modules.html" title="STM32" intro=""/>
<tab type="user" visible="yes" url="../../stm32f1/html/modules.html" title="STM32F1" intro=""/>
<tab type="user" visible="yes" url="../../stm32f2/html/modules.html" title="STM32F2" intro=""/>
<tab type="user" visible="yes" url="../../stm32f4/html/modules.html" title="STM32F4" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32l1/html/modules.html" title="STM32L1" intro=""/>
<tab type="user" visible="yes" url="../../lm3s/html/modules.html" title="LM3S" intro=""/>
<tab type="modules" visible="yes" title="LPC13" intro=""/>
<tab type="user" visible="yes" url="../../lpc17xx/html/modules.html" title="LPC17" intro=""/>
<tab type="user" visible="yes" url="../../lpc43xx/html/modules.html" title="LPC43" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32g/html/modules.html" title="EMF32 Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32gg/html/modules.html" title="EMF32 Giant Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32lg/html/modules.html" title="EMF32 Leopard Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32tg/html/modules.html" title="EMF32 Tiny Gecko" intro=""/>
<tab type="namespaces" visible="yes" title="">
<tab type="namespaces" visible="yes" title="" intro=""/>
<tab type="namespacemembers" visible="yes" title="" intro=""/>
diff --git a/doc/lpc17xx/Doxyfile_latex b/doc/lpc17xx/Doxyfile_latex
index d1f4650..8d3202c 100644
--- a/doc/lpc17xx/Doxyfile_latex
+++ b/doc/lpc17xx/Doxyfile_latex
@@ -17,7 +17,6 @@ WARN_LOGFILE = doxygen_lpc17xx_latex.log
INPUT = ../../include/libopencm3/docmain.dox \
../../include/libopencm3/license.dox \
- ../../include/libopencm3/cm3/ \
../../include/libopencm3/lpc17xx/ \
../../lib/lpc17xx
diff --git a/doc/lpc17xx/DoxygenLayout_lpc17xx.xml b/doc/lpc17xx/DoxygenLayout_lpc17xx.xml
index 809a24c..b1c6d34 100644
--- a/doc/lpc17xx/DoxygenLayout_lpc17xx.xml
+++ b/doc/lpc17xx/DoxygenLayout_lpc17xx.xml
@@ -5,14 +5,18 @@
<tab type="pages" visible="yes" title="General Information" intro=""/>
<tab type="user" visible="yes" url="../../html/index.html" title="Back to Top" intro=""/>
<tab type="user" visible="yes" url="../../cm3/html/modules.html" title="CM3 Core" intro=""/>
- <tab type="user" visible="yes" url="../../stm32/html/modules.html" title="STM32" intro=""/>
<tab type="user" visible="yes" url="../../stm32f1/html/modules.html" title="STM32F1" intro=""/>
<tab type="user" visible="yes" url="../../stm32f2/html/modules.html" title="STM32F2" intro=""/>
<tab type="user" visible="yes" url="../../stm32f4/html/modules.html" title="STM32F4" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32l1/html/modules.html" title="STM32L1" intro=""/>
<tab type="user" visible="yes" url="../../lm3s/html/modules.html" title="LM3S" intro=""/>
<tab type="user" visible="yes" url="../../lpc13xx/html/modules.html" title="LPC13" intro=""/>
<tab type="modules" visible="yes" title="LPC17" intro=""/>
<tab type="user" visible="yes" url="../../lpc43xx/html/modules.html" title="LPC43" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32g/html/modules.html" title="EMF32 Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32gg/html/modules.html" title="EMF32 Giant Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32lg/html/modules.html" title="EMF32 Leopard Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32tg/html/modules.html" title="EMF32 Tiny Gecko" intro=""/>
<tab type="namespaces" visible="yes" title="">
<tab type="namespaces" visible="yes" title="" intro=""/>
<tab type="namespacemembers" visible="yes" title="" intro=""/>
diff --git a/doc/lpc43xx/Doxyfile_latex b/doc/lpc43xx/Doxyfile_latex
index 691de35..567ddc2 100644
--- a/doc/lpc43xx/Doxyfile_latex
+++ b/doc/lpc43xx/Doxyfile_latex
@@ -17,7 +17,6 @@ WARN_LOGFILE = doxygen_lpc43xx_latex.log
INPUT = ../../include/libopencm3/docmain.dox \
../../include/libopencm3/license.dox \
- ../../include/libopencm3/cm3/ \
../../include/libopencm3/lpc43xx/ \
../../lib/lpc43xx
diff --git a/doc/lpc43xx/DoxygenLayout_lpc43xx.xml b/doc/lpc43xx/DoxygenLayout_lpc43xx.xml
index 3cd37f0..197a488 100644
--- a/doc/lpc43xx/DoxygenLayout_lpc43xx.xml
+++ b/doc/lpc43xx/DoxygenLayout_lpc43xx.xml
@@ -5,14 +5,18 @@
<tab type="pages" visible="yes" title="General Information" intro=""/>
<tab type="user" visible="yes" url="../../html/index.html" title="Back to Top" intro=""/>
<tab type="user" visible="yes" url="../../cm3/html/modules.html" title="CM3 Core" intro=""/>
- <tab type="user" visible="yes" url="../../stm32/html/modules.html" title="STM32" intro=""/>
<tab type="user" visible="yes" url="../../stm32f1/html/modules.html" title="STM32F1" intro=""/>
<tab type="user" visible="yes" url="../../stm32f2/html/modules.html" title="STM32F2" intro=""/>
<tab type="user" visible="yes" url="../../stm32f4/html/modules.html" title="STM32F4" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32l1/html/modules.html" title="STM32L1" intro=""/>
<tab type="user" visible="yes" url="../../lm3s/html/modules.html" title="LM3S" intro=""/>
<tab type="user" visible="yes" url="../../lpc13xx/html/modules.html" title="LPC13" intro=""/>
<tab type="user" visible="yes" url="../../lpc17xx/html/modules.html" title="LPC17" intro=""/>
<tab type="modules" visible="yes" title="LPC43" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32g/html/modules.html" title="EMF32 Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32gg/html/modules.html" title="EMF32 Giant Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32lg/html/modules.html" title="EMF32 Leopard Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32tg/html/modules.html" title="EMF32 Tiny Gecko" intro=""/>
<tab type="namespaces" visible="yes" title="">
<tab type="namespaces" visible="yes" title="" intro=""/>
<tab type="namespacemembers" visible="yes" title="" intro=""/>
diff --git a/doc/stm32/Doxyfile b/doc/stm32/Doxyfile
deleted file mode 100644
index e39e098..0000000
--- a/doc/stm32/Doxyfile
+++ /dev/null
@@ -1,30 +0,0 @@
-# HTML Documentation for STM32 code level
-
-# 14 September 2012
-# (C) Ken Sarkies <ksarkies@internode.on.net>
-
-#---------------------------------------------------------------------------
-# Common Include File
-#---------------------------------------------------------------------------
-
-@INCLUDE = ../Doxyfile_common
-
-#---------------------------------------------------------------------------
-# Local settings
-#---------------------------------------------------------------------------
-
-WARN_LOGFILE = doxygen_stm32.log
-
-INPUT = ../../include/libopencm3/license.dox \
- ../../include/libopencm3/stm32/ \
- ../../include/libopencm3/stm32/f1/nvic_f1.h \
- ../../include/libopencm3/stm32/f2/nvic_f2.h \
- ../../include/libopencm3/stm32/f4/nvic_f4.h \
- ../../lib/stm32/
-
-LAYOUT_FILE = DoxygenLayout_stm32.xml
-
-TAGFILES = ../cm3/cm3.tag=../../cm3/html
-
-GENERATE_TAGFILE = stm32.tag
-
diff --git a/doc/stm32f1/Doxyfile b/doc/stm32f1/Doxyfile
index f99e9f0..ae83259 100644
--- a/doc/stm32f1/Doxyfile
+++ b/doc/stm32f1/Doxyfile
@@ -17,16 +17,19 @@ WARN_LOGFILE = doxygen_stm32f1.log
INPUT = ../../include/libopencm3/license.dox \
../../include/libopencm3/stm32/f1 \
- ../../lib/stm32/f1
+ ../../include/libopencm3/stm32/common/gpio_common_all.h
+
+INPUT += ../../lib/stm32/f1 \
+ ../../lib/stm32/common/gpio_common_all.c
EXCLUDE = ../../include/libopencm3/stm32/f1/usb.h \
- ../../include/libopencm3/stm32/f1/usb_desc.h \
- ../../include/libopencm3/stm32/f1/nvic_f1.h
+ ../../include/libopencm3/stm32/f1/usb_desc.h
+
+EXCLUDE_PATTERNS = *_common_f24.h *_common_f24.c
LAYOUT_FILE = DoxygenLayout_stm32f1.xml
-TAGFILES = ../cm3/cm3.tag=../../cm3/html \
- ../stm32/stm32.tag=../../stm32/html
+TAGFILES = ../cm3/cm3.tag=../../cm3/html
GENERATE_TAGFILE = stm32f1.tag
diff --git a/doc/stm32f1/Doxyfile_latex b/doc/stm32f1/Doxyfile_latex
index 83d2969..217b6f9 100644
--- a/doc/stm32f1/Doxyfile_latex
+++ b/doc/stm32f1/Doxyfile_latex
@@ -17,16 +17,17 @@ WARN_LOGFILE = doxygen_stm32f1_latex.log
INPUT = ../../include/libopencm3/docmain.dox \
../../include/libopencm3/license.dox \
- ../../include/libopencm3/cm3/ \
- ../../include/libopencm3/stm32/ \
../../include/libopencm3/stm32/f1 \
- ../../lib/stm32/ \
- ../../lib/stm32/f1
+ ../../include/libopencm3/stm32/common \
+ ../../lib/stm32/f1 \
+ ../../lib/stm32/common
EXCLUDE = ../../include/libopencm3/stm32/f1/doc-stm32f1.h \
- ../../include/libopencm3/stm32/doc-stm32f.h \
../../include/libopencm3/stm32/f1/usb.h \
../../include/libopencm3/stm32/f1/usb_desc.h \
+ ../../include/libopencm3/stm32/f1/nvic_f1.h
+
+EXCLUDE_PATTERNS = *_common_f24.h *_common_f24.c
LAYOUT_FILE = DoxygenLayout_stm32f1.xml
diff --git a/doc/stm32f1/DoxygenLayout_stm32f1.xml b/doc/stm32f1/DoxygenLayout_stm32f1.xml
index 6ed9bba..4f63ceb 100644
--- a/doc/stm32f1/DoxygenLayout_stm32f1.xml
+++ b/doc/stm32f1/DoxygenLayout_stm32f1.xml
@@ -5,14 +5,18 @@
<tab type="pages" visible="yes" title="General Information" intro=""/>
<tab type="user" visible="yes" url="../../html/index.html" title="Back to Top" intro=""/>
<tab type="user" visible="yes" url="../../cm3/html/modules.html" title="CM3 Core" intro=""/>
- <tab type="user" visible="yes" url="../../stm32/html/modules.html" title="STM32" intro=""/>
- <tab type="modules" visible="yes" title="STM32F1" intro=""/>
+ <tab type="modules" visible="yes" title="STMF1" intro=""/>
<tab type="user" visible="yes" url="../../stm32f2/html/modules.html" title="STM32F2" intro=""/>
<tab type="user" visible="yes" url="../../stm32f4/html/modules.html" title="STM32F4" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32l1/html/modules.html" title="STM32L1" intro=""/>
<tab type="user" visible="yes" url="../../lm3s/html/modules.html" title="LM3S" intro=""/>
<tab type="user" visible="yes" url="../../lpc13xx/html/modules.html" title="LPC13" intro=""/>
<tab type="user" visible="yes" url="../../lpc17xx/html/modules.html" title="LPC17" intro=""/>
<tab type="user" visible="yes" url="../../lpc43xx/html/modules.html" title="LPC43" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32g/html/modules.html" title="EMF32 Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32gg/html/modules.html" title="EMF32 Giant Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32lg/html/modules.html" title="EMF32 Leopard Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32tg/html/modules.html" title="EMF32 Tiny Gecko" intro=""/>
<tab type="namespaces" visible="yes" title="">
<tab type="namespaces" visible="yes" title="" intro=""/>
<tab type="namespacemembers" visible="yes" title="" intro=""/>
diff --git a/doc/stm32f2/Doxyfile b/doc/stm32f2/Doxyfile
index 8378e4f..ff5765b 100644
--- a/doc/stm32f2/Doxyfile
+++ b/doc/stm32f2/Doxyfile
@@ -17,14 +17,18 @@ WARN_LOGFILE = doxygen_stm32f2.log
INPUT = ../../include/libopencm3/license.dox \
../../include/libopencm3/stm32/f2 \
- ../../lib/stm32/f2
+ ../../include/libopencm3/stm32/common/gpio_common_all.h \
+ ../../include/libopencm3/stm32/common/gpio_common_f24.h
-EXCLUDE = ../../include/libopencm3/stm32/f2/nvic_f2.h
+INPUT += ../../lib/stm32/f2 \
+ ../../lib/stm32/common/gpio_common_all.c \
+ ../../lib/stm32/common/gpio_common_f24.c
+
+EXCLUDE =
LAYOUT_FILE = DoxygenLayout_stm32f2.xml
-TAGFILES = ../cm3/cm3.tag=../../cm3/html \
- ../stm32/stm32.tag=../../stm32/html
+TAGFILES = ../cm3/cm3.tag=../../cm3/html
GENERATE_TAGFILE = stm32f2.tag
diff --git a/doc/stm32f2/Doxyfile_latex b/doc/stm32f2/Doxyfile_latex
index 4288140..29bdc95 100644
--- a/doc/stm32f2/Doxyfile_latex
+++ b/doc/stm32f2/Doxyfile_latex
@@ -16,15 +16,13 @@
WARN_LOGFILE = doxygen_stm32f2_latex.log
INPUT = ../../include/libopencm3/docmain.dox \
- ../../include/libopencm3/license.dox \
- ../../include/libopencm3/cm3/ \
- ../../include/libopencm3/stm32/ \
+ ../../include/libopencm3/license.dox \
../../include/libopencm3/stm32/f2 \
- ../../lib/stm32/ \
- ../../lib/stm32/f2
+ ../../include/libopencm3/stm32/common \
+ ../../lib/stm32/f2 \
+ ../../lib/stm32/common
-EXCLUDE = ../../include/libopencm3/stm32/f2/doc-stm32f2.h \
- ../../include/libopencm3/stm32/doc-stm32f.h
+EXCLUDE = ../../include/libopencm3/stm32/f2/doc-stm32f2.h
LAYOUT_FILE = DoxygenLayout_stm32f2.xml
diff --git a/doc/stm32f2/DoxygenLayout_stm32f2.xml b/doc/stm32f2/DoxygenLayout_stm32f2.xml
index 19bfd0a..7c43e91 100644
--- a/doc/stm32f2/DoxygenLayout_stm32f2.xml
+++ b/doc/stm32f2/DoxygenLayout_stm32f2.xml
@@ -5,14 +5,18 @@
<tab type="pages" visible="yes" title="General Information" intro=""/>
<tab type="user" visible="yes" url="../../html/index.html" title="Back to Top" intro=""/>
<tab type="user" visible="yes" url="../../cm3/html/modules.html" title="CM3 Core" intro=""/>
- <tab type="user" visible="yes" url="../../stm32/html/modules.html" title="STM32" intro=""/>
<tab type="user" visible="yes" url="../../stm32f1/html/modules.html" title="STM32F1" intro=""/>
<tab type="modules" visible="yes" title="STM32F2" intro=""/>
<tab type="user" visible="yes" url="../../stm32f4/html/modules.html" title="STM32F4" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32l1/html/modules.html" title="STM32L1" intro=""/>
<tab type="user" visible="yes" url="../../lm3s/html/modules.html" title="LM3S" intro=""/>
<tab type="user" visible="yes" url="../../lpc13xx/html/modules.html" title="LPC13" intro=""/>
<tab type="user" visible="yes" url="../../lpc17xx/html/modules.html" title="LPC17" intro=""/>
<tab type="user" visible="yes" url="../../lpc43xx/html/modules.html" title="LPC43" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32g/html/modules.html" title="EMF32 Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32gg/html/modules.html" title="EMF32 Giant Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32lg/html/modules.html" title="EMF32 Leopard Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32tg/html/modules.html" title="EMF32 Tiny Gecko" intro=""/>
<tab type="namespaces" visible="yes" title="">
<tab type="namespaces" visible="yes" title="" intro=""/>
<tab type="namespacemembers" visible="yes" title="" intro=""/>
diff --git a/doc/stm32f4/Doxyfile b/doc/stm32f4/Doxyfile
index f86895b..6eff41c 100644
--- a/doc/stm32f4/Doxyfile
+++ b/doc/stm32f4/Doxyfile
@@ -17,14 +17,18 @@ WARN_LOGFILE = doxygen_stm32f4.log
INPUT = ../../include/libopencm3/license.dox \
../../include/libopencm3/stm32/f4 \
- ../../lib/stm32/f4
+ ../../include/libopencm3/stm32/common/gpio_common_all.h \
+ ../../include/libopencm3/stm32/common/gpio_common_f24.h
-EXCLUDE = ../../include/libopencm3/stm32/f4/nvic_f4.h
+INPUT += ../../lib/stm32/f4 \
+ ../../lib/stm32/common/gpio_common_all.c \
+ ../../lib/stm32/common/gpio_common_f24.c
+
+EXCLUDE =
LAYOUT_FILE = DoxygenLayout_stm32f4.xml
-TAGFILES = ../cm3/cm3.tag=../../cm3/html \
- ../stm32/stm32.tag=../../stm32/html
+TAGFILES = ../cm3/cm3.tag=../../cm3/html
GENERATE_TAGFILE = stm32f4.tag
diff --git a/doc/stm32f4/Doxyfile_latex b/doc/stm32f4/Doxyfile_latex
index 3c7da2e..6f62b21 100644
--- a/doc/stm32f4/Doxyfile_latex
+++ b/doc/stm32f4/Doxyfile_latex
@@ -16,15 +16,13 @@
WARN_LOGFILE = doxygen_stm32f4_latex.log
INPUT = ../../include/libopencm3/docmain.dox \
- ../../include/libopencm3/license.dox \
- ../../include/libopencm3/cm3/ \
- ../../include/libopencm3/stm32/ \
+ ../../include/libopencm3/license.dox \
../../include/libopencm3/stm32/f4 \
- ../../lib/stm32/ \
- ../../lib/stm32/f4
+ ../../include/libopencm3/stm32/common \
+ ../../lib/stm32/f4 \
+ ../../lib/stm32/common
-EXCLUDE = ../../include/libopencm3/stm32/f4/doc-stm32f4.h \
- ../../include/libopencm3/stm32/doc-stm32f.h
+EXCLUDE = ../../include/libopencm3/stm32/f4/doc-stm32f4.h
LAYOUT_FILE = DoxygenLayout_stm32f4.xml
diff --git a/doc/stm32f4/DoxygenLayout_stm32f4.xml b/doc/stm32f4/DoxygenLayout_stm32f4.xml
index 214320a..d8fdc8b 100644
--- a/doc/stm32f4/DoxygenLayout_stm32f4.xml
+++ b/doc/stm32f4/DoxygenLayout_stm32f4.xml
@@ -5,14 +5,18 @@
<tab type="pages" visible="yes" title="General Information" intro=""/>
<tab type="user" visible="yes" url="../../html/index.html" title="Back to Top" intro=""/>
<tab type="user" visible="yes" url="../../cm3/html/modules.html" title="CM3 Core" intro=""/>
- <tab type="user" visible="yes" url="../../stm32/html/modules.html" title="STM32" intro=""/>
<tab type="user" visible="yes" url="../../stm32f1/html/modules.html" title="STM32F1" intro=""/>
<tab type="user" visible="yes" url="../../stm32f2/html/modules.html" title="STM32F2" intro=""/>
<tab type="modules" visible="yes" title="STM32F4" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32l1/html/modules.html" title="STM32L1" intro=""/>
<tab type="user" visible="yes" url="../../lm3s/html/modules.html" title="LM3S" intro=""/>
<tab type="user" visible="yes" url="../../lpc13xx/html/modules.html" title="LPC13" intro=""/>
<tab type="user" visible="yes" url="../../lpc17xx/html/modules.html" title="LPC17" intro=""/>
<tab type="user" visible="yes" url="../../lpc43xx/html/modules.html" title="LPC43" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32g/html/modules.html" title="EMF32 Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32gg/html/modules.html" title="EMF32 Giant Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32lg/html/modules.html" title="EMF32 Leopard Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32tg/html/modules.html" title="EMF32 Tiny Gecko" intro=""/>
<tab type="namespaces" visible="yes" title="">
<tab type="namespaces" visible="yes" title="" intro=""/>
<tab type="namespacemembers" visible="yes" title="" intro=""/>
diff --git a/doc/stm32f4/header_stm32f4.tex b/doc/stm32f4/header_stm32f4.tex
index e634ef2..97cc35f 100644
--- a/doc/stm32f4/header_stm32f4.tex
+++ b/doc/stm32f4/header_stm32f4.tex
@@ -50,7 +50,7 @@
\begin{titlepage}
\vspace*{7cm}
\begin{center}
-{\Huge libopencm3: API Reference\\ STM STM32F4 ARM Cortex M3 Series}\\
+{\Huge libopencm3: API Reference\\ STM STM32F4 ARM Cortex M4 Series}\\
\vspace*{1cm}
{\large Generated by Doxygen 1.8.2}\\
\vspace*{0.5cm}
diff --git a/doc/stm32l1/Doxyfile b/doc/stm32l1/Doxyfile
new file mode 100644
index 0000000..deca18b
--- /dev/null
+++ b/doc/stm32l1/Doxyfile
@@ -0,0 +1,33 @@
+# HTML Documentation for STM32F1 code level
+
+# 14 September 2012
+# (C) Ken Sarkies <ksarkies@internode.on.net>
+
+#---------------------------------------------------------------------------
+# Common Include File
+#---------------------------------------------------------------------------
+
+@INCLUDE = ../Doxyfile_common
+
+#---------------------------------------------------------------------------
+# Local settings
+#---------------------------------------------------------------------------
+
+WARN_LOGFILE = doxygen_stm32l1.log
+
+INPUT = ../../include/libopencm3/license.dox \
+ ../../include/libopencm3/stm32/l1 \
+ ../../include/libopencm3/stm32/common \
+ ../../lib/stm32/l1 \
+ ../../lib/stm32/common
+
+EXCLUDE =
+
+EXCLUDE_PATTERNS = *_common_f24.h
+
+LAYOUT_FILE = DoxygenLayout_stm32l1.xml
+
+TAGFILES = ../cm3/cm3.tag=../../cm3/html \
+
+GENERATE_TAGFILE = stm32l1.tag
+
diff --git a/doc/stm32l1/Doxyfile_latex b/doc/stm32l1/Doxyfile_latex
new file mode 100644
index 0000000..80b5600
--- /dev/null
+++ b/doc/stm32l1/Doxyfile_latex
@@ -0,0 +1,36 @@
+# LaTeX Documentation for STM32L1 code level
+
+# 14 September 2012
+# (C) Ken Sarkies <ksarkies@internode.on.net>
+
+#---------------------------------------------------------------------------
+# Common Include File
+#---------------------------------------------------------------------------
+
+@INCLUDE = ../Doxyfile_common
+
+#---------------------------------------------------------------------------
+# Local settings
+#---------------------------------------------------------------------------
+
+WARN_LOGFILE = doxygen_stm32l1_latex.log
+
+INPUT = ../../include/libopencm3/docmain.dox \
+ ../../include/libopencm3/license.dox \
+ ../../include/libopencm3/stm32/l1 \
+ ../../include/libopencm3/stm32/common \
+ ../../lib/stm32/l1 \
+ ../../lib/stm32/common
+
+EXCLUDE = ../../include/libopencm3/stm32/l1/doc-stm32l1.h
+
+EXCLUDE_PATTERNS = *_common_f24.h
+
+LAYOUT_FILE = DoxygenLayout_stm32l1.xml
+
+GENERATE_HTML = NO
+
+GENERATE_LATEX = YES
+
+LATEX_HEADER = header_stm32l1.tex
+
diff --git a/doc/stm32l1/DoxygenLayout_stm32l1.xml b/doc/stm32l1/DoxygenLayout_stm32l1.xml
new file mode 100644
index 0000000..5d288e6
--- /dev/null
+++ b/doc/stm32l1/DoxygenLayout_stm32l1.xml
@@ -0,0 +1,197 @@
+<doxygenlayout version="1.0">
+ <!-- Navigation index tabs for HTML output -->
+ <navindex>
+ <tab type="mainpage" visible="yes" title="libopencm3"/>
+ <tab type="pages" visible="yes" title="General Information" intro=""/>
+ <tab type="user" visible="yes" url="../../html/index.html" title="Back to Top" intro=""/>
+ <tab type="user" visible="yes" url="../../cm3/html/modules.html" title="CM3 Core" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32f1/html/modules.html" title="STM32F2" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32f2/html/modules.html" title="STM32F2" intro=""/>
+ <tab type="user" visible="yes" url="../../stm32f4/html/modules.html" title="STM32F4" intro=""/>
+ <tab type="modules" visible="yes" title="STM32L1" intro=""/>
+ <tab type="user" visible="yes" url="../../lm3s/html/modules.html" title="LM3S" intro=""/>
+ <tab type="user" visible="yes" url="../../lpc13xx/html/modules.html" title="LPC13" intro=""/>
+ <tab type="user" visible="yes" url="../../lpc17xx/html/modules.html" title="LPC17" intro=""/>
+ <tab type="user" visible="yes" url="../../lpc43xx/html/modules.html" title="LPC43" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32g/html/modules.html" title="EMF32 Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32gg/html/modules.html" title="EMF32 Giant Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32lg/html/modules.html" title="EMF32 Leopard Gecko" intro=""/>
+ <tab type="user" visible="yes" url="../../emf32tg/html/modules.html" title="EMF32 Tiny Gecko" intro=""/>
+ <tab type="namespaces" visible="yes" title="">
+ <tab type="namespaces" visible="yes" title="" intro=""/>
+ <tab type="namespacemembers" visible="yes" title="" intro=""/>
+ </tab>
+ <tab type="classes" visible="yes" title="">
+ <tab type="classes" visible="yes" title="" intro=""/>
+ <tab type="classindex" visible="$ALPHABETICAL_INDEX" title=""/>
+ <tab type="hierarchy" visible="yes" title="" intro=""/>
+ <tab type="classmembers" visible="yes" title="" intro=""/>
+ </tab>
+ <tab type="files" visible="yes" title="">
+ <tab type="files" visible="yes" title="" intro=""/>
+ <tab type="globals" visible="yes" title="" intro=""/>
+ </tab>
+ <tab type="examples" visible="yes" title="" intro=""/>
+ </navindex>
+
+ <!-- Layout definition for a class page -->
+ <class>
+ <briefdescription visible="yes"/>
+ <includes visible="$SHOW_INCLUDE_FILES"/>
+ <inheritancegraph visible="$CLASS_GRAPH"/>
+ <collaborationgraph visible="$COLLABORATION_GRAPH"/>
+ <allmemberslink visible="yes"/>
+ <memberdecl>
+ <nestedclasses visible="yes" title=""/>
+ <publictypes title=""/>
+ <publicslots title=""/>
+ <signals title=""/>
+ <publicmethods title=""/>
+ <publicstaticmethods title=""/>
+ <publicattributes title=""/>
+ <publicstaticattributes title=""/>
+ <protectedtypes title=""/>
+ <protectedslots title=""/>
+ <protectedmethods title=""/>
+ <protectedstaticmethods title=""/>
+ <protectedattributes title=""/>
+ <protectedstaticattributes title=""/>
+ <packagetypes title=""/>
+ <packagemethods title=""/>
+ <packagestaticmethods title=""/>
+ <packageattributes title=""/>
+ <packagestaticattributes title=""/>
+ <properties title=""/>
+ <events title=""/>
+ <privatetypes title=""/>
+ <privateslots title=""/>
+ <privatemethods title=""/>
+ <privatestaticmethods title=""/>
+ <privateattributes title=""/>
+ <privatestaticattributes title=""/>
+ <friends title=""/>
+ <related title="" subtitle=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <typedefs title=""/>
+ <enums title=""/>
+ <constructors title=""/>
+ <functions title=""/>
+ <related title=""/>
+ <variables title=""/>
+ <properties title=""/>
+ <events title=""/>
+ </memberdef>
+ <usedfiles visible="$SHOW_USED_FILES"/>
+ <authorsection visible="yes"/>
+ </class>
+
+ <!-- Layout definition for a namespace page -->
+ <namespace>
+ <briefdescription visible="yes"/>
+ <memberdecl>
+ <nestednamespaces visible="yes" title=""/>
+ <classes visible="yes" title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ </memberdef>
+ <authorsection visible="yes"/>
+ </namespace>
+
+ <!-- Layout definition for a file page -->
+ <file>
+ <briefdescription visible="yes"/>
+ <includes visible="$SHOW_INCLUDE_FILES"/>
+ <includegraph visible="$INCLUDE_GRAPH"/>
+ <includedbygraph visible="$INCLUDED_BY_GRAPH"/>
+ <sourcelink visible="yes"/>
+ <memberdecl>
+ <classes visible="yes" title=""/>
+ <namespaces visible="yes" title=""/>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ </memberdef>
+ <authorsection/>
+ </file>
+
+ <!-- Layout definition for a group page -->
+ <group>
+ <briefdescription visible="yes"/>
+ <groupgraph visible="$GROUP_GRAPHS"/>
+ <memberdecl>
+ <classes visible="yes" title=""/>
+ <namespaces visible="yes" title=""/>
+ <dirs visible="yes" title=""/>
+ <nestedgroups visible="yes" title=""/>
+ <files visible="yes" title=""/>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <enumvalues title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <signals title=""/>
+ <publicslots title=""/>
+ <protectedslots title=""/>
+ <privateslots title=""/>
+ <events title=""/>
+ <properties title=""/>
+ <friends title=""/>
+ <membergroups visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ <memberdef>
+ <pagedocs/>
+ <inlineclasses title=""/>
+ <defines title=""/>
+ <typedefs title=""/>
+ <enums title=""/>
+ <enumvalues title=""/>
+ <functions title=""/>
+ <variables title=""/>
+ <signals title=""/>
+ <publicslots title=""/>
+ <protectedslots title=""/>
+ <privateslots title=""/>
+ <events title=""/>
+ <properties title=""/>
+ <friends title=""/>
+ </memberdef>
+ <authorsection visible="yes"/>
+ </group>
+
+ <!-- Layout definition for a directory page -->
+ <directory>
+ <briefdescription visible="yes"/>
+ <directorygraph visible="yes"/>
+ <memberdecl>
+ <dirs visible="yes"/>
+ <files visible="yes"/>
+ </memberdecl>
+ <detaileddescription title=""/>
+ </directory>
+</doxygenlayout>
diff --git a/doc/stm32l1/header_stm32l1.tex b/doc/stm32l1/header_stm32l1.tex
new file mode 100644
index 0000000..edf6907
--- /dev/null
+++ b/doc/stm32l1/header_stm32l1.tex
@@ -0,0 +1,61 @@
+\documentclass{book}
+\usepackage[a4paper,top=2.5cm,bottom=2.5cm,left=2.5cm,right=2.5cm]{geometry}
+\usepackage{makeidx}
+\usepackage{natbib}
+\usepackage{graphicx}
+\usepackage{multicol}
+\usepackage{float}
+\usepackage{listings}
+\usepackage{color}
+\usepackage{ifthen}
+\usepackage[table]{xcolor}
+\usepackage{textcomp}
+\usepackage{alltt}
+\usepackage{ifpdf}
+\ifpdf
+\usepackage[pdftex,
+ pagebackref=true,
+ colorlinks=true,
+ linkcolor=blue,
+ unicode
+ ]{hyperref}
+\else
+\usepackage[ps2pdf,
+ pagebackref=true,
+ colorlinks=true,
+ linkcolor=blue,
+ unicode
+ ]{hyperref}
+\usepackage{pspicture}
+\fi
+\usepackage[utf8]{inputenc}
+\usepackage{mathptmx}
+\usepackage[scaled=.90]{helvet}
+\usepackage{courier}
+\usepackage{sectsty}
+\usepackage{amssymb}
+\usepackage[titles]{tocloft}
+\usepackage{doxygen}
+\lstset{language=C++,inputencoding=utf8,basicstyle=\footnotesize,breaklines=true,breakatwhitespace=true,tabsize=4,numbers=left }
+\makeindex
+\setcounter{tocdepth}{3}
+\renewcommand{\footrulewidth}{0.4pt}
+\renewcommand{\familydefault}{\sfdefault}
+\hfuzz=15pt
+\setlength{\emergencystretch}{15pt}
+\hbadness=750
+\tolerance=750
+\begin{document}
+\hypersetup{pageanchor=false,citecolor=blue}
+\begin{titlepage}
+\vspace*{7cm}
+\begin{center}
+{\Huge libopencm3: API Reference\\ STM STM32L1 ARM Cortex M3 Series}\\
+\vspace*{1cm}
+{\large Generated by Doxygen 1.8.2}\\
+\vspace*{0.5cm}
+{\small Thu Sep 13 2012 23:26:45}\\
+\end{center}
+\end{titlepage}
+\pagenumbering{arabic}
+\hypersetup{pageanchor=true,citecolor=blue}
diff --git a/examples/stm32/f1/Makefile.include b/examples/stm32/f1/Makefile.include
index 6b87b98..2ae9e27 100644
--- a/examples/stm32/f1/Makefile.include
+++ b/examples/stm32/f1/Makefile.include
@@ -45,6 +45,15 @@ LDFLAGS += --static -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group \
-L$(TOOLCHAIN_DIR)/lib \
-T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections \
$(ARCH_FLAGS) -mfix-cortex-m3-ldrd
+
+ifneq ($(OPENCM3_DIR),)
+CFLAGS += -I$(OPENCM3_DIR)/include
+LDFLAGS += -L$(OPENCM3_DIR)/lib -L$(OPENCM3_DIR)/lib/stm32/f1
+SCRIPT_DIR = $(OPENCM3_DIR)/share
+else
+SCRIPT_DIR = $(shell dirname $(shell readlink -f $(shell which $(PREFIX)-gcc)))/../$(PREFIX)/share
+endif
+
OBJS += $(BINARY).o
OOCD ?= openocd
@@ -53,6 +62,9 @@ OOCD_BOARD ?= olimex_stm32_h103
# Black magic probe specific variables
# Set the BMP_PORT to a serial port and then BMP is used for flashing
BMP_PORT ?=
+# texane/stlink can be used by uncommenting this...
+# or defining it in your own makefiles
+#STLINK_PORT ?= :4242
# Be silent per default, but 'make V=1' will show all compiler calls.
ifneq ($(V),1)
@@ -107,6 +119,7 @@ clean:
$(Q)rm -f *.srec
$(Q)rm -f *.list
+ifeq ($(STLINK_PORT),)
ifeq ($(BMP_PORT),)
ifeq ($(OOCD_SERIAL),)
%.flash: %.hex
@@ -140,6 +153,14 @@ else
-x $(TOOLCHAIN_DIR)/scripts/black_magic_probe_flash.scr \
$(*).elf
endif
+else
+%.flash: %.elf
+ @echo " GDB $(*).elf (flash)"
+ $(Q)$(GDB) --batch \
+ -ex 'target extended-remote $(STLINK_PORT)' \
+ -x $(SCRIPT_DIR)/libopencm3/scripts/stlink_flash.scr \
+ $(*).elf
+endif
.PHONY: images clean
diff --git a/examples/stm32/f1/lisa-m-1/can/README b/examples/stm32/f1/lisa-m-1/can/README
new file mode 100644
index 0000000..3a14e3b
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-1/can/README
@@ -0,0 +1,4 @@
+This test sets up the CAN interface on Lisa/M and transmits 8 bites every
+100ms. The first byte is being incremented in each cycle. The demo also
+receives messages and is displaing the first 4 bits of the first byte on the
+board LEDs.
diff --git a/examples/stm32/f1/lisa-m-1/can/can.c b/examples/stm32/f1/lisa-m-1/can/can.c
index 41432b6..463d7fc 100644
--- a/examples/stm32/f1/lisa-m-1/can/can.c
+++ b/examples/stm32/f1/lisa-m-1/can/can.c
@@ -106,15 +106,15 @@ void can_setup(void)
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_CANEN);
- AFIO_MAPR = AFIO_MAPR_CAN1_REMAP_PORTB;
+ AFIO_MAPR |= AFIO_MAPR_CAN1_REMAP_PORTB;
/* Configure CAN pin: RX (input pull-up). */
- gpio_set_mode(GPIOB, GPIO_MODE_INPUT,
+ gpio_set_mode(GPIO_BANK_CAN1_PB_RX, GPIO_MODE_INPUT,
GPIO_CNF_INPUT_PULL_UPDOWN, GPIO_CAN1_PB_RX);
gpio_set(GPIOB, GPIO_CAN1_PB_RX);
/* Configure CAN pin: TX. */
- gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ,
+ gpio_set_mode(GPIO_BANK_CAN1_PB_TX, GPIO_MODE_OUTPUT_50_MHZ,
GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_CAN1_PB_TX);
/* NVIC setup. */
@@ -135,7 +135,9 @@ void can_setup(void)
CAN_BTR_SJW_1TQ,
CAN_BTR_TS1_3TQ,
CAN_BTR_TS2_4TQ,
- 12)) /* BRP+1: Baud rate prescaler */
+ 12, /* BRP+1: Baud rate prescaler */
+ false, /* loopback mode */
+ false)) /* silent mode */
{
gpio_set(GPIOA, GPIO8); /* LED0 off */
gpio_set(GPIOB, GPIO4); /* LED1 off */
@@ -165,8 +167,10 @@ void sys_tick_handler(void)
static int temp32 = 0;
static u8 data[8] = {0, 1, 2, 0, 0, 0, 0, 0};
- /* We call this handler every 1ms so 1000ms = 1s on/off. */
- if (++temp32 != 1000)
+ /* We call this handler every 1ms so 100ms = 1s
+ * Resulting in 100Hz message frequency.
+ */
+ if (++temp32 != 100)
return;
temp32 = 0;
diff --git a/examples/stm32/f1/lisa-m-2/adc_injec/Makefile b/examples/stm32/f1/lisa-m-2/adc_injec/Makefile
index e50737b..666c393 100644
--- a/examples/stm32/f1/lisa-m-2/adc_injec/Makefile
+++ b/examples/stm32/f1/lisa-m-2/adc_injec/Makefile
@@ -18,6 +18,7 @@
##
BINARY = adc_injec
+
# Comment the following line if you _don't_ have luftboot flashed!
LDFLAGS += -Wl,-Ttext=0x8002000
CFLAGS += -std=c99
diff --git a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig/Makefile b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig/Makefile
index af2e9e6..72eab49 100644
--- a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig/Makefile
+++ b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig/Makefile
@@ -18,6 +18,7 @@
##
BINARY = adc_injec_timtrig
+
# Comment the following line if you _don't_ have luftboot flashed!
LDFLAGS += -Wl,-Ttext=0x8002000
CFLAGS += -std=c99
diff --git a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/Makefile b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/Makefile
index c88152e..8ad47e2 100644
--- a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/Makefile
+++ b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq/Makefile
@@ -18,6 +18,7 @@
##
BINARY = adc_injec_timtrig_irq
+
# Comment the following line if you _don't_ have luftboot flashed!
LDFLAGS += -Wl,-Ttext=0x8002000
CFLAGS += -std=c99
diff --git a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/Makefile b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/Makefile
index d9a74a2..a3cccec 100644
--- a/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/Makefile
+++ b/examples/stm32/f1/lisa-m-2/adc_injec_timtrig_irq_4ch/Makefile
@@ -18,6 +18,7 @@
##
BINARY = adc_injec_timtrig_irq_4ch
+
# Comment the following line if you _don't_ have luftboot flashed!
LDFLAGS += -Wl,-Ttext=0x8002000
CFLAGS += -std=c99
diff --git a/examples/stm32/f1/lisa-m-2/adc_regular/Makefile b/examples/stm32/f1/lisa-m-2/adc_regular/Makefile
index 20355ce..b61587f 100644
--- a/examples/stm32/f1/lisa-m-2/adc_regular/Makefile
+++ b/examples/stm32/f1/lisa-m-2/adc_regular/Makefile
@@ -18,6 +18,7 @@
##
BINARY = adc
+
# Comment the following line if you _don't_ have luftboot flashed!
LDFLAGS += -Wl,-Ttext=0x8002000
CFLAGS += -std=c99
diff --git a/examples/stm32/f1/lisa-m-2/can/Makefile b/examples/stm32/f1/lisa-m-2/can/Makefile
new file mode 100644
index 0000000..71a787a
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/can/Makefile
@@ -0,0 +1,28 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = can
+
+# Comment the following line if you _don't_ have luftboot flashed!
+LDFLAGS += -Wl,-Ttext=0x8002000
+CFLAGS += -std=c99
+LDSCRIPT = ../lisa-m.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/f1/lisa-m-2/can/README b/examples/stm32/f1/lisa-m-2/can/README
new file mode 100644
index 0000000..3a14e3b
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/can/README
@@ -0,0 +1,4 @@
+This test sets up the CAN interface on Lisa/M and transmits 8 bites every
+100ms. The first byte is being incremented in each cycle. The demo also
+receives messages and is displaing the first 4 bits of the first byte on the
+board LEDs.
diff --git a/examples/stm32/f1/lisa-m-2/can/can.c b/examples/stm32/f1/lisa-m-2/can/can.c
new file mode 100644
index 0000000..dd673ba
--- /dev/null
+++ b/examples/stm32/f1/lisa-m-2/can/can.c
@@ -0,0 +1,234 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
+ * Copyright (C) 2010-2011 Piotr Esden-Tempski <piotr@esden.net>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/f1/rcc.h>
+#include <libopencm3/stm32/f1/flash.h>
+#include <libopencm3/stm32/f1/gpio.h>
+#include <libopencm3/cm3/nvic.h>
+#include <libopencm3/cm3/systick.h>
+#include <libopencm3/stm32/can.h>
+
+struct can_tx_msg {
+ u32 std_id;
+ u32 ext_id;
+ u8 ide;
+ u8 rtr;
+ u8 dlc;
+ u8 data[8];
+};
+
+struct can_rx_msg {
+ u32 std_id;
+ u32 ext_id;
+ u8 ide;
+ u8 rtr;
+ u8 dlc;
+ u8 data[8];
+ u8 fmi;
+};
+
+struct can_tx_msg can_tx_msg;
+struct can_rx_msg can_rx_msg;
+
+void gpio_setup(void)
+{
+ /* Enable Alternate Function clock. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN);
+
+ /* Enable GPIOA clock. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPAEN);
+
+ /* Enable GPIOB clock. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
+
+ /* Enable GPIOC clock. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPCEN);
+
+ /* Preconfigure LEDs. */
+ gpio_set(GPIOA, GPIO8); /* LED1 off */
+ gpio_set(GPIOB, GPIO4); /* LED2 off */
+ gpio_set(GPIOC, GPIO2); /* LED3 off */
+ gpio_set(GPIOC, GPIO5); /* LED4 off */
+ gpio_set(GPIOC, GPIO15); /* LED5 off */
+
+ /* Configure LED GPIOOs. */
+ gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO8);
+ gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO4);
+ gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO2);
+ gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO5);
+ gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO15);
+
+ /* Configure PB4 as GPIO. */
+ AFIO_MAPR |= AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST;
+
+}
+
+void systick_setup(void)
+{
+ /* 72MHz / 8 => 9000000 counts per second */
+ systick_set_clocksource(STK_CTRL_CLKSOURCE_AHB_DIV8);
+
+ /* 9000000/9000 = 1000 overflows per second - every 1ms one interrupt */
+ systick_set_reload(9000);
+
+ systick_interrupt_enable();
+
+ /* Start counting. */
+ systick_counter_enable();
+}
+
+void can_setup(void)
+{
+ /* Enable peripheral clocks. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN);
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
+ rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_CAN1EN);
+
+ AFIO_MAPR |= AFIO_MAPR_CAN1_REMAP_PORTB;
+
+ /* Configure CAN pin: RX (input pull-up). */
+ gpio_set_mode(GPIO_BANK_CAN1_PB_RX, GPIO_MODE_INPUT,
+ GPIO_CNF_INPUT_PULL_UPDOWN, GPIO_CAN1_PB_RX);
+ gpio_set(GPIO_BANK_CAN1_PB_RX, GPIO_CAN1_PB_RX);
+
+ /* Configure CAN pin: TX. */
+ gpio_set_mode(GPIO_BANK_CAN1_PB_TX, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_CAN1_PB_TX);
+
+ /* NVIC setup. */
+ nvic_enable_irq(NVIC_USB_LP_CAN_RX0_IRQ);
+ nvic_set_priority(NVIC_USB_LP_CAN_RX0_IRQ, 1);
+
+ /* Reset CAN. */
+ can_reset(CAN1);
+
+ /* CAN cell init. */
+ if (can_init(CAN1,
+ false, /* TTCM: Time triggered comm mode? */
+ true, /* ABOM: Automatic bus-off management? */
+ false, /* AWUM: Automatic wakeup mode? */
+ false, /* NART: No automatic retransmission? */
+ false, /* RFLM: Receive FIFO locked mode? */
+ false, /* TXFP: Transmit FIFO priority? */
+ CAN_BTR_SJW_1TQ,
+ CAN_BTR_TS1_3TQ,
+ CAN_BTR_TS2_4TQ,
+ 12)) /* BRP+1: Baud rate prescaler */
+ {
+ gpio_set(GPIOA, GPIO8); /* LED1 off */
+ gpio_set(GPIOB, GPIO4); /* LED2 off */
+ gpio_set(GPIOC, GPIO2); /* LED3 off */
+ gpio_clear(GPIOC, GPIO5); /* LED4 on */
+ gpio_set(GPIOC, GPIO15); /* LED5 off */
+
+ /* Die because we failed to initialize. */
+ while (1)
+ __asm__("nop");
+ }
+
+ /* CAN filter 0 init. */
+ can_filter_id_mask_32bit_init(CAN1,
+ 0, /* Filter ID */
+ 0, /* CAN ID */
+ 0, /* CAN ID mask */
+ 0, /* FIFO assignment (here: FIFO0) */
+ true); /* Enable the filter. */
+
+ /* Enable CAN RX interrupt. */
+ can_enable_irq(CAN1, CAN_IER_FMPIE0);
+}
+
+void sys_tick_handler(void)
+{
+ static int temp32 = 0;
+ static u8 data[8] = {0, 1, 2, 0, 0, 0, 0, 0};
+
+ /* We call this handler every 1ms so every 100ms = 0.1s
+ * resulting in 100Hz message rate.
+ */
+ if (++temp32 != 100)
+ return;
+
+ temp32 = 0;
+
+ /* Transmit CAN frame. */
+ data[0]++;
+ if (can_transmit(CAN1,
+ 0, /* (EX/ST)ID: CAN ID */
+ false, /* IDE: CAN ID extended? */
+ false, /* RTR: Request transmit? */
+ 8, /* DLC: Data length */
+ data) == -1)
+ {
+ gpio_set(GPIOA, GPIO8); /* LED1 off */
+ gpio_set(GPIOB, GPIO4); /* LED2 off */
+ gpio_set(GPIOC, GPIO2); /* LED3 off */
+ gpio_set(GPIOC, GPIO5); /* LED4 off */
+ gpio_clear(GPIOC, GPIO15); /* LED5 on */
+ }
+}
+
+void usb_lp_can_rx0_isr(void)
+{
+ u32 id, fmi;
+ bool ext, rtr;
+ u8 length, data[8];
+
+ can_receive(CAN1, 0, false, &id, &ext, &rtr, &fmi, &length, data);
+
+ if (data[0] & 1)
+ gpio_clear(GPIOA, GPIO8);
+ else
+ gpio_set(GPIOA, GPIO8);
+
+ if (data[0] & 2)
+ gpio_clear(GPIOB, GPIO4);
+ else
+ gpio_set(GPIOB, GPIO4);
+
+ if (data[0] & 4)
+ gpio_clear(GPIOC, GPIO2);
+ else
+ gpio_set(GPIOC, GPIO2);
+
+ if (data[0] & 8)
+ gpio_clear(GPIOC, GPIO5);
+ else
+ gpio_set(GPIOC, GPIO5);
+
+ can_fifo_release(CAN1, 0);
+}
+
+int main(void)
+{
+ rcc_clock_setup_in_hse_12mhz_out_72mhz();
+ gpio_setup();
+ can_setup();
+ systick_setup();
+
+ while (1); /* Halt. */
+
+ return 0;
+}
diff --git a/examples/stm32/f1/lisa-m-2/fancyblink/Makefile b/examples/stm32/f1/lisa-m-2/fancyblink/Makefile
index e453f84..90ce834 100644
--- a/examples/stm32/f1/lisa-m-2/fancyblink/Makefile
+++ b/examples/stm32/f1/lisa-m-2/fancyblink/Makefile
@@ -19,6 +19,9 @@
BINARY = fancyblink
+# Comment the following line if you _don't_ have luftboot flashed!
+LDFLAGS += -Wl,-Ttext=0x8002000
+CFLAGS += -std=c99
LDSCRIPT = ../lisa-m.ld
include ../../Makefile.include
diff --git a/examples/stm32/f1/lisa-m-2/usart/Makefile b/examples/stm32/f1/lisa-m-2/usart/Makefile
index 4ba7e9e..498cd83 100644
--- a/examples/stm32/f1/lisa-m-2/usart/Makefile
+++ b/examples/stm32/f1/lisa-m-2/usart/Makefile
@@ -19,6 +19,9 @@
BINARY = usart
+# Comment the following line if you _don't_ have luftboot flashed!
+LDFLAGS += -Wl,-Ttext=0x8002000
+CFLAGS += -std=c99
LDSCRIPT = ../lisa-m.ld
include ../../Makefile.include
diff --git a/examples/stm32/f1/lisa-m-2/usart_dma/Makefile b/examples/stm32/f1/lisa-m-2/usart_dma/Makefile
index 813cda9..5fa5c51 100644
--- a/examples/stm32/f1/lisa-m-2/usart_dma/Makefile
+++ b/examples/stm32/f1/lisa-m-2/usart_dma/Makefile
@@ -19,6 +19,9 @@
BINARY = usart_dma
+# Comment the following line if you _don't_ have luftboot flashed!
+LDFLAGS += -Wl,-Ttext=0x8002000
+CFLAGS += -std=c99
LDSCRIPT = ../lisa-m.ld
include ../../Makefile.include
diff --git a/examples/stm32/f1/lisa-m-2/usart_irq/Makefile b/examples/stm32/f1/lisa-m-2/usart_irq/Makefile
index 7baa2fe..dbab248 100644
--- a/examples/stm32/f1/lisa-m-2/usart_irq/Makefile
+++ b/examples/stm32/f1/lisa-m-2/usart_irq/Makefile
@@ -19,6 +19,9 @@
BINARY = usart_irq
+# Comment the following line if you _don't_ have luftboot flashed!
+LDFLAGS += -Wl,-Ttext=0x8002000
+CFLAGS += -std=c99
LDSCRIPT = ../lisa-m.ld
include ../../Makefile.include
diff --git a/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile b/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile
index 0b6fd3e..1cc2ed1 100644
--- a/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile
+++ b/examples/stm32/f1/lisa-m-2/usart_irq_printf/Makefile
@@ -19,6 +19,9 @@
BINARY = usart_irq_printf
+# Comment the following line if you _don't_ have luftboot flashed!
+LDFLAGS += -Wl,-Ttext=0x8002000
+CFLAGS += -std=c99
LDSCRIPT = ../lisa-m.ld
include ../../Makefile.include
diff --git a/examples/stm32/f1/lisa-m-2/usart_printf/Makefile b/examples/stm32/f1/lisa-m-2/usart_printf/Makefile
index 80ac033..6eaf005 100644
--- a/examples/stm32/f1/lisa-m-2/usart_printf/Makefile
+++ b/examples/stm32/f1/lisa-m-2/usart_printf/Makefile
@@ -19,6 +19,9 @@
BINARY = usart_printf
+# Comment the following line if you _don't_ have luftboot flashed!
+LDFLAGS += -Wl,-Ttext=0x8002000
+CFLAGS += -std=c99
LDSCRIPT = ../lisa-m.ld
include ../../Makefile.include
diff --git a/examples/stm32/f1/obldc-strip/can/Makefile b/examples/stm32/f1/obldc-strip/can/Makefile
new file mode 100644
index 0000000..ae14841
--- /dev/null
+++ b/examples/stm32/f1/obldc-strip/can/Makefile
@@ -0,0 +1,25 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = can
+
+LDSCRIPT = ../obldc-strip.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/f1/obldc-strip/can/README b/examples/stm32/f1/obldc-strip/can/README
new file mode 100644
index 0000000..3a14e3b
--- /dev/null
+++ b/examples/stm32/f1/obldc-strip/can/README
@@ -0,0 +1,4 @@
+This test sets up the CAN interface on Lisa/M and transmits 8 bites every
+100ms. The first byte is being incremented in each cycle. The demo also
+receives messages and is displaing the first 4 bits of the first byte on the
+board LEDs.
diff --git a/examples/stm32/f1/obldc-strip/can/can.c b/examples/stm32/f1/obldc-strip/can/can.c
new file mode 100644
index 0000000..82473e1
--- /dev/null
+++ b/examples/stm32/f1/obldc-strip/can/can.c
@@ -0,0 +1,202 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2012 Piotr Esden-Tempski <piotr@esden.net>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/f1/rcc.h>
+#include <libopencm3/stm32/f1/flash.h>
+#include <libopencm3/stm32/f1/gpio.h>
+#include <libopencm3/cm3/nvic.h>
+#include <libopencm3/cm3/systick.h>
+#include <libopencm3/stm32/can.h>
+
+struct can_tx_msg {
+ u32 std_id;
+ u32 ext_id;
+ u8 ide;
+ u8 rtr;
+ u8 dlc;
+ u8 data[8];
+};
+
+struct can_rx_msg {
+ u32 std_id;
+ u32 ext_id;
+ u8 ide;
+ u8 rtr;
+ u8 dlc;
+ u8 data[8];
+ u8 fmi;
+};
+
+struct can_tx_msg can_tx_msg;
+struct can_rx_msg can_rx_msg;
+
+void gpio_setup(void)
+{
+ /* Enable Alternate Function clock. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN);
+
+ /* Enable GPIOB clock. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
+
+ /* Preconfigure LEDs. */
+ gpio_set(GPIOB, GPIO4); /* LED green off */
+ gpio_set(GPIOB, GPIO5); /* LED red off */
+
+ /* Configure LED GPIOs. */
+ gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO4);
+ gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO5);
+
+ /* Configure PB4 as GPIO. */
+ AFIO_MAPR |= AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST;
+
+}
+
+void systick_setup(void)
+{
+ /* 64MHz / 8 => 8000000 counts per second */
+ systick_set_clocksource(STK_CTRL_CLKSOURCE_AHB_DIV8);
+
+ /* 8000000/8000 = 1000 overflows per second - every 1ms one interrupt */
+ systick_set_reload(8000);
+
+ systick_interrupt_enable();
+
+ /* Start counting. */
+ systick_counter_enable();
+}
+
+void can_setup(void)
+{
+ /* Enable peripheral clocks. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN);
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
+ rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_CAN1EN);
+
+ AFIO_MAPR |= AFIO_MAPR_CAN1_REMAP_PORTB;
+
+ /* Configure CAN pin: RX (input pull-up). */
+ gpio_set_mode(GPIO_BANK_CAN1_PB_RX, GPIO_MODE_INPUT,
+ GPIO_CNF_INPUT_PULL_UPDOWN, GPIO_CAN1_PB_RX);
+ gpio_set(GPIO_BANK_CAN1_PB_RX, GPIO_CAN1_PB_RX);
+
+ /* Configure CAN pin: TX. */
+ gpio_set_mode(GPIO_BANK_CAN1_PB_TX, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_CAN1_PB_TX);
+
+ /* NVIC setup. */
+ nvic_enable_irq(NVIC_USB_LP_CAN_RX0_IRQ);
+ nvic_set_priority(NVIC_USB_LP_CAN_RX0_IRQ, 1);
+
+ /* Reset CAN. */
+ can_reset(CAN1);
+
+ /* CAN cell init.
+ * Setting the bitrate to 1MBit. APB1 = 32MHz,
+ * prescaler = 2 -> 16MHz time quanta frequency.
+ * 1tq sync + 9tq bit segment1 (TS1) + 6tq bit segment2 (TS2) =
+ * 16time quanto per bit period, therefor 16MHz/16 = 1MHz
+ */
+ if (can_init(CAN1,
+ false, /* TTCM: Time triggered comm mode? */
+ true, /* ABOM: Automatic bus-off management? */
+ false, /* AWUM: Automatic wakeup mode? */
+ false, /* NART: No automatic retransmission? */
+ false, /* RFLM: Receive FIFO locked mode? */
+ false, /* TXFP: Transmit FIFO priority? */
+ CAN_BTR_SJW_1TQ,
+ CAN_BTR_TS1_9TQ,
+ CAN_BTR_TS2_6TQ,
+ 2)) /* BRP+1: Baud rate prescaler */
+ {
+ gpio_clear(GPIOB, GPIO4); /* LED green on */
+ gpio_set(GPIOB, GPIO5); /* LED red off */
+
+ /* Die because we failed to initialize. */
+ while (1)
+ __asm__("nop");
+ }
+
+ /* CAN filter 0 init. */
+ can_filter_id_mask_32bit_init(CAN1,
+ 0, /* Filter ID */
+ 0, /* CAN ID */
+ 0, /* CAN ID mask */
+ 0, /* FIFO assignment (here: FIFO0) */
+ true); /* Enable the filter. */
+
+ /* Enable CAN RX interrupt. */
+ can_enable_irq(CAN1, CAN_IER_FMPIE0);
+}
+
+void sys_tick_handler(void)
+{
+ static u8 data[8] = {0, 1, 2, 0, 0, 0, 0, 0};
+
+ /* We call this handler every 1ms so every 1ms = 0.001s
+ * resulting in 1000Hz message rate.
+ */
+
+ /* Transmit CAN frame. */
+ data[0]++;
+ if (can_transmit(CAN1,
+ 0, /* (EX/ST)ID: CAN ID */
+ false, /* IDE: CAN ID extended? */
+ false, /* RTR: Request transmit? */
+ 8, /* DLC: Data length */
+ data) == -1)
+ {
+ gpio_set(GPIOB, GPIO4); /* LED green off */
+ gpio_clear(GPIOB, GPIO5); /* LED red on */
+ }
+}
+
+void usb_lp_can_rx0_isr(void)
+{
+ u32 id, fmi;
+ bool ext, rtr;
+ u8 length, data[8];
+
+ can_receive(CAN1, 0, false, &id, &ext, &rtr, &fmi, &length, data);
+
+ if (data[0] & 0x40)
+ gpio_clear(GPIOB, GPIO4);
+ else
+ gpio_set(GPIOB, GPIO4);
+
+ if (data[0] & 0x80)
+ gpio_clear(GPIOB, GPIO5);
+ else
+ gpio_set(GPIOB, GPIO5);
+
+ can_fifo_release(CAN1, 0);
+}
+
+int main(void)
+{
+ rcc_clock_setup_in_hsi_out_64mhz();
+ gpio_setup();
+ can_setup();
+ systick_setup();
+
+ while (1); /* Halt. */
+
+ return 0;
+}
diff --git a/examples/stm32/f1/obldc-strip/led/Makefile b/examples/stm32/f1/obldc-strip/led/Makefile
new file mode 100644
index 0000000..f8ff540
--- /dev/null
+++ b/examples/stm32/f1/obldc-strip/led/Makefile
@@ -0,0 +1,25 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = led
+
+LDSCRIPT = ../obldc-strip.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/f1/obldc-strip/led/led.c b/examples/stm32/f1/obldc-strip/led/led.c
new file mode 100644
index 0000000..e9fb92f
--- /dev/null
+++ b/examples/stm32/f1/obldc-strip/led/led.c
@@ -0,0 +1,65 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2012 Piotr Esden-Tempski <piotr@esden.net>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/f1/rcc.h>
+#include <libopencm3/stm32/f1/gpio.h>
+
+void clock_setup(void)
+{
+ /* Set STM32 to 64 MHz. */
+ rcc_clock_setup_in_hsi_out_64mhz();
+
+ /* Enable alternate function peripheral clock. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN);
+
+ /* Enable GPIOB clock. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
+}
+
+void gpio_setup(void)
+{
+
+ /* Configure PB4 as GPIO. */
+ AFIO_MAPR |= AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST;
+
+ /* Set GPIO4 and 5 (in GPIO port B) to 'output push-pull'. */
+ gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO4 | GPIO5);
+
+}
+
+int main(void)
+{
+ int i;
+
+ clock_setup();
+ gpio_setup();
+
+ /* Blink the LEDs on the board. */
+ while (1) {
+ gpio_toggle(GPIOB, GPIO4); /* LED on/off */
+ for (i = 0; i < 8000000; i++) /* Wait a bit. */
+ __asm__("nop");
+ gpio_toggle(GPIOB, GPIO5); /* LED on/off */
+ for (i = 0; i < 8000000; i++) /* Wait a bit. */
+ __asm__("nop");
+ }
+
+ return 0;
+}
diff --git a/examples/stm32/f1/obldc-strip/obldc-strip.ld b/examples/stm32/f1/obldc-strip/obldc-strip.ld
new file mode 100644
index 0000000..9778070
--- /dev/null
+++ b/examples/stm32/f1/obldc-strip/obldc-strip.ld
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* Linker script for Open-BLDC (STM32F103CBT6, 128K flash, 20K RAM). */
+
+/* Define memory regions. */
+MEMORY
+{
+ rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K
+ ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
+}
+
+/* Include the common ld script. */
+INCLUDE libopencm3_stm32f1.ld
+
diff --git a/examples/stm32/f1/obldc-strip/systick/Makefile b/examples/stm32/f1/obldc-strip/systick/Makefile
new file mode 100644
index 0000000..d89dd3e
--- /dev/null
+++ b/examples/stm32/f1/obldc-strip/systick/Makefile
@@ -0,0 +1,25 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = systick
+
+LDSCRIPT = ../obldc-strip.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/f1/obldc-strip/systick/systick.c b/examples/stm32/f1/obldc-strip/systick/systick.c
new file mode 100644
index 0000000..8b94901
--- /dev/null
+++ b/examples/stm32/f1/obldc-strip/systick/systick.c
@@ -0,0 +1,81 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2012 Piotr Esden-Tempski <piotr@esden.net>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/f1/rcc.h>
+#include <libopencm3/stm32/f1/flash.h>
+#include <libopencm3/stm32/f1/gpio.h>
+#include <libopencm3/cm3/nvic.h>
+#include <libopencm3/cm3/systick.h>
+
+u32 temp32;
+
+void gpio_setup(void)
+{
+ /* Enable alternate function peripheral clock. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN);
+
+ /* Enable GPIOB clock. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
+
+ gpio_clear(GPIOB, GPIO4); /* LED green on */
+ gpio_set(GPIOB, GPIO5); /* LED red off */
+
+ /* Set GPIO4/5 (in GPIO port B) to 'output push-pull' for the LEDs. */
+ gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO4);
+ gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO5);
+
+ AFIO_MAPR |= AFIO_MAPR_SWJ_CFG_FULL_SWJ_NO_JNTRST;
+}
+
+void sys_tick_handler(void)
+{
+ temp32++;
+
+ /* We call this handler every 1ms so 1000ms = 1s on/off. */
+ if (temp32 == 1000) {
+ gpio_toggle(GPIOB, GPIO4); /* LED green on/off */
+ gpio_toggle(GPIOB, GPIO5); /* LED red on/off */
+ temp32 = 0;
+ }
+}
+
+int main(void)
+{
+ rcc_clock_setup_in_hsi_out_64mhz();
+ gpio_setup();
+
+ temp32 = 0;
+
+ /* 64MHz / 8 => 8000000 counts per second */
+ systick_set_clocksource(STK_CTRL_CLKSOURCE_AHB_DIV8);
+
+ /* 8000000/8000 = 1000 overflows per second - every 1ms one interrupt */
+ systick_set_reload(8000);
+
+ systick_interrupt_enable();
+
+ /* Start counting. */
+ systick_counter_enable();
+
+ while (1); /* Halt. */
+
+ return 0;
+}
diff --git a/examples/stm32/f1/obldc-strip/usart/Makefile b/examples/stm32/f1/obldc-strip/usart/Makefile
new file mode 100644
index 0000000..40dec09
--- /dev/null
+++ b/examples/stm32/f1/obldc-strip/usart/Makefile
@@ -0,0 +1,25 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = usart
+
+LDSCRIPT = ../obldc-strip.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/f1/obldc-strip/usart/usart.c b/examples/stm32/f1/obldc-strip/usart/usart.c
new file mode 100644
index 0000000..56940e2
--- /dev/null
+++ b/examples/stm32/f1/obldc-strip/usart/usart.c
@@ -0,0 +1,87 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2012 Piotr Esden-Tempski <piotr@esden.net>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/f1/rcc.h>
+#include <libopencm3/stm32/f1/gpio.h>
+#include <libopencm3/stm32/usart.h>
+
+void clock_setup(void)
+{
+ rcc_clock_setup_in_hsi_out_64mhz();
+
+ /* Enable clocks for GPIO port B (for GPIO_USART1_TX and LED) and USART1. */
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_IOPBEN);
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_AFIOEN);
+ rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_USART1EN);
+}
+
+void usart_setup(void)
+{
+ /* Setup GPIO6 (in GPIO port A) to 'output push-pull' for LED use. */
+ gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO5);
+
+ AFIO_MAPR |= AFIO_MAPR_USART1_REMAP;
+
+ /* Setup GPIO pin GPIO_USART3_TX/GPIO10 on GPIO port B for transmit. */
+ gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_RE_TX);
+
+ /* Setup UART parameters. */
+ usart_set_baudrate(USART1, 230400);
+ usart_set_databits(USART1, 8);
+ usart_set_stopbits(USART1, USART_STOPBITS_1);
+ usart_set_mode(USART1, USART_MODE_TX);
+ usart_set_parity(USART1, USART_PARITY_NONE);
+ usart_set_flow_control(USART1, USART_FLOWCONTROL_NONE);
+
+ /* Finally enable the USART. */
+ usart_enable(USART1);
+}
+
+void gpio_setup(void)
+{
+ /* Set GPIO5 (in GPIO port B) to 'output push-pull'. */
+ gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ,
+ GPIO_CNF_OUTPUT_PUSHPULL, GPIO5);
+}
+
+int main(void)
+{
+ int i, j = 0, c = 0;
+
+ clock_setup();
+ gpio_setup();
+ usart_setup();
+
+ /* Blink the LED (PA6) on the board with every transmitted byte. */
+ while (1) {
+ gpio_toggle(GPIOB, GPIO5); /* LED red on/off */
+ usart_send_blocking(USART1, c + '0'); /* Send a byte. */
+ c = (c == 9) ? 0 : c + 1; /* Increment c. */
+ if ((j++ % 80) == 0) { /* Newline after line full. */
+ usart_send_blocking(USART1, '\r');
+ usart_send_blocking(USART1, '\n');
+ }
+ for (i = 0; i < 800000; i++) /* Wait a bit. */
+ __asm__("nop");
+ }
+
+ return 0;
+}
diff --git a/examples/stm32/f1/other/usb_dfu/usbdfu.c b/examples/stm32/f1/other/usb_dfu/usbdfu.c
index 268274e..44dde16 100644
--- a/examples/stm32/f1/other/usb_dfu/usbdfu.c
+++ b/examples/stm32/f1/other/usb_dfu/usbdfu.c
@@ -249,6 +249,8 @@ int main(void)
AFIO_MAPR |= AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON;
gpio_set_mode(GPIOA, GPIO_MODE_INPUT, 0, GPIO15);
+ rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_OTGFSEN);
+
usbd_dev = usbd_init(&stm32f107_usb_driver, &dev, &config, usb_strings);
usbd_set_control_buffer_size(usbd_dev, sizeof(usbd_control_buffer));
usbd_register_control_callback(
diff --git a/examples/stm32/l1/Makefile.include b/examples/stm32/l1/Makefile.include
new file mode 100644
index 0000000..57b7030
--- /dev/null
+++ b/examples/stm32/l1/Makefile.include
@@ -0,0 +1,164 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+## Copyright (C) 2010 Piotr Esden-Tempski <piotr@esden.net>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+PREFIX ?= arm-none-eabi
+#PREFIX ?= arm-elf
+CC = $(PREFIX)-gcc
+LD = $(PREFIX)-gcc
+OBJCOPY = $(PREFIX)-objcopy
+OBJDUMP = $(PREFIX)-objdump
+GDB = $(PREFIX)-gdb
+
+TOOLCHAIN_DIR ?= ../../../../..
+ifeq ($(wildcard ../../../../../lib/libopencm3_stm32l1.a),)
+ifneq ($(strip $(shell which $(CC))),)
+TOOLCHAIN_DIR := $(shell dirname `which $(CC)`)/../$(PREFIX)
+endif
+else
+ifeq ($(V),1)
+$(info We seem to be building the example in the source directory. Using local library!)
+endif
+endif
+
+ARCH_FLAGS = -mthumb -mcpu=cortex-m3 -msoft-float
+CFLAGS += -Os -g -Wall -Wextra -I$(TOOLCHAIN_DIR)/include \
+ -fno-common $(ARCH_FLAGS) -MD -DSTM32L1
+LDSCRIPT ?= $(BINARY).ld
+LDFLAGS += --static -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group \
+ -L$(TOOLCHAIN_DIR)/lib \
+ -T$(LDSCRIPT) -nostartfiles -Wl,--gc-sections \
+ $(ARCH_FLAGS) -mfix-cortex-m3-ldrd
+
+CFLAGS += -I$(TOOLCHAIN_DIR)/include
+LDFLAGS += -L$(TOOLCHAIN_DIR)/lib -L$(TOOLCHAIN_DIR)/lib/stm32/l1
+SCRIPT_DIR = $(TOOLCHAIN_DIR)/share
+
+OBJS += $(BINARY).o
+
+OOCD ?= openocd
+OOCD_INTERFACE ?= flossjtag
+OOCD_BOARD ?= olimex_stm32_h103
+# Black magic probe specific variables
+# Set the BMP_PORT to a serial port and then BMP is used for flashing
+BMP_PORT ?=
+# texane/stlink can be used by uncommenting this...
+# or defining it in your own makefiles
+#STLINK_PORT ?= :4242
+
+# Be silent per default, but 'make V=1' will show all compiler calls.
+ifneq ($(V),1)
+Q := @
+NULL := 2>/dev/null
+else
+LDFLAGS += -Wl,--print-gc-sections
+endif
+
+.SUFFIXES: .elf .bin .hex .srec .list .images
+.SECONDEXPANSION:
+.SECONDARY:
+
+all: images
+
+images: $(BINARY).images
+flash: $(BINARY).flash
+
+%.images: %.bin %.hex %.srec %.list
+ @#echo "*** $* images generated ***"
+
+%.bin: %.elf
+ @#printf " OBJCOPY $(*).bin\n"
+ $(Q)$(OBJCOPY) -Obinary $(*).elf $(*).bin
+
+%.hex: %.elf
+ @#printf " OBJCOPY $(*).hex\n"
+ $(Q)$(OBJCOPY) -Oihex $(*).elf $(*).hex
+
+%.srec: %.elf
+ @#printf " OBJCOPY $(*).srec\n"
+ $(Q)$(OBJCOPY) -Osrec $(*).elf $(*).srec
+
+%.list: %.elf
+ @#printf " OBJDUMP $(*).list\n"
+ $(Q)$(OBJDUMP) -S $(*).elf > $(*).list
+
+%.elf: $(OBJS) $(LDSCRIPT) $(TOOLCHAIN_DIR)/lib/libopencm3_stm32l1.a
+ @#printf " LD $(subst $(shell pwd)/,,$(@))\n"
+ $(Q)$(LD) -o $(*).elf $(OBJS) -lopencm3_stm32l1 $(LDFLAGS)
+
+%.o: %.c Makefile
+ @#printf " CC $(subst $(shell pwd)/,,$(@))\n"
+ $(Q)$(CC) $(CFLAGS) -o $@ -c $<
+
+clean:
+ $(Q)rm -f *.o
+ $(Q)rm -f *.d
+ $(Q)rm -f *.elf
+ $(Q)rm -f *.bin
+ $(Q)rm -f *.hex
+ $(Q)rm -f *.srec
+ $(Q)rm -f *.list
+
+ifeq ($(STLINK_PORT),)
+ifeq ($(BMP_PORT),)
+ifeq ($(OOCD_SERIAL),)
+%.flash: %.hex
+ @printf " FLASH $<\n"
+ @# IMPORTANT: Don't use "resume", only "reset" will work correctly!
+ $(Q)$(OOCD) -f interface/$(OOCD_INTERFACE).cfg \
+ -f board/$(OOCD_BOARD).cfg \
+ -c "init" -c "reset init" \
+ -c "stm32l1x mass_erase 0" \
+ -c "flash write_image $(*).hex" \
+ -c "reset" \
+ -c "shutdown" $(NULL)
+else
+%.flash: %.hex
+ @printf " FLASH $<\n"
+ @# IMPORTANT: Don't use "resume", only "reset" will work correctly!
+ $(Q)$(OOCD) -f interface/$(OOCD_INTERFACE).cfg \
+ -f board/$(OOCD_BOARD).cfg \
+ -c "ft2232_serial $(OOCD_SERIAL)" \
+ -c "init" -c "reset init" \
+ -c "stm32l1x mass_erase 0" \
+ -c "flash write_image $(*).hex" \
+ -c "reset" \
+ -c "shutdown" $(NULL)
+endif
+else
+%.flash: %.elf
+ @echo " GDB $(*).elf (flash)"
+ $(Q)$(GDB) --batch \
+ -ex 'target extended-remote $(BMP_PORT)' \
+ -x $(TOOLCHAIN_DIR)/scripts/black_magic_probe_flash.scr \
+ $(*).elf
+endif
+else
+%.flash: %.elf
+ @echo " GDB $(*).elf (flash)"
+ $(Q)$(GDB) --batch \
+ -ex 'target extended-remote $(STLINK_PORT)' \
+ -x $(SCRIPT_DIR)/libopencm3/scripts/stlink_flash.scr \
+ $(*).elf
+endif
+
+.PHONY: images clean
+
+-include $(OBJS:.o=.d)
+
diff --git a/examples/stm32/l1/stm32l-discovery/button-irq-printf/Makefile b/examples/stm32/l1/stm32l-discovery/button-irq-printf/Makefile
new file mode 100644
index 0000000..d57ea7a
--- /dev/null
+++ b/examples/stm32/l1/stm32l-discovery/button-irq-printf/Makefile
@@ -0,0 +1,24 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = main
+LDSCRIPT = ../../../../../lib/stm32/l1/stm32l15xxb.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/l1/stm32l-discovery/button-irq-printf/README b/examples/stm32/l1/stm32l-discovery/button-irq-printf/README
new file mode 100644
index 0000000..63232ef
--- /dev/null
+++ b/examples/stm32/l1/stm32l-discovery/button-irq-printf/README
@@ -0,0 +1,3 @@
+* Prints to the screen when the button is pushed/released (irq driven)
+ 115200@8n1 console on PA2 (tx only)
+
diff --git a/examples/stm32/l1/stm32l-discovery/button-irq-printf/main.c b/examples/stm32/l1/stm32l-discovery/button-irq-printf/main.c
new file mode 100644
index 0000000..1830c4d
--- /dev/null
+++ b/examples/stm32/l1/stm32l-discovery/button-irq-printf/main.c
@@ -0,0 +1,117 @@
+/*
+ * Karl Palsson, 2012 <karlp@tweak.net.au
+ */
+
+#include <errno.h>
+#include <stdio.h>
+#include <unistd.h>
+#include <libopencm3/cm3/nvic.h>
+#include <libopencm3/stm32/l1/rcc.h>
+#include <libopencm3/stm32/l1/gpio.h>
+#include <libopencm3/stm32/exti.h>
+#include <libopencm3/stm32/usart.h>
+
+#include "syscfg.h"
+
+static struct state_t state;
+
+void clock_setup(void) {
+ /* Lots of things on all ports... */
+ rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOAEN);
+ rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOBEN);
+
+ /* Enable clocks for USART2. */
+ rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN);
+}
+
+void gpio_setup(void) {
+ gpio_mode_setup(LED_DISCO_GREEN_PORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, LED_DISCO_GREEN_PIN);
+
+ /* Setup GPIO pins for USART2 transmit. */
+ gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2);
+
+ /* Setup USART2 TX pin as alternate function. */
+ gpio_set_af(GPIOA, GPIO_AF7, GPIO2);
+}
+
+void usart_setup(void) {
+ usart_set_baudrate(USART_CONSOLE, 115200);
+ usart_set_databits(USART_CONSOLE, 8);
+ usart_set_stopbits(USART_CONSOLE, USART_STOPBITS_1);
+ usart_set_mode(USART_CONSOLE, USART_MODE_TX);
+ usart_set_parity(USART_CONSOLE, USART_PARITY_NONE);
+ usart_set_flow_control(USART_CONSOLE, USART_FLOWCONTROL_NONE);
+
+ /* Finally enable the USART. */
+ usart_enable(USART_CONSOLE);
+}
+
+/**
+ * Use USART_CONSOLE as a console.
+ * @param file
+ * @param ptr
+ * @param len
+ * @return
+ */
+int _write(int file, char *ptr, int len) {
+ int i;
+
+ if (file == STDOUT_FILENO || file == STDERR_FILENO) {
+ for (i = 0; i < len; i++) {
+ if (ptr[i] == '\n') {
+ usart_send_blocking(USART_CONSOLE, '\r');
+ }
+ usart_send_blocking(USART_CONSOLE, ptr[i]);
+ }
+ return i;
+ }
+ errno = EIO;
+ return -1;
+}
+
+void BUTTON_DISCO_USER_isr(void) {
+ exti_reset_request(BUTTON_DISCO_USER_EXTI);
+ if (state.falling) {
+ state.falling = false;
+ exti_set_trigger(BUTTON_DISCO_USER_EXTI, EXTI_TRIGGER_RISING);
+ // ILOG("fell: %d\n", TIM_CNT(TIM7));
+ puts("fell!\n");
+ } else {
+ puts("Rose!\n");
+ // TIM_CNT(TIM7) = 0;
+ state.falling = true;
+ exti_set_trigger(BUTTON_DISCO_USER_EXTI, EXTI_TRIGGER_FALLING);
+ }
+}
+
+void setup_buttons(void) {
+ /* Enable EXTI0 interrupt. */
+ nvic_enable_irq(BUTTON_DISCO_USER_NVIC);
+
+ gpio_mode_setup(BUTTON_DISCO_USER_PORT, GPIO_MODE_INPUT, GPIO_PUPD_NONE, BUTTON_DISCO_USER_PIN);
+
+ /* Configure the EXTI subsystem. */
+ exti_select_source(BUTTON_DISCO_USER_EXTI, BUTTON_DISCO_USER_PORT);
+ state.falling = false;
+ exti_set_trigger(BUTTON_DISCO_USER_EXTI, EXTI_TRIGGER_RISING);
+ exti_enable_request(BUTTON_DISCO_USER_EXTI);
+}
+
+int main(void) {
+ int i;
+ int j = 0;
+ clock_setup();
+ gpio_setup();
+ usart_setup();
+ puts("hi guys!\n");
+ setup_buttons();
+ while (1) {
+ puts("tick:");
+ putchar('a' + (j++ % 26));
+ gpio_toggle(GPIOB, GPIO7); /* LED on/off */
+ for (i = 0; i < 100000; i++) /* Wait a bit. */
+ __asm__("NOP");
+ }
+
+ return 0;
+}
diff --git a/examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h b/examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h
new file mode 100644
index 0000000..32cf465
--- /dev/null
+++ b/examples/stm32/l1/stm32l-discovery/button-irq-printf/syscfg.h
@@ -0,0 +1,45 @@
+/*
+ * General configuration of the device
+ *
+ * Karl Palsson <karlp@tweak.net.au> 2012
+ */
+
+#ifndef SYSCFG_H
+#define SYSCFG_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <libopencm3/stm32/l1/gpio.h>
+#include <libopencm3/stm32/l1/nvic.h>
+#include <libopencm3/stm32/exti.h>
+#include <libopencm3/stm32/usart.h>
+
+
+#define USART_CONSOLE USART2
+#define USE_NASTYLOG 1
+
+#define LED_DISCO_GREEN_PORT GPIOB
+#define LED_DISCO_GREEN_PIN GPIO7
+#define LED_DISCO_BLUE_PORT GPIOB
+#define LED_DISCO_BLUE_PIN GPIO6
+
+#define BUTTON_DISCO_USER_PORT GPIOA
+#define BUTTON_DISCO_USER_PIN GPIO0
+#define BUTTON_DISCO_USER_EXTI EXTI0
+#define BUTTON_DISCO_USER_isr exti0_isr
+#define BUTTON_DISCO_USER_NVIC NVIC_EXTI0_IRQ
+
+
+ struct state_t {
+ bool falling;
+ };
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSCFG_H */
+
diff --git a/examples/stm32/l1/stm32l-discovery/miniblink/Makefile b/examples/stm32/l1/stm32l-discovery/miniblink/Makefile
new file mode 100644
index 0000000..b0586e5
--- /dev/null
+++ b/examples/stm32/l1/stm32l-discovery/miniblink/Makefile
@@ -0,0 +1,25 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = miniblink
+
+LDSCRIPT = ../../../../../lib/stm32/l1/stm32l15xxb.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/l1/stm32l-discovery/miniblink/README b/examples/stm32/l1/stm32l-discovery/miniblink/README
new file mode 100644
index 0000000..8bdd314
--- /dev/null
+++ b/examples/stm32/l1/stm32l-discovery/miniblink/README
@@ -0,0 +1,9 @@
+------------------------------------------------------------------------------
+README
+------------------------------------------------------------------------------
+
+This is the smallest-possible example program using libopencm3.
+
+It's intended for the ST STM32L-DISCOVERY eval board. It should blink
+the blue LED on the board.
+
diff --git a/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c b/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c
new file mode 100644
index 0000000..2f5c70f
--- /dev/null
+++ b/examples/stm32/l1/stm32l-discovery/miniblink/miniblink.c
@@ -0,0 +1,72 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ * Copyright (C) 2011 Stephen Caudle <scaudle@doceme.com>
+ * Copyright (C) 2012 Karl Palsson <karlp@tweak.net.au>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/l1/rcc.h>
+#include <libopencm3/stm32/l1/gpio.h>
+
+#define PORT_LED GPIOB
+#define PIN_LED GPIO6
+
+void gpio_setup(void)
+{
+ /* Enable GPIOB clock. */
+ /* Manually: */
+ //RCC_AHBENR |= RCC_AHBENR_GPIOBEN;
+ /* Using API functions: */
+ rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOBEN);
+
+ /* Set GPIO6 (in GPIO port B) to 'output push-pull'. */
+ /* Using API functions: */
+ gpio_mode_setup(PORT_LED, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, PIN_LED);
+}
+
+int main(void)
+{
+ int i;
+
+ gpio_setup();
+
+ /* Blink the LED (PC8) on the board. */
+ while (1) {
+ /* Manually: */
+ // GPIOD_BSRR = GPIO12; /* LED off */
+ // for (i = 0; i < 1000000; i++) /* Wait a bit. */
+ // __asm__("nop");
+ // GPIOD_BRR = GPIO12; /* LED on */
+ // for (i = 0; i < 1000000; i++) /* Wait a bit. */
+ // __asm__("nop");
+
+ /* Using API functions gpio_set()/gpio_clear(): */
+ // gpio_set(GPIOD, GPIO12); /* LED off */
+ // for (i = 0; i < 1000000; i++) /* Wait a bit. */
+ // __asm__("nop");
+ // gpio_clear(GPIOD, GPIO12); /* LED on */
+ // for (i = 0; i < 1000000; i++) /* Wait a bit. */
+ // __asm__("nop");
+
+ /* Using API function gpio_toggle(): */
+ gpio_toggle(PORT_LED, PIN_LED); /* LED on/off */
+ for (i = 0; i < 1000000; i++) /* Wait a bit. */
+ __asm__("nop");
+ }
+
+ return 0;
+}
diff --git a/examples/stm32/l1/stm32l-discovery/usart/Makefile b/examples/stm32/l1/stm32l-discovery/usart/Makefile
new file mode 100644
index 0000000..ac088fe
--- /dev/null
+++ b/examples/stm32/l1/stm32l-discovery/usart/Makefile
@@ -0,0 +1,25 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+BINARY = usart
+
+LDSCRIPT = ../../../../../lib/stm32/l1/stm32l15xxb.ld
+
+include ../../Makefile.include
+
diff --git a/examples/stm32/l1/stm32l-discovery/usart/README b/examples/stm32/l1/stm32l-discovery/usart/README
new file mode 100644
index 0000000..dcbc5d9
--- /dev/null
+++ b/examples/stm32/l1/stm32l-discovery/usart/README
@@ -0,0 +1,12 @@
+------------------------------------------------------------------------------
+README
+------------------------------------------------------------------------------
+
+This example program sends some characters on USART2 on the
+ST STM32L DISCOVERY eval board. (USART2 TX on PA2)
+
+The terminal settings for the receiving device/PC are 38400 8n1.
+
+The sending is done in a blocking way in the code, see the usart_irq example
+for a more elaborate USART example.
+
diff --git a/examples/stm32/l1/stm32l-discovery/usart/usart.c b/examples/stm32/l1/stm32l-discovery/usart/usart.c
new file mode 100644
index 0000000..3335ca8
--- /dev/null
+++ b/examples/stm32/l1/stm32l-discovery/usart/usart.c
@@ -0,0 +1,80 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ * Copyright (C) 2012 Karl Palsson <karlp@tweak.net.au>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/l1/rcc.h>
+#include <libopencm3/stm32/l1/gpio.h>
+#include <libopencm3/stm32/usart.h>
+
+void clock_setup(void) {
+ /* We are running on MSI after boot. */
+ /* Enable GPIOD clock for LED & USARTs. */
+ rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOAEN);
+ rcc_peripheral_enable_clock(&RCC_AHBENR, RCC_AHBENR_GPIOBEN);
+
+ /* Enable clocks for USART2. */
+ rcc_peripheral_enable_clock(&RCC_APB1ENR, RCC_APB1ENR_USART2EN);
+}
+
+void usart_setup(void) {
+ /* Setup USART2 parameters. */
+ usart_set_baudrate(USART2, 38400);
+ usart_set_databits(USART2, 8);
+ usart_set_stopbits(USART2, USART_STOPBITS_1);
+ usart_set_mode(USART2, USART_MODE_TX);
+ usart_set_parity(USART2, USART_PARITY_NONE);
+ usart_set_flow_control(USART2, USART_FLOWCONTROL_NONE);
+
+ /* Finally enable the USART. */
+ usart_enable(USART2);
+}
+
+void gpio_setup(void) {
+ /* Setup GPIO pin GPIO7 on GPIO port B for Green LED. */
+ gpio_mode_setup(GPIOB, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO7);
+
+ /* Setup GPIO pins for USART2 transmit. */
+ gpio_mode_setup(GPIOA, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO2);
+
+ /* Setup USART2 TX pin as alternate function. */
+ gpio_set_af(GPIOA, GPIO_AF7, GPIO2);
+}
+
+int main(void) {
+ int i, j = 0, c = 0;
+
+ clock_setup();
+ gpio_setup();
+ usart_setup();
+
+ /* Blink the LED (PD12) on the board with every transmitted byte. */
+ while (1) {
+ gpio_toggle(GPIOB, GPIO7); /* LED on/off */
+ usart_send_blocking(USART2, c + '0'); /* USART2: Send byte. */
+ c = (c == 9) ? 0 : c + 1; /* Increment c. */
+ if ((j++ % 80) == 0) { /* Newline after line full. */
+ usart_send_blocking(USART2, '\r');
+ usart_send_blocking(USART2, '\n');
+ }
+ for (i = 0; i < 100000; i++) /* Wait a bit. */
+ __asm__("NOP");
+ }
+
+ return 0;
+}
diff --git a/include/libopencm3/cm3/nvic.h b/include/libopencm3/cm3/nvic.h
index 3f83285..b8c6535 100644
--- a/include/libopencm3/cm3/nvic.h
+++ b/include/libopencm3/cm3/nvic.h
@@ -122,4 +122,6 @@ void nvic_generate_software_interrupt(u16 irqn);
END_DECLS
+/**@}*/
+
#endif
diff --git a/include/libopencm3/dispatch/nvic.h b/include/libopencm3/dispatch/nvic.h
index c797d40..08074e3 100644
--- a/include/libopencm3/dispatch/nvic.h
+++ b/include/libopencm3/dispatch/nvic.h
@@ -4,6 +4,8 @@
# include <libopencm3/stm32/f2/nvic.h>
#elif defined(STM32F4)
# include <libopencm3/stm32/f4/nvic.h>
+#elif defined(STM32L1)
+# include <libopencm3/stm32/l1/nvic.h>
#elif defined(EFM32TG)
# include <libopencm3/efm32/efm32tg/nvic.h>
diff --git a/include/libopencm3/efm32/efm32g/doc-efm32g.h b/include/libopencm3/efm32/efm32g/doc-efm32g.h
new file mode 100644
index 0000000..747cb51
--- /dev/null
+++ b/include/libopencm3/efm32/efm32g/doc-efm32g.h
@@ -0,0 +1,32 @@
+/** @mainpage libopencm3 EFM32 Gecko
+
+@version 1.0.0
+
+@date 11 November 2012
+
+API documentation for Energy Micro EFM32 Gecko Cortex M3 series.
+
+LGPL License Terms @ref lgpl_license
+*/
+
+/** @defgroup EFM32G EFM32 Gecko
+Libraries for Energy Micro EFM32 Gecko series.
+
+@version 1.0.0
+
+@date 11 November 2012
+
+LGPL License Terms @ref lgpl_license
+*/
+
+/** @defgroup EFM32G_defines EFM32 Gecko Defines
+
+@brief Defined Constants and Types for the Energy Micro EFM32 Gecko series
+
+@version 1.0.0
+
+@date 11 November 2012
+
+LGPL License Terms @ref lgpl_license
+*/
+
diff --git a/include/libopencm3/efm32/efm32gg/doc-efm32gg.h b/include/libopencm3/efm32/efm32gg/doc-efm32gg.h
new file mode 100644
index 0000000..aacb17b
--- /dev/null
+++ b/include/libopencm3/efm32/efm32gg/doc-efm32gg.h
@@ -0,0 +1,32 @@
+/** @mainpage libopencm3 EFM32 Giant Gecko
+
+@version 1.0.0
+
+@date 11 November 2012
+
+API documentation for Energy Micro EFM32 Giant Gecko Cortex M3 series.
+
+LGPL License Terms @ref lgpl_license
+*/
+
+/** @defgroup EFM32GG EFM32 Giant Gecko
+Libraries for Energy Micro EFM32 Giant Gecko series.
+
+@version 1.0.0
+
+@date 11 November 2012
+
+LGPL License Terms @ref lgpl_license
+*/
+
+/** @defgroup EFM32GG_defines EFM32 Giant Gecko Defines
+
+@brief Defined Constants and Types for the Energy Micro EFM32 Giant Gecko series
+
+@version 1.0.0
+
+@date 11 November 2012
+
+LGPL License Terms @ref lgpl_license
+*/
+
diff --git a/include/libopencm3/stm32/can.h b/include/libopencm3/stm32/can.h
index cdb5df1..65aca5c 100644
--- a/include/libopencm3/stm32/can.h
+++ b/include/libopencm3/stm32/can.h
@@ -1,3 +1,17 @@
+/** @defgroup can_defines CAN defines
+
+@ingroup STM32F_defines
+
+@brief <b>libopencm3 Defined Constants and Types for STM32 CAN </b>
+
+@version 1.0.0
+
+@author @htmlonly &copy; @endhtmlonly 2010 Piotr Esden-Tempski <piotr@esden.net>
+
+@date 12 November 2012
+
+LGPL License Terms @ref lgpl_license
+*/
/*
* This file is part of the libopencm3 project.
*
@@ -23,11 +37,19 @@
#include <libopencm3/stm32/memorymap.h>
#include <libopencm3/cm3/common.h>
+/**@{*/
+
/* --- Convenience macros -------------------------------------------------- */
/* CAN register base adresses (for convenience) */
+/*****************************************************************************/
+/** @defgroup can_reg_base CAN register base address
+@ingroup can_defines
+
+@{*/
#define CAN1 BX_CAN1_BASE
#define CAN2 BX_CAN2_BASE
+/**@}*/
/* --- CAN registers ------------------------------------------------------- */
@@ -417,6 +439,7 @@
#define CAN_BTR_SJW_3TQ (0x2 << 24)
#define CAN_BTR_SJW_4TQ (0x3 << 24)
#define CAN_BTR_SJW_MASK (0x3 << 24)
+#define CAN_BTR_SJW_SHIFT 24
/* 23 Reserved, forced by hardware to 0 */
@@ -430,6 +453,7 @@
#define CAN_BTR_TS2_7TQ (0x6 << 20)
#define CAN_BTR_TS2_8TQ (0x7 << 20)
#define CAN_BTR_TS2_MASK (0x7 << 20)
+#define CAN_BTR_TS2_SHIFT 20
/* TS1[3:0]: Time segment 1 */
#define CAN_BTR_TS1_1TQ (0x0 << 16)
@@ -449,6 +473,7 @@
#define CAN_BTR_TS1_15TQ (0xE << 16)
#define CAN_BTR_TS1_16TQ (0xF << 16)
#define CAN_BTR_TS1_MASK (0xF << 16)
+#define CAN_BTR_TS1_SHIFT 16
/* 15:10 Reserved, forced by hardware to 0 */
@@ -619,7 +644,8 @@ BEGIN_DECLS
void can_reset(u32 canport);
int can_init(u32 canport, bool ttcm, bool abom, bool awum, bool nart,
- bool rflm, bool txfp, u32 sjw, u32 ts1, u32 ts2, u32 brp);
+ bool rflm, bool txfp, u32 sjw, u32 ts1, u32 ts2, u32 brp,
+ bool loopback, bool silent);
void can_filter_init(u32 canport, u32 nr, bool scale_32bit, bool id_list_mode,
u32 fr1, u32 fr2, u32 fifo, bool enable);
@@ -640,7 +666,7 @@ void can_receive(u32 canport, u8 fifo, bool release, u32 *id, bool *ext,
bool *rtr, u32 *fmi, u8 *length, u8 *data);
void can_fifo_release(u32 canport, u8 fifo);
-
+bool can_available_mailbox(u32 canport);
END_DECLS
#endif
diff --git a/include/libopencm3/stm32/common/gpio_common_all.h b/include/libopencm3/stm32/common/gpio_common_all.h
new file mode 100644
index 0000000..b2327e5
--- /dev/null
+++ b/include/libopencm3/stm32/common/gpio_common_all.h
@@ -0,0 +1,73 @@
+/** @addtogroup gpio_defines */
+
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
+ * Copyright (C) 2012 Ken Sarkies <ksarkies@internode.on.net>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA GPIO.H */
+
+#ifndef LIBOPENCM3_GPIO_COMMON_ALL_H
+#define LIBOPENCM3_GPIO_COMMON_ALL_H
+
+/**@{*/
+
+#include <libopencm3/cm3/common.h>
+
+/* --- Convenience macros -------------------------------------------------- */
+
+/* --- GPIO_LCKR values ---------------------------------------------------- */
+
+#define GPIO_LCKK (1 << 16)
+/* GPIO_LCKR[15:0]: LCKy: Port x lock bit y (y = 0..15) */
+
+/* GPIO number definitions (for convenience) */
+/** @defgroup gpio_pin_id GPIO Pin Identifiers
+@ingroup gpio_defines
+
+@{*/
+#define GPIO0 (1 << 0)
+#define GPIO1 (1 << 1)
+#define GPIO2 (1 << 2)
+#define GPIO3 (1 << 3)
+#define GPIO4 (1 << 4)
+#define GPIO5 (1 << 5)
+#define GPIO6 (1 << 6)
+#define GPIO7 (1 << 7)
+#define GPIO8 (1 << 8)
+#define GPIO9 (1 << 9)
+#define GPIO10 (1 << 10)
+#define GPIO11 (1 << 11)
+#define GPIO12 (1 << 12)
+#define GPIO13 (1 << 13)
+#define GPIO14 (1 << 14)
+#define GPIO15 (1 << 15)
+#define GPIO_ALL 0xffff
+/**@}*/
+
+void gpio_set(u32 gpioport, u16 gpios);
+void gpio_clear(u32 gpioport, u16 gpios);
+u16 gpio_get(u32 gpioport, u16 gpios);
+void gpio_toggle(u32 gpioport, u16 gpios);
+u16 gpio_port_read(u32 gpioport);
+void gpio_port_write(u32 gpioport, u16 data);
+void gpio_port_config_lock(u32 gpioport, u16 gpios);
+
+/**@}*/
+#endif
+
diff --git a/include/libopencm3/stm32/common/gpio_common_f24.h b/include/libopencm3/stm32/common/gpio_common_f24.h
new file mode 100644
index 0000000..f8bd4fb
--- /dev/null
+++ b/include/libopencm3/stm32/common/gpio_common_f24.h
@@ -0,0 +1,285 @@
+/** @addtogroup gpio_defines */
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
+ * Copyright (C) 2012 Ken Sarkies <ksarkies@internode.on.net>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA GPIO.H */
+
+#ifndef LIBOPENCM3_GPIO_COMMON_F24_H
+#define LIBOPENCM3_GPIO_COMMON_F24_H
+
+/**@{*/
+
+#include <libopencm3/stm32/common/gpio_common_all.h>
+
+/* GPIO port base addresses (for convenience) */
+/** @defgroup gpio_port_id GPIO Port IDs
+@ingroup gpio_defines
+
+@{*/
+#define GPIOA GPIO_PORT_A_BASE
+#define GPIOB GPIO_PORT_B_BASE
+#define GPIOC GPIO_PORT_C_BASE
+#define GPIOD GPIO_PORT_D_BASE
+#define GPIOE GPIO_PORT_E_BASE
+#define GPIOF GPIO_PORT_F_BASE
+#define GPIOG GPIO_PORT_G_BASE
+#define GPIOH GPIO_PORT_H_BASE
+#define GPIOI GPIO_PORT_I_BASE
+/**@}*/
+
+/* --- GPIO registers for STM32F2 and STM32F4 --------------------------- */
+
+/* Port mode register (GPIOx_MODER) */
+#define GPIO_MODER(port) MMIO32(port + 0x00)
+#define GPIOA_MODER GPIO_MODER(GPIOA)
+#define GPIOB_MODER GPIO_MODER(GPIOB)
+#define GPIOC_MODER GPIO_MODER(GPIOC)
+#define GPIOD_MODER GPIO_MODER(GPIOD)
+#define GPIOE_MODER GPIO_MODER(GPIOE)
+#define GPIOF_MODER GPIO_MODER(GPIOF)
+#define GPIOG_MODER GPIO_MODER(GPIOG)
+#define GPIOH_MODER GPIO_MODER(GPIOH)
+#define GPIOI_MODER GPIO_MODER(GPIOI)
+
+/* Port output type register (GPIOx_OTYPER) */
+#define GPIO_OTYPER(port) MMIO32(port + 0x04)
+#define GPIOA_OTYPER GPIO_OTYPER(GPIOA)
+#define GPIOB_OTYPER GPIO_OTYPER(GPIOB)
+#define GPIOC_OTYPER GPIO_OTYPER(GPIOC)
+#define GPIOD_OTYPER GPIO_OTYPER(GPIOD)
+#define GPIOE_OTYPER GPIO_OTYPER(GPIOE)
+#define GPIOF_OTYPER GPIO_OTYPER(GPIOF)
+#define GPIOG_OTYPER GPIO_OTYPER(GPIOG)
+#define GPIOH_OTYPER GPIO_OTYPER(GPIOH)
+#define GPIOI_OTYPER GPIO_OTYPER(GPIOI)
+
+/* Port output speed register (GPIOx_OSPEEDR) */
+#define GPIO_OSPEEDR(port) MMIO32(port + 0x08)
+#define GPIOA_OSPEEDR GPIO_OSPEEDR(GPIOA)
+#define GPIOB_OSPEEDR GPIO_OSPEEDR(GPIOB)
+#define GPIOC_OSPEEDR GPIO_OSPEEDR(GPIOC)
+#define GPIOD_OSPEEDR GPIO_OSPEEDR(GPIOD)
+#define GPIOE_OSPEEDR GPIO_OSPEEDR(GPIOE)
+#define GPIOF_OSPEEDR GPIO_OSPEEDR(GPIOF)
+#define GPIOG_OSPEEDR GPIO_OSPEEDR(GPIOG)
+#define GPIOH_OSPEEDR GPIO_OSPEEDR(GPIOH)
+#define GPIOI_OSPEEDR GPIO_OSPEEDR(GPIOI)
+
+/* Port pull-up/pull-down register (GPIOx_PUPDR) */
+#define GPIO_PUPDR(port) MMIO32(port + 0x0c)
+#define GPIOA_PUPDR GPIO_PUPDR(GPIOA)
+#define GPIOB_PUPDR GPIO_PUPDR(GPIOB)
+#define GPIOC_PUPDR GPIO_PUPDR(GPIOC)
+#define GPIOD_PUPDR GPIO_PUPDR(GPIOD)
+#define GPIOE_PUPDR GPIO_PUPDR(GPIOE)
+#define GPIOF_PUPDR GPIO_PUPDR(GPIOF)
+#define GPIOG_PUPDR GPIO_PUPDR(GPIOG)
+#define GPIOH_PUPDR GPIO_PUPDR(GPIOH)
+#define GPIOI_PUPDR GPIO_PUPDR(GPIOI)
+
+/* Port input data register (GPIOx_IDR) */
+#define GPIO_IDR(port) MMIO32(port + 0x10)
+#define GPIOA_IDR GPIO_IDR(GPIOA)
+#define GPIOB_IDR GPIO_IDR(GPIOB)
+#define GPIOC_IDR GPIO_IDR(GPIOC)
+#define GPIOD_IDR GPIO_IDR(GPIOD)
+#define GPIOE_IDR GPIO_IDR(GPIOE)
+#define GPIOF_IDR GPIO_IDR(GPIOF)
+#define GPIOG_IDR GPIO_IDR(GPIOG)
+#define GPIOH_IDR GPIO_IDR(GPIOH)
+#define GPIOI_IDR GPIO_IDR(GPIOI)
+
+/* Port output data register (GPIOx_ODR) */
+#define GPIO_ODR(port) MMIO32(port + 0x14)
+#define GPIOA_ODR GPIO_ODR(GPIOA)
+#define GPIOB_ODR GPIO_ODR(GPIOB)
+#define GPIOC_ODR GPIO_ODR(GPIOC)
+#define GPIOD_ODR GPIO_ODR(GPIOD)
+#define GPIOE_ODR GPIO_ODR(GPIOE)
+#define GPIOF_ODR GPIO_ODR(GPIOF)
+#define GPIOG_ODR GPIO_ODR(GPIOG)
+#define GPIOH_ODR GPIO_ODR(GPIOH)
+#define GPIOI_ODR GPIO_ODR(GPIOI)
+
+/* Port bit set/reset register (GPIOx_BSRR) */
+#define GPIO_BSRR(port) MMIO32(port + 0x18)
+#define GPIOA_BSRR GPIO_BSRR(GPIOA)
+#define GPIOB_BSRR GPIO_BSRR(GPIOB)
+#define GPIOC_BSRR GPIO_BSRR(GPIOC)
+#define GPIOD_BSRR GPIO_BSRR(GPIOD)
+#define GPIOE_BSRR GPIO_BSRR(GPIOE)
+#define GPIOF_BSRR GPIO_BSRR(GPIOF)
+#define GPIOG_BSRR GPIO_BSRR(GPIOG)
+#define GPIOH_BSRR GPIO_BSRR(GPIOH)
+#define GPIOI_BSRR GPIO_BSRR(GPIOI)
+
+/* Port configuration lock register (GPIOx_LCKR) */
+#define GPIO_LCKR(port) MMIO32(port + 0x1c)
+#define GPIOA_LCKR GPIO_LCKR(GPIOA)
+#define GPIOB_LCKR GPIO_LCKR(GPIOB)
+#define GPIOC_LCKR GPIO_LCKR(GPIOC)
+#define GPIOD_LCKR GPIO_LCKR(GPIOD)
+#define GPIOE_LCKR GPIO_LCKR(GPIOE)
+#define GPIOF_LCKR GPIO_LCKR(GPIOF)
+#define GPIOG_LCKR GPIO_LCKR(GPIOG)
+#define GPIOH_LCKR GPIO_LCKR(GPIOH)
+#define GPIOI_LCKR GPIO_LCKR(GPIOI)
+
+/* Alternate function low register (GPIOx_AFRL) */
+#define GPIO_AFRL(port) MMIO32(port + 0x20)
+#define GPIOA_AFRL GPIO_AFRL(GPIOA)
+#define GPIOB_AFRL GPIO_AFRL(GPIOB)
+#define GPIOC_AFRL GPIO_AFRL(GPIOC)
+#define GPIOD_AFRL GPIO_AFRL(GPIOD)
+#define GPIOE_AFRL GPIO_AFRL(GPIOE)
+#define GPIOF_AFRL GPIO_AFRL(GPIOF)
+#define GPIOG_AFRL GPIO_AFRL(GPIOG)
+#define GPIOH_AFRL GPIO_AFRL(GPIOH)
+#define GPIOI_AFRL GPIO_AFRL(GPIOI)
+
+/* Alternate function high register (GPIOx_AFRH) */
+#define GPIO_AFRH(port) MMIO32(port + 0x24)
+#define GPIOA_AFRH GPIO_AFRH(GPIOA)
+#define GPIOB_AFRH GPIO_AFRH(GPIOB)
+#define GPIOC_AFRH GPIO_AFRH(GPIOC)
+#define GPIOD_AFRH GPIO_AFRH(GPIOD)
+#define GPIOE_AFRH GPIO_AFRH(GPIOE)
+#define GPIOF_AFRH GPIO_AFRH(GPIOF)
+#define GPIOG_AFRH GPIO_AFRH(GPIOG)
+#define GPIOH_AFRH GPIO_AFRH(GPIOH)
+#define GPIOI_AFRH GPIO_AFRH(GPIOI)
+
+/* --- GPIOx_MODER values -------------------------------------------------- */
+
+#define GPIO_MODE(n, mode) (mode << (2 * (n)))
+#define GPIO_MODE_MASK(n) (0x3 << (2 * (n)))
+/** @defgroup gpio_mode GPIO Pin Direction and Analog/Digital Mode
+@ingroup gpio_defines
+@{*/
+#define GPIO_MODE_INPUT 0x0
+#define GPIO_MODE_OUTPUT 0x1
+#define GPIO_MODE_AF 0x2
+#define GPIO_MODE_ANALOG 0x3
+/**@}*/
+
+/* --- GPIOx_OTYPER values ------------------------------------------------- */
+
+/** @defgroup gpio_output_type GPIO Output Pin Driver Type
+@ingroup gpio_defines
+@list Push Pull
+@list Open Drain
+@{*/
+#define GPIO_OTYPE_PP 0x0
+#define GPIO_OTYPE_OD 0x1
+/**@}*/
+
+/* --- GPIOx_OSPEEDR values ------------------------------------------------ */
+
+#define GPIO_OSPEED(n, speed) (speed << (2 * (n)))
+#define GPIO_OSPEED_MASK(n) (0x3 << (2 * (n)))
+/** @defgroup gpio_speed GPIO Output Pin Speed
+@ingroup gpio_defines
+@{*/
+#define GPIO_OSPEED_2MHZ 0x0
+#define GPIO_OSPEED_25MHZ 0x1
+#define GPIO_OSPEED_50MHZ 0x2
+#define GPIO_OSPEED_100MHZ 0x3
+/**@}*/
+
+/* --- GPIOx_PUPDR values -------------------------------------------------- */
+
+#define GPIO_PUPD(n, pupd) (pupd << (2 * (n)))
+#define GPIO_PUPD_MASK(n) (0x3 << (2 * (n)))
+/** @defgroup gpio_pup GPIO Output Pin Pullup
+@ingroup gpio_defines
+@{*/
+#define GPIO_PUPD_NONE 0x0
+#define GPIO_PUPD_PULLUP 0x1
+#define GPIO_PUPD_PULLDOWN 0x2
+/**@}*/
+
+/* --- GPIOx_IDR values ---------------------------------------------------- */
+
+/* GPIOx_IDR[15:0]: IDRy[15:0]: Port input data (y = 0..15) */
+
+/* --- GPIOx_ODR values ---------------------------------------------------- */
+
+/* GPIOx_ODR[15:0]: ODRy[15:0]: Port output data (y = 0..15) */
+
+/* --- GPIOx_BSRR values --------------------------------------------------- */
+
+/* GPIOx_BSRR[31:16]: BRy: Port x reset bit y (y = 0..15) */
+/* GPIOx_BSRR[15:0]: BSy: Port x set bit y (y = 0..15) */
+
+/* --- GPIOx_LCKR values --------------------------------------------------- */
+
+#define GPIO_LCKK (1 << 16)
+/* GPIOx_LCKR[15:0]: LCKy: Port x lock bit y (y = 0..15) */
+
+/* --- GPIOx_AFRL/H values ------------------------------------------------- */
+
+/* Note: AFRL is used for bits 0..7, AFRH is used for 8..15 */
+/* See Datasheet Table 6 (pg. 48) for alternate function mappings. */
+
+#define GPIO_AFR(n, af) (af << ((n) * 4))
+#define GPIO_AFR_MASK(n) (0xf << ((n) * 4))
+/** @defgroup gpio_af_num Alternate Function Pin Selection
+@ingroup gpio_defines
+@{*/
+#define GPIO_AF0 0x0
+#define GPIO_AF1 0x1
+#define GPIO_AF2 0x2
+#define GPIO_AF3 0x3
+#define GPIO_AF4 0x4
+#define GPIO_AF5 0x5
+#define GPIO_AF6 0x6
+#define GPIO_AF7 0x7
+#define GPIO_AF8 0x8
+#define GPIO_AF9 0x9
+#define GPIO_AF10 0xa
+#define GPIO_AF11 0xb
+#define GPIO_AF12 0xc
+#define GPIO_AF13 0xd
+#define GPIO_AF14 0xe
+#define GPIO_AF15 0xf
+/**@}*/
+
+/* Note: EXTI source selection is now in the SYSCFG peripheral. */
+
+/* --- Function prototypes ------------------------------------------------- */
+
+BEGIN_DECLS
+
+/*
+ * Note: The F2 and F4 series have a completely new GPIO peripheral with different
+ * configuration options. Here we implement a different API partly to more
+ * closely match the peripheral capabilities and also to deliberately break
+ * compatibility with old F1 code so there is no confusion with similar
+ * sounding functions that have very different functionality.
+ */
+
+void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios);
+void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios);
+void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios);
+
+END_DECLS
+/**@}*/
+#endif
+
diff --git a/include/libopencm3/stm32/f1/desig.h b/include/libopencm3/stm32/desig.h
index 74cfb35..6ceb665 100644
--- a/include/libopencm3/stm32/f1/desig.h
+++ b/include/libopencm3/stm32/desig.h
@@ -51,6 +51,15 @@ u16 desig_get_flash_size(void);
*/
void desig_get_unique_id(u32 result[]);
+/**
+ * Read the full 96 bit unique identifier and return it as a
+ * zero-terminated string
+ * @param string memory region to write the result to
+ 8 @param string_len the size of string in bytes
+ */
+void desig_get_unique_id_as_string(char *string,
+ unsigned int string_len);
+
END_DECLS
#endif
diff --git a/include/libopencm3/stm32/f1/dma.h b/include/libopencm3/stm32/f1/dma.h
index 6e5cc20..6257394 100644
--- a/include/libopencm3/stm32/f1/dma.h
+++ b/include/libopencm3/stm32/f1/dma.h
@@ -394,6 +394,7 @@ void dma_disable_channel(u32 dma, u8 channel);
void dma_set_peripheral_address(u32 dma, u8 channel, u32 address);
void dma_set_memory_address(u32 dma, u8 channel, u32 address);
void dma_set_number_of_data(u32 dma, u8 channel, u16 number);
+void dma_clear_flag(u32 dma, u32 flag);
END_DECLS
diff --git a/include/libopencm3/stm32/f1/gpio.h b/include/libopencm3/stm32/f1/gpio.h
index a1e74cc..7fb93c1 100644
--- a/include/libopencm3/stm32/f1/gpio.h
+++ b/include/libopencm3/stm32/f1/gpio.h
@@ -1,4 +1,4 @@
-/** @defgroup STM32F1xx_gpio_defines GPIO Defines
+/** @defgroup gpio_defines GPIO Defines
@brief <b>Defined Constants and Types for the STM32F1xx General Purpose I/O</b>
@@ -8,6 +8,7 @@
@author @htmlonly &copy; @endhtmlonly 2009 Uwe Hermann <uwe@hermann-uwe.de>
@author @htmlonly &copy; @endhtmlonly 2012 Piotr Esden-Tempski <piotr@esden.net>
+@author @htmlonly &copy; @endhtmlonly 2012 Ken Sarkies <ksarkies@internode.on.net>
@date 1 July 2012
@@ -18,6 +19,7 @@ LGPL License Terms @ref lgpl_license
*
* Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
* Copyright (C) 2012 Piotr Esden-Tempski <piotr@esden.net>
+ * Copyright (C) 2012 Ken Sarkies <ksarkies@internode.on.net>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
@@ -32,21 +34,23 @@ LGPL License Terms @ref lgpl_license
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
+
/**@{*/
#ifndef LIBOPENCM3_GPIO_H
#define LIBOPENCM3_GPIO_H
-#include <libopencm3/stm32/memorymap.h>
-#include <libopencm3/cm3/common.h>
+#include <libopencm3/stm32/f1/memorymap.h>
+#include <libopencm3/stm32/common/gpio_common_all.h>
/* --- Convenience macros -------------------------------------------------- */
/* GPIO port base addresses (for convenience) */
/** @defgroup gpio_port_id GPIO Port IDs
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@{*/
+/* GPIO port base addresses (for convenience) */
#define GPIOA GPIO_PORT_A_BASE
#define GPIOB GPIO_PORT_B_BASE
#define GPIOC GPIO_PORT_C_BASE
@@ -56,30 +60,6 @@ LGPL License Terms @ref lgpl_license
#define GPIOG GPIO_PORT_G_BASE
/**@}*/
-/* GPIO number definitions (for convenience) */
-/** @defgroup gpio_pin_id GPIO Pin Identifiers
-@ingroup STM32F1xx_gpio_defines
-
-@{*/
-#define GPIO0 (1 << 0)
-#define GPIO1 (1 << 1)
-#define GPIO2 (1 << 2)
-#define GPIO3 (1 << 3)
-#define GPIO4 (1 << 4)
-#define GPIO5 (1 << 5)
-#define GPIO6 (1 << 6)
-#define GPIO7 (1 << 7)
-#define GPIO8 (1 << 8)
-#define GPIO9 (1 << 9)
-#define GPIO10 (1 << 10)
-#define GPIO11 (1 << 11)
-#define GPIO12 (1 << 12)
-#define GPIO13 (1 << 13)
-#define GPIO14 (1 << 14)
-#define GPIO15 (1 << 15)
-#define GPIO_ALL 0xffff
-/**@}*/
-
/* --- Alternate function GPIOs -------------------------------------------- */
/* Default alternate functions of some pins (with and without remapping) */
@@ -103,18 +83,18 @@ LGPL License Terms @ref lgpl_license
/* CAN1 / CAN BANK */
#define GPIO_BANK_CAN1_RX GPIOA /* PA11 */
#define GPIO_BANK_CAN1_TX GPIOA /* PA12 */
-#define GPIO_BANK_CAN_RX GPIO_CAN1_RX /* Alias */
-#define GPIO_BANK_CAN_TX GPIO_CAN1_TX /* Alias */
+#define GPIO_BANK_CAN_RX GPIO_BANK_CAN1_RX /* Alias */
+#define GPIO_BANK_CAN_TX GPIO_BANK_CAN1_TX /* Alias */
#define GPIO_BANK_CAN_PB_RX GPIOB /* PB8 */
#define GPIO_BANK_CAN_PB_TX GPIOB /* PB9 */
-#define GPIO_BANK_CAN1_PB_RX GPIO_CAN_PB_RX /* Alias */
-#define GPIO_BANK_CAN1_PB_TX GPIO_CAN_PB_TX /* Alias */
+#define GPIO_BANK_CAN1_PB_RX GPIO_BANK_CAN_PB_RX /* Alias */
+#define GPIO_BANK_CAN1_PB_TX GPIO_BANK_CAN_PB_TX /* Alias */
#define GPIO_BANK_CAN_PD_RX GPIOD /* PD0 */
#define GPIO_BANK_CAN_PD_TX GPIOD /* PD1 */
-#define GPIO_BANK_CAN1_PD_RX GPIO_CAN_PD_RX /* Alias */
-#define GPIO_BANK_CAN1_PD_TX GPIO_CAN_PD_TX /* Alias */
+#define GPIO_BANK_CAN1_PD_RX GPIO_BANK_CAN_PD_RX /* Alias */
+#define GPIO_BANK_CAN1_PD_TX GPIO_BANK_CAN_PD_TX /* Alias */
/* CAN2 GPIO */
#define GPIO_CAN2_RX GPIO12 /* PB12 */
@@ -620,7 +600,7 @@ LGPL License Terms @ref lgpl_license
/* --- GPIO_CRL/GPIO_CRH values -------------------------------------------- */
/** @defgroup gpio_cnf GPIO Pin Configuration
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
If mode specifies input, configuration can be
@li Analog input
@li Floating input
@@ -652,7 +632,7 @@ If mode specifies output, configuration can be
/* Pin mode (MODE[1:0]) values */
/** @defgroup gpio_mode GPIO Pin Mode
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@li Input (default after reset)
@li Output mode at 10 MHz maximum speed
@li Output mode at 2 MHz maximum speed
@@ -681,11 +661,6 @@ If mode specifies output, configuration can be
/* GPIO_BRR[15:0]: BRy: Port x reset bit y (y = 0..15) */
-/* --- GPIO_LCKR values ---------------------------------------------------- */
-
-#define GPIO_LCKK (1 << 16)
-/* GPIO_LCKR[15:0]: LCKy: Port x lock bit y (y = 0..15) */
-
/* --- AFIO registers ------------------------------------------------------ */
/* Event control register (AFIO_EVCR) */
@@ -716,7 +691,7 @@ If mode specifies output, configuration can be
/* PORT[2:0]: Port selection */
/** @defgroup afio_evcr_port EVENTOUT Port selection
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@{*/
#define AFIO_EVCR_PORT_PA (0x0 << 4)
@@ -728,7 +703,7 @@ If mode specifies output, configuration can be
/* PIN[3:0]: Pin selection */
/** @defgroup afio_evcr_pin EVENTOUT Pin selection
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@{*/
#define AFIO_EVCR_PIN_Px0 (0x0 << 0)
@@ -755,7 +730,7 @@ If mode specifies output, configuration can be
/** @defgroup afio_remap_cld Alternate Function Remap Controls for Connectivity
Line Devices only
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@{*/
/* PTP_PPS_REMAP: *//** Ethernet PTP PPS remapping
@@ -788,7 +763,7 @@ Line Devices only
/* SWJ_CFG[2:0]: Serial wire JTAG configuration */
/** @defgroup afio_swj_disable Serial Wire JTAG disables
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@{*/
#define AFIO_MAPR_SWJ_MASK (0x7 << 24)
@@ -803,7 +778,7 @@ Line Devices only
/**@}*/
/** @defgroup afio_remap Alternate Function Remap Controls
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@{*/
/* ADC2_ETRGREG_REMAP: */ /** ADC2 external trigger regulator conversion remapping
@@ -846,7 +821,7 @@ Line Devices only
/* CAN_REMAP[1:0]: CAN1 alternate function remapping */
/** @defgroup afio_remap_can1 Alternate Function Remap Controls for CAN 1
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@{*/
#define AFIO_MAPR_CAN1_REMAP_PORTA (0x0 << 13)
@@ -856,7 +831,7 @@ Line Devices only
/* TIM3_REMAP[1:0]: TIM3 remapping */
/** @defgroup afio_remap_tim3 Alternate Function Remap Controls for Timer 3
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@{*/
#define AFIO_MAPR_TIM3_REMAP_NO_REMAP (0x0 << 10)
@@ -866,7 +841,7 @@ Line Devices only
/* TIM2_REMAP[1:0]: TIM2 remapping */
/** @defgroup afio_remap_tim2 Alternate Function Remap Controls for Timer 2
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@{*/
#define AFIO_MAPR_TIM2_REMAP_NO_REMAP (0x0 << 8)
@@ -877,7 +852,7 @@ Line Devices only
/* TIM1_REMAP[1:0]: TIM1 remapping */
/** @defgroup afio_remap_tim1 Alternate Function Remap Controls for Timer 1
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@{*/
#define AFIO_MAPR_TIM1_REMAP_NO_REMAP (0x0 << 6)
@@ -887,7 +862,7 @@ Line Devices only
/* USART3_REMAP[1:0]: USART3 remapping */
/** @defgroup afio_remap_usart3 Alternate Function Remap Controls for USART 3
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@{*/
#define AFIO_MAPR_USART3_REMAP_NO_REMAP (0x0 << 4)
@@ -896,7 +871,7 @@ Line Devices only
/**@}*/
/** @defgroup afio_remap2 Alternate Function Remap Controls Secondary Set
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@{*/
/* FSMC_NADV_DISCONNECT: */ /** The NADV is disconnected from its allocated pin */
@@ -925,7 +900,7 @@ Line Devices only
/* --- AFIO_EXTICR4 values ------------------------------------------------- */
/** @defgroup afio_exti Alternate Function EXTI pin number
-@ingroup STM32F1xx_gpio_defines
+@ingroup gpio_defines
@{*/
@@ -953,13 +928,6 @@ Line Devices only
BEGIN_DECLS
void gpio_set_mode(u32 gpioport, u8 mode, u8 cnf, u16 gpios);
-void gpio_set(u32 gpioport, u16 gpios);
-void gpio_clear(u32 gpioport, u16 gpios);
-u16 gpio_get(u32 gpioport, u16 gpios);
-void gpio_toggle(u32 gpioport, u16 gpios);
-u16 gpio_port_read(u32 gpioport);
-void gpio_port_write(u32 gpioport, u16 data);
-void gpio_port_config_lock(u32 gpioport, u16 gpios);
void gpio_set_eventout(u8 evoutport, u8 evoutpin);
void gpio_primary_remap(u8 swjenable, u32 maps);
void gpio_secondary_remap(u32 maps);
diff --git a/include/libopencm3/stm32/f1/rcc.h b/include/libopencm3/stm32/f1/rcc.h
index 855e43b..868ad9c 100644
--- a/include/libopencm3/stm32/f1/rcc.h
+++ b/include/libopencm3/stm32/f1/rcc.h
@@ -86,7 +86,7 @@ LGPL License Terms @ref lgpl_license
#define RCC_CFGR_MCO_SYSCLK 0x4
#define RCC_CFGR_MCO_HSICLK 0x5
#define RCC_CFGR_MCO_HSECLK 0x6
-#define RCC_CFGR_RMCO_PLLCLK_DIV2 0x7
+#define RCC_CFGR_MCO_PLLCLK_DIV2 0x7
#define RCC_CFGR_MCO_PLL2CLK 0x8 /* (**) */
#define RCC_CFGR_MCO_PLL3CLK_DIV2 0x9 /* (**) */
#define RCC_CFGR_MCO_XT1 0xa /* (**) */
@@ -448,6 +448,24 @@ LGPL License Terms @ref lgpl_license
#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL16 0xe
#define RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL20 0xf
+/* PREDIV: PREDIV division factor */
+#define RCC_CFGR2_PREDIV_NODIV 0x0
+#define RCC_CFGR2_PREDIV_DIV2 0x1
+#define RCC_CFGR2_PREDIV_DIV3 0x2
+#define RCC_CFGR2_PREDIV_DIV4 0x3
+#define RCC_CFGR2_PREDIV_DIV5 0x4
+#define RCC_CFGR2_PREDIV_DIV6 0x5
+#define RCC_CFGR2_PREDIV_DIV7 0x6
+#define RCC_CFGR2_PREDIV_DIV8 0x7
+#define RCC_CFGR2_PREDIV_DIV9 0x8
+#define RCC_CFGR2_PREDIV_DIV10 0x9
+#define RCC_CFGR2_PREDIV_DIV11 0xa
+#define RCC_CFGR2_PREDIV_DIV12 0xb
+#define RCC_CFGR2_PREDIV_DIV13 0xc
+#define RCC_CFGR2_PREDIV_DIV14 0xd
+#define RCC_CFGR2_PREDIV_DIV15 0xe
+#define RCC_CFGR2_PREDIV_DIV16 0xf
+
/* PREDIV2: PREDIV2 division factor */
#define RCC_CFGR2_PREDIV2_NODIV 0x0
#define RCC_CFGR2_PREDIV2_DIV2 0x1
@@ -473,7 +491,7 @@ extern u32 rcc_ppre2_frequency;
/* --- Function prototypes ------------------------------------------------- */
typedef enum {
- PLL, HSE, HSI, LSE, LSI
+ PLL, PLL2, PLL3, HSE, HSI, LSE, LSI
} osc_t;
BEGIN_DECLS
@@ -489,6 +507,7 @@ void rcc_osc_on(osc_t osc);
void rcc_osc_off(osc_t osc);
void rcc_css_enable(void);
void rcc_css_disable(void);
+void rcc_set_mco(u32 mcosrc);
void rcc_osc_bypass_enable(osc_t osc);
void rcc_osc_bypass_disable(osc_t osc);
void rcc_peripheral_enable_clock(volatile u32 *reg, u32 en);
@@ -497,6 +516,7 @@ void rcc_peripheral_reset(volatile u32 *reg, u32 reset);
void rcc_peripheral_clear_reset(volatile u32 *reg, u32 clear_reset);
void rcc_set_sysclk_source(u32 clk);
void rcc_set_pll_multiplication_factor(u32 mul);
+void rcc_set_pll2_multiplication_factor(u32 mul);
void rcc_set_pll_source(u32 pllsrc);
void rcc_set_pllxtpre(u32 pllxtpre);
void rcc_set_adcpre(u32 adcpre);
@@ -512,6 +532,7 @@ void rcc_clock_setup_in_hse_8mhz_out_24mhz(void);
void rcc_clock_setup_in_hse_8mhz_out_72mhz(void);
void rcc_clock_setup_in_hse_12mhz_out_72mhz(void);
void rcc_clock_setup_in_hse_16mhz_out_72mhz(void);
+void rcc_clock_setup_in_hse_25mhz_out_72mhz(void);
void rcc_backupdomain_reset(void);
END_DECLS
diff --git a/include/libopencm3/stm32/f2/gpio.h b/include/libopencm3/stm32/f2/gpio.h
index 6616769..3ff2ba6 100644
--- a/include/libopencm3/stm32/f2/gpio.h
+++ b/include/libopencm3/stm32/f2/gpio.h
@@ -1,8 +1,23 @@
+/** @defgroup gpio_defines GPIO Defines
+
+@brief <b>Defined Constants and Types for the STM32F2xx General Purpose I/O</b>
+
+@ingroup STM32F2xx_defines
+
+@version 1.0.0
+
+@author @htmlonly &copy; @endhtmlonly 2009 Uwe Hermann <uwe@hermann-uwe.de>
+@author @htmlonly &copy; @endhtmlonly 2012 Piotr Esden-Tempski <piotr@esden.net>
+@author @htmlonly &copy; @endhtmlonly 2012 Ken Sarkies <ksarkies@internode.on.net>
+
+@date 1 July 2012
+
+LGPL License Terms @ref lgpl_license
+ */
+
/*
* This file is part of the libopencm3 project.
*
- * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
- *
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
@@ -20,263 +35,8 @@
#ifndef LIBOPENCM3_GPIO_H
#define LIBOPENCM3_GPIO_H
-#include <libopencm3/stm32/memorymap.h>
-#include <libopencm3/cm3/common.h>
-
-/* --- Convenience macros -------------------------------------------------- */
-
-/* GPIO port base addresses (for convenience) */
-#define GPIOA GPIO_PORT_A_BASE
-#define GPIOB GPIO_PORT_B_BASE
-#define GPIOC GPIO_PORT_C_BASE
-#define GPIOD GPIO_PORT_D_BASE
-#define GPIOE GPIO_PORT_E_BASE
-#define GPIOF GPIO_PORT_F_BASE
-#define GPIOG GPIO_PORT_G_BASE
-#define GPIOH GPIO_PORT_H_BASE
-#define GPIOI GPIO_PORT_I_BASE
-
-/* GPIO number definitions (for convenience) */
-#define GPIO0 (1 << 0)
-#define GPIO1 (1 << 1)
-#define GPIO2 (1 << 2)
-#define GPIO3 (1 << 3)
-#define GPIO4 (1 << 4)
-#define GPIO5 (1 << 5)
-#define GPIO6 (1 << 6)
-#define GPIO7 (1 << 7)
-#define GPIO8 (1 << 8)
-#define GPIO9 (1 << 9)
-#define GPIO10 (1 << 10)
-#define GPIO11 (1 << 11)
-#define GPIO12 (1 << 12)
-#define GPIO13 (1 << 13)
-#define GPIO14 (1 << 14)
-#define GPIO15 (1 << 15)
-#define GPIO_ALL 0xffff
-
-/* --- GPIO registers ------------------------------------------------------ */
-
-/* Port mode register (GPIOx_MODER) */
-#define GPIO_MODER(port) MMIO32(port + 0x00)
-#define GPIOA_MODER GPIO_MODER(GPIOA)
-#define GPIOB_MODER GPIO_MODER(GPIOB)
-#define GPIOC_MODER GPIO_MODER(GPIOC)
-#define GPIOD_MODER GPIO_MODER(GPIOD)
-#define GPIOE_MODER GPIO_MODER(GPIOE)
-#define GPIOF_MODER GPIO_MODER(GPIOF)
-#define GPIOG_MODER GPIO_MODER(GPIOG)
-#define GPIOH_MODER GPIO_MODER(GPIOH)
-#define GPIOI_MODER GPIO_MODER(GPIOI)
-
-/* Port output type register (GPIOx_OTYPER) */
-#define GPIO_OTYPER(port) MMIO32(port + 0x04)
-#define GPIOA_OTYPER GPIO_OTYPER(GPIOA)
-#define GPIOB_OTYPER GPIO_OTYPER(GPIOB)
-#define GPIOC_OTYPER GPIO_OTYPER(GPIOC)
-#define GPIOD_OTYPER GPIO_OTYPER(GPIOD)
-#define GPIOE_OTYPER GPIO_OTYPER(GPIOE)
-#define GPIOF_OTYPER GPIO_OTYPER(GPIOF)
-#define GPIOG_OTYPER GPIO_OTYPER(GPIOG)
-#define GPIOH_OTYPER GPIO_OTYPER(GPIOH)
-#define GPIOI_OTYPER GPIO_OTYPER(GPIOI)
-
-/* Port output speed register (GPIOx_OSPEEDR) */
-#define GPIO_OSPEEDR(port) MMIO32(port + 0x08)
-#define GPIOA_OSPEEDR GPIO_OSPEEDR(GPIOA)
-#define GPIOB_OSPEEDR GPIO_OSPEEDR(GPIOB)
-#define GPIOC_OSPEEDR GPIO_OSPEEDR(GPIOC)
-#define GPIOD_OSPEEDR GPIO_OSPEEDR(GPIOD)
-#define GPIOE_OSPEEDR GPIO_OSPEEDR(GPIOE)
-#define GPIOF_OSPEEDR GPIO_OSPEEDR(GPIOF)
-#define GPIOG_OSPEEDR GPIO_OSPEEDR(GPIOG)
-#define GPIOH_OSPEEDR GPIO_OSPEEDR(GPIOH)
-#define GPIOI_OSPEEDR GPIO_OSPEEDR(GPIOI)
-
-/* Port pull-up/pull-down register (GPIOx_PUPDR) */
-#define GPIO_PUPDR(port) MMIO32(port + 0x0c)
-#define GPIOA_PUPDR GPIO_PUPDR(GPIOA)
-#define GPIOB_PUPDR GPIO_PUPDR(GPIOB)
-#define GPIOC_PUPDR GPIO_PUPDR(GPIOC)
-#define GPIOD_PUPDR GPIO_PUPDR(GPIOD)
-#define GPIOE_PUPDR GPIO_PUPDR(GPIOE)
-#define GPIOF_PUPDR GPIO_PUPDR(GPIOF)
-#define GPIOG_PUPDR GPIO_PUPDR(GPIOG)
-#define GPIOH_PUPDR GPIO_PUPDR(GPIOH)
-#define GPIOI_PUPDR GPIO_PUPDR(GPIOI)
-
-/* Port input data register (GPIOx_IDR) */
-#define GPIO_IDR(port) MMIO32(port + 0x10)
-#define GPIOA_IDR GPIO_IDR(GPIOA)
-#define GPIOB_IDR GPIO_IDR(GPIOB)
-#define GPIOC_IDR GPIO_IDR(GPIOC)
-#define GPIOD_IDR GPIO_IDR(GPIOD)
-#define GPIOE_IDR GPIO_IDR(GPIOE)
-#define GPIOF_IDR GPIO_IDR(GPIOF)
-#define GPIOG_IDR GPIO_IDR(GPIOG)
-#define GPIOH_IDR GPIO_IDR(GPIOH)
-#define GPIOI_IDR GPIO_IDR(GPIOI)
-
-/* Port output data register (GPIOx_ODR) */
-#define GPIO_ODR(port) MMIO32(port + 0x14)
-#define GPIOA_ODR GPIO_ODR(GPIOA)
-#define GPIOB_ODR GPIO_ODR(GPIOB)
-#define GPIOC_ODR GPIO_ODR(GPIOC)
-#define GPIOD_ODR GPIO_ODR(GPIOD)
-#define GPIOE_ODR GPIO_ODR(GPIOE)
-#define GPIOF_ODR GPIO_ODR(GPIOF)
-#define GPIOG_ODR GPIO_ODR(GPIOG)
-#define GPIOH_ODR GPIO_ODR(GPIOH)
-#define GPIOI_ODR GPIO_ODR(GPIOI)
-
-/* Port bit set/reset register (GPIOx_BSRR) */
-#define GPIO_BSRR(port) MMIO32(port + 0x18)
-#define GPIOA_BSRR GPIO_BSRR(GPIOA)
-#define GPIOB_BSRR GPIO_BSRR(GPIOB)
-#define GPIOC_BSRR GPIO_BSRR(GPIOC)
-#define GPIOD_BSRR GPIO_BSRR(GPIOD)
-#define GPIOE_BSRR GPIO_BSRR(GPIOE)
-#define GPIOF_BSRR GPIO_BSRR(GPIOF)
-#define GPIOG_BSRR GPIO_BSRR(GPIOG)
-#define GPIOH_BSRR GPIO_BSRR(GPIOH)
-#define GPIOI_BSRR GPIO_BSRR(GPIOI)
-
-/* Port configuration lock register (GPIOx_LCKR) */
-#define GPIO_LCKR(port) MMIO32(port + 0x1c)
-#define GPIOA_LCKR GPIO_LCKR(GPIOA)
-#define GPIOB_LCKR GPIO_LCKR(GPIOB)
-#define GPIOC_LCKR GPIO_LCKR(GPIOC)
-#define GPIOD_LCKR GPIO_LCKR(GPIOD)
-#define GPIOE_LCKR GPIO_LCKR(GPIOE)
-#define GPIOF_LCKR GPIO_LCKR(GPIOF)
-#define GPIOG_LCKR GPIO_LCKR(GPIOG)
-#define GPIOH_LCKR GPIO_LCKR(GPIOH)
-#define GPIOI_LCKR GPIO_LCKR(GPIOI)
-
-/* Alternate function low register (GPIOx_AFRL) */
-#define GPIO_AFRL(port) MMIO32(port + 0x20)
-#define GPIOA_AFRL GPIO_AFRL(GPIOA)
-#define GPIOB_AFRL GPIO_AFRL(GPIOB)
-#define GPIOC_AFRL GPIO_AFRL(GPIOC)
-#define GPIOD_AFRL GPIO_AFRL(GPIOD)
-#define GPIOE_AFRL GPIO_AFRL(GPIOE)
-#define GPIOF_AFRL GPIO_AFRL(GPIOF)
-#define GPIOG_AFRL GPIO_AFRL(GPIOG)
-#define GPIOH_AFRL GPIO_AFRL(GPIOH)
-#define GPIOI_AFRL GPIO_AFRL(GPIOI)
-
-/* Alternate function high register (GPIOx_AFRH) */
-#define GPIO_AFRH(port) MMIO32(port + 0x24)
-#define GPIOA_AFRH GPIO_AFRH(GPIOA)
-#define GPIOB_AFRH GPIO_AFRH(GPIOB)
-#define GPIOC_AFRH GPIO_AFRH(GPIOC)
-#define GPIOD_AFRH GPIO_AFRH(GPIOD)
-#define GPIOE_AFRH GPIO_AFRH(GPIOE)
-#define GPIOF_AFRH GPIO_AFRH(GPIOF)
-#define GPIOG_AFRH GPIO_AFRH(GPIOG)
-#define GPIOH_AFRH GPIO_AFRH(GPIOH)
-#define GPIOI_AFRH GPIO_AFRH(GPIOI)
-
-/* --- GPIOx_MODER values -------------------------------------------------- */
-
-#define GPIO_MODE(n, mode) (mode << (2 * (n)))
-#define GPIO_MODE_MASK(n) (0x3 << (2 * (n)))
-#define GPIO_MODE_INPUT 0x0
-#define GPIO_MODE_OUTPUT 0x1
-#define GPIO_MODE_AF 0x2
-#define GPIO_MODE_ANALOG 0x3
-
-/* --- GPIOx_OTYPER values ------------------------------------------------- */
-
-#define GPIO_OTYPE_PP 0x0
-#define GPIO_OTYPE_OD 0x1
-
-/* --- GPIOx_OSPEEDR values ------------------------------------------------ */
-
-#define GPIO_OSPEED(n, speed) (speed << (2 * (n)))
-#define GPIO_OSPEED_MASK(n) (0x3 << (2 * (n)))
-#define GPIO_OSPEED_2MHZ 0x0
-#define GPIO_OSPEED_25MHZ 0x1
-#define GPIO_OSPEED_50MHZ 0x2
-#define GPIO_OSPEED_100MHZ 0x3
-
-/* --- GPIOx_PUPDR values -------------------------------------------------- */
-
-#define GPIO_PUPD(n, pupd) (pupd << (2 * (n)))
-#define GPIO_PUPD_MASK(n) (0x3 << (2 * (n)))
-#define GPIO_PUPD_NONE 0x0
-#define GPIO_PUPD_PULLUP 0x1
-#define GPIO_PUPD_PULLDOWN 0x2
-
-/* --- GPIOx_IDR values ---------------------------------------------------- */
-
-/* GPIOx_IDR[15:0]: IDRy[15:0]: Port input data (y = 0..15) */
-
-/* --- GPIOx_ODR values ---------------------------------------------------- */
-
-/* GPIOx_ODR[15:0]: ODRy[15:0]: Port output data (y = 0..15) */
-
-/* --- GPIOx_BSRR values --------------------------------------------------- */
-
-/* GPIOx_BSRR[31:16]: BRy: Port x reset bit y (y = 0..15) */
-/* GPIOx_BSRR[15:0]: BSy: Port x set bit y (y = 0..15) */
-
-/* --- GPIOx_LCKR values --------------------------------------------------- */
-
-#define GPIO_LCKK (1 << 16)
-/* GPIOx_LCKR[15:0]: LCKy: Port x lock bit y (y = 0..15) */
-
-/* --- GPIOx_AFRL/H values ------------------------------------------------- */
-
-/* Note: AFRL is used for bits 0..7, AFRH is used for 8..15 */
-/* See Datasheet Table 6 (pg. 48) for alternate function mappings. */
-
-#define GPIO_AFR(n, af) (af << ((n) * 4))
-#define GPIO_AFR_MASK(n) (0xf << ((n) * 4))
-#define GPIO_AF0 0x0
-#define GPIO_AF1 0x1
-#define GPIO_AF2 0x2
-#define GPIO_AF3 0x3
-#define GPIO_AF4 0x4
-#define GPIO_AF5 0x5
-#define GPIO_AF6 0x6
-#define GPIO_AF7 0x7
-#define GPIO_AF8 0x8
-#define GPIO_AF9 0x9
-#define GPIO_AF10 0xa
-#define GPIO_AF11 0xb
-#define GPIO_AF12 0xc
-#define GPIO_AF13 0xd
-#define GPIO_AF14 0xe
-#define GPIO_AF15 0xf
-
-/* Note: EXTI source selection is now in the SYSCFG peripheral. */
-
-/* --- Function prototypes ------------------------------------------------- */
-
-BEGIN_DECLS
-
-/*
- * Note: The F2 series has a completely new GPIO peripheral with different
- * configuration options. Here we implement a different API partly to more
- * closely match the peripheral capabilities and also to deliberately break
- * compatibility with old F1 code so there is no confusion with similar
- * sounding functions that have very different functionality.
- */
-
-void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios);
-void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios);
-void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios);
-
-/* This part of the API is compatible with the F1 series ------------------- */
-void gpio_set(u32 gpioport, u16 gpios);
-void gpio_clear(u32 gpioport, u16 gpios);
-u16 gpio_get(u32 gpioport, u16 gpios);
-void gpio_toggle(u32 gpioport, u16 gpios);
-u16 gpio_port_read(u32 gpioport);
-void gpio_port_write(u32 gpioport, u16 data);
-void gpio_port_config_lock(u32 gpioport, u16 gpios);
-
-END_DECLS
+#include <libopencm3/stm32/f2/memorymap.h>
+#include <libopencm3/stm32/common/gpio_common_f24.h>
#endif
+
diff --git a/include/libopencm3/stm32/f4/gpio.h b/include/libopencm3/stm32/f4/gpio.h
index b7da9c6..9e0685f 100644
--- a/include/libopencm3/stm32/f4/gpio.h
+++ b/include/libopencm3/stm32/f4/gpio.h
@@ -1,8 +1,23 @@
+/** @defgroup gpio_defines GPIO Defines
+
+@brief <b>Defined Constants and Types for the STM32F4xx General Purpose I/O</b>
+
+@ingroup STM32F4xx_defines
+
+@version 1.0.0
+
+@author @htmlonly &copy; @endhtmlonly 2009 Uwe Hermann <uwe@hermann-uwe.de>
+@author @htmlonly &copy; @endhtmlonly 2012 Piotr Esden-Tempski <piotr@esden.net>
+@author @htmlonly &copy; @endhtmlonly 2012 Ken Sarkies <ksarkies@internode.on.net>
+
+@date 1 July 2012
+
+LGPL License Terms @ref lgpl_license
+ */
+
/*
* This file is part of the libopencm3 project.
*
- * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
- *
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
@@ -20,263 +35,8 @@
#ifndef LIBOPENCM3_GPIO_H
#define LIBOPENCM3_GPIO_H
-#include <libopencm3/stm32/memorymap.h>
-#include <libopencm3/cm3/common.h>
-
-/* --- Convenience macros -------------------------------------------------- */
-
-/* GPIO port base addresses (for convenience) */
-#define GPIOA GPIO_PORT_A_BASE
-#define GPIOB GPIO_PORT_B_BASE
-#define GPIOC GPIO_PORT_C_BASE
-#define GPIOD GPIO_PORT_D_BASE
-#define GPIOE GPIO_PORT_E_BASE
-#define GPIOF GPIO_PORT_F_BASE
-#define GPIOG GPIO_PORT_G_BASE
-#define GPIOH GPIO_PORT_H_BASE
-#define GPIOI GPIO_PORT_I_BASE
-
-/* GPIO number definitions (for convenience) */
-#define GPIO0 (1 << 0)
-#define GPIO1 (1 << 1)
-#define GPIO2 (1 << 2)
-#define GPIO3 (1 << 3)
-#define GPIO4 (1 << 4)
-#define GPIO5 (1 << 5)
-#define GPIO6 (1 << 6)
-#define GPIO7 (1 << 7)
-#define GPIO8 (1 << 8)
-#define GPIO9 (1 << 9)
-#define GPIO10 (1 << 10)
-#define GPIO11 (1 << 11)
-#define GPIO12 (1 << 12)
-#define GPIO13 (1 << 13)
-#define GPIO14 (1 << 14)
-#define GPIO15 (1 << 15)
-#define GPIO_ALL 0xffff
-
-/* --- GPIO registers ------------------------------------------------------ */
-
-/* Port mode register (GPIOx_MODER) */
-#define GPIO_MODER(port) MMIO32(port + 0x00)
-#define GPIOA_MODER GPIO_MODER(GPIOA)
-#define GPIOB_MODER GPIO_MODER(GPIOB)
-#define GPIOC_MODER GPIO_MODER(GPIOC)
-#define GPIOD_MODER GPIO_MODER(GPIOD)
-#define GPIOE_MODER GPIO_MODER(GPIOE)
-#define GPIOF_MODER GPIO_MODER(GPIOF)
-#define GPIOG_MODER GPIO_MODER(GPIOG)
-#define GPIOH_MODER GPIO_MODER(GPIOH)
-#define GPIOI_MODER GPIO_MODER(GPIOI)
-
-/* Port output type register (GPIOx_OTYPER) */
-#define GPIO_OTYPER(port) MMIO32(port + 0x04)
-#define GPIOA_OTYPER GPIO_OTYPER(GPIOA)
-#define GPIOB_OTYPER GPIO_OTYPER(GPIOB)
-#define GPIOC_OTYPER GPIO_OTYPER(GPIOC)
-#define GPIOD_OTYPER GPIO_OTYPER(GPIOD)
-#define GPIOE_OTYPER GPIO_OTYPER(GPIOE)
-#define GPIOF_OTYPER GPIO_OTYPER(GPIOF)
-#define GPIOG_OTYPER GPIO_OTYPER(GPIOG)
-#define GPIOH_OTYPER GPIO_OTYPER(GPIOH)
-#define GPIOI_OTYPER GPIO_OTYPER(GPIOI)
-
-/* Port output speed register (GPIOx_OSPEEDR) */
-#define GPIO_OSPEEDR(port) MMIO32(port + 0x08)
-#define GPIOA_OSPEEDR GPIO_OSPEEDR(GPIOA)
-#define GPIOB_OSPEEDR GPIO_OSPEEDR(GPIOB)
-#define GPIOC_OSPEEDR GPIO_OSPEEDR(GPIOC)
-#define GPIOD_OSPEEDR GPIO_OSPEEDR(GPIOD)
-#define GPIOE_OSPEEDR GPIO_OSPEEDR(GPIOE)
-#define GPIOF_OSPEEDR GPIO_OSPEEDR(GPIOF)
-#define GPIOG_OSPEEDR GPIO_OSPEEDR(GPIOG)
-#define GPIOH_OSPEEDR GPIO_OSPEEDR(GPIOH)
-#define GPIOI_OSPEEDR GPIO_OSPEEDR(GPIOI)
-
-/* Port pull-up/pull-down register (GPIOx_PUPDR) */
-#define GPIO_PUPDR(port) MMIO32(port + 0x0c)
-#define GPIOA_PUPDR GPIO_PUPDR(GPIOA)
-#define GPIOB_PUPDR GPIO_PUPDR(GPIOB)
-#define GPIOC_PUPDR GPIO_PUPDR(GPIOC)
-#define GPIOD_PUPDR GPIO_PUPDR(GPIOD)
-#define GPIOE_PUPDR GPIO_PUPDR(GPIOE)
-#define GPIOF_PUPDR GPIO_PUPDR(GPIOF)
-#define GPIOG_PUPDR GPIO_PUPDR(GPIOG)
-#define GPIOH_PUPDR GPIO_PUPDR(GPIOH)
-#define GPIOI_PUPDR GPIO_PUPDR(GPIOI)
-
-/* Port input data register (GPIOx_IDR) */
-#define GPIO_IDR(port) MMIO32(port + 0x10)
-#define GPIOA_IDR GPIO_IDR(GPIOA)
-#define GPIOB_IDR GPIO_IDR(GPIOB)
-#define GPIOC_IDR GPIO_IDR(GPIOC)
-#define GPIOD_IDR GPIO_IDR(GPIOD)
-#define GPIOE_IDR GPIO_IDR(GPIOE)
-#define GPIOF_IDR GPIO_IDR(GPIOF)
-#define GPIOG_IDR GPIO_IDR(GPIOG)
-#define GPIOH_IDR GPIO_IDR(GPIOH)
-#define GPIOI_IDR GPIO_IDR(GPIOI)
-
-/* Port output data register (GPIOx_ODR) */
-#define GPIO_ODR(port) MMIO32(port + 0x14)
-#define GPIOA_ODR GPIO_ODR(GPIOA)
-#define GPIOB_ODR GPIO_ODR(GPIOB)
-#define GPIOC_ODR GPIO_ODR(GPIOC)
-#define GPIOD_ODR GPIO_ODR(GPIOD)
-#define GPIOE_ODR GPIO_ODR(GPIOE)
-#define GPIOF_ODR GPIO_ODR(GPIOF)
-#define GPIOG_ODR GPIO_ODR(GPIOG)
-#define GPIOH_ODR GPIO_ODR(GPIOH)
-#define GPIOI_ODR GPIO_ODR(GPIOI)
-
-/* Port bit set/reset register (GPIOx_BSRR) */
-#define GPIO_BSRR(port) MMIO32(port + 0x18)
-#define GPIOA_BSRR GPIO_BSRR(GPIOA)
-#define GPIOB_BSRR GPIO_BSRR(GPIOB)
-#define GPIOC_BSRR GPIO_BSRR(GPIOC)
-#define GPIOD_BSRR GPIO_BSRR(GPIOD)
-#define GPIOE_BSRR GPIO_BSRR(GPIOE)
-#define GPIOF_BSRR GPIO_BSRR(GPIOF)
-#define GPIOG_BSRR GPIO_BSRR(GPIOG)
-#define GPIOH_BSRR GPIO_BSRR(GPIOH)
-#define GPIOI_BSRR GPIO_BSRR(GPIOI)
-
-/* Port configuration lock register (GPIOx_LCKR) */
-#define GPIO_LCKR(port) MMIO32(port + 0x1c)
-#define GPIOA_LCKR GPIO_LCKR(GPIOA)
-#define GPIOB_LCKR GPIO_LCKR(GPIOB)
-#define GPIOC_LCKR GPIO_LCKR(GPIOC)
-#define GPIOD_LCKR GPIO_LCKR(GPIOD)
-#define GPIOE_LCKR GPIO_LCKR(GPIOE)
-#define GPIOF_LCKR GPIO_LCKR(GPIOF)
-#define GPIOG_LCKR GPIO_LCKR(GPIOG)
-#define GPIOH_LCKR GPIO_LCKR(GPIOH)
-#define GPIOI_LCKR GPIO_LCKR(GPIOI)
-
-/* Alternate function low register (GPIOx_AFRL) */
-#define GPIO_AFRL(port) MMIO32(port + 0x20)
-#define GPIOA_AFRL GPIO_AFRL(GPIOA)
-#define GPIOB_AFRL GPIO_AFRL(GPIOB)
-#define GPIOC_AFRL GPIO_AFRL(GPIOC)
-#define GPIOD_AFRL GPIO_AFRL(GPIOD)
-#define GPIOE_AFRL GPIO_AFRL(GPIOE)
-#define GPIOF_AFRL GPIO_AFRL(GPIOF)
-#define GPIOG_AFRL GPIO_AFRL(GPIOG)
-#define GPIOH_AFRL GPIO_AFRL(GPIOH)
-#define GPIOI_AFRL GPIO_AFRL(GPIOI)
-
-/* Alternate function high register (GPIOx_AFRH) */
-#define GPIO_AFRH(port) MMIO32(port + 0x24)
-#define GPIOA_AFRH GPIO_AFRH(GPIOA)
-#define GPIOB_AFRH GPIO_AFRH(GPIOB)
-#define GPIOC_AFRH GPIO_AFRH(GPIOC)
-#define GPIOD_AFRH GPIO_AFRH(GPIOD)
-#define GPIOE_AFRH GPIO_AFRH(GPIOE)
-#define GPIOF_AFRH GPIO_AFRH(GPIOF)
-#define GPIOG_AFRH GPIO_AFRH(GPIOG)
-#define GPIOH_AFRH GPIO_AFRH(GPIOH)
-#define GPIOI_AFRH GPIO_AFRH(GPIOI)
-
-/* --- GPIOx_MODER values -------------------------------------------------- */
-
-#define GPIO_MODE(n, mode) (mode << (2 * (n)))
-#define GPIO_MODE_MASK(n) (0x3 << (2 * (n)))
-#define GPIO_MODE_INPUT 0x0
-#define GPIO_MODE_OUTPUT 0x1
-#define GPIO_MODE_AF 0x2
-#define GPIO_MODE_ANALOG 0x3
-
-/* --- GPIOx_OTYPER values ------------------------------------------------- */
-
-#define GPIO_OTYPE_PP 0x0
-#define GPIO_OTYPE_OD 0x1
-
-/* --- GPIOx_OSPEEDR values ------------------------------------------------ */
-
-#define GPIO_OSPEED(n, speed) (speed << (2 * (n)))
-#define GPIO_OSPEED_MASK(n) (0x3 << (2 * (n)))
-#define GPIO_OSPEED_2MHZ 0x0
-#define GPIO_OSPEED_25MHZ 0x1
-#define GPIO_OSPEED_50MHZ 0x2
-#define GPIO_OSPEED_100MHZ 0x3
-
-/* --- GPIOx_PUPDR values -------------------------------------------------- */
-
-#define GPIO_PUPD(n, pupd) (pupd << (2 * (n)))
-#define GPIO_PUPD_MASK(n) (0x3 << (2 * (n)))
-#define GPIO_PUPD_NONE 0x0
-#define GPIO_PUPD_PULLUP 0x1
-#define GPIO_PUPD_PULLDOWN 0x2
-
-/* --- GPIOx_IDR values ---------------------------------------------------- */
-
-/* GPIOx_IDR[15:0]: IDRy[15:0]: Port input data (y = 0..15) */
-
-/* --- GPIOx_ODR values ---------------------------------------------------- */
-
-/* GPIOx_ODR[15:0]: ODRy[15:0]: Port output data (y = 0..15) */
-
-/* --- GPIOx_BSRR values --------------------------------------------------- */
-
-/* GPIOx_BSRR[31:16]: BRy: Port x reset bit y (y = 0..15) */
-/* GPIOx_BSRR[15:0]: BSy: Port x set bit y (y = 0..15) */
-
-/* --- GPIOx_LCKR values --------------------------------------------------- */
-
-#define GPIO_LCKK (1 << 16)
-/* GPIOx_LCKR[15:0]: LCKy: Port x lock bit y (y = 0..15) */
-
-/* --- GPIOx_AFRL/H values ------------------------------------------------- */
-
-/* Note: AFRL is used for bits 0..7, AFRH is used for 8..15 */
-/* See Datasheet Table 6 (pg. 48) for alternate function mappings. */
-
-#define GPIO_AFR(n, af) (af << ((n) * 4))
-#define GPIO_AFR_MASK(n) (0xf << ((n) * 4))
-#define GPIO_AF0 0x0
-#define GPIO_AF1 0x1
-#define GPIO_AF2 0x2
-#define GPIO_AF3 0x3
-#define GPIO_AF4 0x4
-#define GPIO_AF5 0x5
-#define GPIO_AF6 0x6
-#define GPIO_AF7 0x7
-#define GPIO_AF8 0x8
-#define GPIO_AF9 0x9
-#define GPIO_AF10 0xa
-#define GPIO_AF11 0xb
-#define GPIO_AF12 0xc
-#define GPIO_AF13 0xd
-#define GPIO_AF14 0xe
-#define GPIO_AF15 0xf
-
-/* Note: EXTI source selection is now in the SYSCFG peripheral. */
-
-/* --- Function prototypes ------------------------------------------------- */
-
-BEGIN_DECLS
-
-/*
- * Note: The F4 series has a completely new GPIO peripheral with different
- * configuration options. Here we implement a different API partly to more
- * closely match the peripheral capabilities and also to deliberately break
- * compatibility with old F1 code so there is no confusion with similar
- * sounding functions that have very different functionality.
- */
-
-void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios);
-void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios);
-void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios);
-
-/* This part of the API is compatible with the F1 series ------------------- */
-void gpio_set(u32 gpioport, u16 gpios);
-void gpio_clear(u32 gpioport, u16 gpios);
-u16 gpio_get(u32 gpioport, u16 gpios);
-void gpio_toggle(u32 gpioport, u16 gpios);
-u16 gpio_port_read(u32 gpioport);
-void gpio_port_write(u32 gpioport, u16 data);
-void gpio_port_config_lock(u32 gpioport, u16 gpios);
-
-END_DECLS
+#include <libopencm3/stm32/f4/memorymap.h>
+#include <libopencm3/stm32/common/gpio_common_f24.h>
#endif
+
diff --git a/include/libopencm3/stm32/f4/syscfg.h b/include/libopencm3/stm32/f4/syscfg.h
deleted file mode 100644
index 7426f16..0000000
--- a/include/libopencm3/stm32/f4/syscfg.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#ifndef LIBOPENCM3_SYSCFG_H
-#define LIBOPENCM3_SYSCFG_H
-
-#include <libopencm3/stm32/memorymap.h>
-
-/* --- SYSCFG registers ------------------------------------------------------ */
-
-#define SYSCFG_MEMRM MMIO32(SYSCFG_BASE + 0x00)
-
-#define SYSCFG_PMC MMIO32(SYSCFG_BASE + 0x04)
-
-/* External interrupt configuration register 1 (SYSCFG_EXTICR1) */
-#define SYSCFG_EXTICR1 MMIO32(SYSCFG_BASE + 0x08)
-
-/* External interrupt configuration register 2 (SYSCFG_EXTICR2) */
-#define SYSCFG_EXTICR2 MMIO32(SYSCFG_BASE + 0x0c)
-
-/* External interrupt configuration register 3 (SYSCFG_EXTICR3) */
-#define SYSCFG_EXTICR3 MMIO32(SYSCFG_BASE + 0x10)
-
-/* External interrupt configuration register 4 (SYSCFG_EXTICR4) */
-#define SYSCFG_EXTICR4 MMIO32(SYSCFG_BASE + 0x14)
-
-#define SYSCFG_CMPCR MMIO32(SYSCFG_BASE + 0x20)
-
-#endif
-
diff --git a/include/libopencm3/stm32/gpio.h b/include/libopencm3/stm32/gpio.h
new file mode 100644
index 0000000..c106a09
--- /dev/null
+++ b/include/libopencm3/stm32/gpio.h
@@ -0,0 +1,31 @@
+/* This provides unification of code over STM32F subfamilies */
+
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#if defined(STM32F1)
+# include <libopencm3/stm32/f1/gpio.h>
+#elif defined(STM32F2)
+# include <libopencm3/stm32/f2/gpio.h>
+#elif defined(STM32F4)
+# include <libopencm3/stm32/f4/gpio.h>
+#elif defined(STM32L1)
+# include <libopencm3/stm32/l1/gpio.h>
+#else
+# error "stm32 family not defined."
+#endif
+
diff --git a/include/libopencm3/stm32/i2c.h b/include/libopencm3/stm32/i2c.h
index a59c420..1b2dc0e 100644
--- a/include/libopencm3/stm32/i2c.h
+++ b/include/libopencm3/stm32/i2c.h
@@ -321,7 +321,14 @@ LGPL License Terms @ref lgpl_license
#define I2C_CCR_FS (1 << 15)
/* DUTY: Fast Mode Duty Cycle */
+/** @defgroup i2c_duty_cycle I2C peripheral clock duty cycles
+@ingroup i2c_defines
+
+@{*/
#define I2C_CCR_DUTY (1 << 14)
+#define I2C_CCR_DUTY_DIV2 0
+#define I2C_CCR_DUTY_16_DIV_9 1
+/**@}*/
/* Note: Bits [13:12] are reserved, and forced to 0 by hardware. */
@@ -359,6 +366,7 @@ void i2c_peripheral_enable(u32 i2c);
void i2c_peripheral_disable(u32 i2c);
void i2c_send_start(u32 i2c);
void i2c_send_stop(u32 i2c);
+void i2c_clear_stop(u32 i2c);
void i2c_set_own_7bit_slave_address(u32 i2c, u8 slave);
void i2c_set_own_10bit_slave_address(u32 i2c, u16 slave);
void i2c_set_fast_mode(u32 i2c);
@@ -368,6 +376,18 @@ void i2c_set_ccr(u32 i2c, u16 freq);
void i2c_set_trise(u32 i2c, u16 trise);
void i2c_send_7bit_address(u32 i2c, u8 slave, u8 readwrite);
void i2c_send_data(u32 i2c, u8 data);
+uint8_t i2c_get_data(u32 i2c);
+void i2c_enable_interrupt(u32 i2c, u32 interrupt);
+void i2c_disable_interrupt(u32 i2c, u32 interrupt);
+void i2c_enable_ack(u32 i2c);
+void i2c_disable_ack(u32 i2c);
+void i2c_nack_next(u32 i2c);
+void i2c_nack_current(u32 i2c);
+void i2c_set_dutycycle(u32 i2c, u32 dutycycle);
+void i2c_enable_dma(u32 i2c);
+void i2c_disable_dma(u32 i2c);
+void i2c_set_dma_last_transfer(u32 i2c);
+void i2c_clear_dma_last_transfer(u32 i2c);
END_DECLS
diff --git a/include/libopencm3/stm32/l1/doc-stm32l1.h b/include/libopencm3/stm32/l1/doc-stm32l1.h
new file mode 100644
index 0000000..96bea00
--- /dev/null
+++ b/include/libopencm3/stm32/l1/doc-stm32l1.h
@@ -0,0 +1,32 @@
+/** @mainpage libopencm3 STM32L1
+
+@version 1.0.0
+
+@date 12 November 2012
+
+API documentation for ST Microelectronics STM32L1 Cortex M3 series.
+
+LGPL License Terms @ref lgpl_license
+*/
+
+/** @defgroup STM32L1xx STM32L1xx
+Libraries for ST Microelectronics STM32L1xx series.
+
+@version 1.0.0
+
+@date 12 November 2012
+
+LGPL License Terms @ref lgpl_license
+*/
+
+/** @defgroup STM32L1xx_defines STM32L1xx Defines
+
+@brief Defined Constants and Types for the STM32L1xx series
+
+@version 1.0.0
+
+@date 12 November 2012
+
+LGPL License Terms @ref lgpl_license
+*/
+
diff --git a/include/libopencm3/stm32/l1/gpio.h b/include/libopencm3/stm32/l1/gpio.h
new file mode 100644
index 0000000..93850a2
--- /dev/null
+++ b/include/libopencm3/stm32/l1/gpio.h
@@ -0,0 +1,266 @@
+/** @defgroup gpio_defines GPIO Defines
+
+@brief <b>Defined Constants and Types for the STM32L1xx General Purpose I/O</b>
+
+@ingroup STM32L1xx_defines
+
+@version 1.0.0
+
+@author @htmlonly &copy; @endhtmlonly 2009 Uwe Hermann <uwe@hermann-uwe.de>
+@author @htmlonly &copy; @endhtmlonly 2012 Piotr Esden-Tempski <piotr@esden.net>
+@author @htmlonly &copy; @endhtmlonly 2012 Karl Palsson <karlp@tweak.net.au>
+
+@date 1 July 2012
+
+LGPL License Terms @ref lgpl_license
+ */
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ * Copyright (C) 2012 Piotr Esden-Tempski <piotr@esden.net>
+ * Copyright (C) 2012 Karl Palsson <karlp@tweak.net.au>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/**@{*/
+
+#ifndef LIBOPENCM3_GPIO_H
+#define LIBOPENCM3_GPIO_H
+
+#include <libopencm3/stm32/memorymap.h>
+#include <libopencm3/stm32/common/gpio_common_all.h>
+
+/* --- Convenience macros -------------------------------------------------- */
+
+/* GPIO port base addresses (for convenience) */
+/* GPIO port base addresses (for convenience) */
+/** @defgroup gpio_port_id GPIO Port IDs
+@ingroup gpio_defines
+
+@{*/
+#define GPIOA GPIO_PORT_A_BASE
+#define GPIOB GPIO_PORT_B_BASE
+#define GPIOC GPIO_PORT_C_BASE
+#define GPIOD GPIO_PORT_D_BASE
+#define GPIOE GPIO_PORT_E_BASE
+#define GPIOH GPIO_PORT_H_BASE
+/**@}*/
+
+/* --- GPIO registers ------------------------------------------------------ */
+
+/* Port mode register (GPIOx_MODER) */
+#define GPIO_MODER(port) MMIO32(port + 0x00)
+#define GPIOA_MODER GPIO_MODER(GPIOA)
+#define GPIOB_MODER GPIO_MODER(GPIOB)
+#define GPIOC_MODER GPIO_MODER(GPIOC)
+#define GPIOD_MODER GPIO_MODER(GPIOD)
+#define GPIOE_MODER GPIO_MODER(GPIOE)
+#define GPIOH_MODER GPIO_MODER(GPIOH)
+
+/* Port output type register (GPIOx_OTYPER) */
+#define GPIO_OTYPER(port) MMIO32(port + 0x04)
+#define GPIOA_OTYPER GPIO_OTYPER(GPIOA)
+#define GPIOB_OTYPER GPIO_OTYPER(GPIOB)
+#define GPIOC_OTYPER GPIO_OTYPER(GPIOC)
+#define GPIOD_OTYPER GPIO_OTYPER(GPIOD)
+#define GPIOE_OTYPER GPIO_OTYPER(GPIOE)
+#define GPIOH_OTYPER GPIO_OTYPER(GPIOH)
+
+/* Port output speed register (GPIOx_OSPEEDR) */
+#define GPIO_OSPEEDR(port) MMIO32(port + 0x08)
+#define GPIOA_OSPEEDR GPIO_OSPEEDR(GPIOA)
+#define GPIOB_OSPEEDR GPIO_OSPEEDR(GPIOB)
+#define GPIOC_OSPEEDR GPIO_OSPEEDR(GPIOC)
+#define GPIOD_OSPEEDR GPIO_OSPEEDR(GPIOD)
+#define GPIOE_OSPEEDR GPIO_OSPEEDR(GPIOE)
+#define GPIOH_OSPEEDR GPIO_OSPEEDR(GPIOH)
+
+/* Port pull-up/pull-down register (GPIOx_PUPDR) */
+#define GPIO_PUPDR(port) MMIO32(port + 0x0c)
+#define GPIOA_PUPDR GPIO_PUPDR(GPIOA)
+#define GPIOB_PUPDR GPIO_PUPDR(GPIOB)
+#define GPIOC_PUPDR GPIO_PUPDR(GPIOC)
+#define GPIOD_PUPDR GPIO_PUPDR(GPIOD)
+#define GPIOE_PUPDR GPIO_PUPDR(GPIOE)
+#define GPIOH_PUPDR GPIO_PUPDR(GPIOH)
+
+/* Port input data register (GPIOx_IDR) */
+#define GPIO_IDR(port) MMIO32(port + 0x10)
+#define GPIOA_IDR GPIO_IDR(GPIOA)
+#define GPIOB_IDR GPIO_IDR(GPIOB)
+#define GPIOC_IDR GPIO_IDR(GPIOC)
+#define GPIOD_IDR GPIO_IDR(GPIOD)
+#define GPIOE_IDR GPIO_IDR(GPIOE)
+#define GPIOH_IDR GPIO_IDR(GPIOH)
+
+/* Port output data register (GPIOx_ODR) */
+#define GPIO_ODR(port) MMIO32(port + 0x14)
+#define GPIOA_ODR GPIO_ODR(GPIOA)
+#define GPIOB_ODR GPIO_ODR(GPIOB)
+#define GPIOC_ODR GPIO_ODR(GPIOC)
+#define GPIOD_ODR GPIO_ODR(GPIOD)
+#define GPIOE_ODR GPIO_ODR(GPIOE)
+#define GPIOH_ODR GPIO_ODR(GPIOH)
+
+/* Port bit set/reset register (GPIOx_BSRR) */
+#define GPIO_BSRR(port) MMIO32(port + 0x18)
+#define GPIOA_BSRR GPIO_BSRR(GPIOA)
+#define GPIOB_BSRR GPIO_BSRR(GPIOB)
+#define GPIOC_BSRR GPIO_BSRR(GPIOC)
+#define GPIOD_BSRR GPIO_BSRR(GPIOD)
+#define GPIOE_BSRR GPIO_BSRR(GPIOE)
+#define GPIOH_BSRR GPIO_BSRR(GPIOH)
+
+/* Port configuration lock register (GPIOx_LCKR) */
+#define GPIO_LCKR(port) MMIO32(port + 0x1C)
+#define GPIOA_LCKR GPIO_LCKR(GPIOA)
+#define GPIOB_LCKR GPIO_LCKR(GPIOB)
+#define GPIOC_LCKR GPIO_LCKR(GPIOC)
+#define GPIOD_LCKR GPIO_LCKR(GPIOD)
+#define GPIOE_LCKR GPIO_LCKR(GPIOE)
+#define GPIOH_LCKR GPIO_LCKR(GPIOH)
+
+/* Alternate function low register (GPIOx_AFRL) */
+#define GPIO_AFRL(port) MMIO32(port + 0x20)
+#define GPIOA_AFRL GPIO_AFRL(GPIOA)
+#define GPIOB_AFRL GPIO_AFRL(GPIOB)
+#define GPIOC_AFRL GPIO_AFRL(GPIOC)
+#define GPIOD_AFRL GPIO_AFRL(GPIOD)
+#define GPIOE_AFRL GPIO_AFRL(GPIOE)
+#define GPIOH_AFRL GPIO_AFRL(GPIOH)
+
+/* Alternate function high register (GPIOx_AFRH) */
+#define GPIO_AFRH(port) MMIO32(port + 0x24)
+#define GPIOA_AFRH GPIO_AFRH(GPIOA)
+#define GPIOB_AFRH GPIO_AFRH(GPIOB)
+#define GPIOC_AFRH GPIO_AFRH(GPIOC)
+#define GPIOD_AFRH GPIO_AFRH(GPIOD)
+#define GPIOE_AFRH GPIO_AFRH(GPIOE)
+#define GPIOH_AFRH GPIO_AFRH(GPIOH)
+
+/* --- GPIOx_MODER values-------------------------------------------- */
+
+#define GPIO_MODE(n, mode) (mode << (2 * (n)))
+#define GPIO_MODE_MASK(n) (0x3 << (2 * (n)))
+/** @defgroup gpio_mode GPIO Pin Direction and Analog/Digital Mode
+@ingroup gpio_defines
+@{*/
+#define GPIO_MODE_INPUT 0x00 /* Default */
+#define GPIO_MODE_OUTPUT 0x01
+#define GPIO_MODE_AF 0x02
+#define GPIO_MODE_ANALOG 0x03
+/**@}*/
+
+/* --- GPIOx_OTYPER values -------------------------------------------- */
+/* Output type (OTx values) */
+/** @defgroup gpio_output_type GPIO Output Pin Driver Type
+@ingroup gpio_defines
+@list Push Pull
+@list Open Drain
+@{*/
+#define GPIO_OTYPE_PP 0x0
+#define GPIO_OTYPE_OD 0x1
+/**@}*/
+
+/* Output speed values */
+#define GPIO_OSPEED(n, speed) (speed << (2 * (n)))
+#define GPIO_OSPEED_MASK(n) (0x3 << (2 * (n)))
+/** @defgroup gpio_speed GPIO Output Pin Speed
+@ingroup gpio_defines
+@{*/
+#define GPIO_OSPEED_400KHZ 0x0
+#define GPIO_OSPEED_2MHZ 0x1
+#define GPIO_OSPEED_10MHZ 0x2
+#define GPIO_OSPEED_40MHZ 0x3
+/**@}*/
+
+/* --- GPIOx_PUPDR values ------------------------------------------- */
+
+#define GPIO_PUPD(n, pupd) (pupd << (2 * (n)))
+#define GPIO_PUPD_MASK(n) (0x3 << (2 * (n)))
+/** @defgroup gpio_pup GPIO Output Pin Pullup
+@ingroup gpio_defines
+@{*/
+#define GPIO_PUPD_NONE 0x0
+#define GPIO_PUPD_PULLUP 0x1
+#define GPIO_PUPD_PULLDOWN 0x2
+/**@}*/
+
+/* --- GPIO_IDR values ----------------------------------------------------- */
+
+/* GPIO_IDR[15:0]: IDRy[15:0]: Port input data (y = 0..15) */
+
+/* --- GPIO_ODR values ----------------------------------------------------- */
+
+/* GPIO_ODR[15:0]: ODRy[15:0]: Port output data (y = 0..15) */
+
+/* --- GPIO_BSRR values ---------------------------------------------------- */
+
+/* GPIO_BSRR[31:16]: BRy: Port x reset bit y (y = 0..15) */
+/* GPIO_BSRR[15:0]: BSy: Port x set bit y (y = 0..15) */
+
+/* --- GPIO_LCKR values ---------------------------------------------------- */
+
+#define GPIO_LCKK (1 << 16)
+/* GPIO_LCKR[15:0]: LCKy: Port x lock bit y (y = 0..15) */
+
+/* --- GPIOx_AFRL/H values ------------------------------------------------- */
+
+/* Note: AFRL is used for bits 0..7, AFRH is used for 8..15 */
+/* See datasheet table 5, page 35 for the definitions */
+
+#define GPIO_AFR(n, af) (af << ((n) * 4))
+#define GPIO_AFR_MASK(n) (0xf << ((n) * 4))
+/** @defgroup gpio_af_num Alternate Function Pin Selection
+@ingroup gpio_defines
+@{*/
+#define GPIO_AF0 0x0
+#define GPIO_AF1 0x1
+#define GPIO_AF2 0x2
+#define GPIO_AF3 0x3
+#define GPIO_AF4 0x4
+#define GPIO_AF5 0x5
+#define GPIO_AF6 0x6
+#define GPIO_AF7 0x7
+#define GPIO_AF8 0x8
+#define GPIO_AF9 0x9
+#define GPIO_AF10 0xa
+#define GPIO_AF11 0xb
+#define GPIO_AF12 0xc
+#define GPIO_AF13 0xd
+#define GPIO_AF14 0xe
+#define GPIO_AF15 0xf
+/**@}*/
+
+/* --- Function prototypes ------------------------------------------------- */
+
+BEGIN_DECLS
+
+/*
+ * L1, like F2 and F4, has the "new" GPIO peripheral, so use that style
+ * however the number of ports is reduced and H port naming is different.
+ * TODO: this should all really be moved to a "common" gpio header
+ */
+
+void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios);
+void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios);
+void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios);
+
+END_DECLS
+
+#endif
+/**@}*/
+
diff --git a/include/libopencm3/stm32/l1/irq.yaml b/include/libopencm3/stm32/l1/irq.yaml
new file mode 100644
index 0000000..c2f118f
--- /dev/null
+++ b/include/libopencm3/stm32/l1/irq.yaml
@@ -0,0 +1,49 @@
+includeguard: LIBOPENCM3_STM32_L1_NVIC_H
+partname_humanreadable: STM32 L1 series
+partname_doxygen: STM32L1
+irqs:
+ - wwdg
+ - pvd
+ - tamper
+ - rtc
+ - flash
+ - rcc
+ - exti0
+ - exti1
+ - exti2
+ - exti3
+ - exti4
+ - dma1_channel1
+ - dma1_channel2
+ - dma1_channel3
+ - dma1_channel4
+ - dma1_channel5
+ - dma1_channel6
+ - dma1_channel7
+ - adc1
+ - usb_hp
+ - usb_lp
+ - dac
+ - comp
+ - exti9_5
+ - lcd
+ - tim9
+ - tim10
+ - tim11
+ - tim2
+ - tim3
+ - tim4
+ - i2c1_ev
+ - i2c1_er
+ - i2c2_ev
+ - i2c2_er
+ - spi1
+ - spi2
+ - usart1
+ - usart2
+ - usart3
+ - exti15_10
+ - rtc_alarm
+ - usb_wakeup
+ - tim6
+ - tim7
diff --git a/include/libopencm3/stm32/l1/memorymap.h b/include/libopencm3/stm32/l1/memorymap.h
new file mode 100644
index 0000000..950dd18
--- /dev/null
+++ b/include/libopencm3/stm32/l1/memorymap.h
@@ -0,0 +1,108 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ * Copyright (C) 2012 Karl Palsson <karlp@tweak.net.au>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBOPENCM3_MEMORYMAP_H
+#define LIBOPENCM3_MEMORYMAP_H
+
+#include <libopencm3/cm3/memorymap.h>
+
+/* --- STM32 specific peripheral definitions ------------------------------- */
+
+/* Memory map for all busses */
+#define PERIPH_BASE ((u32)0x40000000)
+#define INFO_BASE ((u32)0x1ff00000)
+#define PERIPH_BASE_APB1 (PERIPH_BASE + 0x00000)
+#define PERIPH_BASE_APB2 (PERIPH_BASE + 0x10000)
+#define PERIPH_BASE_AHB (PERIPH_BASE + 0x20000)
+
+/* Register boundary addresses */
+
+/* APB1 */
+#define TIM2_BASE (PERIPH_BASE_APB1 + 0x0000)
+#define TIM3_BASE (PERIPH_BASE_APB1 + 0x0400)
+#define TIM4_BASE (PERIPH_BASE_APB1 + 0x0800)
+#define TIM5_BASE (PERIPH_BASE_APB1 + 0x0c00)
+#define TIM6_BASE (PERIPH_BASE_APB1 + 0x1000)
+#define TIM7_BASE (PERIPH_BASE_APB1 + 0x1400)
+#define LCD_BASE (PERIPH_BASE_APB1 + 0x2400)
+#define RTC_BASE (PERIPH_BASE_APB1 + 0x2800)
+#define WWDG_BASE (PERIPH_BASE_APB1 + 0x2c00)
+#define IWDG_BASE (PERIPH_BASE_APB1 + 0x3000)
+/* PERIPH_BASE_APB1 + 0x3400 (0x4000 3400 - 0x4000 37FF): Reserved */
+#define SPI2_BASE (PERIPH_BASE_APB1 + 0x3800)
+// datasheet has an error? here
+#define SPI3_BASE (PERIPH_BASE_APB1 + 0x3c00)
+/* PERIPH_BASE_APB1 + 0x4000 (0x4000 4000 - 0x4000 3FFF): Reserved */
+#define USART2_BASE (PERIPH_BASE_APB1 + 0x4400)
+#define USART3_BASE (PERIPH_BASE_APB1 + 0x4800)
+#define USART4_BASE (PERIPH_BASE_APB1 + 0x4c00)
+#define USART5_BASE (PERIPH_BASE_APB1 + 0x5000)
+#define I2C1_BASE (PERIPH_BASE_APB1 + 0x5400)
+#define I2C2_BASE (PERIPH_BASE_APB1 + 0x5800)
+#define USB_DEV_FS_BASE (PERIPH_BASE_APB1 + 0x5c00)
+#define USB_SRAM_BASE (PERIPH_BASE_APB1 + 0x6000)
+/* gap */
+#define POWER_CONTROL_BASE (PERIPH_BASE_APB1 + 0x7000)
+#define DAC_BASE (PERIPH_BASE_APB1 + 0x7400)
+#define COMP_BASE (PERIPH_BASE_APB1 + 0x7c00)
+#define ROUTING_BASE (PERIPH_BASE_APB1 + 0x7c04)
+
+/* APB2 */
+#define SYSCFG_BASE (PERIPH_BASE_APB2 + 0x0000)
+#define EXTI_BASE (PERIPH_BASE_APB2 + 0x0400)
+#define TIM9_BASE (PERIPH_BASE_APB2 + 0x0800)
+#define TIM10_BASE (PERIPH_BASE_APB2 + 0x0c00)
+#define TIM11_BASE (PERIPH_BASE_APB2 + 0x1000)
+/* gap */
+#define ADC_BASE (PERIPH_BASE_APB2 + 0x2400)
+/* gap */
+#define SDIO_BASE (PERIPH_BASE_APB2 + 0x2c00)
+#define SPI1_BASE (PERIPH_BASE_APB2 + 0x3000)
+/* gap */
+#define USART1_BASE (PERIPH_BASE_APB2 + 0x3800)
+
+/* AHB */
+#define GPIO_PORT_A_BASE (PERIPH_BASE_AHB + 0x00000)
+#define GPIO_PORT_B_BASE (PERIPH_BASE_AHB + 0x00400)
+#define GPIO_PORT_C_BASE (PERIPH_BASE_AHB + 0x00800)
+#define GPIO_PORT_D_BASE (PERIPH_BASE_AHB + 0x00c00)
+#define GPIO_PORT_E_BASE (PERIPH_BASE_AHB + 0x01000)
+#define GPIO_PORT_H_BASE (PERIPH_BASE_AHB + 0x01400)
+/* gap */
+#define CRC_BASE (PERIPH_BASE_AHB + 0x03000)
+/* gap */
+#define RCC_BASE (PERIPH_BASE_AHB + 0x03800)
+#define FLASH_MEM_INTERFACE_BASE (PERIPH_BASE_AHB + 0x03c00)
+/* gap */
+#define DMA_BASE (PERIPH_BASE_AHB + 0x06000)
+
+/* PPIB */
+#define DBGMCU_BASE (PPBI_BASE + 0x00042000)
+
+/* FSMC */
+#define FSMC_BASE (PERIPH_BASE + 0x60000000)
+/* AES */
+#define AES_BASE (PERIPH_BASE + 0x10000000)
+
+/* Device Electronic Signature */
+#define DESIG_FLASH_SIZE_BASE (INFO_BASE + 0x8004C)
+#define DESIG_UNIQUE_ID_BASE (INFO_BASE + 0x80050)
+
+#endif
diff --git a/include/libopencm3/stm32/l1/rcc.h b/include/libopencm3/stm32/l1/rcc.h
new file mode 100644
index 0000000..d888d7c
--- /dev/null
+++ b/include/libopencm3/stm32/l1/rcc.h
@@ -0,0 +1,404 @@
+/** @defgroup STM32L1xx_rcc_defines RCC Defines
+
+@ingroup STM32L1xx_defines
+
+@brief <b>libopencm3 STM32L1xx Reset and Clock Control</b>
+
+@version 1.0.0
+
+@author @htmlonly &copy; @endhtmlonly 2009 Federico Ruiz-Ugalde \<memeruiz at gmail dot com\>
+@author @htmlonly &copy; @endhtmlonly 2009 Uwe Hermann <uwe@hermann-uwe.de>
+@author @htmlonly &copy; @endhtmlonly 2012 Karl Palsson <karlp@tweak.net.au>
+
+@date 11 November 2012
+
+LGPL License Terms @ref lgpl_license
+ */
+
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ * Copyright (C) 2009 Federico Ruiz-Ugalde <memeruiz at gmail dot com>
+ * Copyright (C) 2012 Karl Palsson <karlp@tweak.net.au>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ *
+ * Originally based on the F1 code, as it seemed most similar to the L1
+ * TODO: very incomplete still!
+ */
+
+/**@{*/
+
+#ifndef LIBOPENCM3_RCC_H
+#define LIBOPENCM3_RCC_H
+
+#include <libopencm3/stm32/memorymap.h>
+#include <libopencm3/cm3/common.h>
+
+/* --- RCC registers ------------------------------------------------------- */
+
+#define RCC_CR MMIO32(RCC_BASE + 0x00)
+#define RCC_ICSCR MMIO32(RCC_BASE + 0x04)
+#define RCC_CFGR MMIO32(RCC_BASE + 0x08)
+#define RCC_CIR MMIO32(RCC_BASE + 0x0c)
+#define RCC_AHBRSTR MMIO32(RCC_BASE + 0x10)
+#define RCC_APB2RSTR MMIO32(RCC_BASE + 0x14)
+#define RCC_APB1RSTR MMIO32(RCC_BASE + 0x18)
+#define RCC_AHBENR MMIO32(RCC_BASE + 0x1c)
+#define RCC_APB2ENR MMIO32(RCC_BASE + 0x20)
+#define RCC_APB1ENR MMIO32(RCC_BASE + 0x24)
+#define RCC_AHBLPENR MMIO32(RCC_BASE + 0x28)
+#define RCC_APB2LPENR MMIO32(RCC_BASE + 0x2c)
+#define RCC_APB1LPENR MMIO32(RCC_BASE + 0x30)
+#define RCC_CSR MMIO32(RCC_BASE + 0x34)
+
+/* --- RCC_CR values ------------------------------------------------------- */
+
+/* RTCPRE[1:0] at 30:29 */
+#define RCC_CR_CSSON (1 << 28)
+#define RCC_CR_PLLRDY (1 << 25)
+#define RCC_CR_PLLON (1 << 24)
+#define RCC_CR_HSEBYP (1 << 18)
+#define RCC_CR_HSERDY (1 << 17)
+#define RCC_CR_HSEON (1 << 16)
+#define RCC_CR_MSIRDY (1 << 9)
+#define RCC_CR_MSION (1 << 8)
+#define RCC_CR_HSIRDY (1 << 1)
+#define RCC_CR_HSION (1 << 0)
+
+#define RCC_CR_RTCPRE_DIV2 0
+#define RCC_CR_RTCPRE_DIV4 1
+#define RCC_CR_RTCPRE_DIV8 2
+#define RCC_CR_RTCPRE_DIV18 3
+
+/* --- RCC_ICSCR values ---------------------------------------------------- */
+
+// TODO
+
+/* --- RCC_CFGR values ----------------------------------------------------- */
+
+/* MCOPRE */
+#define RCC_CFGR_MCOPRE_DIV1 0
+#define RCC_CFGR_MCOPRE_DIV2 1
+#define RCC_CFGR_MCOPRE_DIV4 2
+#define RCC_CFGR_MCOPRE_DIV8 3
+#define RCC_CFGR_MCOPRE_DIV16 4
+
+/* MCO: Microcontroller clock output */
+#define RCC_CFGR_MCO_NOCLK 0x0
+#define RCC_CFGR_MCO_SYSCLK 0x1
+#define RCC_CFGR_MCO_HSICLK 0x2
+#define RCC_CFGR_MCO_MSICLK 0x3
+#define RCC_CFGR_MCO_HSECLK 0x4
+#define RCC_CFGR_MCO_PLLCLK 0x5
+#define RCC_CFGR_MCO_LSICLK 0x6
+#define RCC_CFGR_MCO_LSECLK 0x7
+
+/* PLL Output division selection */
+#define RCC_CFGR_PLLDIV_DIV2 0x1
+#define RCC_CFGR_PLLDIV_DIV3 0x2
+#define RCC_CFGR_PLLDIV_DIV4 0x3
+
+/* PLLMUL: PLL multiplication factor */
+#define RCC_CFGR_PLLMUL_MUL3 0x0
+#define RCC_CFGR_PLLMUL_MUL4 0x1
+#define RCC_CFGR_PLLMUL_MUL6 0x2
+#define RCC_CFGR_PLLMUL_MUL8 0x3
+#define RCC_CFGR_PLLMUL_MUL12 0x4
+#define RCC_CFGR_PLLMUL_MUL16 0x5
+#define RCC_CFGR_PLLMUL_MUL24 0x6
+#define RCC_CFGR_PLLMUL_MUL32 0x7
+#define RCC_CFGR_PLLMUL_MUL48 0x8
+
+/* PLLSRC: PLL entry clock source */
+#define RCC_CFGR_PLLSRC_HSI_CLK 0x0
+#define RCC_CFGR_PLLSRC_HSE_CLK 0x1
+
+/* PPRE2: APB high-speed prescaler (APB2) */
+#define RCC_CFGR_PPRE2_HCLK_NODIV 0x0
+#define RCC_CFGR_PPRE2_HCLK_DIV2 0x4
+#define RCC_CFGR_PPRE2_HCLK_DIV4 0x5
+#define RCC_CFGR_PPRE2_HCLK_DIV8 0x6
+#define RCC_CFGR_PPRE2_HCLK_DIV16 0x7
+
+/* PPRE1: APB low-speed prescaler (APB1) */
+#define RCC_CFGR_PPRE1_HCLK_NODIV 0x0
+#define RCC_CFGR_PPRE1_HCLK_DIV2 0x4
+#define RCC_CFGR_PPRE1_HCLK_DIV4 0x5
+#define RCC_CFGR_PPRE1_HCLK_DIV8 0x6
+#define RCC_CFGR_PPRE1_HCLK_DIV16 0x7
+
+/* HPRE: AHB prescaler */
+#define RCC_CFGR_HPRE_SYSCLK_NODIV 0x0
+#define RCC_CFGR_HPRE_SYSCLK_DIV2 0x8
+#define RCC_CFGR_HPRE_SYSCLK_DIV4 0x9
+#define RCC_CFGR_HPRE_SYSCLK_DIV8 0xa
+#define RCC_CFGR_HPRE_SYSCLK_DIV16 0xb
+#define RCC_CFGR_HPRE_SYSCLK_DIV64 0xc
+#define RCC_CFGR_HPRE_SYSCLK_DIV128 0xd
+#define RCC_CFGR_HPRE_SYSCLK_DIV256 0xe
+#define RCC_CFGR_HPRE_SYSCLK_DIV512 0xf
+
+/* SWS: System clock switch status */
+#define RCC_CFGR_SWS_SYSCLKSEL_MSICLK 0x0
+#define RCC_CFGR_SWS_SYSCLKSEL_HSICLK 0x1
+#define RCC_CFGR_SWS_SYSCLKSEL_HSECLK 0x2
+#define RCC_CFGR_SWS_SYSCLKSEL_PLLCLK 0x3
+
+/* SW: System clock switch */
+#define RCC_CFGR_SW_SYSCLKSEL_MSICLK 0x0
+#define RCC_CFGR_SW_SYSCLKSEL_HSICLK 0x1
+#define RCC_CFGR_SW_SYSCLKSEL_HSECLK 0x2
+#define RCC_CFGR_SW_SYSCLKSEL_PLLCLK 0x3
+
+/* --- RCC_CIR values ------------------------------------------------------ */
+
+/* Clock security system interrupt clear bit */
+#define RCC_CIR_CSSC (1 << 23)
+
+/* OSC ready interrupt clear bits */
+#define RCC_CIR_MSIRDYC (1 << 21)
+#define RCC_CIR_PLLRDYC (1 << 20)
+#define RCC_CIR_HSERDYC (1 << 19)
+#define RCC_CIR_HSIRDYC (1 << 18)
+#define RCC_CIR_LSERDYC (1 << 17)
+#define RCC_CIR_LSIRDYC (1 << 16)
+
+/* OSC ready interrupt enable bits */
+#define RCC_CIR_MSIRDYIE (1 << 13)
+#define RCC_CIR_PLLRDYIE (1 << 12)
+#define RCC_CIR_HSERDYIE (1 << 11)
+#define RCC_CIR_HSIRDYIE (1 << 10)
+#define RCC_CIR_LSERDYIE (1 << 9)
+#define RCC_CIR_LSIRDYIE (1 << 8)
+
+/* Clock security system interrupt flag bit */
+#define RCC_CIR_CSSF (1 << 7)
+
+/* OSC ready interrupt flag bits */
+#define RCC_CIR_MSIRDYF (1 << 5) /* (**) */
+#define RCC_CIR_PLLRDYF (1 << 4)
+#define RCC_CIR_HSERDYF (1 << 3)
+#define RCC_CIR_HSIRDYF (1 << 2)
+#define RCC_CIR_LSERDYF (1 << 1)
+#define RCC_CIR_LSIRDYF (1 << 0)
+
+/* --- RCC_AHBRSTR values ------------------------------------------------- */
+#define RCC_AHBRSTR_DMA1RST (1 << 24)
+#define RCC_AHBRSTR_FLITFRST (1 << 15)
+#define RCC_AHBRSTR_CRCRST (1 << 12)
+#define RCC_AHBRSTR_GPIOHRST (1 << 5)
+#define RCC_AHBRSTR_GPIOERST (1 << 4)
+#define RCC_AHBRSTR_GPIODRST (1 << 3)
+#define RCC_AHBRSTR_GPIOCRST (1 << 2)
+#define RCC_AHBRSTR_GPIOBRST (1 << 1)
+#define RCC_AHBRSTR_GPIOARST (1 << 0)
+
+/* --- RCC_APB2RSTR values ------------------------------------------------- */
+
+#define RCC_APB2RSTR_USART1RST (1 << 14)
+#define RCC_APB2RSTR_SPI1RST (1 << 12)
+#define RCC_APB2RSTR_ADC1RST (1 << 9)
+#define RCC_APB2RSTR_TIM11RST (1 << 4)
+#define RCC_APB2RSTR_TIM10RST (1 << 3)
+#define RCC_APB2RSTR_TIM9RST (1 << 2)
+#define RCC_APB2RSTR_SYSCFGRST (1 << 0)
+
+/* --- RCC_APB1RSTR values ------------------------------------------------- */
+
+#define RCC_APB1RSTR_COMPRST (1 << 31)
+#define RCC_APB1RSTR_DACRST (1 << 29)
+#define RCC_APB1RSTR_PWRRST (1 << 28)
+#define RCC_APB1RSTR_USBRST (1 << 23)
+#define RCC_APB1RSTR_I2C2RST (1 << 22)
+#define RCC_APB1RSTR_I2C1RST (1 << 21)
+#define RCC_APB1RSTR_USART3RST (1 << 18)
+#define RCC_APB1RSTR_USART2RST (1 << 17)
+#define RCC_APB1RSTR_SPI2RST (1 << 14)
+#define RCC_APB1RSTR_WWDGRST (1 << 11)
+#define RCC_APB1RSTR_LCDRST (1 << 9)
+#define RCC_APB1RSTR_TIM7RST (1 << 5)
+#define RCC_APB1RSTR_TIM6RST (1 << 4)
+#define RCC_APB1RSTR_TIM4RST (1 << 2)
+#define RCC_APB1RSTR_TIM3RST (1 << 1)
+#define RCC_APB1RSTR_TIM2RST (1 << 0)
+
+/* --- RCC_AHBENR values --------------------------------------------------- */
+
+/** @defgroup rcc_ahbenr_en RCC_AHBENR enable values
+@ingroup STM32L1xx_rcc_defines
+
+@{*/
+#define RCC_AHBENR_DMA1EN (1 << 24)
+#define RCC_AHBENR_FLITFEN (1 << 15)
+#define RCC_AHBENR_CRCEN (1 << 12)
+#define RCC_AHBENR_GPIOHEN (1 << 5)
+#define RCC_AHBENR_GPIOEEN (1 << 4)
+#define RCC_AHBENR_GPIODEN (1 << 3)
+#define RCC_AHBENR_GPIOCEN (1 << 2)
+#define RCC_AHBENR_GPIOBEN (1 << 1)
+#define RCC_AHBENR_GPIOAEN (1 << 0)
+/*@}*/
+
+/* --- RCC_APB2ENR values -------------------------------------------------- */
+
+/** @defgroup rcc_apb2enr_en RCC_APB2ENR enable values
+@ingroup STM32L1xx_rcc_defines
+
+@{*/
+#define RCC_APB2ENR_USART1EN (1 << 14)
+#define RCC_APB2ENR_SPI1EN (1 << 12)
+#define RCC_APB2ENR_ADC1EN (1 << 9)
+#define RCC_APB2ENR_TIM11EN (1 << 4)
+#define RCC_APB2ENR_TIM10EN (1 << 3)
+#define RCC_APB2ENR_TIM9EN (1 << 2)
+#define RCC_APB2ENR_SYSCFGEN (1 << 0)
+/*@}*/
+
+/* --- RCC_APB1ENR values -------------------------------------------------- */
+
+/** @defgroup rcc_apb1enr_en RCC_APB1ENR enable values
+@ingroup STM32L1xx_rcc_defines
+
+@{*/
+#define RCC_APB1ENR_COMPEN (1 << 31)
+#define RCC_APB1ENR_DACEN (1 << 29)
+#define RCC_APB1ENR_PWREN (1 << 28)
+#define RCC_APB1ENR_USBEN (1 << 23)
+#define RCC_APB1ENR_I2C2EN (1 << 22)
+#define RCC_APB1ENR_I2C1EN (1 << 21)
+#define RCC_APB1ENR_USART3EN (1 << 18)
+#define RCC_APB1ENR_USART2EN (1 << 17)
+#define RCC_APB1ENR_SPI2EN (1 << 14)
+#define RCC_APB1ENR_WWDGEN (1 << 11)
+#define RCC_APB1ENR_LCDEN (1 << 9)
+#define RCC_APB1ENR_TIM7EN (1 << 5)
+#define RCC_APB1ENR_TIM6EN (1 << 4)
+#define RCC_APB1ENR_TIM4EN (1 << 2)
+#define RCC_APB1ENR_TIM3EN (1 << 1)
+#define RCC_APB1ENR_TIM2EN (1 << 0)
+/*@}*/
+
+/* --- RCC_AHBLPENR -------------------------------------------------------- */
+#define RCC_AHBLPENR_DMA1LPEN (1 << 24)
+#define RCC_AHBLPENR_SRAMLPEN (1 << 16)
+#define RCC_AHBLPENR_FLITFLPEN (1 << 15)
+#define RCC_AHBLPENR_CRCLPEN (1 << 12)
+#define RCC_AHBLPENR_GPIOHLPEN (1 << 5)
+#define RCC_AHBLPENR_GPIOELPEN (1 << 4)
+#define RCC_AHBLPENR_GPIODLPEN (1 << 3)
+#define RCC_AHBLPENR_GPIOCLPEN (1 << 2)
+#define RCC_AHBLPENR_GPIOBLPEN (1 << 1)
+#define RCC_AHBLPENR_GPIOALPEN (1 << 0)
+
+#define RCC_APB2LPENR_USART1LPEN (1 << 14)
+#define RCC_APB2LPENR_SPI1LPEN (1 << 12)
+#define RCC_APB2LPENR_ADC1LPEN (1 << 9)
+#define RCC_APB2LPENR_TIM11LPEN (1 << 4)
+#define RCC_APB2LPENR_TIM10LPEN (1 << 3)
+#define RCC_APB2LPENR_TIM9LPEN (1 << 2)
+#define RCC_APB2LPENR_SYSCFGLPEN (1 << 0)
+
+#define RCC_APB1LPENR_COMPLPEN (1 << 31)
+#define RCC_APB1LPENR_DACLPEN (1 << 29)
+#define RCC_APB1LPENR_PWRLPEN (1 << 28)
+#define RCC_APB1LPENR_USBLPEN (1 << 23)
+#define RCC_APB1LPENR_I2C2LPEN (1 << 22)
+#define RCC_APB1LPENR_I2C1LPEN (1 << 21)
+#define RCC_APB1LPENR_USART3LPEN (1 << 18)
+#define RCC_APB1LPENR_USART2LPEN (1 << 17)
+#define RCC_APB1LPENR_SPI2LPEN (1 << 14)
+#define RCC_APB1LPENR_WWDGLPEN (1 << 11)
+#define RCC_APB1LPENR_LCDLPEN (1 << 9)
+#define RCC_APB1LPENR_TIM7LPEN (1 << 5)
+#define RCC_APB1LPENR_TIM6LPEN (1 << 4)
+#define RCC_APB1LPENR_TIM4LPEN (1 << 2)
+#define RCC_APB1LPENR_TIM3LPEN (1 << 1)
+#define RCC_APB1LPENR_TIM2LPEN (1 << 0)
+
+
+/* --- RCC_CSR values ------------------------------------------------------ */
+
+#define RCC_CSR_LPWRRSTF (1 << 31)
+#define RCC_CSR_WWDGRSTF (1 << 30)
+#define RCC_CSR_IWDGRSTF (1 << 29)
+#define RCC_CSR_SFTRSTF (1 << 28)
+#define RCC_CSR_PORRSTF (1 << 27)
+#define RCC_CSR_PINRSTF (1 << 26)
+#define RCC_CSR_OBLRSTF (1 << 25)
+#define RCC_CSR_RMVF (1 << 24)
+#define RCC_CSR_RTCRST (1 << 23)
+#define RCC_CSR_RTCEN (1 << 22)
+/* RTCSEL[1:0] */
+#define RCC_CSR_LSEBYP (1 << 10)
+#define RCC_CSR_LSERDY (1 << 9)
+#define RCC_CSR_LSEON (1 << 8)
+#define RCC_CSR_LSIRDY (1 << 1)
+#define RCC_CSR_LSION (1 << 0)
+
+
+/* --- Variable definitions ------------------------------------------------ */
+extern u32 rcc_ppre1_frequency;
+extern u32 rcc_ppre2_frequency;
+
+/* --- Function prototypes ------------------------------------------------- */
+
+typedef enum {
+ PLL, HSE, HSI, MSI, LSE, LSI
+} osc_t;
+
+void rcc_osc_ready_int_clear(osc_t osc);
+void rcc_osc_ready_int_enable(osc_t osc);
+void rcc_osc_ready_int_disable(osc_t osc);
+int rcc_osc_ready_int_flag(osc_t osc);
+void rcc_css_int_clear(void);
+int rcc_css_int_flag(void);
+void rcc_wait_for_osc_ready(osc_t osc);
+void rcc_osc_on(osc_t osc);
+void rcc_osc_off(osc_t osc);
+void rcc_css_enable(void);
+void rcc_css_disable(void);
+void rcc_osc_bypass_enable(osc_t osc);
+void rcc_osc_bypass_disable(osc_t osc);
+void rcc_peripheral_enable_clock(volatile u32 *reg, u32 en);
+void rcc_peripheral_disable_clock(volatile u32 *reg, u32 en);
+void rcc_peripheral_reset(volatile u32 *reg, u32 reset);
+void rcc_peripheral_clear_reset(volatile u32 *reg, u32 clear_reset);
+void rcc_set_sysclk_source(u32 clk);
+void rcc_set_pll_multiplication_factor(u32 mul);
+void rcc_set_pll_source(u32 pllsrc);
+void rcc_set_pllxtpre(u32 pllxtpre);
+void rcc_set_adcpre(u32 adcpre);
+void rcc_set_ppre2(u32 ppre2);
+void rcc_set_ppre1(u32 ppre1);
+void rcc_set_hpre(u32 hpre);
+void rcc_set_usbpre(u32 usbpre);
+u32 rcc_get_system_clock_source(int i);
+void rcc_clock_setup_in_hsi_out_64mhz(void);
+void rcc_clock_setup_in_hsi_out_48mhz(void);
+
+/**
+ * Maximum speed possible for F100 (Value Line) on HSI
+ */
+void rcc_clock_setup_in_hsi_out_24mhz(void);
+void rcc_clock_setup_in_hse_8mhz_out_24mhz(void);
+void rcc_clock_setup_in_hse_8mhz_out_72mhz(void);
+void rcc_clock_setup_in_hse_12mhz_out_72mhz(void);
+void rcc_clock_setup_in_hse_16mhz_out_72mhz(void);
+void rcc_backupdomain_reset(void);
+
+/**@}*/
+
+#endif
diff --git a/include/libopencm3/stm32/memorymap.h b/include/libopencm3/stm32/memorymap.h
index 6f213da..9b757ce 100644
--- a/include/libopencm3/stm32/memorymap.h
+++ b/include/libopencm3/stm32/memorymap.h
@@ -26,6 +26,8 @@
# include <libopencm3/stm32/f2/memorymap.h>
#elif defined(STM32F4)
# include <libopencm3/stm32/f4/memorymap.h>
+#elif defined(STM32L1)
+# include <libopencm3/stm32/l1/memorymap.h>
#else
# error "stm32 family not defined."
#endif
diff --git a/include/libopencm3/stm32/pwr.h b/include/libopencm3/stm32/pwr.h
index e709f3d..34b2407 100644
--- a/include/libopencm3/stm32/pwr.h
+++ b/include/libopencm3/stm32/pwr.h
@@ -1,4 +1,4 @@
-/** @defgroup STM32F1xx_pwr_defines PWR Defines
+/** @defgroup STM32F_pwr_defines PWR Defines
@ingroup STM32F_defines
diff --git a/include/libopencm3/stm32/f2/syscfg.h b/include/libopencm3/stm32/syscfg.h
index 7426f16..7426f16 100644
--- a/include/libopencm3/stm32/f2/syscfg.h
+++ b/include/libopencm3/stm32/syscfg.h
diff --git a/include/libopencm3/usb/usbd.h b/include/libopencm3/usb/usbd.h
index 98bf6eb..2e5b7fb 100644
--- a/include/libopencm3/usb/usbd.h
+++ b/include/libopencm3/usb/usbd.h
@@ -24,6 +24,13 @@
BEGIN_DECLS
+
+enum usbd_request_return_codes {
+ USBD_REQ_NOTSUPP = 0,
+ USBD_REQ_HANDLED = 1,
+ USBD_REQ_NEXT_CALLBACK = 2,
+};
+
typedef struct _usbd_driver usbd_driver;
typedef struct _usbd_device usbd_device;
@@ -40,9 +47,10 @@ extern u8 usbd_control_buffer[];
/* <usb.c> */
extern usbd_device *usbd_init(const usbd_driver *driver,
- const struct usb_device_descriptor *dev,
- const struct usb_config_descriptor *conf,
- const char **strings);
+ const struct usb_device_descriptor *dev,
+ const struct usb_config_descriptor *conf,
+ const char **strings, int num_strings);
+
extern void usbd_set_control_buffer_size(usbd_device *usbd_dev, u16 size);
extern void usbd_register_reset_callback(usbd_device *usbd_dev,
diff --git a/include/libopencm3/usb/usbstd.h b/include/libopencm3/usb/usbstd.h
index 5b1cea4..7908280 100644
--- a/include/libopencm3/usb/usbstd.h
+++ b/include/libopencm3/usb/usbstd.h
@@ -223,4 +223,7 @@ struct usb_iface_assoc_descriptor {
#define USB_DT_INTERFACE_ASSOCIATION_SIZE \
sizeof(struct usb_iface_assoc_descriptor)
+enum usb_language_id {
+ USB_LANGID_ENGLISH_US = 0x409,
+};
#endif
diff --git a/lib/dispatch/vector_nvic.c b/lib/dispatch/vector_nvic.c
index b8e9b7f..33104eb 100644
--- a/lib/dispatch/vector_nvic.c
+++ b/lib/dispatch/vector_nvic.c
@@ -4,6 +4,8 @@
# include "../stm32/f2/vector_nvic.c"
#elif defined(STM32F4)
# include "../stm32/f4/vector_nvic.c"
+#elif defined(STM32L1)
+# include "../stm32/l1/vector_nvic.c"
#elif defined(EFM32TG)
# include "../efm32/efm32tg/vector_nvic.c"
diff --git a/lib/stm32/can.c b/lib/stm32/can.c
index 73036f4..7fde585 100644
--- a/lib/stm32/can.c
+++ b/lib/stm32/can.c
@@ -1,3 +1,21 @@
+/** @defgroup can_file CAN
+
+@ingroup STM32F_files
+
+@brief <b>libopencm3 STM32Fxxx CAN</b>
+
+@version 1.0.0
+
+@author @htmlonly &copy; @endhtmlonly 2010 Piotr Esden-Tempski <piotr@esden.net>
+
+@date 12 November 2012
+
+Devices can have up to two CAN peripherals. The peripherals support up to 1MBit
+transmission rate. The peripheral has several filters for incoming messages that
+can be distributed between two FIFOs and three transmit mailboxes.
+
+LGPL License Terms @ref lgpl_license
+*/
/*
* This file is part of the libopencm3 project.
*
@@ -29,6 +47,14 @@
# error "stm32 family not defined."
#endif
+/*-----------------------------------------------------------------------------*/
+/** @brief CAN Reset
+
+The CAN peripheral and all its associated configuration registers are placed in the
+reset condition. The reset is effective via the RCC peripheral reset system.
+
+@param[in] canport Unsigned int32. CAN block register address base @ref can_reg_base.
+ */
void can_reset(u32 canport)
{
if (canport == CAN1) {
@@ -40,8 +66,27 @@ void can_reset(u32 canport)
}
}
+/*-----------------------------------------------------------------------------*/
+/** @brief CAN Init
+
+Initialize the selected CAN peripheral block.
+
+@param[in] canport Unsigend int32. CAN register base address @ref can_reg_base.
+@param[in] ttcm bool. Time triggered communication mode.
+@param[in] abom bool. Automatic bus-off management.
+@param[in] awum bool. Automatic wakeup mode.
+@param[in] nart bool. No automatic retransmission.
+@param[in] rflm bool. Receive FIFO locked mode.
+@param[in] txfp bool. Transmit FIFO priority.
+@param[in] sjw Unsigned int32. Resynchronization time quanta jump width.
+@param[in] ts1 Unsigned int32. Time segment 1 time quanta width.
+@param[in] ts2 Unsigned int32. Time segment 2 time quanta width.
+@param[in] brp Unsigned int32. Baud rate prescaler.
+@returns int 0 on success, 1 on initialization failure.
+*/
int can_init(u32 canport, bool ttcm, bool abom, bool awum, bool nart,
- bool rflm, bool txfp, u32 sjw, u32 ts1, u32 ts2, u32 brp)
+ bool rflm, bool txfp, u32 sjw, u32 ts1, u32 ts2, u32 brp,
+ bool loopback, bool silent)
{
u32 wait_ack = 0x00000000;
u32 can_msr_inak_timeout = 0x0000FFFF;
@@ -63,6 +108,9 @@ int can_init(u32 canport, bool ttcm, bool abom, bool awum, bool nart,
if ((CAN_MSR(canport) & CAN_MSR_INAK) != CAN_MSR_INAK)
return 1;
+ /* clear can timing bits */
+ CAN_BTR(canport) = 0;
+
/* Set the automatic bus-off management. */
if (ttcm)
CAN_MCR(canport) |= CAN_MCR_TTCM;
@@ -94,8 +142,19 @@ int can_init(u32 canport, bool ttcm, bool abom, bool awum, bool nart,
else
CAN_MCR(canport) &= ~CAN_MCR_TXFP;
+ if (silent)
+ CAN_BTR(canport) |= CAN_BTR_SILM;
+ else
+ CAN_BTR(canport) &= ~CAN_BTR_SILM;
+
+ if (loopback)
+ CAN_BTR(canport) |= CAN_BTR_LBKM;
+ else
+ CAN_BTR(canport) &= ~CAN_BTR_LBKM;
+
+
/* Set bit timings. */
- CAN_BTR(canport) = sjw | ts2 | ts1 |
+ CAN_BTR(canport) |= sjw | ts2 | ts1 |
(u32)(CAN_BTR_BRP_MASK & (brp - 1));
/* Request initialization "leave". */
@@ -114,6 +173,20 @@ int can_init(u32 canport, bool ttcm, bool abom, bool awum, bool nart,
return ret;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief CAN Filter Init
+
+Initialize incoming message filter and assign to FIFO.
+
+@param[in] canport Unsigned int32. CAN block register base @ref can_reg_base.
+@param[in] nr Unsigned int32. ID number of the filter.
+@param[in] scale_32bit bool. 32-bit scale for the filter?
+@param[in] id_list_mode bool. ID list filter mode?
+@param[in] fr1 Unsigned int32. First filter register content.
+@param[in] fr2 Unsigned int32. Second filter register content.
+@param[in] fifo Unsigned int32. FIFO id.
+@param[in] enable bool. Enable filter?
+ */
void can_filter_init(u32 canport, u32 nr, bool scale_32bit, bool id_list_mode,
u32 fr1, u32 fr2, u32 fifo, bool enable)
{
@@ -160,6 +233,18 @@ void can_filter_init(u32 canport, u32 nr, bool scale_32bit, bool id_list_mode,
CAN_FMR(canport) &= ~CAN_FMR_FINIT;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief CAN Initialize a 16bit Message ID Mask Filter
+
+@param[in] canport Unsigned int32. CAN block register base @ref can_reg_base.
+@param[in] nr Unsigned int32. ID number of the filter.
+@param[in] id1 Unsigned int16. First message ID to filter.
+@param[in] mask1 Unsigned int16. First message ID bit mask.
+@param[in] id2 Unsigned int16. Second message ID to filter.
+@param[in] mask2 Unsigned int16. Second message ID bit mask.
+@param[in] fifo Unsigned int32. FIFO id.
+@param[in] enable bool. Enable filter?
+ */
void can_filter_id_mask_16bit_init(u32 canport, u32 nr, u16 id1, u16 mask1,
u16 id2, u16 mask2, u32 fifo, bool enable)
{
@@ -168,12 +253,34 @@ void can_filter_id_mask_16bit_init(u32 canport, u32 nr, u16 id1, u16 mask1,
((u32)id2 << 16) | (u32)mask2, fifo, enable);
}
+/*-----------------------------------------------------------------------------*/
+/** @brief CAN Initialize a 32bit Message ID Mask Filter
+
+@param[in] canport Unsigned int32. CAN block register base @ref can_reg_base.
+@param[in] nr Unsigned int32. ID number of the filter.
+@param[in] id Unsigned int32. Message ID to filter.
+@param[in] mask Unsigned int32. Message ID bit mask.
+@param[in] fifo Unsigned int32. FIFO id.
+@param[in] enable bool. Enable filter?
+ */
void can_filter_id_mask_32bit_init(u32 canport, u32 nr, u32 id, u32 mask,
u32 fifo, bool enable)
{
can_filter_init(canport, nr, true, false, id, mask, fifo, enable);
}
+/*-----------------------------------------------------------------------------*/
+/** @brief CAN Initialize a 16bit Message ID List Filter
+
+@param[in] canport Unsigned int32. CAN block register base @ref can_reg_base.
+@param[in] nr Unsigned int32. ID number of the filter.
+@param[in] id1 Unsigned int16. First message ID to match.
+@param[in] id2 Unsigned int16. Second message ID to match.
+@param[in] id3 Unsigned int16. Third message ID to match.
+@param[in] id4 Unsigned int16. Fourth message ID to match.
+@param[in] fifo Unsigned int32. FIFO id.
+@param[in] enable bool. Enable filter?
+ */
void can_filter_id_list_16bit_init(u32 canport, u32 nr, u16 id1, u16 id2,
u16 id3, u16 id4, u32 fifo, bool enable)
{
@@ -182,27 +289,62 @@ void can_filter_id_list_16bit_init(u32 canport, u32 nr, u16 id1, u16 id2,
((u32)id3 << 16) | (u32)id4, fifo, enable);
}
+/*-----------------------------------------------------------------------------*/
+/** @brief CAN Initialize a 32bit Message ID List Filter
+
+@param[in] canport Unsigned int32. CAN block register base @ref can_reg_base.
+@param[in] nr Unsigned int32. ID number of the filter.
+@param[in] id1 Unsigned int32. First message ID to match.
+@param[in] id2 Unsigned int32. Second message ID to match.
+@param[in] fifo Unsigned int32. FIFO id.
+@param[in] enable bool. Enable filter?
+ */
void can_filter_id_list_32bit_init(u32 canport, u32 nr, u32 id1, u32 id2,
u32 fifo, bool enable)
{
can_filter_init(canport, nr, true, true, id1, id2, fifo, enable);
}
+/*-----------------------------------------------------------------------------*/
+/** @brief CAN Enable IRQ
+
+@param[in] canport Unsigned int32. CAN block register base @ref can_reg_base.
+@param[in] irq Unsigned int32. IRQ bit(s).
+ */
void can_enable_irq(u32 canport, u32 irq)
{
CAN_IER(canport) |= irq;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief CAN Disable IRQ
+
+@param[in] canport Unsigned int32. CAN block register base @ref can_reg_base.
+@param[in] irq Unsigned int32. IRQ bit(s).
+ */
void can_disable_irq(u32 canport, u32 irq)
{
CAN_IER(canport) &= ~irq;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief CAN Transmit Message
+
+@param[in] canport Unsigned int32. CAN block register base @ref can_reg_base.
+@param[in] id Unsigned int32. Message ID.
+@param[in] ext bool. Extended message ID?
+@param[in] rtr bool. Request transmit?
+@param[in] length Unsigned int8. Message payload length.
+@param[in] data Unsigned int8[]. Message payload data.
+@returns int 0, 1 or 2 on success and depending on which outgoing mailbox got
+selected. -1 if no mailbox was available and no transmission got queued.
+ */
int can_transmit(u32 canport, u32 id, bool ext, bool rtr, u8 length, u8 *data)
{
int ret = 0, i;
u32 mailbox = 0;
+ /* Check which transmit mailbox is empty if any. */
if ((CAN_TSR(canport) & CAN_TSR_TME0) == CAN_TSR_TME0) {
ret = 0;
mailbox = CAN_MBOX0;
@@ -216,7 +358,7 @@ int can_transmit(u32 canport, u32 id, bool ext, bool rtr, u8 length, u8 *data)
ret = -1;
}
- /* Check if we have an empty mailbox. */
+ /* If we have no empty mailbox return with an error. */
if (ret == -1)
return ret;
@@ -254,6 +396,12 @@ int can_transmit(u32 canport, u32 id, bool ext, bool rtr, u8 length, u8 *data)
return ret;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief CAN Release FIFO
+
+@param[in] canport Unsigned int32. CAN block register base @ref can_reg_base.
+@param[in] fifo Unsigned int8. FIFO id.
+ */
void can_fifo_release(u32 canport, u8 fifo)
{
if (fifo == 0)
@@ -262,6 +410,19 @@ void can_fifo_release(u32 canport, u8 fifo)
CAN_RF1R(canport) |= CAN_RF1R_RFOM1;
}
+/*-----------------------------------------------------------------------------*/
+/** @brief CAN Receive Message
+
+@param[in] canport Unsigned int32. CAN block register base @ref can_reg_base.
+@param[in] fifo Unsigned int8. FIFO id.
+@param[in] release bool. Release the FIFO automatically after coping data out.
+@param[out] id Unsigned int32 pointer. Message ID.
+@param[out] ext bool pointer. The message ID is extended?
+@param[out] rtr bool pointer. Request of transmission?
+@param[out] fmi Unsigned int32 pointer. ID of the matched filter.
+@param[out] length Unsigned int8 pointer. Length of message payload.
+@param[out] data Unsigned int8[]. Message payload data.
+ */
void can_receive(u32 canport, u8 fifo, bool release, u32 *id, bool *ext,
bool *rtr, u32 *fmi, u8 *length, u8 *data)
{
@@ -310,3 +471,8 @@ void can_receive(u32 canport, u8 fifo, bool release, u32 *id, bool *ext,
if (release)
can_fifo_release(canport, fifo);
}
+
+bool can_available_mailbox(u32 canport)
+{
+ return CAN_TSR(canport) & (CAN_TSR_TME0 | CAN_TSR_TME1 | CAN_TSR_TME2);
+}
diff --git a/lib/stm32/common/gpio_common_all.c b/lib/stm32/common/gpio_common_all.c
new file mode 100644
index 0000000..d23e415
--- /dev/null
+++ b/lib/stm32/common/gpio_common_all.c
@@ -0,0 +1,139 @@
+/** @addtogroup gpio_file */
+
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#define WEAK __attribute__ ((weak))
+
+#include <libopencm3/stm32/gpio.h>
+
+/**@{*/
+
+/*-----------------------------------------------------------------------------*/
+/** @brief Set a Group of Pins Atomic
+
+Set one or more pins of the given GPIO port to 1 in an atomic operation.
+
+@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
+@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
+ If multiple pins are to be changed, use logical OR '|' to separate them.
+*/
+void gpio_set(u32 gpioport, u16 gpios)
+{
+ GPIO_BSRR(gpioport) = gpios;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief Clear a Group of Pins Atomic
+
+Clear one or more pins of the given GPIO port to 0 in an atomic operation.
+
+@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
+@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
+ If multiple pins are to be changed, use logical OR '|' to separate them.
+*/
+void gpio_clear(u32 gpioport, u16 gpios)
+{
+ GPIO_BSRR(gpioport) = (gpios << 16);
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief Read a Group of Pins.
+
+@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
+@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
+ If multiple pins are to be read, use logical OR '|' to separate them.
+@return Unsigned int16 value of the pin values. The bit position of the pin value
+ returned corresponds to the pin number.
+*/
+u16 gpio_get(u32 gpioport, u16 gpios)
+{
+ return gpio_port_read(gpioport) & gpios;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief Toggle a Group of Pins
+
+Toggle one or more pins of the given GPIO port. This is not an atomic operation.
+
+@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
+@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
+ If multiple pins are to be changed, use logical OR '|' to separate them.
+*/
+void gpio_toggle(u32 gpioport, u16 gpios)
+{
+ GPIO_ODR(gpioport) ^= gpios;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief Read from a Port
+
+Read the current value of the given GPIO port. Only the lower 16 bits contain
+valid pin data.
+
+@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
+@return Unsigned int16. The value held in the specified GPIO port.
+*/
+u16 gpio_port_read(u32 gpioport)
+{
+ return (u16)GPIO_IDR(gpioport);
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief Write to a Port
+
+Write a value to the given GPIO port.
+
+@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
+@param[in] data Unsigned int16. The value to be written to the GPIO port.
+*/
+void gpio_port_write(u32 gpioport, u16 data)
+{
+ GPIO_ODR(gpioport) = data;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief Lock the Configuration of a Group of Pins
+
+The configuration of one or more pins of the given GPIO port is locked. There is
+no mechanism to unlock these via software. Unlocking occurs at the next reset.
+
+@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
+@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
+ If multiple pins are to be locked, use logical OR '|' to separate them.
+*/
+void gpio_port_config_lock(u32 gpioport, u16 gpios)
+{
+ u32 reg32;
+
+ /* Special "Lock Key Writing Sequence", see datasheet. */
+ GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */
+ GPIO_LCKR(gpioport) = ~GPIO_LCKK & gpios; /* Clear LCKK. */
+ GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */
+ reg32 = GPIO_LCKR(gpioport); /* Read LCKK. */
+ reg32 = GPIO_LCKR(gpioport); /* Read LCKK again. */
+
+ /* Tell the compiler the variable is actually used. It will get optimized out anyways. */
+ reg32 = reg32;
+
+ /* If (reg32 & GPIO_LCKK) is true, the lock is now active. */
+}
+
+/**@}*/
+
diff --git a/lib/stm32/common/gpio_common_f24.c b/lib/stm32/common/gpio_common_f24.c
new file mode 100644
index 0000000..d464a50
--- /dev/null
+++ b/lib/stm32/common/gpio_common_f24.c
@@ -0,0 +1,195 @@
+/** @addtogroup gpio_file
+
+@version 1.0.0
+
+@author @htmlonly &copy; @endhtmlonly 2009 Uwe Hermann <uwe@hermann-uwe.de>
+@author @htmlonly &copy; @endhtmlonly 2012 Ken Sarkies <ksarkies@internode.on.net>
+
+@date 18 August 2012
+
+Each I/O port has 16 individually configurable bits. Many I/O pins share GPIO
+functionality with a number of alternate functions and must be configured to the
+alternate function mode if these are to be accessed. A feature is available to
+remap alternative functions to a limited set of alternative pins in the event
+of a clash of requirements.
+
+The data registers associated with each port for input and output are 32 bit with
+the upper 16 bits unused. The output buffer must be written as a 32 bit word, but
+individual bits may be set or reset separately in atomic operations to avoid race
+conditions during interrupts. Bits may also be individually locked to prevent
+accidental configuration changes. Once locked the configuration cannot be changed
+until after the next reset.
+
+Each port bit can be configured as analog or digital input, the latter can be
+floating or pulled up or down. As outputs they can be configured as either
+push-pull or open drain, digital I/O or alternate function, and with maximum
+output speeds of 2MHz, 10MHz, or 50MHz.
+
+On reset all ports are configured as digital floating input.
+
+@section gpio_api_ex Basic GPIO Handling API.
+
+Example 1: Push-pull digital output actions with pullup on ports C2 and C9
+
+@code
+ gpio_mode_setup(GPIOC, GPIO_MODE_OUTPUT,
+ GPIO_PUPD_PULLUP, GPIO2 | GPIO9);
+ gpio_output_options(GPIOC, GPIO_OTYPE_PP,
+ GPIO_OSPEED_25MHZ, GPIO2 | GPIO9);
+ gpio_set(GPIOC, GPIO2 | GPIO9);
+ gpio_clear(GPIOC, GPIO2);
+ gpio_toggle(GPIOC, GPIO2 | GPIO9);
+ gpio_port_write(GPIOC, 0x204);
+@endcode
+
+Example 2: Digital input on port C12 with pullup
+
+@code
+ gpio_mode_setup(GPIOC, GPIO_MODE_INPUT,
+ GPIO_PUPD_PULLUP, GPIO12);
+ reg16 = gpio_port_read(GPIOC);
+@endcode
+
+LGPL License Terms @ref lgpl_license
+*/
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/**@{*/
+
+#include <libopencm3/stm32/common/gpio_common_all.h>
+#include <libopencm3/stm32/gpio.h>
+
+/*-----------------------------------------------------------------------------*/
+/** @brief Set GPIO Pin Mode
+
+Sets the Pin Direction and Analog/Digital Mode, and Output Pin Pullup,
+for a set of GPIO pins on a given GPIO port.
+
+@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
+@param[in] mode Unsigned int8. Pin mode @ref gpio_mode
+@param[in] pull_up_down Unsigned int8. Pin pullup/pulldown configuration @ref gpio_pup
+@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
+ If multiple pins are to be set, use bitwise OR '|' to separate them.
+*/
+void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios)
+{
+ u16 i;
+ u32 moder, pupd;
+
+ /*
+ * We want to set the config only for the pins mentioned in gpios,
+ * but keeping the others, so read out the actual config first.
+ */
+ moder = GPIO_MODER(gpioport);
+ pupd = GPIO_PUPDR(gpioport);
+
+ for (i = 0; i < 16; i++) {
+ if (!((1 << i) & gpios))
+ continue;
+
+ moder &= ~GPIO_MODE_MASK(i);
+ moder |= GPIO_MODE(i, mode);
+ pupd &= ~GPIO_PUPD_MASK(i);
+ pupd |= GPIO_PUPD(i, pull_up_down);
+ }
+
+ /* Set mode and pull up/down control registers. */
+ GPIO_MODER(gpioport) = moder;
+ GPIO_PUPDR(gpioport) = pupd;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief Set GPIO Output Options
+
+When the pin is set to output mode, this sets the configuration (analog/digital and
+open drain/push pull) and speed, for a set of GPIO pins on a given GPIO port.
+
+@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
+@param[in] otype Unsigned int8. Pin output type @ref gpio_output_type
+@param[in] speed Unsigned int8. Pin speed @ref gpio_speed
+@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
+ If multiple pins are to be set, use bitwise OR '|' to separate them.
+*/
+void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios)
+{
+ u16 i;
+ u32 ospeedr;
+
+ if (otype == 0x1)
+ GPIO_OTYPER(gpioport) |= gpios;
+ else
+ GPIO_OTYPER(gpioport) &= ~gpios;
+
+ ospeedr = GPIO_OSPEEDR(gpioport);
+
+ for (i = 0; i < 16; i++) {
+ if (!((1 << i) & gpios))
+ continue;
+ ospeedr &= ~GPIO_OSPEED_MASK(i);
+ ospeedr |= GPIO_OSPEED(i, speed);
+ }
+
+ GPIO_OSPEEDR(gpioport) = ospeedr;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief Set GPIO Alternate Function Selection
+
+Set the alternate function mapping number for each pin. Most pins have alternate
+functions associated with them. When set to AF mode, a pin may be used for one of
+its allocated alternate functions selected by the number given here. To determine
+the number to be used for the desired function refer to the individual datasheet
+for the particular device. A table is given under the Pin Selection chapter.
+
+Note that a number of pins may be set but only with a single AF number. In practice
+this would rarely be useful as each pin is likely to require a different number.
+
+@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
+@param[in] alt_func_num Unsigned int8. Pin alternate function number @ref gpio_af_num
+@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
+ If multiple pins are to be set, use bitwise OR '|' to separate them.
+*/
+void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios)
+{
+ u16 i;
+ u32 afrl, afrh;
+
+ afrl = GPIO_AFRL(gpioport);
+ afrh = GPIO_AFRH(gpioport);
+
+ for (i = 0; i < 8; i++) {
+ if (!((1 << i) & gpios))
+ continue;
+ afrl &= ~GPIO_AFR_MASK(i);
+ afrl |= GPIO_AFR(i, alt_func_num);
+ }
+
+ for (i = 8; i < 16; i++) {
+ if (!((1 << i) & gpios))
+ continue;
+ afrl &= ~GPIO_AFR_MASK(i - 8);
+ afrh |= GPIO_AFR(i - 8, alt_func_num);
+ }
+
+ GPIO_AFRL(gpioport) = afrl;
+ GPIO_AFRH(gpioport) = afrh;
+}
+/**@}*/
+
diff --git a/lib/stm32/f1/desig.c b/lib/stm32/desig.c
index 7ae968e..ea861aa 100644
--- a/lib/stm32/f1/desig.c
+++ b/lib/stm32/desig.c
@@ -17,7 +17,7 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <libopencm3/stm32/f1/desig.h>
+#include <libopencm3/stm32/desig.h>
u16 desig_get_flash_size(void)
{
@@ -35,3 +35,25 @@ void desig_get_unique_id(u32 result[])
result[1] = bits63_32;
result[2] = bits31_16 << 16 | bits15_0;
}
+
+void desig_get_unique_id_as_string(char *string,
+ unsigned int string_len)
+{
+ int i, len;
+ u8 device_id[12];
+ static const char chars[] = "0123456789ABCDEF";
+
+ desig_get_unique_id((u32 *)device_id);
+
+ /* Each byte produces two characters */
+ len = (2 * sizeof(device_id) < string_len) ?
+ 2 * sizeof(device_id) : string_len - 1;
+
+ for (i = 0; i < len; i += 2) {
+ string[i] = chars[(device_id[i / 2] >> 0) & 0x0F];
+ string[i + 1] = chars[(device_id[i / 2] >> 4) & 0x0F];
+ }
+
+ string[len] = '\0';
+}
+
diff --git a/lib/stm32/f4/exti.c b/lib/stm32/exti2.c
index f69e99e..bea2f4d 100644
--- a/lib/stm32/f4/exti.c
+++ b/lib/stm32/exti2.c
@@ -2,6 +2,7 @@
* This file is part of the libopencm3 project.
*
* Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
+ * Copyright (C) 2012 Karl Palsson <karlp@tweak.net.au>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
@@ -15,11 +16,22 @@
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
+ *
+ * This provides the code for the "next gen" EXTI block provided in F2/F4/L1
+ * devices. (differences only in the source selection)
*/
#include <libopencm3/stm32/exti.h>
-#include <libopencm3/stm32/f4/syscfg.h>
+#include <libopencm3/stm32/syscfg.h>
+#if defined(STM32F2)
+#include <libopencm3/stm32/f2/gpio.h>
+#elif defined(STM32F4)
#include <libopencm3/stm32/f4/gpio.h>
+#elif defined(STM32L1)
+#include <libopencm3/stm32/l1/gpio.h>
+#else
+#error "invalid/unknown stm32 family for this code"
+#endif
void exti_set_trigger(u32 extis, exti_trigger_type trig)
{
@@ -121,18 +133,24 @@ void exti_select_source(u32 exti, u32 gpioport)
case GPIOE:
bits = 0xb;
break;
+#if defined(STM32L1)
+#else
case GPIOF:
bits = 0xa;
break;
case GPIOG:
bits = 0x9;
break;
+#endif
case GPIOH:
bits = 0x8;
break;
+#if defined(STM32L1)
+#else
case GPIOI:
bits = 0x7;
break;
+#endif
}
/* Ensure that only valid EXTI lines are used. */
diff --git a/lib/stm32/f1/Makefile b/lib/stm32/f1/Makefile
index ed8ae29..2572554 100644
--- a/lib/stm32/f1/Makefile
+++ b/lib/stm32/f1/Makefile
@@ -32,9 +32,10 @@ OBJS = rcc.o gpio.o usart.o adc.o spi.o flash.o \
rtc.o i2c.o dma.o exti.o ethernet.o \
usb_f103.o usb.o usb_control.o usb_standard.o can.o \
timer.o usb_f107.o desig.o crc.o dac.o iwdg.o pwr.o \
- usb_fx07_common.o
+ usb_fx07_common.o \
+ gpio_common_all.o
-VPATH += ../../usb:../:../../cm3
+VPATH += ../../usb:../:../../cm3:../common
include ../../Makefile.include
diff --git a/lib/stm32/f1/adc.c b/lib/stm32/f1/adc.c
index 0a05aac..71eb926 100644
--- a/lib/stm32/f1/adc.c
+++ b/lib/stm32/f1/adc.c
@@ -187,7 +187,7 @@ void adc_set_dual_mode(u32 mode)
This flag is set after all channels of a regular or injected group have been
converted.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
@returns bool. End of conversion flag.
*/
@@ -201,7 +201,7 @@ bool adc_eoc(u32 adc)
This flag is set after all channels of an injected group have been converted.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
@returns bool. End of conversion flag.
*/
@@ -217,7 +217,7 @@ The result read back is 12 bits, right or left aligned within the first 16 bits.
For ADC1 only, the higher 16 bits will hold the result from ADC2 if
an appropriate dual mode has been set @see adc_set_dual_mode.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
@returns Unsigned int32 conversion result.
*/
@@ -233,7 +233,7 @@ The result read back from the selected injected result register (one of four) is
12 bits, right or left aligned within the first 16 bits. The result can have a
negative value if the injected channel offset has been set @see adc_set_injected_offset.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
@param[in] reg Unsigned int8. Register number (1 ... 4).
@returns Unsigned int32 conversion result.
*/
@@ -260,7 +260,7 @@ This value is subtracted from the injected channel results after conversion
is complete, and can result in negative results. A separate value can be specified
for each injected data register.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
@param[in] reg Unsigned int8. Register number (1 ... 4).
@param[in] offset Unsigned int32.
*/
@@ -290,7 +290,7 @@ The analog watchdog allows the monitoring of an analog signal between two thresh
levels. The thresholds must be preset. Comparison is done before data alignment
takes place, so the thresholds are left-aligned.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_enable_analog_watchdog_regular(u32 adc)
@@ -301,7 +301,7 @@ void adc_enable_analog_watchdog_regular(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Disable Analog Watchdog for Regular Conversions
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_disable_analog_watchdog_regular(u32 adc)
@@ -316,7 +316,7 @@ The analog watchdog allows the monitoring of an analog signal between two thresh
levels. The thresholds must be preset. Comparison is done before data alignment
takes place, so the thresholds are left-aligned.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_enable_analog_watchdog_injected(u32 adc)
@@ -327,7 +327,7 @@ void adc_enable_analog_watchdog_injected(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Disable Analog Watchdog for Injected Conversions
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_disable_analog_watchdog_injected(u32 adc)
@@ -346,8 +346,8 @@ of the same length or until the whole group has all been converted. When the
the whole group has been converted, the next trigger will restart conversion
of the subgroup at the beginning of the whole group.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
-@param[in] length Unsigned int8. Number of channels in the group @ref adc_cr1_discnum
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
+@param[in] length Unsigned int8. Number of channels in the group @ref adc_cr1_discnum.
*/
void adc_enable_discontinuous_mode_regular(u32 adc, u8 length)
@@ -360,7 +360,7 @@ void adc_enable_discontinuous_mode_regular(u32 adc, u8 length)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Disable Discontinuous Mode for Regular Conversions
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_disable_discontinuous_mode_regular(u32 adc)
@@ -375,7 +375,7 @@ In this mode the ADC converts sequentially one channel of the defined group of
injected channels, cycling back to the first channel in the group once the
entire group has been converted.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_enable_discontinuous_mode_injected(u32 adc)
@@ -386,7 +386,7 @@ void adc_enable_discontinuous_mode_injected(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Disable Discontinuous Mode for Injected Conversions
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_disable_discontinuous_mode_injected(u32 adc)
@@ -413,7 +413,7 @@ void adc_enable_automatic_injected_group_conversion(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Disable Automatic Injected Conversions
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_disable_automatic_injected_group_conversion(u32 adc)
@@ -433,7 +433,7 @@ injected channels. If neither are enabled, the analog watchdog feature will be
disabled.
@ref adc_enable_analog_watchdog_injected, @ref adc_enable_analog_watchdog_regular.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_enable_analog_watchdog_on_all_channels(u32 adc)
@@ -453,8 +453,8 @@ injected channels. If neither are enabled, the analog watchdog feature will be
disabled. If both are enabled, the same channel number is monitored.
@ref adc_enable_analog_watchdog_injected, @ref adc_enable_analog_watchdog_regular.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
-@param[in] channel Unsigned int8. ADC channel number @ref adc_watchdog_channel
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
+@param[in] channel Unsigned int8. ADC channel number @ref adc_watchdog_channel.
*/
void adc_enable_analog_watchdog_on_selected_channel(u32 adc, u8 channel)
@@ -475,7 +475,7 @@ In this mode a conversion consists of a scan of the predefined set of channels,
regular and injected, each channel conversion immediately following the
previous one. It can use single, continuous or discontinuous mode.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_enable_scan_mode(u32 adc)
@@ -497,7 +497,7 @@ void adc_disable_scan_mode(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Enable Injected End-Of-Conversion Interrupt
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_enable_eoc_interrupt_injected(u32 adc)
@@ -508,7 +508,7 @@ void adc_enable_eoc_interrupt_injected(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Disable Injected End-Of-Conversion Interrupt
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_disable_eoc_interrupt_injected(u32 adc)
@@ -519,7 +519,7 @@ void adc_disable_eoc_interrupt_injected(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Enable Analog Watchdog Interrupt
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_enable_awd_interrupt(u32 adc)
@@ -530,7 +530,7 @@ void adc_enable_awd_interrupt(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Disable Analog Watchdog Interrupt
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_disable_awd_interrupt(u32 adc)
@@ -541,7 +541,7 @@ void adc_disable_awd_interrupt(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Enable Regular End-Of-Conversion Interrupt
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_enable_eoc_interrupt(u32 adc)
@@ -552,7 +552,7 @@ void adc_enable_eoc_interrupt(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Disable Regular End-Of-Conversion Interrupt
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_disable_eoc_interrupt(u32 adc)
@@ -566,7 +566,7 @@ void adc_disable_eoc_interrupt(u32 adc)
This enables both the sensor and the reference voltage measurements on channels
16 and 17.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_enable_temperature_sensor(u32 adc)
@@ -580,7 +580,7 @@ void adc_enable_temperature_sensor(u32 adc)
Disabling this will reduce power consumption from the sensor and the reference
voltage measurements.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_disable_temperature_sensor(u32 adc)
@@ -599,7 +599,7 @@ Note this is a software trigger and requires triggering to be enabled and the
trigger source to be set appropriately otherwise conversion will not start.
This is not the same as the ADC start conversion operation.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_start_conversion_regular(u32 adc)
@@ -622,7 +622,7 @@ Note this is a software trigger and requires triggering to be enabled and the
trigger source to be set appropriately otherwise conversion will not start.
This is not the same as the ADC start conversion operation.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_start_conversion_injected(u32 adc)
@@ -659,9 +659,9 @@ For ADC3
@li Timer 5 CC3 event
@li Software Start
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
@param[in] trigger Unsigned int8. Trigger identifier @ref adc_trigger_regular_12
-for ADC1 and ADC2, or @ref adc_trigger_regular_3 for ADC3
+for ADC1 and ADC2, or @ref adc_trigger_regular_3 for ADC3.
*/
void adc_enable_external_trigger_regular(u32 adc, u32 trigger)
@@ -677,7 +677,7 @@ void adc_enable_external_trigger_regular(u32 adc, u32 trigger)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Disable an External Trigger for Regular Channels
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_disable_external_trigger_regular(u32 adc)
@@ -710,9 +710,9 @@ For ADC3
@li Timer 5 CC4 event
@li Software Start
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
@param[in] trigger Unsigned int8. Trigger identifier @ref adc_trigger_injected_12
-for ADC1 and ADC2, or @ref adc_trigger_injected_3 for ADC3
+for ADC1 and ADC2, or @ref adc_trigger_injected_3 for ADC3.
*/
void adc_enable_external_trigger_injected(u32 adc, u32 trigger)
{
@@ -727,7 +727,7 @@ void adc_enable_external_trigger_injected(u32 adc, u32 trigger)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Disable an External Trigger for Injected Channels
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_disable_external_trigger_injected(u32 adc)
@@ -738,7 +738,7 @@ void adc_disable_external_trigger_injected(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Set the Data as Left Aligned
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_set_left_aligned(u32 adc)
@@ -749,7 +749,7 @@ void adc_set_left_aligned(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Set the Data as Right Aligned
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_set_right_aligned(u32 adc)
@@ -764,7 +764,7 @@ Only available for ADC1 through DMA1 channel1, and ADC3 through DMA2 channel5.
ADC2 will use DMA if it is set as slave in dual mode with ADC1 in DMA transfer
mode.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_enable_dma(u32 adc)
@@ -776,7 +776,7 @@ void adc_enable_dma(u32 adc)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Disable DMA Transfers
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_disable_dma(u32 adc)
@@ -791,7 +791,7 @@ void adc_disable_dma(u32 adc)
This resets the calibration registers. It is not clear if this is required to be
done before every calibration operation.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_reset_calibration(u32 adc)
@@ -810,7 +810,7 @@ until this happens and the ADC is ready for use.
The ADC must have been powered down for at least 2 ADC clock cycles, then powered on.
before calibration starts
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_calibration(u32 adc)
@@ -825,7 +825,7 @@ void adc_calibration(u32 adc)
In this mode the ADC starts a new conversion of a single channel or a channel
group immediately following completion of the previous channel group conversion.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_set_continuous_conversion_mode(u32 adc)
@@ -839,7 +839,7 @@ void adc_set_continuous_conversion_mode(u32 adc)
In this mode the ADC performs a conversion of one channel or a channel group
and stops.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_set_single_conversion_mode(u32 adc)
@@ -856,7 +856,7 @@ If the ADC is already on this function call will initiate a conversion.
@deprecated to be removed in a later release
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_on(u32 adc)
@@ -869,7 +869,7 @@ void adc_on(u32 adc)
Turn off the ADC to reduce power consumption to a few microamps.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
*/
void adc_off(u32 adc)
@@ -882,9 +882,9 @@ void adc_off(u32 adc)
The sampling time can be selected in ADC clock cycles from 1.5 to 239.5.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
-@param[in] channel Unsigned int8. ADC Channel integer 0..18 or from @ref adc_channel
-@param[in] time Unsigned int8. Sampling time selection from @ref adc_sample_rg
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
+@param[in] channel Unsigned int8. ADC Channel integer 0..18 or from @ref adc_channel.
+@param[in] time Unsigned int8. Sampling time selection from @ref adc_sample_rg.
*/
void adc_set_sample_time(u32 adc, u8 channel, u8 time)
@@ -910,8 +910,8 @@ void adc_set_sample_time(u32 adc, u8 channel, u8 time)
The sampling time can be selected in ADC clock cycles from 1.5 to 239.5, same for
all channels.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
-@param[in] time Unsigned int8. Sampling time selection from @ref adc_sample_rg
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
+@param[in] time Unsigned int8. Sampling time selection from @ref adc_sample_rg.
*/
void adc_set_sample_time_on_all_channels(u32 adc, u8 time)
@@ -931,8 +931,8 @@ void adc_set_sample_time_on_all_channels(u32 adc, u8 time)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Set Analog Watchdog Upper Threshold
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
-@param[in] threshold Unsigned int8. Upper threshold value
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
+@param[in] threshold Unsigned int8. Upper threshold value.
*/
void adc_set_watchdog_high_threshold(u32 adc, u16 threshold)
@@ -947,8 +947,8 @@ void adc_set_watchdog_high_threshold(u32 adc, u16 threshold)
/*-----------------------------------------------------------------------------*/
/** @brief ADC Set Analog Watchdog Lower Threshold
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
-@param[in] threshold Unsigned int8. Lower threshold value
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
+@param[in] threshold Unsigned int8. Lower threshold value.
*/
void adc_set_watchdog_low_threshold(u32 adc, u16 threshold)
@@ -967,7 +967,7 @@ Define a sequence of channels to be converted as a regular group with a length
from 1 to 16 channels. If this is called during conversion, the current conversion
is reset and conversion begins again with the newly defined group.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
@param[in] length Unsigned int8. Number of channels in the group.
@param[in] channel Unsigned int8[]. Set of channels in sequence, integers 0..18.
*/
@@ -1003,9 +1003,9 @@ Defines a sequence of channels to be converted as an injected group with a lengt
from 1 to 4 channels. If this is called during conversion, the current conversion
is reset and conversion begins again with the newly defined group.
-@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base
+@param[in] adc Unsigned int32. ADC block register address base @ref adc_reg_base.
@param[in] length Unsigned int8. Number of channels in the group.
-@param[in] channel Unsigned int8[]. Set of channels in sequence, integers 0..18
+@param[in] channel Unsigned int8[]. Set of channels in sequence, integers 0..18.
*/
void adc_set_injected_sequence(u32 adc, u8 length, u8 channel[])
diff --git a/lib/stm32/f1/dma.c b/lib/stm32/f1/dma.c
index c26020a..1f06c11 100644
--- a/lib/stm32/f1/dma.c
+++ b/lib/stm32/f1/dma.c
@@ -80,7 +80,7 @@ The interrupt flag for the channel is cleared. More than one interrupt for the
same channel may be cleared by using the logical OR of the interrupt flags.
@param[in] dma unsigned int32. DMA controller base address: DMA1 or DMA2
-@param[in] channel unsigned int8. Channel number: @ref dma_st_number
+@param[in] channel unsigned int8. Channel number: @ref dma_ch
@param[in] interrupts unsigned int32. Logical OR of interrupt numbers: @ref dma_if_offset
*/
@@ -97,8 +97,8 @@ void dma_clear_interrupt_flags(u32 dma, u8 channel, u32 interrupts)
The interrupt flag for the channel is returned.
@param[in] dma unsigned int32. DMA controller base address: DMA1 or DMA2
-@param[in] channel unsigned int8. Channel number: @ref dma_st_number
-@param[in] interrupt unsigned int32. Interrupt number: @ref dma_st_number
+@param[in] channel unsigned int8. Channel number: @ref dma_ch
+@param[in] interrupt unsigned int32. Interrupt number: @ref dma_ch
@returns bool interrupt flag is set.
*/
@@ -433,5 +433,10 @@ void dma_set_number_of_data(u32 dma, u8 channel, u16 number)
{
DMA_CNDTR(dma, channel) = number;
}
+
+void dma_clear_flag(u32 dma, u32 flag)
+{
+ DMA_ISR(dma) &= ~flag;
+}
/**@}*/
diff --git a/lib/stm32/f1/gpio.c b/lib/stm32/f1/gpio.c
index 0602012..2b33cad 100644
--- a/lib/stm32/f1/gpio.c
+++ b/lib/stm32/f1/gpio.c
@@ -1,4 +1,4 @@
-/** @defgroup STM32F1xx_gpio_file GPIO
+/** @defgroup gpio_file GPIO
@ingroup STM32F1xx
@@ -11,9 +11,6 @@
@date 18 August 2012
-This library supports the General Purpose I/O System in the STM32F1xx series
-of ARM Cortex Microcontrollers by ST Microelectronics.
-
Each I/O port has 16 individually configurable bits. Many I/O pins share GPIO
functionality with a number of alternate functions and must be configured to the
alternate function mode if these are to be accessed. A feature is available to
@@ -55,7 +52,7 @@ Example 1: Digital input on port C12
@endcode
LGPL License Terms @ref lgpl_license
- */
+*/
/*
* This file is part of the libopencm3 project.
*
@@ -75,25 +72,10 @@ LGPL License Terms @ref lgpl_license
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
-/*
- * Basic GPIO handling API.
- *
- * Examples:
- * gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_2_MHZ,
- * GPIO_CNF_OUTPUT_PUSHPULL, GPIO12);
- * gpio_set(GPIOB, GPIO4);
- * gpio_clear(GPIOG, GPIO2 | GPIO9);
- * gpio_get(GPIOC, GPIO1);
- * gpio_toggle(GPIOA, GPIO7 | GPIO8);
- * reg16 = gpio_port_read(GPIOD);
- * gpio_port_write(GPIOF, 0xc8fe);
- *
- * TODO:
- * - GPIO remapping support
- */
-/**@{*/
+#include <libopencm3/stm32/gpio.h>
+#include <libopencm3/stm32/common/gpio_common_all.h>
-#include <libopencm3/stm32/f1/gpio.h>
+/**@{*/
/*-----------------------------------------------------------------------------*/
/** @brief Set GPIO Pin Mode
@@ -146,116 +128,6 @@ void gpio_set_mode(u32 gpioport, u8 mode, u8 cnf, u16 gpios)
}
/*-----------------------------------------------------------------------------*/
-/** @brief Set a Group of Pins Atomic
-
-Set one or more pins of the given GPIO port to 1 in an atomic operation.
-
-@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
-@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
- If multiple pins are to be changed, use logical OR '|' to separate them.
-*/
-void gpio_set(u32 gpioport, u16 gpios)
-{
- GPIO_BSRR(gpioport) = gpios;
-}
-
-/*-----------------------------------------------------------------------------*/
-/** @brief Clear a Group of Pins Atomic
-
-Clear one or more pins of the given GPIO port to 0 in an atomic operation.
-
-@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
-@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
- If multiple pins are to be changed, use logical OR '|' to separate them.
-*/
-void gpio_clear(u32 gpioport, u16 gpios)
-{
- GPIO_BRR(gpioport) = gpios;
-}
-
-/*-----------------------------------------------------------------------------*/
-/** @brief Read a Group of Pins.
-
-@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
-@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
- If multiple pins are to be read, use logical OR '|' to separate them.
-@return Unsigned int16 value of the pin values. The bit position of the pin value
- returned corresponds to the pin number.
-*/
-u16 gpio_get(u32 gpioport, u16 gpios)
-{
- return gpio_port_read(gpioport) & gpios;
-}
-
-/*-----------------------------------------------------------------------------*/
-/** @brief Toggle a Group of Pins
-
-Toggle one or more pins of the given GPIO port. This is not an atomic operation.
-
-@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
-@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
- If multiple pins are to be changed, use logical OR '|' to separate them.
-*/
-void gpio_toggle(u32 gpioport, u16 gpios)
-{
- GPIO_ODR(gpioport) ^= gpios;
-}
-
-/*-----------------------------------------------------------------------------*/
-/** @brief Read from a Port
-
-Read the current value of the given GPIO port. Only the lower 16 bits contain
-valid pin data.
-
-@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
-@return Unsigned int16. The value held in the specified GPIO port.
-*/
-u16 gpio_port_read(u32 gpioport)
-{
- return (u16)GPIO_IDR(gpioport);
-}
-
-/*-----------------------------------------------------------------------------*/
-/** @brief Write to a Port
-
-Write a value to the given GPIO port.
-
-@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
-@param[in] data Unsigned int16. The value to be written to the GPIO port.
-*/
-void gpio_port_write(u32 gpioport, u16 data)
-{
- GPIO_ODR(gpioport) = data;
-}
-
-/*-----------------------------------------------------------------------------*/
-/** @brief Lock the Configuration of a Group of Pins
-
-The configuration of one or more pins of the given GPIO port is locked. There is
-no mechanism to unlock these via software. Unlocking occurs at the next reset.
-
-@param[in] gpioport Unsigned int32. Port identifier @ref gpio_port_id
-@param[in] gpios Unsigned int16. Pin identifiers @ref gpio_pin_id
- If multiple pins are to be locked, use logical OR '|' to separate them.
-*/
-void gpio_port_config_lock(u32 gpioport, u16 gpios)
-{
- u32 reg32;
-
- /* Special "Lock Key Writing Sequence", see datasheet. */
- GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */
- GPIO_LCKR(gpioport) = ~GPIO_LCKK & gpios; /* Clear LCKK. */
- GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */
- reg32 = GPIO_LCKR(gpioport); /* Read LCKK. */
- reg32 = GPIO_LCKR(gpioport); /* Read LCKK again. */
-
- /* Tell the compiler the variable is actually used. It will get optimized out anyways. */
- reg32 = reg32;
-
- /* If (reg32 & GPIO_LCKK) is true, the lock is now active. */
-}
-
-/*-----------------------------------------------------------------------------*/
/** @brief Map the EVENTOUT signal
Enable the EVENTOUT signal and select the port and pin to be used.
@@ -292,7 +164,7 @@ value cannot be ascertained from the hardware.
*/
void gpio_primary_remap(u8 swjdisable, u32 maps)
{
- AFIO_MAPR = swjdisable | (maps & 0x1FFFFF);
+ AFIO_MAPR |= swjdisable | (maps & 0x1FFFFF);
}
/*-----------------------------------------------------------------------------*/
@@ -310,7 +182,7 @@ The AFIO remapping feature is used only with the STM32F10x series.
*/
void gpio_secondary_remap(u32 maps)
{
- AFIO_MAPR2 = maps;
+ AFIO_MAPR2 |= maps;
}
/**@}*/
diff --git a/lib/stm32/f1/rcc.c b/lib/stm32/f1/rcc.c
index ab3350b..9cd8658 100644
--- a/lib/stm32/f1/rcc.c
+++ b/lib/stm32/f1/rcc.c
@@ -71,6 +71,12 @@ void rcc_osc_ready_int_clear(osc_t osc)
case PLL:
RCC_CIR |= RCC_CIR_PLLRDYC;
break;
+ case PLL2:
+ RCC_CIR |= RCC_CIR_PLL2RDYC;
+ break;
+ case PLL3:
+ RCC_CIR |= RCC_CIR_PLL3RDYC;
+ break;
case HSE:
RCC_CIR |= RCC_CIR_HSERDYC;
break;
@@ -98,6 +104,12 @@ void rcc_osc_ready_int_enable(osc_t osc)
case PLL:
RCC_CIR |= RCC_CIR_PLLRDYIE;
break;
+ case PLL2:
+ RCC_CIR |= RCC_CIR_PLL2RDYIE;
+ break;
+ case PLL3:
+ RCC_CIR |= RCC_CIR_PLL3RDYIE;
+ break;
case HSE:
RCC_CIR |= RCC_CIR_HSERDYIE;
break;
@@ -125,6 +137,12 @@ void rcc_osc_ready_int_disable(osc_t osc)
case PLL:
RCC_CIR &= ~RCC_CIR_PLLRDYIE;
break;
+ case PLL2:
+ RCC_CIR &= ~RCC_CIR_PLL2RDYIE;
+ break;
+ case PLL3:
+ RCC_CIR &= ~RCC_CIR_PLL3RDYIE;
+ break;
case HSE:
RCC_CIR &= ~RCC_CIR_HSERDYIE;
break;
@@ -153,6 +171,12 @@ int rcc_osc_ready_int_flag(osc_t osc)
case PLL:
return ((RCC_CIR & RCC_CIR_PLLRDYF) != 0);
break;
+ case PLL2:
+ return ((RCC_CIR & RCC_CIR_PLL2RDYF) != 0);
+ break;
+ case PLL3:
+ return ((RCC_CIR & RCC_CIR_PLL3RDYF) != 0);
+ break;
case HSE:
return ((RCC_CIR & RCC_CIR_HSERDYF) != 0);
break;
@@ -203,6 +227,12 @@ void rcc_wait_for_osc_ready(osc_t osc)
case PLL:
while ((RCC_CR & RCC_CR_PLLRDY) == 0);
break;
+ case PLL2:
+ while ((RCC_CR & RCC_CR_PLL2RDY) == 0);
+ break;
+ case PLL3:
+ while ((RCC_CR & RCC_CR_PLL3RDY) == 0);
+ break;
case HSE:
while ((RCC_CR & RCC_CR_HSERDY) == 0);
break;
@@ -238,6 +268,12 @@ void rcc_osc_on(osc_t osc)
case PLL:
RCC_CR |= RCC_CR_PLLON;
break;
+ case PLL2:
+ RCC_CR |= RCC_CR_PLL2ON;
+ break;
+ case PLL3:
+ RCC_CR |= RCC_CR_PLL3ON;
+ break;
case HSE:
RCC_CR |= RCC_CR_HSEON;
break;
@@ -273,6 +309,12 @@ void rcc_osc_off(osc_t osc)
case PLL:
RCC_CR &= ~RCC_CR_PLLON;
break;
+ case PLL2:
+ RCC_CR &= ~RCC_CR_PLL2ON;
+ break;
+ case PLL3:
+ RCC_CR &= ~RCC_CR_PLL3ON;
+ break;
case HSE:
RCC_CR &= ~RCC_CR_HSEON;
break;
@@ -331,6 +373,8 @@ void rcc_osc_bypass_enable(osc_t osc)
RCC_BDCR |= RCC_BDCR_LSEBYP;
break;
case PLL:
+ case PLL2:
+ case PLL3:
case HSI:
case LSI:
/* Do nothing, only HSE/LSE allowed here. */
@@ -361,6 +405,8 @@ void rcc_osc_bypass_disable(osc_t osc)
RCC_BDCR &= ~RCC_BDCR_LSEBYP;
break;
case PLL:
+ case PLL2:
+ case PLL3:
case HSI:
case LSI:
/* Do nothing, only HSE/LSE allowed here. */
@@ -485,6 +531,40 @@ void rcc_set_pll_multiplication_factor(u32 mul)
}
/*-----------------------------------------------------------------------------*/
+/** @brief RCC Set the PLL2 Multiplication Factor.
+
+@note This only has effect when the PLL is disabled.
+
+@param[in] mul Unsigned int32. PLL multiplication factor @ref rcc_cfgr_pmf
+*/
+
+void rcc_set_pll2_multiplication_factor(u32 mul)
+{
+ u32 reg32;
+
+ reg32 = RCC_CFGR2;
+ reg32 &= ~((1 << 11) | (1 << 10) | (1 << 9) | (1 << 8));
+ RCC_CFGR2 = (reg32 | (mul << 8));
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief RCC Set the PLL3 Multiplication Factor.
+
+@note This only has effect when the PLL is disabled.
+
+@param[in] mul Unsigned int32. PLL multiplication factor @ref rcc_cfgr_pmf
+*/
+
+void rcc_set_pll3_multiplication_factor(u32 mul)
+{
+ u32 reg32;
+
+ reg32 = RCC_CFGR2;
+ reg32 &= ~((1 << 15) | (1 << 14) | (1 << 13) | (1 << 12));
+ RCC_CFGR2 = (reg32 | (mul << 12));
+}
+
+/*-----------------------------------------------------------------------------*/
/** @brief RCC Set the PLL Clock Source.
@note This only has effect when the PLL is disabled.
@@ -602,6 +682,36 @@ void rcc_set_usbpre(u32 usbpre)
RCC_CFGR = (reg32 | (usbpre << 22));
}
+void rcc_set_prediv1(u32 prediv)
+{
+ u32 reg32;
+ reg32 = RCC_CFGR2;
+ reg32 &= ~(1 << 3) | (1 << 2) | (1 << 1) | (1 << 0);
+ RCC_CFGR2 |= (reg32 | prediv);
+}
+
+void rcc_set_prediv2(u32 prediv)
+{
+ u32 reg32;
+ reg32 = RCC_CFGR2;
+ reg32 &= ~(1 << 7) | (1 << 6) | (1 << 5) | (1 << 4);
+ RCC_CFGR2 |= (reg32 | (prediv << 4));
+}
+
+void rcc_set_prediv1_source(u32 rccsrc)
+{
+ RCC_CFGR2 &= ~(1 << 16);
+ RCC_CFGR2 |= (rccsrc << 16);
+}
+
+void rcc_set_mco(u32 mcosrc)
+{
+ u32 reg32;
+ reg32 = RCC_CFGR;
+ reg32 &= ~((1 << 27) | (1 << 26) | (1 << 25) | (1 << 24));
+ RCC_CFGR |= (reg32 | (mcosrc << 24));
+}
+
/*-----------------------------------------------------------------------------*/
/** @brief RCC Get the System Clock Source.
@@ -1031,6 +1141,63 @@ void rcc_clock_setup_in_hse_16mhz_out_72mhz(void)
}
/*-----------------------------------------------------------------------------*/
+/** @brief RCC Set System Clock PLL at 72MHz from HSE at 25MHz
+
+*/
+
+void rcc_clock_setup_in_hse_25mhz_out_72mhz(void)
+{
+ /* Enable external high-speed oscillator 25MHz. */
+ rcc_osc_on(HSE);
+ rcc_wait_for_osc_ready(HSE);
+ rcc_set_sysclk_source(RCC_CFGR_SW_SYSCLKSEL_HSECLK);
+
+ /*
+ * Sysclk runs with 72MHz -> 2 waitstates.
+ * 0WS from 0-24MHz
+ * 1WS from 24-48MHz
+ * 2WS from 48-72MHz
+ */
+ flash_set_ws(FLASH_LATENCY_2WS);
+
+ /*
+ * Set prescalers for AHB, ADC, ABP1, ABP2.
+ * Do this before touching the PLL (TODO: why?).
+ */
+ rcc_set_hpre(RCC_CFGR_HPRE_SYSCLK_NODIV); /* Set. 72MHz Max. 72MHz */
+ rcc_set_adcpre(RCC_CFGR_ADCPRE_PCLK2_DIV6); /* Set. 12MHz Max. 14MHz */
+ rcc_set_ppre1(RCC_CFGR_PPRE1_HCLK_DIV2); /* Set. 36MHz Max. 36MHz */
+ rcc_set_ppre2(RCC_CFGR_PPRE2_HCLK_NODIV); /* Set. 72MHz Max. 72MHz */
+
+ /* Set pll2 prediv and multiplier */
+ rcc_set_prediv2(RCC_CFGR2_PREDIV2_DIV5);
+ rcc_set_pll2_multiplication_factor(RCC_CFGR2_PLL2MUL_PLL2_CLK_MUL8);
+
+ /* Enable PLL2 oscillator and wait for it to stabilize */
+ rcc_osc_on(PLL2);
+ rcc_wait_for_osc_ready(PLL2);
+
+ /* Set pll1 prediv/multiplier, prediv1 src, and usb predivider */
+ rcc_set_pllxtpre(RCC_CFGR_PLLXTPRE_HSE_CLK);
+ rcc_set_prediv1_source(RCC_CFGR2_PREDIV1SRC_PLL2_CLK);
+ rcc_set_prediv1(RCC_CFGR2_PREDIV_DIV5);
+ rcc_set_pll_multiplication_factor(RCC_CFGR_PLLMUL_PLL_CLK_MUL9);
+ rcc_set_pll_source(RCC_CFGR_PLLSRC_PREDIV1_CLK);
+ rcc_set_usbpre(RCC_CFGR_USBPRE_PLL_VCO_CLK_DIV3);
+
+ /* enable PLL1 and wait for it to stabilize */
+ rcc_osc_on(PLL);
+ rcc_wait_for_osc_ready(PLL);
+
+ /* Select PLL as SYSCLK source. */
+ rcc_set_sysclk_source(RCC_CFGR_SW_SYSCLKSEL_PLLCLK);
+
+ /* Set the peripheral clock frequencies used */
+ rcc_ppre1_frequency = 36000000;
+ rcc_ppre2_frequency = 72000000;
+}
+
+/*-----------------------------------------------------------------------------*/
/** @brief RCC Reset the backup domain
The backup domain register is reset to disable all controls.
diff --git a/lib/stm32/f1/rtc.c b/lib/stm32/f1/rtc.c
index 08a4953..cfc5f5b 100644
--- a/lib/stm32/f1/rtc.c
+++ b/lib/stm32/f1/rtc.c
@@ -67,6 +67,8 @@ void rtc_awake_from_off(osc_t clock_source)
RCC_BDCR |= (1 << 9) | (1 << 8);
break;
case PLL:
+ case PLL2:
+ case PLL3:
case HSI:
/* Unusable clock source, here to prevent warnings. */
/* Turn off clock sources to RTC. */
diff --git a/lib/stm32/f2/Makefile b/lib/stm32/f2/Makefile
index 5cbb977..b890fa4 100644
--- a/lib/stm32/f2/Makefile
+++ b/lib/stm32/f2/Makefile
@@ -29,8 +29,9 @@ CFLAGS = -Os -g -Wall -Wextra -I../../../include -fno-common \
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS = rcc.o gpio.o usart.o spi.o flash.o \
- i2c.o exti.o timer.o
+ i2c.o exti2.o timer.o \
+ gpio_common_all.o gpio_common_f24.o
-VPATH += ../../usb:../:../../cm3
+VPATH += ../../usb:../:../../cm3:../common
include ../../Makefile.include
diff --git a/lib/stm32/f2/exti.c b/lib/stm32/f2/exti.c
deleted file mode 100644
index 5280914..0000000
--- a/lib/stm32/f2/exti.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * This file is part of the libopencm3 project.
- *
- * Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
- *
- * This library is free software: you can redistribute it and/or modify
- * it under the terms of the GNU Lesser General Public License as published by
- * the Free Software Foundation, either version 3 of the License, or
- * (at your option) any later version.
- *
- * This library is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU Lesser General Public License for more details.
- *
- * You should have received a copy of the GNU Lesser General Public License
- * along with this library. If not, see <http://www.gnu.org/licenses/>.
- */
-
-#include <libopencm3/stm32/exti.h>
-#include <libopencm3/stm32/f2/syscfg.h>
-#include <libopencm3/stm32/f2/gpio.h>
-
-void exti_set_trigger(u32 extis, exti_trigger_type trig)
-{
- switch (trig) {
- case EXTI_TRIGGER_RISING:
- EXTI_RTSR |= extis;
- EXTI_FTSR &= ~extis;
- break;
- case EXTI_TRIGGER_FALLING:
- EXTI_RTSR &= ~extis;
- EXTI_FTSR |= extis;
- break;
- case EXTI_TRIGGER_BOTH:
- EXTI_RTSR |= extis;
- EXTI_FTSR |= extis;
- break;
- }
-}
-
-void exti_enable_request(u32 extis)
-{
- /* Enable interrupts. */
- EXTI_IMR |= extis;
-
- /* Enable events. */
- EXTI_EMR |= extis;
-}
-
-void exti_disable_request(u32 extis)
-{
- /* Disable interrupts. */
- EXTI_IMR &= ~extis;
-
- /* Disable events. */
- EXTI_EMR &= ~extis;
-}
-
-/*
- * Reset the interrupt request by writing a 1 to the corresponding
- * pending bit register.
- */
-void exti_reset_request(u32 extis)
-{
- EXTI_PR = extis;
-}
-
-/*
- * Remap an external interrupt line to the corresponding pin on the
- * specified GPIO port.
- *
- * TODO: This could be rewritten in fewer lines of code.
- */
-void exti_select_source(u32 exti, u32 gpioport)
-{
- u8 shift, bits;
-
- shift = bits = 0;
-
- switch (exti) {
- case EXTI0:
- case EXTI4:
- case EXTI8:
- case EXTI12:
- shift = 0;
- break;
- case EXTI1:
- case EXTI5:
- case EXTI9:
- case EXTI13:
- shift = 4;
- break;
- case EXTI2:
- case EXTI6:
- case EXTI10:
- case EXTI14:
- shift = 8;
- break;
- case EXTI3:
- case EXTI7:
- case EXTI11:
- case EXTI15:
- shift = 12;
- break;
- }
-
- switch (gpioport) {
- case GPIOA:
- bits = 0xf;
- break;
- case GPIOB:
- bits = 0xe;
- break;
- case GPIOC:
- bits = 0xd;
- break;
- case GPIOD:
- bits = 0xc;
- break;
- case GPIOE:
- bits = 0xb;
- break;
- case GPIOF:
- bits = 0xa;
- break;
- case GPIOG:
- bits = 0x9;
- break;
- }
-
- /* Ensure that only valid EXTI lines are used. */
- if (exti < EXTI4) {
- SYSCFG_EXTICR1 &= ~(0x000F << shift);
- SYSCFG_EXTICR1 |= (~bits << shift);
- } else if (exti < EXTI8) {
- SYSCFG_EXTICR2 &= ~(0x000F << shift);
- SYSCFG_EXTICR2 |= (~bits << shift);
- } else if (exti < EXTI12) {
- SYSCFG_EXTICR3 &= ~(0x000F << shift);
- SYSCFG_EXTICR3 |= (~bits << shift);
- } else if (exti < EXTI16) {
- SYSCFG_EXTICR4 &= ~(0x000F << shift);
- SYSCFG_EXTICR4 |= (~bits << shift);
- }
-}
diff --git a/lib/stm32/f2/gpio.c b/lib/stm32/f2/gpio.c
index c577c3a..a2dfc88 100644
--- a/lib/stm32/f2/gpio.c
+++ b/lib/stm32/f2/gpio.c
@@ -1,8 +1,14 @@
+/** @defgroup gpio_file GPIO
+
+@ingroup STM32F2xx
+
+@brief <b>libopencm3 STM32F2xx General Purpose I/O</b>
+
+*/
+
/*
* This file is part of the libopencm3 project.
*
- * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
- *
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
@@ -17,126 +23,6 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <libopencm3/stm32/f2/gpio.h>
-
-void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios)
-{
- u16 i;
- u32 moder, pupd;
-
- /*
- * We want to set the config only for the pins mentioned in gpios,
- * but keeping the others, so read out the actual config first.
- */
- moder = GPIO_MODER(gpioport);
- pupd = GPIO_PUPDR(gpioport);
-
- for (i = 0; i < 16; i++) {
- if (!((1 << i) & gpios))
- continue;
-
- moder &= ~GPIO_MODE_MASK(i);
- moder |= GPIO_MODE(i, mode);
- pupd &= ~GPIO_PUPD_MASK(i);
- pupd |= GPIO_PUPD(i, pull_up_down);
- }
-
- /* Set mode and pull up/down control registers. */
- GPIO_MODER(gpioport) = moder;
- GPIO_PUPDR(gpioport) = pupd;
-}
-
-void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios)
-{
- u16 i;
- u32 ospeedr;
-
- if (otype == 0x1)
- GPIO_OTYPER(gpioport) |= gpios;
- else
- GPIO_OTYPER(gpioport) &= ~gpios;
-
- ospeedr = GPIO_OSPEEDR(gpioport);
-
- for (i = 0; i < 16; i++) {
- if (!((1 << i) & gpios))
- continue;
- ospeedr &= ~GPIO_OSPEED_MASK(i);
- ospeedr |= GPIO_OSPEED(i, speed);
- }
-
- GPIO_OSPEEDR(gpioport) = ospeedr;
-}
-
-void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios)
-{
- u16 i;
- u32 afrl, afrh;
-
- afrl = GPIO_AFRL(gpioport);
- afrh = GPIO_AFRH(gpioport);
-
- for (i = 0; i < 8; i++) {
- if (!((1 << i) & gpios))
- continue;
- afrl &= ~GPIO_AFR_MASK(i);
- afrl |= GPIO_AFR(i, alt_func_num);
- }
-
- for (i = 8; i < 16; i++) {
- if (!((1 << i) & gpios))
- continue;
- afrh &= ~GPIO_AFR_MASK(i - 8);
- afrh |= GPIO_AFR(i - 8, alt_func_num);
- }
-
- GPIO_AFRL(gpioport) = afrl;
- GPIO_AFRH(gpioport) = afrh;
-}
-
-void gpio_set(u32 gpioport, u16 gpios)
-{
- GPIO_BSRR(gpioport) = gpios;
-}
-
-void gpio_clear(u32 gpioport, u16 gpios)
-{
- GPIO_BSRR(gpioport) = gpios << 16;
-}
-
-u16 gpio_get(u32 gpioport, u16 gpios)
-{
- return gpio_port_read(gpioport) & gpios;
-}
-
-void gpio_toggle(u32 gpioport, u16 gpios)
-{
- GPIO_ODR(gpioport) ^= gpios;
-}
-
-u16 gpio_port_read(u32 gpioport)
-{
- return (u16)GPIO_IDR(gpioport);
-}
-
-void gpio_port_write(u32 gpioport, u16 data)
-{
- GPIO_ODR(gpioport) = data;
-}
-
-void gpio_port_config_lock(u32 gpioport, u16 gpios)
-{
- u32 reg32;
-
- /* Special "Lock Key Writing Sequence", see datasheet. */
- GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */
- GPIO_LCKR(gpioport) = ~GPIO_LCKK & gpios; /* Clear LCKK. */
- GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */
- reg32 = GPIO_LCKR(gpioport); /* Read LCKK. */
- reg32 = GPIO_LCKR(gpioport); /* Read LCKK again. */
-
- /* Tell the compiler the variable is actually used. It will get optimized out anyways. */
- reg32 = reg32;
+#include <libopencm3/stm32/gpio.h>
+#include <libopencm3/stm32/common/gpio_common_f24.h>
- /* If (reg32 & GPIO_LCKK) is true, the lock is now active. */
-}
diff --git a/lib/stm32/f4/Makefile b/lib/stm32/f4/Makefile
index 614a37e..c9ad847 100644
--- a/lib/stm32/f4/Makefile
+++ b/lib/stm32/f4/Makefile
@@ -30,10 +30,11 @@ CFLAGS = -Os -g -Wall -Wextra -I../../../include -fno-common \
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS = rcc.o gpio.o usart.o spi.o flash.o \
- i2c.o exti.o pwr.o timer.o \
+ i2c.o exti2.o pwr.o timer.o \
usb.o usb_standard.o usb_control.o usb_fx07_common.o usb_f107.o \
- usb_f207.o adc.o dma.o
+ usb_f207.o adc.o dma.o \
+ gpio_common_all.o gpio_common_f24.o
-VPATH += ../../usb:../:../../cm3
+VPATH += ../../usb:../:../../cm3:../common
include ../../Makefile.include
diff --git a/lib/stm32/f4/gpio.c b/lib/stm32/f4/gpio.c
index aa2fda4..96a6f45 100644
--- a/lib/stm32/f4/gpio.c
+++ b/lib/stm32/f4/gpio.c
@@ -1,8 +1,14 @@
+/** @defgroup gpio_file GPIO
+
+@ingroup STM32F4xx
+
+@brief <b>libopencm3 STM32F4xx General Purpose I/O</b>
+
+*/
+
/*
* This file is part of the libopencm3 project.
*
- * Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
- *
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
@@ -17,126 +23,6 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <libopencm3/stm32/f4/gpio.h>
-
-void gpio_mode_setup(u32 gpioport, u8 mode, u8 pull_up_down, u16 gpios)
-{
- u16 i;
- u32 moder, pupd;
-
- /*
- * We want to set the config only for the pins mentioned in gpios,
- * but keeping the others, so read out the actual config first.
- */
- moder = GPIO_MODER(gpioport);
- pupd = GPIO_PUPDR(gpioport);
-
- for (i = 0; i < 16; i++) {
- if (!((1 << i) & gpios))
- continue;
-
- moder &= ~GPIO_MODE_MASK(i);
- moder |= GPIO_MODE(i, mode);
- pupd &= ~GPIO_PUPD_MASK(i);
- pupd |= GPIO_PUPD(i, pull_up_down);
- }
-
- /* Set mode and pull up/down control registers. */
- GPIO_MODER(gpioport) = moder;
- GPIO_PUPDR(gpioport) = pupd;
-}
-
-void gpio_set_output_options(u32 gpioport, u8 otype, u8 speed, u16 gpios)
-{
- u16 i;
- u32 ospeedr;
-
- if (otype == 0x1)
- GPIO_OTYPER(gpioport) |= gpios;
- else
- GPIO_OTYPER(gpioport) &= ~gpios;
-
- ospeedr = GPIO_OSPEEDR(gpioport);
-
- for (i = 0; i < 16; i++) {
- if (!((1 << i) & gpios))
- continue;
- ospeedr &= ~GPIO_OSPEED_MASK(i);
- ospeedr |= GPIO_OSPEED(i, speed);
- }
-
- GPIO_OSPEEDR(gpioport) = ospeedr;
-}
-
-void gpio_set_af(u32 gpioport, u8 alt_func_num, u16 gpios)
-{
- u16 i;
- u32 afrl, afrh;
-
- afrl = GPIO_AFRL(gpioport);
- afrh = GPIO_AFRH(gpioport);
-
- for (i = 0; i < 8; i++) {
- if (!((1 << i) & gpios))
- continue;
- afrl &= ~GPIO_AFR_MASK(i);
- afrl |= GPIO_AFR(i, alt_func_num);
- }
-
- for (i = 8; i < 16; i++) {
- if (!((1 << i) & gpios))
- continue;
- afrh &= ~GPIO_AFR_MASK(i - 8);
- afrh |= GPIO_AFR(i - 8, alt_func_num);
- }
-
- GPIO_AFRL(gpioport) = afrl;
- GPIO_AFRH(gpioport) = afrh;
-}
-
-void gpio_set(u32 gpioport, u16 gpios)
-{
- GPIO_BSRR(gpioport) = gpios;
-}
-
-void gpio_clear(u32 gpioport, u16 gpios)
-{
- GPIO_BSRR(gpioport) = gpios << 16;
-}
-
-u16 gpio_get(u32 gpioport, u16 gpios)
-{
- return gpio_port_read(gpioport) & gpios;
-}
-
-void gpio_toggle(u32 gpioport, u16 gpios)
-{
- GPIO_ODR(gpioport) ^= gpios;
-}
-
-u16 gpio_port_read(u32 gpioport)
-{
- return (u16)GPIO_IDR(gpioport);
-}
-
-void gpio_port_write(u32 gpioport, u16 data)
-{
- GPIO_ODR(gpioport) = data;
-}
-
-void gpio_port_config_lock(u32 gpioport, u16 gpios)
-{
- u32 reg32;
-
- /* Special "Lock Key Writing Sequence", see datasheet. */
- GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */
- GPIO_LCKR(gpioport) = ~GPIO_LCKK & gpios; /* Clear LCKK. */
- GPIO_LCKR(gpioport) = GPIO_LCKK | gpios; /* Set LCKK. */
- reg32 = GPIO_LCKR(gpioport); /* Read LCKK. */
- reg32 = GPIO_LCKR(gpioport); /* Read LCKK again. */
-
- /* Tell the compiler the variable is actually used. It will get optimized out anyways. */
- reg32 = reg32;
+#include <libopencm3/stm32/gpio.h>
+#include <libopencm3/stm32/common/gpio_common_f24.h>
- /* If (reg32 & GPIO_LCKK) is true, the lock is now active. */
-}
diff --git a/lib/stm32/i2c.c b/lib/stm32/i2c.c
index e1d3a09..a67bece 100644
--- a/lib/stm32/i2c.c
+++ b/lib/stm32/i2c.c
@@ -125,6 +125,18 @@ void i2c_send_stop(u32 i2c)
}
/*-----------------------------------------------------------------------------*/
+/** @brief I2C Clear Stop Flag.
+
+Clear the "Send Stop" flag in the I2C config register
+
+@param[in] i2c Unsigned int32. I2C register base address @ref i2c_reg_base.
+*/
+void i2c_clear_stop(u32 i2c)
+{
+ I2C_CR1(i2c) &= ~I2C_CR1_STOP;
+}
+
+/*-----------------------------------------------------------------------------*/
/** @brief I2C Set the 7 bit Slave Address for the Peripheral.
This sets an address for Slave mode operation, in 7 bit form.
@@ -269,5 +281,135 @@ void i2c_send_data(u32 i2c, u8 data)
I2C_DR(i2c) = data;
}
-/**@}*/
+/*-----------------------------------------------------------------------------*/
+/** @brief I2C Get Data.
+
+@param[in] i2c Unsigned int32. I2C register base address @ref i2c_reg_base.
+*/
+uint8_t i2c_get_data(u32 i2c)
+{
+ return I2C_DR(i2c) & 0xff;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief I2C Enable Interrupt
+
+@param[in] i2c Unsigned int32. I2C register base address @ref i2c_reg_base.
+@param[in] interrupt Unsigned int32. Interrupt to enable.
+*/
+void i2c_enable_interrupt(u32 i2c, u32 interrupt)
+{
+ I2C_CR2(i2c) |= interrupt;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief I2C Disable Interrupt
+
+@param[in] i2c Unsigned int32. I2C register base address @ref i2c_reg_base.
+@param[in] interrupt Unsigned int32. Interrupt to disable.
+*/
+void i2c_disable_interrupt(u32 i2c, u32 interrupt)
+{
+ I2C_CR2(i2c) &= ~interrupt;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief I2C Enable ACK
+
+Enables acking of own 7/10 bit address
+@param[in] i2c Unsigned int32. I2C register base address @ref i2c_reg_base.
+*/
+void i2c_enable_ack(u32 i2c)
+{
+ I2C_CR1(i2c) |= I2C_CR1_ACK;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief I2C Disable ACK
+
+Disables acking of own 7/10 bit address
+@param[in] i2c Unsigned int32. I2C register base address @ref i2c_reg_base.
+*/
+void i2c_disable_ack(u32 i2c)
+{
+ I2C_CR1(i2c) &= ~I2C_CR1_ACK;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief I2C NACK Next Byte
+
+Causes the I2C controller to NACK the reception of the next byte
+@param[in] i2c Unsigned int32. I2C register base address @ref i2c_reg_base.
+*/
+void i2c_nack_next(u32 i2c)
+{
+ I2C_CR1(i2c) |= I2C_CR1_POS;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief I2C NACK Next Byte
+
+Causes the I2C controller to NACK the reception of the current byte
+
+@param[in] i2c Unsigned int32. I2C register base address @ref i2c_reg_base.
+*/
+void i2c_nack_current(u32 i2c)
+{
+ I2C_CR1(i2c) &= ~I2C_CR1_POS;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief I2C Set clock duty cycle
+
+@param[in] i2c Unsigned int32. I2C register base address @ref i2c_reg_base.
+@param[in] dutycycle Unsigned int32. I2C duty cycle @ref i2c_duty_cycle.
+*/
+void i2c_set_dutycycle(u32 i2c, u32 dutycycle)
+{
+ if (dutycycle == I2C_CCR_DUTY_DIV2)
+ I2C_CCR(i2c) &= ~I2C_CCR_DUTY;
+ else
+ I2C_CCR(i2c) |= I2C_CCR_DUTY;
+}
+/*-----------------------------------------------------------------------------*/
+/** @brief I2C Enable DMA
+
+@param[in] i2c Unsigned int32. I2C register base address @ref i2c_reg_base.
+*/
+void i2c_enable_dma(u32 i2c)
+{
+ I2C_CR2(i2c) |= I2C_CR2_DMAEN;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief I2C Disable DMA
+
+@param[in] i2c Unsigned int32. I2C register base address @ref i2c_reg_base.
+*/
+void i2c_disable_dma(u32 i2c)
+{
+ I2C_CR2(i2c) &= ~I2C_CR2_DMAEN;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief I2C Set DMA last transfer
+
+@param[in] i2c Unsigned int32. I2C register base address @ref i2c_reg_base.
+*/
+void i2c_set_dma_last_transfer(u32 i2c)
+{
+ I2C_CR2(i2c) |= I2C_CR2_LAST;
+}
+
+/*-----------------------------------------------------------------------------*/
+/** @brief I2C Clear DMA last transfer
+
+@param[in] i2c Unsigned int32. I2C register base address @ref i2c_reg_base.
+*/
+void i2c_clear_dma_last_transfer(u32 i2c)
+{
+ I2C_CR2(i2c) &= ~I2C_CR2_LAST;
+}
+
+/**@}*/
diff --git a/lib/stm32/l1/Makefile b/lib/stm32/l1/Makefile
new file mode 100644
index 0000000..7f3e157
--- /dev/null
+++ b/lib/stm32/l1/Makefile
@@ -0,0 +1,37 @@
+##
+## This file is part of the libopencm3 project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This library is free software: you can redistribute it and/or modify
+## it under the terms of the GNU Lesser General Public License as published by
+## the Free Software Foundation, either version 3 of the License, or
+## (at your option) any later version.
+##
+## This library is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU Lesser General Public License for more details.
+##
+## You should have received a copy of the GNU Lesser General Public License
+## along with this library. If not, see <http://www.gnu.org/licenses/>.
+##
+
+LIBNAME = libopencm3_stm32l1
+
+PREFIX ?= arm-none-eabi
+#PREFIX ?= arm-elf
+CC = $(PREFIX)-gcc
+AR = $(PREFIX)-ar
+CFLAGS = -Os -g -Wall -Wextra -I../../../include -fno-common \
+ -mcpu=cortex-m3 -mthumb -Wstrict-prototypes \
+ -ffunction-sections -fdata-sections -MD -DSTM32L1
+# ARFLAGS = rcsv
+ARFLAGS = rcs
+OBJS = rcc.o gpio.o desig.o crc.o usart.o exti2.o \
+ gpio_common_all.o gpio_common_f24.o
+
+VPATH += ../../usb:../:../../cm3:../common
+
+include ../../Makefile.include
+
diff --git a/lib/stm32/l1/gpio.c b/lib/stm32/l1/gpio.c
new file mode 100644
index 0000000..7fc2012
--- /dev/null
+++ b/lib/stm32/l1/gpio.c
@@ -0,0 +1,28 @@
+/** @defgroup gpio_file GPIO
+
+@ingroup STM32L1xx
+
+@brief <b>libopencm3 STM32L1xx General Purpose I/O</b>
+
+*/
+
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <libopencm3/stm32/gpio.h>
+#include <libopencm3/stm32/common/gpio_common_all.h>
+
diff --git a/lib/stm32/l1/libopencm3_stm32l1.ld b/lib/stm32/l1/libopencm3_stm32l1.ld
new file mode 100644
index 0000000..9d165f6
--- /dev/null
+++ b/lib/stm32/l1/libopencm3_stm32l1.ld
@@ -0,0 +1,83 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* Generic linker script for STM32 targets using libopencm3. */
+
+/* Memory regions must be defined in the ld script which includes this one. */
+
+/* Enforce emmition of the vector table. */
+EXTERN (vector_table)
+
+/* Define the entry point of the output file. */
+ENTRY(reset_handler)
+
+/* Define sections. */
+SECTIONS
+{
+ .text : {
+ *(.vectors) /* Vector table */
+ *(.text*) /* Program code */
+ . = ALIGN(4);
+ *(.rodata*) /* Read-only data */
+ . = ALIGN(4);
+ } >rom
+
+ /*
+ * Another section used by C++ stuff, appears when using newlib with
+ * 64bit (long long) printf support
+ */
+ .ARM.extab : {
+ *(.ARM.extab*)
+ } >rom
+ .ARM.exidx : {
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ } >rom
+
+ . = ALIGN(4);
+ _etext = .;
+
+ .data : {
+ _data = .;
+ *(.data*) /* Read-write initialized data */
+ . = ALIGN(4);
+ _edata = .;
+ } >ram AT >rom
+ _data_loadaddr = LOADADDR(.data);
+
+ .bss : {
+ *(.bss*) /* Read-write zero initialized data */
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .;
+ } >ram
+
+ /*
+ * The .eh_frame section appears to be used for C++ exception handling.
+ * You may need to fix this if you're using C++.
+ */
+ /DISCARD/ : { *(.eh_frame) }
+
+ . = ALIGN(4);
+ end = .;
+}
+
+PROVIDE(_stack = ORIGIN(ram) + LENGTH(ram));
+
diff --git a/lib/stm32/l1/rcc.c b/lib/stm32/l1/rcc.c
new file mode 100644
index 0000000..a023622
--- /dev/null
+++ b/lib/stm32/l1/rcc.c
@@ -0,0 +1,357 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2009 Federico Ruiz-Ugalde <memeruiz at gmail dot com>
+ * Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+ * Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
+ * Copyright (C) 2012 Karl Palsson <karlp@tweak.net.au>
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ * Based on the F4 code...
+ */
+
+#include <libopencm3/stm32/l1/rcc.h>
+
+/* Set the default ppre1 and ppre2 peripheral clock frequencies after reset. */
+u32 rcc_ppre1_frequency = 2097000;
+u32 rcc_ppre2_frequency = 2097000;
+
+void rcc_osc_ready_int_clear(osc_t osc)
+{
+ switch (osc) {
+ case PLL:
+ RCC_CIR |= RCC_CIR_PLLRDYC;
+ break;
+ case HSE:
+ RCC_CIR |= RCC_CIR_HSERDYC;
+ break;
+ case HSI:
+ RCC_CIR |= RCC_CIR_HSIRDYC;
+ break;
+ case LSE:
+ RCC_CIR |= RCC_CIR_LSERDYC;
+ break;
+ case LSI:
+ RCC_CIR |= RCC_CIR_LSIRDYC;
+ break;
+ case MSI:
+ RCC_CIR |= RCC_CIR_MSIRDYC;
+ break;
+ }
+}
+
+void rcc_osc_ready_int_enable(osc_t osc)
+{
+ switch (osc) {
+ case PLL:
+ RCC_CIR |= RCC_CIR_PLLRDYIE;
+ break;
+ case HSE:
+ RCC_CIR |= RCC_CIR_HSERDYIE;
+ break;
+ case HSI:
+ RCC_CIR |= RCC_CIR_HSIRDYIE;
+ break;
+ case LSE:
+ RCC_CIR |= RCC_CIR_LSERDYIE;
+ break;
+ case LSI:
+ RCC_CIR |= RCC_CIR_LSIRDYIE;
+ break;
+ case MSI:
+ RCC_CIR |= RCC_CIR_MSIRDYIE;
+ break;
+ }
+}
+
+void rcc_osc_ready_int_disable(osc_t osc)
+{
+ switch (osc) {
+ case PLL:
+ RCC_CIR &= ~RCC_CIR_PLLRDYIE;
+ break;
+ case HSE:
+ RCC_CIR &= ~RCC_CIR_HSERDYIE;
+ break;
+ case HSI:
+ RCC_CIR &= ~RCC_CIR_HSIRDYIE;
+ break;
+ case LSE:
+ RCC_CIR &= ~RCC_CIR_LSERDYIE;
+ break;
+ case LSI:
+ RCC_CIR &= ~RCC_CIR_LSIRDYIE;
+ break;
+ case MSI:
+ RCC_CIR &= ~RCC_CIR_MSIRDYIE;
+ break;
+ }
+}
+
+int rcc_osc_ready_int_flag(osc_t osc)
+{
+ switch (osc) {
+ case PLL:
+ return ((RCC_CIR & RCC_CIR_PLLRDYF) != 0);
+ break;
+ case HSE:
+ return ((RCC_CIR & RCC_CIR_HSERDYF) != 0);
+ break;
+ case HSI:
+ return ((RCC_CIR & RCC_CIR_HSIRDYF) != 0);
+ break;
+ case LSE:
+ return ((RCC_CIR & RCC_CIR_LSERDYF) != 0);
+ break;
+ case LSI:
+ return ((RCC_CIR & RCC_CIR_LSIRDYF) != 0);
+ break;
+ case MSI:
+ return ((RCC_CIR & RCC_CIR_MSIRDYF) != 0);
+ break;
+ }
+
+ /* Shouldn't be reached. */
+ return -1;
+}
+
+void rcc_css_int_clear(void)
+{
+ RCC_CIR |= RCC_CIR_CSSC;
+}
+
+int rcc_css_int_flag(void)
+{
+ return ((RCC_CIR & RCC_CIR_CSSF) != 0);
+}
+
+void rcc_wait_for_osc_ready(osc_t osc)
+{
+ switch (osc) {
+ case PLL:
+ while ((RCC_CR & RCC_CR_PLLRDY) == 0);
+ break;
+ case HSE:
+ while ((RCC_CR & RCC_CR_HSERDY) == 0);
+ break;
+ case HSI:
+ while ((RCC_CR & RCC_CR_HSIRDY) == 0);
+ break;
+ case MSI:
+ while ((RCC_CR & RCC_CR_MSIRDY) == 0);
+ break;
+ case LSE:
+ while ((RCC_CSR & RCC_CSR_LSERDY) == 0);
+ break;
+ case LSI:
+ while ((RCC_CSR & RCC_CSR_LSIRDY) == 0);
+ break;
+ }
+}
+
+void rcc_wait_for_sysclk_status(osc_t osc)
+{
+ switch (osc) {
+ case PLL:
+ while ((RCC_CFGR & ((1 << 1) | (1 << 0))) != RCC_CFGR_SWS_SYSCLKSEL_PLLCLK);
+ break;
+ case HSE:
+ while ((RCC_CFGR & ((1 << 1) | (1 << 0))) != RCC_CFGR_SWS_SYSCLKSEL_HSECLK);
+ break;
+ case HSI:
+ while ((RCC_CFGR & ((1 << 1) | (1 << 0))) != RCC_CFGR_SWS_SYSCLKSEL_HSICLK);
+ break;
+ case MSI:
+ while ((RCC_CFGR & ((1 << 1) | (1 << 0))) != RCC_CFGR_SWS_SYSCLKSEL_MSICLK);
+ break;
+ default:
+ /* Shouldn't be reached. */
+ break;
+ }
+}
+
+void rcc_osc_on(osc_t osc)
+{
+ switch (osc) {
+ case PLL:
+ RCC_CR |= RCC_CR_PLLON;
+ break;
+ case MSI:
+ RCC_CR |= RCC_CR_MSION;
+ break;
+ case HSE:
+ RCC_CR |= RCC_CR_HSEON;
+ break;
+ case HSI:
+ RCC_CR |= RCC_CR_HSION;
+ break;
+ case LSE:
+ RCC_CSR |= RCC_CSR_LSEON;
+ break;
+ case LSI:
+ RCC_CSR |= RCC_CSR_LSION;
+ break;
+ }
+}
+
+void rcc_osc_off(osc_t osc)
+{
+ switch (osc) {
+ case PLL:
+ RCC_CR &= ~RCC_CR_PLLON;
+ break;
+ case MSI:
+ RCC_CR &= ~RCC_CR_MSION;
+ break;
+ case HSE:
+ RCC_CR &= ~RCC_CR_HSEON;
+ break;
+ case HSI:
+ RCC_CR &= ~RCC_CR_HSION;
+ break;
+ case LSE:
+ RCC_CSR &= ~RCC_CSR_LSEON;
+ break;
+ case LSI:
+ RCC_CSR &= ~RCC_CSR_LSION;
+ break;
+ }
+}
+
+void rcc_css_enable(void)
+{
+ RCC_CR |= RCC_CR_CSSON;
+}
+
+void rcc_css_disable(void)
+{
+ RCC_CR &= ~RCC_CR_CSSON;
+}
+
+void rcc_osc_bypass_enable(osc_t osc)
+{
+ switch (osc) {
+ case HSE:
+ RCC_CR |= RCC_CR_HSEBYP;
+ break;
+ case LSE:
+ RCC_CSR |= RCC_CSR_LSEBYP;
+ break;
+ case PLL:
+ case HSI:
+ case LSI:
+ case MSI:
+ /* Do nothing, only HSE/LSE allowed here. */
+ break;
+ }
+}
+
+void rcc_osc_bypass_disable(osc_t osc)
+{
+ switch (osc) {
+ case HSE:
+ RCC_CR &= ~RCC_CR_HSEBYP;
+ break;
+ case LSE:
+ RCC_CSR &= ~RCC_CSR_LSEBYP;
+ break;
+ case PLL:
+ case HSI:
+ case LSI:
+ case MSI:
+ /* Do nothing, only HSE/LSE allowed here. */
+ break;
+ }
+}
+
+void rcc_peripheral_enable_clock(volatile u32 *reg, u32 en)
+{
+ *reg |= en;
+}
+
+void rcc_peripheral_disable_clock(volatile u32 *reg, u32 en)
+{
+ *reg &= ~en;
+}
+
+void rcc_peripheral_reset(volatile u32 *reg, u32 reset)
+{
+ *reg |= reset;
+}
+
+void rcc_peripheral_clear_reset(volatile u32 *reg, u32 clear_reset)
+{
+ *reg &= ~clear_reset;
+}
+
+void rcc_set_sysclk_source(u32 clk)
+{
+ u32 reg32;
+
+ reg32 = RCC_CFGR;
+ reg32 &= ~((1 << 1) | (1 << 0));
+ RCC_CFGR = (reg32 | clk);
+}
+
+void rcc_set_pll_source(u32 pllsrc)
+{
+ u32 reg32;
+
+ reg32 = RCC_CFGR;
+ reg32 &= ~(1 << 16);
+ RCC_CFGR = (reg32 | (pllsrc << 16));
+}
+
+void rcc_set_ppre2(u32 ppre2)
+{
+ u32 reg32;
+
+ reg32 = RCC_CFGR;
+ reg32 &= ~((1 << 13) | (1 << 12) | (1 << 11));
+ RCC_CFGR = (reg32 | (ppre2 << 11));
+}
+
+void rcc_set_ppre1(u32 ppre1)
+{
+ u32 reg32;
+
+ reg32 = RCC_CFGR;
+ reg32 &= ~((1 << 10) | (1 << 9) | (1 << 8));
+ RCC_CFGR = (reg32 | (ppre1 << 8));
+}
+
+void rcc_set_hpre(u32 hpre)
+{
+ u32 reg32;
+
+ reg32 = RCC_CFGR;
+ reg32 &= ~((1 << 4) | (1 << 5) | (1 << 6) | (1 << 7));
+ RCC_CFGR = (reg32 | (hpre << 4));
+}
+
+void rcc_set_rtcpre(u32 rtcpre)
+{
+ u32 reg32;
+
+ reg32 = RCC_CR;
+ reg32 &= ~((1 << 30) | (1 << 29));
+ RCC_CR = (reg32 | (rtcpre << 29));
+}
+
+u32 rcc_system_clock_source(void)
+{
+ /* Return the clock source which is used as system clock. */
+ return ((RCC_CFGR & 0x000c) >> 2);
+}
+
diff --git a/lib/stm32/l1/stm32l15xx8.ld b/lib/stm32/l1/stm32l15xx8.ld
new file mode 100644
index 0000000..1f20f57
--- /dev/null
+++ b/lib/stm32/l1/stm32l15xx8.ld
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2012 Karl Palsson <karlp@tweak.net.au
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* Linker script for STM32L15xx8, 64K flash, 10K RAM. */
+
+/* Define memory regions. */
+MEMORY
+{
+ rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K
+ ram (rwx) : ORIGIN = 0x20000000, LENGTH = 10K
+}
+
+/* Include the common ld script. */
+INCLUDE libopencm3_stm32l1.ld
+
diff --git a/lib/stm32/l1/stm32l15xxb.ld b/lib/stm32/l1/stm32l15xxb.ld
new file mode 100644
index 0000000..4c14b71
--- /dev/null
+++ b/lib/stm32/l1/stm32l15xxb.ld
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the libopencm3 project.
+ *
+ * Copyright (C) 2012 Karl Palsson <karlp@tweak.net.au
+ *
+ * This library is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU Lesser General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public License
+ * along with this library. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* Linker script for STM32L15xxB, 128K flash, 16K RAM. */
+
+/* Define memory regions. */
+MEMORY
+{
+ rom (rx) : ORIGIN = 0x08000000, LENGTH = 128K
+ ram (rwx) : ORIGIN = 0x20000000, LENGTH = 16K
+}
+
+/* Include the common ld script. */
+INCLUDE libopencm3_stm32l1.ld
+
diff --git a/lib/stm32/usart.c b/lib/stm32/usart.c
index 454df41..cb46db8 100644
--- a/lib/stm32/usart.c
+++ b/lib/stm32/usart.c
@@ -46,6 +46,8 @@ LGPL License Terms @ref lgpl_license
# include <libopencm3/stm32/f2/rcc.h>
#elif defined(STM32F4)
# include <libopencm3/stm32/f4/rcc.h>
+#elif defined(STM32L1)
+# include <libopencm3/stm32/l1/rcc.h>
#else
# error "stm32 family not defined."
#endif
diff --git a/lib/usb/usb.c b/lib/usb/usb.c
index ecebde2..0799202 100644
--- a/lib/usb/usb.c
+++ b/lib/usb/usb.c
@@ -44,7 +44,7 @@ u8 usbd_control_buffer[128] __attribute__((weak));
usbd_device *usbd_init(const usbd_driver *driver,
const struct usb_device_descriptor *dev,
const struct usb_config_descriptor *conf,
- const char **strings)
+ const char **strings, int num_strings)
{
usbd_device *usbd_dev;
@@ -54,6 +54,7 @@ usbd_device *usbd_init(const usbd_driver *driver,
usbd_dev->desc = dev;
usbd_dev->config = conf;
usbd_dev->strings = strings;
+ usbd_dev->num_strings = num_strings;
usbd_dev->ctrl_buf = usbd_control_buffer;
usbd_dev->ctrl_buf_len = sizeof(usbd_control_buffer);
diff --git a/lib/usb/usb_control.c b/lib/usb/usb_control.c
index 245ab1c..82843df 100644
--- a/lib/usb/usb_control.c
+++ b/lib/usb/usb_control.c
@@ -99,11 +99,12 @@ static int usb_control_request_dispatch(usbd_device *usbd_dev,
&(usbd_dev->control_state.ctrl_buf),
&(usbd_dev->control_state.ctrl_len),
&(usbd_dev->control_state.complete));
- if (result)
+ if (result == USBD_REQ_HANDLED ||
+ result == USBD_REQ_NOTSUPP)
return result;
}
}
-
+
/* Try standard request if not already handled. */
return _usbd_standard_request(usbd_dev, req,
&(usbd_dev->control_state.ctrl_buf),
diff --git a/lib/usb/usb_private.h b/lib/usb/usb_private.h
index 2506ba5..454e8c6 100644
--- a/lib/usb/usb_private.h
+++ b/lib/usb/usb_private.h
@@ -29,6 +29,7 @@ struct _usbd_device {
const struct usb_device_descriptor *desc;
const struct usb_config_descriptor *config;
const char **strings;
+ int num_strings;
u8 *ctrl_buf; /**< Internal buffer used for control transfers */
u16 ctrl_buf_len;
diff --git a/lib/usb/usb_standard.c b/lib/usb/usb_standard.c
index 5a92cd8..e14fee3 100644
--- a/lib/usb/usb_standard.c
+++ b/lib/usb/usb_standard.c
@@ -90,52 +90,75 @@ static u16 build_config_descriptor(usbd_device *usbd_dev,
return total;
}
+static int usb_descriptor_type(u16 wValue)
+{
+ return wValue >> 8;
+}
+
+static int usb_descriptor_index(u16 wValue)
+{
+ return wValue & 0xFF;
+}
+
static int usb_standard_get_descriptor(usbd_device *usbd_dev,
struct usb_setup_data *req,
u8 **buf, u16 *len)
{
- int i;
+ int i, array_idx, descr_idx;
struct usb_string_descriptor *sd;
- switch (req->wValue >> 8) {
+ descr_idx = usb_descriptor_index(req->wValue);
+
+ switch (usb_descriptor_type(req->wValue)) {
case USB_DT_DEVICE:
*buf = (u8 *) usbd_dev->desc;
*len = MIN(*len, usbd_dev->desc->bLength);
- return 1;
+ return USBD_REQ_HANDLED;
case USB_DT_CONFIGURATION:
*buf = usbd_dev->ctrl_buf;
- *len = build_config_descriptor(usbd_dev, req->wValue & 0xff,
- *buf, *len);
- return 1;
+ *len = build_config_descriptor(usbd_dev, descr_idx, *buf, *len);
+ return USBD_REQ_HANDLED;
case USB_DT_STRING:
sd = (struct usb_string_descriptor *)usbd_dev->ctrl_buf;
- if (!usbd_dev->strings)
- return 0; /* Device doesn't support strings. */
+ if (descr_idx == 0) {
+ /* Send sane Language ID descriptor... */
+ sd->wData[0] = USB_LANGID_ENGLISH_US;
+ sd->bLength = sizeof(sd->bLength) + sizeof(sd->bDescriptorType)
+ + sizeof(sd->wData[0]);
- /* Check that string index is in range. */
- for (i = 0; i <= (req->wValue & 0xff); i++)
- if (usbd_dev->strings[i] == NULL)
- return 0;
+ *len = MIN(*len, sd->bLength);
+ } else {
+ array_idx = descr_idx - 1;
- sd->bLength = strlen(usbd_dev->strings[req->wValue & 0xff])
- * 2 + 2;
- sd->bDescriptorType = USB_DT_STRING;
+ if (!usbd_dev->strings)
+ return USBD_REQ_NOTSUPP; /* Device doesn't support strings. */
+ /* Check that string index is in range. */
+ if (array_idx >= usbd_dev->num_strings)
+ return USBD_REQ_NOTSUPP;
- *buf = (u8 *)sd;
- *len = MIN(*len, sd->bLength);
+ /* Strings with Language ID differnet from
+ * USB_LANGID_ENGLISH_US are not supported */
+ if (req->wIndex != USB_LANGID_ENGLISH_US)
+ return USBD_REQ_NOTSUPP;
- for (i = 0; i < (*len / 2) - 1; i++)
- sd->wData[i] =
- usbd_dev->strings[req->wValue & 0xff][i];
+ /* Ths string is returned as UTF16, hence the multiplication */
+ sd->bLength = strlen(usbd_dev->strings[array_idx]) * 2 +
+ sizeof(sd->bLength) + sizeof(sd->bDescriptorType);
- /* Send sane Language ID descriptor... */
- if ((req->wValue & 0xff) == 0)
- sd->wData[0] = 0x409;
+ *len = MIN(*len, sd->bLength);
- return 1;
+ for (i = 0; i < (*len / 2) - 1; i++)
+ sd->wData[i] =
+ usbd_dev->strings[array_idx][i];
+ }
+
+ sd->bDescriptorType = USB_DT_STRING;
+ *buf = (u8 *)sd;
+
+ return USBD_REQ_HANDLED;
}
- return 0;
+ return USBD_REQ_NOTSUPP;
}
static int usb_standard_set_address(usbd_device *usbd_dev,