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authorKarl Palsson2012-11-14 00:10:03 +0000
committerKarl Palsson2012-11-14 00:16:56 +0000
commitdf1808e2dca719a18067e8f4d9ef7b74fd7e84da (patch)
tree83784332285f54625fcea68434f9fdb7a4fe04cd /lib/stm32/l1/Makefile
parent40f3ac58fb00ef4899638b6a42c4d7d1eaa643ce (diff)
[l1] Add rcc clock setup helper routines
Despite the L1 being a low power device, my initial focus is on making it basically compatible with existing devices. To that end, provide clock setup helper routines that configure it for maximum performance, allowing some similar clock speeds to F1 devices to help with testing. This requires adding the power chipset routines to set the voltage range. Clock setup style is similar to the F4 code, which seems nicer than the overflow of different routines used on the F1 code. NOTE: Both the F4 existing pwr code, and this code don't actually include the f1 core power code, even though it should be compatible
Diffstat (limited to 'lib/stm32/l1/Makefile')
-rw-r--r--lib/stm32/l1/Makefile6
1 files changed, 4 insertions, 2 deletions
diff --git a/lib/stm32/l1/Makefile b/lib/stm32/l1/Makefile
index dc587c2..cecc95c 100644
--- a/lib/stm32/l1/Makefile
+++ b/lib/stm32/l1/Makefile
@@ -28,8 +28,10 @@ CFLAGS = -Os -g -Wall -Wextra -I../../../include -fno-common \
-ffunction-sections -fdata-sections -MD -DSTM32L1
# ARFLAGS = rcsv
ARFLAGS = rcs
-OBJS = rcc.o gpio.o desig.o crc.o usart.o exti2.o \
- flash.o gpio_common_all.o gpio_common_f24.o
+OBJS = rcc.o gpio.o desig.o crc.o usart.o exti2.o
+OBJS += flash.o gpio_common_all.o gpio_common_f24.o
+OBJS += pwr_chipset.o # TODO, get pwr.o to fix f2/f4 first... pwr.o
+#OBJS += timer.o # WORK IN PROGRESS
VPATH += ../../usb:../:../../cm3:../common