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authorKarl Palsson2013-01-22 21:51:24 +0000
committerKarl Palsson2013-01-22 21:51:24 +0000
commit48eed286b98c6f5389c91be4a82e4e2bef6fc99d (patch)
tree45a96d5286fd031da2c76a555daf16e0de2d8139 /include/libopencm3/stm32/l1/pwr.h
parent20bfcaeb1c773012f1c41e004915b72f6abba352 (diff)
[l1] fix whitespace and missing license info
Earlier additions to the L1 support were not correctly using linux coding guidelines as specified in /HACKING. Some examples were also missing license information.
Diffstat (limited to 'include/libopencm3/stm32/l1/pwr.h')
-rw-r--r--include/libopencm3/stm32/l1/pwr.h28
1 files changed, 13 insertions, 15 deletions
diff --git a/include/libopencm3/stm32/l1/pwr.h b/include/libopencm3/stm32/l1/pwr.h
index 309b464..41992d7 100644
--- a/include/libopencm3/stm32/l1/pwr.h
+++ b/include/libopencm3/stm32/l1/pwr.h
@@ -33,49 +33,47 @@
/* Bits [31:15]: Reserved */
/* LPRUN: Low power run mode */
-#define PWR_CR_LPRUN (1 << 14)
+#define PWR_CR_LPRUN (1 << 14)
/* VOS[12:11]: Regulator voltage scaling output selection */
-#define PWR_CR_VOS_LSB 11
+#define PWR_CR_VOS_LSB 11
/** @defgroup pwr_vos Voltage Scaling Output level selection
@ingroup STM32F_pwr_defines
@{*/
-#define PWR_CR_VOS_RANGE1 (0x1 << PWR_CR_VOS_LSB)
-#define PWR_CR_VOS_RANGE2 (0x2 << PWR_CR_VOS_LSB)
-#define PWR_CR_VOS_RANGE3 (0x3 << PWR_CR_VOS_LSB)
+#define PWR_CR_VOS_RANGE1 (0x1 << PWR_CR_VOS_LSB)
+#define PWR_CR_VOS_RANGE2 (0x2 << PWR_CR_VOS_LSB)
+#define PWR_CR_VOS_RANGE3 (0x3 << PWR_CR_VOS_LSB)
/**@}*/
-#define PWR_CR_VOS_MASK (0x3 << PWR_CR_VOS_LSB)
+#define PWR_CR_VOS_MASK (0x3 << PWR_CR_VOS_LSB)
/* FWU: Fast wakeup */
-#define PWR_CR_FWU (1 << 10)
+#define PWR_CR_FWU (1 << 10)
/* ULP: Ultralow power mode */
-#define PWR_CR_ULP (1 << 9)
+#define PWR_CR_ULP (1 << 9)
/* --- PWR_CSR values ------------------------------------------------------- */
/* Bits [31:11]: Reserved */
/* EWUP3: Enable WKUP3 pin */
-#define PWR_CSR_EWUP3 (1 << 10)
+#define PWR_CSR_EWUP3 (1 << 10)
/* EWUP2: Enable WKUP2 pin */
-#define PWR_CSR_EWUP2 (1 << 9)
+#define PWR_CSR_EWUP2 (1 << 9)
/* EWUP1: Enable WKUP1 pin */
-#define PWR_CSR_EWUP1 PWR_CSR_EWUP
+#define PWR_CSR_EWUP1 PWR_CSR_EWUP
/* REGLPF : Regulator LP flag */
-#define PWR_CSR_REGLPF (1 << 5)
+#define PWR_CSR_REGLPF (1 << 5)
/* VOSF: Voltage Scaling select flag */
-#define PWR_CSR_VOSF (1 << 4)
+#define PWR_CSR_VOSF (1 << 4)
/* VREFINTRDYF: Internal voltage reference (VREFINT) ready flag */
#define PWR_CSR_VREFINTRDYF (1 << 3)
-
-
/* --- Function prototypes ------------------------------------------------- */
typedef enum {