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authorKen Sarkies2013-03-09 14:39:01 +1030
committerKen Sarkies2013-03-09 14:39:01 +1030
commit5b8953124e8c00cdf05169de6e304834cefacf63 (patch)
treed5e4fb881e3527bc19de848f841fdea69094b0af /include/libopencm3/stm32/f4/timer.h
parenta9a85f080bb8fc729125d3ad162058f063496e60 (diff)
This mainly moves the STM32 timers' code to the common area.
F2 and F4 have a common section to deal with the options register (TIM2 and TIM5 only) L1 has been made common with timer_common_all as its options register has very different settings to F2/F4. Code is in the L1/timer.c L1/timer.h files Note that F3 and F05 timers should fit into this scheme, with F3 having additional features. Bundled with this is L1/pwr.h to change a documentation setting Also all the Doxyfiles have added "ENABLE_PREPROCESSING = NO" to fix a problem introduced by commit 118.
Diffstat (limited to 'include/libopencm3/stm32/f4/timer.h')
-rw-r--r--include/libopencm3/stm32/f4/timer.h56
1 files changed, 17 insertions, 39 deletions
diff --git a/include/libopencm3/stm32/f4/timer.h b/include/libopencm3/stm32/f4/timer.h
index 988d02c..604a83f 100644
--- a/include/libopencm3/stm32/f4/timer.h
+++ b/include/libopencm3/stm32/f4/timer.h
@@ -1,3 +1,17 @@
+/** @defgroup timer_defines Timer Defines
+
+@brief <b>libopencm3 Defined Constants and Types for the STM32F4xx Timers</b>
+
+@ingroup STM32F4xx_defines
+
+@version 1.0.0
+
+@date 8 March 2013
+
+@author @htmlonly &copy; @endhtmlonly 2011 Fergus Noble <fergusnoble@gmail.com>
+
+LGPL License Terms @ref lgpl_license
+ */
/*
* This file is part of the libopencm3 project.
*
@@ -17,45 +31,9 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef LIBOPENCM3_TIMER_F4_H
-#define LIBOPENCM3_TIMER_F4_H
-
-#include <libopencm3/stm32/timer.h>
-
-/*
- * TIM2 and TIM5 are now 32bit and the following registers are now 32-bit wide:
- * CNT, ARR, CCR1, CCR2, CCR3, CCR4
- */
-
-/* Timer 2/5 option register (TIMx_OR) */
-#define TIM_OR(tim_base) MMIO32(tim_base + 0x50)
-#define TIM2_OR TIM_OR(TIM2)
-#define TIM5_OR TIM_OR(TIM5)
-
-/* --- TIM2_OR values ---------------------------------------------------- */
-
-/* MOE: Main output enable */
-#define TIM2_OR_ITR1_RMP_TIM8_TRGOU (0x0 << 10)
-#define TIM2_OR_ITR1_RMP_PTP (0x1 << 10)
-#define TIM2_OR_ITR1_RMP_OTG_FS_SOF (0x2 << 10)
-#define TIM2_OR_ITR1_RMP_OTG_HS_SOF (0x3 << 10)
-#define TIM2_OR_ITR1_RMP_MASK (0x3 << 10)
-
-/* --- TIM5_OR values ---------------------------------------------------- */
-
-/* MOE: Main output enable */
-#define TIM5_OR_TI4_RMP_GPIO (0x0 << 6)
-#define TIM5_OR_TI4_RMP_LSI (0x1 << 6)
-#define TIM5_OR_TI4_RMP_LSE (0x2 << 6)
-#define TIM5_OR_TI4_RMP_RTC (0x3 << 6)
-#define TIM5_OR_TI4_RMP_MASK (0x3 << 6)
-
-/* --- Function prototypes ------------------------------------------------- */
-
-BEGIN_DECLS
-
-void timer_set_option(u32 timer_peripheral, u32 option);
+#ifndef LIBOPENCM3_TIMER_H
+#define LIBOPENCM3_TIMER_H
-END_DECLS
+#include <libopencm3/stm32/common/timer_common_f24.h>
#endif